Tue Oct 27 08:32:36 2020 UTC ()
Add tests for AVX-512 registers (zmm0..zmm31, k0..7)

Thanks to David Seifert <soap@gentoo.org> for providing a VM
on an AVX-512 capable hardware

Reviewed by kamil


(mgorny)
diff -r1.30 -r1.31 src/tests/lib/libc/sys/t_ptrace_x86_wait.h
cvs diff -r1.30 -r1.31 src/tests/lib/libc/sys/t_ptrace_x86_wait.h (switch to unified diff)

--- src/tests/lib/libc/sys/t_ptrace_x86_wait.h 2020/10/24 07:14:30 1.30
+++ src/tests/lib/libc/sys/t_ptrace_x86_wait.h 2020/10/27 08:32:36 1.31
@@ -1,1000 +1,1000 @@ @@ -1,1000 +1,1000 @@
1/* $NetBSD: t_ptrace_x86_wait.h,v 1.30 2020/10/24 07:14:30 mgorny Exp $ */ 1/* $NetBSD: t_ptrace_x86_wait.h,v 1.31 2020/10/27 08:32:36 mgorny Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2016, 2017, 2018, 2019 The NetBSD Foundation, Inc. 4 * Copyright (c) 2016, 2017, 2018, 2019 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
15 * 15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE. 26 * POSSIBILITY OF SUCH DAMAGE.
27 */ 27 */
28 28
29#if defined(__i386__) || defined(__x86_64__) 29#if defined(__i386__) || defined(__x86_64__)
30union u { 30union u {
31 unsigned long raw; 31 unsigned long raw;
32 struct { 32 struct {
33 unsigned long local_dr0_breakpoint : 1; /* 0 */ 33 unsigned long local_dr0_breakpoint : 1; /* 0 */
34 unsigned long global_dr0_breakpoint : 1; /* 1 */ 34 unsigned long global_dr0_breakpoint : 1; /* 1 */
35 unsigned long local_dr1_breakpoint : 1; /* 2 */ 35 unsigned long local_dr1_breakpoint : 1; /* 2 */
36 unsigned long global_dr1_breakpoint : 1; /* 3 */ 36 unsigned long global_dr1_breakpoint : 1; /* 3 */
37 unsigned long local_dr2_breakpoint : 1; /* 4 */ 37 unsigned long local_dr2_breakpoint : 1; /* 4 */
38 unsigned long global_dr2_breakpoint : 1; /* 5 */ 38 unsigned long global_dr2_breakpoint : 1; /* 5 */
39 unsigned long local_dr3_breakpoint : 1; /* 6 */ 39 unsigned long local_dr3_breakpoint : 1; /* 6 */
40 unsigned long global_dr3_breakpoint : 1; /* 7 */ 40 unsigned long global_dr3_breakpoint : 1; /* 7 */
41 unsigned long local_exact_breakpt : 1; /* 8 */ 41 unsigned long local_exact_breakpt : 1; /* 8 */
42 unsigned long global_exact_breakpt : 1; /* 9 */ 42 unsigned long global_exact_breakpt : 1; /* 9 */
43 unsigned long reserved_10 : 1; /* 10 */ 43 unsigned long reserved_10 : 1; /* 10 */
44 unsigned long rest_trans_memory : 1; /* 11 */ 44 unsigned long rest_trans_memory : 1; /* 11 */
45 unsigned long reserved_12 : 1; /* 12 */ 45 unsigned long reserved_12 : 1; /* 12 */
46 unsigned long general_detect_enable : 1; /* 13 */ 46 unsigned long general_detect_enable : 1; /* 13 */
47 unsigned long reserved_14 : 1; /* 14 */ 47 unsigned long reserved_14 : 1; /* 14 */
48 unsigned long reserved_15 : 1; /* 15 */ 48 unsigned long reserved_15 : 1; /* 15 */
49 unsigned long condition_dr0 : 2; /* 16-17 */ 49 unsigned long condition_dr0 : 2; /* 16-17 */
50 unsigned long len_dr0 : 2; /* 18-19 */ 50 unsigned long len_dr0 : 2; /* 18-19 */
51 unsigned long condition_dr1 : 2; /* 20-21 */ 51 unsigned long condition_dr1 : 2; /* 20-21 */
52 unsigned long len_dr1 : 2; /* 22-23 */ 52 unsigned long len_dr1 : 2; /* 22-23 */
53 unsigned long condition_dr2 : 2; /* 24-25 */ 53 unsigned long condition_dr2 : 2; /* 24-25 */
54 unsigned long len_dr2 : 2; /* 26-27 */ 54 unsigned long len_dr2 : 2; /* 26-27 */
55 unsigned long condition_dr3 : 2; /* 28-29 */ 55 unsigned long condition_dr3 : 2; /* 28-29 */
56 unsigned long len_dr3 : 2; /* 30-31 */ 56 unsigned long len_dr3 : 2; /* 30-31 */
57 } bits; 57 } bits;
58}; 58};
59 59
60ATF_TC(dbregs_print); 60ATF_TC(dbregs_print);
61ATF_TC_HEAD(dbregs_print, tc) 61ATF_TC_HEAD(dbregs_print, tc)
62{ 62{
63 atf_tc_set_md_var(tc, "descr", 63 atf_tc_set_md_var(tc, "descr",
64 "Verify plain PT_GETDBREGS with printing Debug Registers"); 64 "Verify plain PT_GETDBREGS with printing Debug Registers");
65} 65}
66 66
67ATF_TC_BODY(dbregs_print, tc) 67ATF_TC_BODY(dbregs_print, tc)
68{ 68{
69 const int exitval = 5; 69 const int exitval = 5;
70 const int sigval = SIGSTOP; 70 const int sigval = SIGSTOP;
71 pid_t child, wpid; 71 pid_t child, wpid;
72#if defined(TWAIT_HAVE_STATUS) 72#if defined(TWAIT_HAVE_STATUS)
73 int status; 73 int status;
74#endif 74#endif
75 struct dbreg r; 75 struct dbreg r;
76 size_t i; 76 size_t i;
77 77
78 DPRINTF("Before forking process PID=%d\n", getpid()); 78 DPRINTF("Before forking process PID=%d\n", getpid());
79 SYSCALL_REQUIRE((child = fork()) != -1); 79 SYSCALL_REQUIRE((child = fork()) != -1);
80 if (child == 0) { 80 if (child == 0) {
81 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 81 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
82 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 82 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
83 83
84 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 84 DPRINTF("Before raising %s from child\n", strsignal(sigval));
85 FORKEE_ASSERT(raise(sigval) == 0); 85 FORKEE_ASSERT(raise(sigval) == 0);
86 86
87 DPRINTF("Before exiting of the child process\n"); 87 DPRINTF("Before exiting of the child process\n");
88 _exit(exitval); 88 _exit(exitval);
89 } 89 }
90 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 90 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
91 91
92 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 92 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
93 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 93 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
94 94
95 validate_status_stopped(status, sigval);  95 validate_status_stopped(status, sigval);
96 96
97 DPRINTF("Call GETDBREGS for the child process\n"); 97 DPRINTF("Call GETDBREGS for the child process\n");
98 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r, 0) != -1); 98 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r, 0) != -1);
99 99
100 DPRINTF("State of the debug registers:\n"); 100 DPRINTF("State of the debug registers:\n");
101 for (i = 0; i < __arraycount(r.dr); i++) 101 for (i = 0; i < __arraycount(r.dr); i++)
102 DPRINTF("r[%zu]=%" PRIxREGISTER "\n", i, r.dr[i]); 102 DPRINTF("r[%zu]=%" PRIxREGISTER "\n", i, r.dr[i]);
103 103
104 DPRINTF("Before resuming the child process where it left off and " 104 DPRINTF("Before resuming the child process where it left off and "
105 "without signal to be sent\n"); 105 "without signal to be sent\n");
106 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 106 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
107 107
108 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 108 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
109 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 109 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
110 110
111 validate_status_exited(status, exitval); 111 validate_status_exited(status, exitval);
112 112
113 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 113 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
114 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 114 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
115} 115}
116 116
117 117
118enum dbreg_preserve_mode { 118enum dbreg_preserve_mode {
119 dbreg_preserve_mode_none, 119 dbreg_preserve_mode_none,
120 dbreg_preserve_mode_yield, 120 dbreg_preserve_mode_yield,
121 dbreg_preserve_mode_continued 121 dbreg_preserve_mode_continued
122}; 122};
123 123
124static void 124static void
125dbreg_preserve(int reg, enum dbreg_preserve_mode mode) 125dbreg_preserve(int reg, enum dbreg_preserve_mode mode)
126{ 126{
127 const int exitval = 5; 127 const int exitval = 5;
128 const int sigval = SIGSTOP; 128 const int sigval = SIGSTOP;
129 pid_t child, wpid; 129 pid_t child, wpid;
130#if defined(TWAIT_HAVE_STATUS) 130#if defined(TWAIT_HAVE_STATUS)
131 int status; 131 int status;
132#endif 132#endif
133 struct dbreg r1; 133 struct dbreg r1;
134 struct dbreg r2; 134 struct dbreg r2;
135 size_t i; 135 size_t i;
136 int watchme; 136 int watchme;
137 137
138 if (!can_we_set_dbregs()) { 138 if (!can_we_set_dbregs()) {
139 atf_tc_skip("Either run this test as root or set sysctl(3) " 139 atf_tc_skip("Either run this test as root or set sysctl(3) "
140 "security.models.extensions.user_set_dbregs to 1"); 140 "security.models.extensions.user_set_dbregs to 1");
141 } 141 }
142 142
143 DPRINTF("Before forking process PID=%d\n", getpid()); 143 DPRINTF("Before forking process PID=%d\n", getpid());
144 SYSCALL_REQUIRE((child = fork()) != -1); 144 SYSCALL_REQUIRE((child = fork()) != -1);
145 if (child == 0) { 145 if (child == 0) {
146 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 146 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
147 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 147 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
148 148
149 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 149 DPRINTF("Before raising %s from child\n", strsignal(sigval));
150 FORKEE_ASSERT(raise(sigval) == 0); 150 FORKEE_ASSERT(raise(sigval) == 0);
151 151
152 if (mode == dbreg_preserve_mode_continued) { 152 if (mode == dbreg_preserve_mode_continued) {
153 DPRINTF("Before raising %s from child\n", 153 DPRINTF("Before raising %s from child\n",
154 strsignal(sigval)); 154 strsignal(sigval));
155 FORKEE_ASSERT(raise(sigval) == 0); 155 FORKEE_ASSERT(raise(sigval) == 0);
156 } 156 }
157 157
158 DPRINTF("Before exiting of the child process\n"); 158 DPRINTF("Before exiting of the child process\n");
159 _exit(exitval); 159 _exit(exitval);
160 } 160 }
161 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 161 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
162 162
163 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 163 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
164 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 164 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
165 165
166 validate_status_stopped(status, sigval); 166 validate_status_stopped(status, sigval);
167 167
168 DPRINTF("Call GETDBREGS for the child process (r1)\n"); 168 DPRINTF("Call GETDBREGS for the child process (r1)\n");
169 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1); 169 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1);
170 170
171 DPRINTF("State of the debug registers (r1):\n"); 171 DPRINTF("State of the debug registers (r1):\n");
172 for (i = 0; i < __arraycount(r1.dr); i++) 172 for (i = 0; i < __arraycount(r1.dr); i++)
173 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 173 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
174 174
175 r1.dr[reg] = (long)(intptr_t)&watchme; 175 r1.dr[reg] = (long)(intptr_t)&watchme;
176 DPRINTF("Set DR0 (r1.dr[%d]) to new value %" PRIxREGISTER "\n", 176 DPRINTF("Set DR0 (r1.dr[%d]) to new value %" PRIxREGISTER "\n",
177 reg, r1.dr[reg]); 177 reg, r1.dr[reg]);
178 178
179 DPRINTF("New state of the debug registers (r1):\n"); 179 DPRINTF("New state of the debug registers (r1):\n");
180 for (i = 0; i < __arraycount(r1.dr); i++) 180 for (i = 0; i < __arraycount(r1.dr); i++)
181 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 181 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
182 182
183 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 183 DPRINTF("Call SETDBREGS for the child process (r1)\n");
184 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 184 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
185 185
186 switch (mode) { 186 switch (mode) {
187 case dbreg_preserve_mode_none: 187 case dbreg_preserve_mode_none:
188 break; 188 break;
189 case dbreg_preserve_mode_yield: 189 case dbreg_preserve_mode_yield:
190 DPRINTF("Yields a processor voluntarily and gives other " 190 DPRINTF("Yields a processor voluntarily and gives other "
191 "threads a chance to run without waiting for an " 191 "threads a chance to run without waiting for an "
192 "involuntary preemptive switch\n"); 192 "involuntary preemptive switch\n");
193 sched_yield(); 193 sched_yield();
194 break; 194 break;
195 case dbreg_preserve_mode_continued: 195 case dbreg_preserve_mode_continued:
196 DPRINTF("Call CONTINUE for the child process\n"); 196 DPRINTF("Call CONTINUE for the child process\n");
197 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 197 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
198 198
199 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 199 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
200 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 200 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
201 201
202 validate_status_stopped(status, sigval); 202 validate_status_stopped(status, sigval);
203 break; 203 break;
204 } 204 }
205 205
206 DPRINTF("Call GETDBREGS for the child process (r2)\n"); 206 DPRINTF("Call GETDBREGS for the child process (r2)\n");
207 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r2, 0) != -1); 207 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r2, 0) != -1);
208 208
209 DPRINTF("Assert that (r1) and (r2) are the same\n"); 209 DPRINTF("Assert that (r1) and (r2) are the same\n");
210 SYSCALL_REQUIRE(memcmp(&r1, &r2, sizeof(r1)) == 0); 210 SYSCALL_REQUIRE(memcmp(&r1, &r2, sizeof(r1)) == 0);
211 211
212 DPRINTF("Before resuming the child process where it left off and " 212 DPRINTF("Before resuming the child process where it left off and "
213 "without signal to be sent\n"); 213 "without signal to be sent\n");
214 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 214 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
215 215
216 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 216 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
217 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 217 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
218 218
219 validate_status_exited(status, exitval); 219 validate_status_exited(status, exitval);
220 220
221 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 221 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
222 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 222 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
223} 223}
224 224
225 225
226ATF_TC(dbregs_preserve_dr0); 226ATF_TC(dbregs_preserve_dr0);
227ATF_TC_HEAD(dbregs_preserve_dr0, tc) 227ATF_TC_HEAD(dbregs_preserve_dr0, tc)
228{ 228{
229 atf_tc_set_md_var(tc, "descr", 229 atf_tc_set_md_var(tc, "descr",
230 "Verify that setting DR0 is preserved across ptrace(2) calls"); 230 "Verify that setting DR0 is preserved across ptrace(2) calls");
231} 231}
232 232
233ATF_TC_BODY(dbregs_preserve_dr0, tc) 233ATF_TC_BODY(dbregs_preserve_dr0, tc)
234{ 234{
235 dbreg_preserve(0, dbreg_preserve_mode_none); 235 dbreg_preserve(0, dbreg_preserve_mode_none);
236} 236}
237 237
238ATF_TC(dbregs_preserve_dr1); 238ATF_TC(dbregs_preserve_dr1);
239ATF_TC_HEAD(dbregs_preserve_dr1, tc) 239ATF_TC_HEAD(dbregs_preserve_dr1, tc)
240{ 240{
241 atf_tc_set_md_var(tc, "descr", 241 atf_tc_set_md_var(tc, "descr",
242 "Verify that setting DR1 is preserved across ptrace(2) calls"); 242 "Verify that setting DR1 is preserved across ptrace(2) calls");
243} 243}
244 244
245ATF_TC_BODY(dbregs_preserve_dr1, tc) 245ATF_TC_BODY(dbregs_preserve_dr1, tc)
246{ 246{
247 dbreg_preserve(1, dbreg_preserve_mode_none); 247 dbreg_preserve(1, dbreg_preserve_mode_none);
248} 248}
249 249
250ATF_TC(dbregs_preserve_dr2); 250ATF_TC(dbregs_preserve_dr2);
251ATF_TC_HEAD(dbregs_preserve_dr2, tc) 251ATF_TC_HEAD(dbregs_preserve_dr2, tc)
252{ 252{
253 atf_tc_set_md_var(tc, "descr", 253 atf_tc_set_md_var(tc, "descr",
254 "Verify that setting DR2 is preserved across ptrace(2) calls"); 254 "Verify that setting DR2 is preserved across ptrace(2) calls");
255} 255}
256 256
257ATF_TC_BODY(dbregs_preserve_dr2, tc) 257ATF_TC_BODY(dbregs_preserve_dr2, tc)
258{ 258{
259 dbreg_preserve(2, dbreg_preserve_mode_none); 259 dbreg_preserve(2, dbreg_preserve_mode_none);
260} 260}
261 261
262ATF_TC(dbregs_preserve_dr3); 262ATF_TC(dbregs_preserve_dr3);
263ATF_TC_HEAD(dbregs_preserve_dr3, tc) 263ATF_TC_HEAD(dbregs_preserve_dr3, tc)
264{ 264{
265 atf_tc_set_md_var(tc, "descr", 265 atf_tc_set_md_var(tc, "descr",
266 "Verify that setting DR3 is preserved across ptrace(2) calls"); 266 "Verify that setting DR3 is preserved across ptrace(2) calls");
267} 267}
268 268
269ATF_TC_BODY(dbregs_preserve_dr3, tc) 269ATF_TC_BODY(dbregs_preserve_dr3, tc)
270{ 270{
271 dbreg_preserve(3, dbreg_preserve_mode_none); 271 dbreg_preserve(3, dbreg_preserve_mode_none);
272} 272}
273 273
274ATF_TC(dbregs_preserve_dr0_yield); 274ATF_TC(dbregs_preserve_dr0_yield);
275ATF_TC_HEAD(dbregs_preserve_dr0_yield, tc) 275ATF_TC_HEAD(dbregs_preserve_dr0_yield, tc)
276{ 276{
277 atf_tc_set_md_var(tc, "descr", 277 atf_tc_set_md_var(tc, "descr",
278 "Verify that setting DR0 is preserved across ptrace(2) calls with " 278 "Verify that setting DR0 is preserved across ptrace(2) calls with "
279 "scheduler yield"); 279 "scheduler yield");
280} 280}
281 281
282ATF_TC_BODY(dbregs_preserve_dr0_yield, tc) 282ATF_TC_BODY(dbregs_preserve_dr0_yield, tc)
283{ 283{
284 dbreg_preserve(0, dbreg_preserve_mode_yield); 284 dbreg_preserve(0, dbreg_preserve_mode_yield);
285} 285}
286 286
287ATF_TC(dbregs_preserve_dr1_yield); 287ATF_TC(dbregs_preserve_dr1_yield);
288ATF_TC_HEAD(dbregs_preserve_dr1_yield, tc) 288ATF_TC_HEAD(dbregs_preserve_dr1_yield, tc)
289{ 289{
290 atf_tc_set_md_var(tc, "descr", 290 atf_tc_set_md_var(tc, "descr",
291 "Verify that setting DR1 is preserved across ptrace(2) calls with " 291 "Verify that setting DR1 is preserved across ptrace(2) calls with "
292 "scheduler yield"); 292 "scheduler yield");
293} 293}
294 294
295ATF_TC_BODY(dbregs_preserve_dr1_yield, tc) 295ATF_TC_BODY(dbregs_preserve_dr1_yield, tc)
296{ 296{
297 dbreg_preserve(0, dbreg_preserve_mode_yield); 297 dbreg_preserve(0, dbreg_preserve_mode_yield);
298} 298}
299 299
300ATF_TC(dbregs_preserve_dr2_yield); 300ATF_TC(dbregs_preserve_dr2_yield);
301ATF_TC_HEAD(dbregs_preserve_dr2_yield, tc) 301ATF_TC_HEAD(dbregs_preserve_dr2_yield, tc)
302{ 302{
303 atf_tc_set_md_var(tc, "descr", 303 atf_tc_set_md_var(tc, "descr",
304 "Verify that setting DR2 is preserved across ptrace(2) calls with " 304 "Verify that setting DR2 is preserved across ptrace(2) calls with "
305 "scheduler yield"); 305 "scheduler yield");
306} 306}
307 307
308ATF_TC_BODY(dbregs_preserve_dr2_yield, tc) 308ATF_TC_BODY(dbregs_preserve_dr2_yield, tc)
309{ 309{
310 dbreg_preserve(0, dbreg_preserve_mode_yield); 310 dbreg_preserve(0, dbreg_preserve_mode_yield);
311} 311}
312 312
313 313
314ATF_TC(dbregs_preserve_dr3_yield); 314ATF_TC(dbregs_preserve_dr3_yield);
315ATF_TC_HEAD(dbregs_preserve_dr3_yield, tc) 315ATF_TC_HEAD(dbregs_preserve_dr3_yield, tc)
316{ 316{
317 atf_tc_set_md_var(tc, "descr", 317 atf_tc_set_md_var(tc, "descr",
318 "Verify that setting DR3 is preserved across ptrace(2) calls with " 318 "Verify that setting DR3 is preserved across ptrace(2) calls with "
319 "scheduler yield"); 319 "scheduler yield");
320} 320}
321 321
322ATF_TC_BODY(dbregs_preserve_dr3_yield, tc) 322ATF_TC_BODY(dbregs_preserve_dr3_yield, tc)
323{ 323{
324 dbreg_preserve(3, dbreg_preserve_mode_yield); 324 dbreg_preserve(3, dbreg_preserve_mode_yield);
325} 325}
326 326
327ATF_TC(dbregs_preserve_dr0_continued); 327ATF_TC(dbregs_preserve_dr0_continued);
328ATF_TC_HEAD(dbregs_preserve_dr0_continued, tc) 328ATF_TC_HEAD(dbregs_preserve_dr0_continued, tc)
329{ 329{
330 atf_tc_set_md_var(tc, "descr", 330 atf_tc_set_md_var(tc, "descr",
331 "Verify that setting DR0 is preserved across ptrace(2) calls and " 331 "Verify that setting DR0 is preserved across ptrace(2) calls and "
332 "with continued child"); 332 "with continued child");
333} 333}
334 334
335ATF_TC_BODY(dbregs_preserve_dr0_continued, tc) 335ATF_TC_BODY(dbregs_preserve_dr0_continued, tc)
336{ 336{
337 dbreg_preserve(0, dbreg_preserve_mode_continued); 337 dbreg_preserve(0, dbreg_preserve_mode_continued);
338} 338}
339 339
340ATF_TC(dbregs_preserve_dr1_continued); 340ATF_TC(dbregs_preserve_dr1_continued);
341ATF_TC_HEAD(dbregs_preserve_dr1_continued, tc) 341ATF_TC_HEAD(dbregs_preserve_dr1_continued, tc)
342{ 342{
343 atf_tc_set_md_var(tc, "descr", 343 atf_tc_set_md_var(tc, "descr",
344 "Verify that setting DR1 is preserved across ptrace(2) calls and " 344 "Verify that setting DR1 is preserved across ptrace(2) calls and "
345 "with continued child"); 345 "with continued child");
346} 346}
347 347
348ATF_TC_BODY(dbregs_preserve_dr1_continued, tc) 348ATF_TC_BODY(dbregs_preserve_dr1_continued, tc)
349{ 349{
350 dbreg_preserve(1, dbreg_preserve_mode_continued); 350 dbreg_preserve(1, dbreg_preserve_mode_continued);
351} 351}
352 352
353ATF_TC(dbregs_preserve_dr2_continued); 353ATF_TC(dbregs_preserve_dr2_continued);
354ATF_TC_HEAD(dbregs_preserve_dr2_continued, tc) 354ATF_TC_HEAD(dbregs_preserve_dr2_continued, tc)
355{ 355{
356 atf_tc_set_md_var(tc, "descr", 356 atf_tc_set_md_var(tc, "descr",
357 "Verify that setting DR2 is preserved across ptrace(2) calls and " 357 "Verify that setting DR2 is preserved across ptrace(2) calls and "
358 "with continued child"); 358 "with continued child");
359} 359}
360 360
361ATF_TC_BODY(dbregs_preserve_dr2_continued, tc) 361ATF_TC_BODY(dbregs_preserve_dr2_continued, tc)
362{ 362{
363 dbreg_preserve(2, dbreg_preserve_mode_continued); 363 dbreg_preserve(2, dbreg_preserve_mode_continued);
364} 364}
365 365
366ATF_TC(dbregs_preserve_dr3_continued); 366ATF_TC(dbregs_preserve_dr3_continued);
367ATF_TC_HEAD(dbregs_preserve_dr3_continued, tc) 367ATF_TC_HEAD(dbregs_preserve_dr3_continued, tc)
368{ 368{
369 atf_tc_set_md_var(tc, "descr", 369 atf_tc_set_md_var(tc, "descr",
370 "Verify that setting DR3 is preserved across ptrace(2) calls and " 370 "Verify that setting DR3 is preserved across ptrace(2) calls and "
371 "with continued child"); 371 "with continued child");
372} 372}
373 373
374ATF_TC_BODY(dbregs_preserve_dr3_continued, tc) 374ATF_TC_BODY(dbregs_preserve_dr3_continued, tc)
375{ 375{
376 dbreg_preserve(3, dbreg_preserve_mode_continued); 376 dbreg_preserve(3, dbreg_preserve_mode_continued);
377} 377}
378 378
379 379
380static void 380static void
381dbregs_trap_variable(int reg, int cond, int len, bool write) 381dbregs_trap_variable(int reg, int cond, int len, bool write)
382{ 382{
383 const int exitval = 5; 383 const int exitval = 5;
384 const int sigval = SIGSTOP; 384 const int sigval = SIGSTOP;
385 pid_t child, wpid; 385 pid_t child, wpid;
386#if defined(TWAIT_HAVE_STATUS) 386#if defined(TWAIT_HAVE_STATUS)
387 int status; 387 int status;
388#endif 388#endif
389 struct dbreg r1; 389 struct dbreg r1;
390 size_t i; 390 size_t i;
391 volatile int watchme = 0; 391 volatile int watchme = 0;
392 union u dr7; 392 union u dr7;
393 393
394 struct ptrace_siginfo info; 394 struct ptrace_siginfo info;
395 memset(&info, 0, sizeof(info)); 395 memset(&info, 0, sizeof(info));
396 396
397 if (!can_we_set_dbregs()) { 397 if (!can_we_set_dbregs()) {
398 atf_tc_skip("Either run this test as root or set sysctl(3) " 398 atf_tc_skip("Either run this test as root or set sysctl(3) "
399 "security.models.extensions.user_set_dbregs to 1"); 399 "security.models.extensions.user_set_dbregs to 1");
400 } 400 }
401 401
402 dr7.raw = 0; 402 dr7.raw = 0;
403 switch (reg) { 403 switch (reg) {
404 case 0: 404 case 0:
405 dr7.bits.global_dr0_breakpoint = 1; 405 dr7.bits.global_dr0_breakpoint = 1;
406 dr7.bits.condition_dr0 = cond; 406 dr7.bits.condition_dr0 = cond;
407 dr7.bits.len_dr0 = len; 407 dr7.bits.len_dr0 = len;
408 break; 408 break;
409 case 1: 409 case 1:
410 dr7.bits.global_dr1_breakpoint = 1; 410 dr7.bits.global_dr1_breakpoint = 1;
411 dr7.bits.condition_dr1 = cond; 411 dr7.bits.condition_dr1 = cond;
412 dr7.bits.len_dr1 = len; 412 dr7.bits.len_dr1 = len;
413 break; 413 break;
414 case 2: 414 case 2:
415 dr7.bits.global_dr2_breakpoint = 1; 415 dr7.bits.global_dr2_breakpoint = 1;
416 dr7.bits.condition_dr2 = cond; 416 dr7.bits.condition_dr2 = cond;
417 dr7.bits.len_dr2 = len; 417 dr7.bits.len_dr2 = len;
418 break; 418 break;
419 case 3: 419 case 3:
420 dr7.bits.global_dr3_breakpoint = 1; 420 dr7.bits.global_dr3_breakpoint = 1;
421 dr7.bits.condition_dr3 = cond; 421 dr7.bits.condition_dr3 = cond;
422 dr7.bits.len_dr3 = len; 422 dr7.bits.len_dr3 = len;
423 break; 423 break;
424 } 424 }
425 425
426 DPRINTF("Before forking process PID=%d\n", getpid()); 426 DPRINTF("Before forking process PID=%d\n", getpid());
427 SYSCALL_REQUIRE((child = fork()) != -1); 427 SYSCALL_REQUIRE((child = fork()) != -1);
428 if (child == 0) { 428 if (child == 0) {
429 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 429 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
430 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 430 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
431 431
432 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 432 DPRINTF("Before raising %s from child\n", strsignal(sigval));
433 FORKEE_ASSERT(raise(sigval) == 0); 433 FORKEE_ASSERT(raise(sigval) == 0);
434 434
435 if (write) 435 if (write)
436 watchme = 1; 436 watchme = 1;
437 else 437 else
438 printf("watchme=%d\n", watchme); 438 printf("watchme=%d\n", watchme);
439 439
440 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 440 DPRINTF("Before raising %s from child\n", strsignal(sigval));
441 FORKEE_ASSERT(raise(sigval) == 0); 441 FORKEE_ASSERT(raise(sigval) == 0);
442 442
443 DPRINTF("Before exiting of the child process\n"); 443 DPRINTF("Before exiting of the child process\n");
444 _exit(exitval); 444 _exit(exitval);
445 } 445 }
446 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 446 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
447 447
448 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 448 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
449 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 449 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
450 450
451 validate_status_stopped(status, sigval); 451 validate_status_stopped(status, sigval);
452 452
453 DPRINTF("Call GETDBREGS for the child process (r1)\n"); 453 DPRINTF("Call GETDBREGS for the child process (r1)\n");
454 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1); 454 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1);
455 455
456 DPRINTF("State of the debug registers (r1):\n"); 456 DPRINTF("State of the debug registers (r1):\n");
457 for (i = 0; i < __arraycount(r1.dr); i++) 457 for (i = 0; i < __arraycount(r1.dr); i++)
458 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 458 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
459 459
460 r1.dr[reg] = (long)(intptr_t)&watchme; 460 r1.dr[reg] = (long)(intptr_t)&watchme;
461 DPRINTF("Set DR%d (r1.dr[%d]) to new value %" PRIxREGISTER "\n", 461 DPRINTF("Set DR%d (r1.dr[%d]) to new value %" PRIxREGISTER "\n",
462 reg, reg, r1.dr[reg]); 462 reg, reg, r1.dr[reg]);
463 463
464 r1.dr[7] = dr7.raw; 464 r1.dr[7] = dr7.raw;
465 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 465 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
466 r1.dr[7]); 466 r1.dr[7]);
467 467
468 DPRINTF("New state of the debug registers (r1):\n"); 468 DPRINTF("New state of the debug registers (r1):\n");
469 for (i = 0; i < __arraycount(r1.dr); i++) 469 for (i = 0; i < __arraycount(r1.dr); i++)
470 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 470 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
471 471
472 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 472 DPRINTF("Call SETDBREGS for the child process (r1)\n");
473 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 473 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
474 474
475 DPRINTF("Call CONTINUE for the child process\n"); 475 DPRINTF("Call CONTINUE for the child process\n");
476 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 476 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
477 477
478 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 478 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
479 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 479 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
480 480
481 validate_status_stopped(status, SIGTRAP); 481 validate_status_stopped(status, SIGTRAP);
482 482
483 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n"); 483 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n");
484 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1); 484 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1);
485 485
486 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid); 486 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid);
487 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n", 487 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n",
488 info.psi_siginfo.si_signo, info.psi_siginfo.si_code, 488 info.psi_siginfo.si_signo, info.psi_siginfo.si_code,
489 info.psi_siginfo.si_errno); 489 info.psi_siginfo.si_errno);
490 490
491 DPRINTF("Before checking siginfo_t\n"); 491 DPRINTF("Before checking siginfo_t\n");
492 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP); 492 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP);
493 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG); 493 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG);
494 494
495 DPRINTF("Call CONTINUE for the child process\n"); 495 DPRINTF("Call CONTINUE for the child process\n");
496 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 496 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
497 497
498 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 498 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
499 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 499 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
500 500
501 validate_status_stopped(status, sigval); 501 validate_status_stopped(status, sigval);
502 502
503 DPRINTF("Before resuming the child process where it left off and " 503 DPRINTF("Before resuming the child process where it left off and "
504 "without signal to be sent\n"); 504 "without signal to be sent\n");
505 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 505 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
506 506
507 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 507 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
508 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 508 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
509 509
510 validate_status_exited(status, exitval); 510 validate_status_exited(status, exitval);
511 511
512 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 512 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
513 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 513 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
514} 514}
515 515
516ATF_TC(dbregs_dr0_trap_variable_writeonly_byte); 516ATF_TC(dbregs_dr0_trap_variable_writeonly_byte);
517ATF_TC_HEAD(dbregs_dr0_trap_variable_writeonly_byte, tc) 517ATF_TC_HEAD(dbregs_dr0_trap_variable_writeonly_byte, tc)
518{ 518{
519 atf_tc_set_md_var(tc, "descr", 519 atf_tc_set_md_var(tc, "descr",
520 "Verify that setting trap with DR0 triggers SIGTRAP " 520 "Verify that setting trap with DR0 triggers SIGTRAP "
521 "(break on data writes only and 1 byte mode)"); 521 "(break on data writes only and 1 byte mode)");
522} 522}
523 523
524ATF_TC_BODY(dbregs_dr0_trap_variable_writeonly_byte, tc) 524ATF_TC_BODY(dbregs_dr0_trap_variable_writeonly_byte, tc)
525{ 525{
526 /* 0b01 -- break on data write only */ 526 /* 0b01 -- break on data write only */
527 /* 0b00 -- 1 byte */ 527 /* 0b00 -- 1 byte */
528 528
529 dbregs_trap_variable(0, 1, 0, true); 529 dbregs_trap_variable(0, 1, 0, true);
530} 530}
531 531
532ATF_TC(dbregs_dr1_trap_variable_writeonly_byte); 532ATF_TC(dbregs_dr1_trap_variable_writeonly_byte);
533ATF_TC_HEAD(dbregs_dr1_trap_variable_writeonly_byte, tc) 533ATF_TC_HEAD(dbregs_dr1_trap_variable_writeonly_byte, tc)
534{ 534{
535 atf_tc_set_md_var(tc, "descr", 535 atf_tc_set_md_var(tc, "descr",
536 "Verify that setting trap with DR1 triggers SIGTRAP " 536 "Verify that setting trap with DR1 triggers SIGTRAP "
537 "(break on data writes only and 1 byte mode)"); 537 "(break on data writes only and 1 byte mode)");
538} 538}
539 539
540ATF_TC_BODY(dbregs_dr1_trap_variable_writeonly_byte, tc) 540ATF_TC_BODY(dbregs_dr1_trap_variable_writeonly_byte, tc)
541{ 541{
542 /* 0b01 -- break on data write only */ 542 /* 0b01 -- break on data write only */
543 /* 0b00 -- 1 byte */ 543 /* 0b00 -- 1 byte */
544 544
545 dbregs_trap_variable(1, 1, 0, true); 545 dbregs_trap_variable(1, 1, 0, true);
546} 546}
547 547
548ATF_TC(dbregs_dr2_trap_variable_writeonly_byte); 548ATF_TC(dbregs_dr2_trap_variable_writeonly_byte);
549ATF_TC_HEAD(dbregs_dr2_trap_variable_writeonly_byte, tc) 549ATF_TC_HEAD(dbregs_dr2_trap_variable_writeonly_byte, tc)
550{ 550{
551 atf_tc_set_md_var(tc, "descr", 551 atf_tc_set_md_var(tc, "descr",
552 "Verify that setting trap with DR2 triggers SIGTRAP " 552 "Verify that setting trap with DR2 triggers SIGTRAP "
553 "(break on data writes only and 1 byte mode)"); 553 "(break on data writes only and 1 byte mode)");
554} 554}
555 555
556ATF_TC_BODY(dbregs_dr2_trap_variable_writeonly_byte, tc) 556ATF_TC_BODY(dbregs_dr2_trap_variable_writeonly_byte, tc)
557{ 557{
558 /* 0b01 -- break on data write only */ 558 /* 0b01 -- break on data write only */
559 /* 0b00 -- 1 byte */ 559 /* 0b00 -- 1 byte */
560 560
561 dbregs_trap_variable(2, 1, 0, true); 561 dbregs_trap_variable(2, 1, 0, true);
562} 562}
563 563
564ATF_TC(dbregs_dr3_trap_variable_writeonly_byte); 564ATF_TC(dbregs_dr3_trap_variable_writeonly_byte);
565ATF_TC_HEAD(dbregs_dr3_trap_variable_writeonly_byte, tc) 565ATF_TC_HEAD(dbregs_dr3_trap_variable_writeonly_byte, tc)
566{ 566{
567 atf_tc_set_md_var(tc, "descr", 567 atf_tc_set_md_var(tc, "descr",
568 "Verify that setting trap with DR3 triggers SIGTRAP " 568 "Verify that setting trap with DR3 triggers SIGTRAP "
569 "(break on data writes only and 1 byte mode)"); 569 "(break on data writes only and 1 byte mode)");
570} 570}
571 571
572ATF_TC_BODY(dbregs_dr3_trap_variable_writeonly_byte, tc) 572ATF_TC_BODY(dbregs_dr3_trap_variable_writeonly_byte, tc)
573{ 573{
574 /* 0b01 -- break on data write only */ 574 /* 0b01 -- break on data write only */
575 /* 0b00 -- 1 byte */ 575 /* 0b00 -- 1 byte */
576 576
577 dbregs_trap_variable(3, 1, 0, true); 577 dbregs_trap_variable(3, 1, 0, true);
578}  578}
579 579
580ATF_TC(dbregs_dr0_trap_variable_writeonly_2bytes); 580ATF_TC(dbregs_dr0_trap_variable_writeonly_2bytes);
581ATF_TC_HEAD(dbregs_dr0_trap_variable_writeonly_2bytes, tc) 581ATF_TC_HEAD(dbregs_dr0_trap_variable_writeonly_2bytes, tc)
582{ 582{
583 atf_tc_set_md_var(tc, "descr", 583 atf_tc_set_md_var(tc, "descr",
584 "Verify that setting trap with DR0 triggers SIGTRAP " 584 "Verify that setting trap with DR0 triggers SIGTRAP "
585 "(break on data writes only and 2 bytes mode)"); 585 "(break on data writes only and 2 bytes mode)");
586} 586}
587 587
588ATF_TC_BODY(dbregs_dr0_trap_variable_writeonly_2bytes, tc) 588ATF_TC_BODY(dbregs_dr0_trap_variable_writeonly_2bytes, tc)
589{ 589{
590 /* 0b01 -- break on data write only */ 590 /* 0b01 -- break on data write only */
591 /* 0b01 -- 2 bytes */ 591 /* 0b01 -- 2 bytes */
592 592
593 dbregs_trap_variable(0, 1, 1, true); 593 dbregs_trap_variable(0, 1, 1, true);
594} 594}
595 595
596ATF_TC(dbregs_dr1_trap_variable_writeonly_2bytes); 596ATF_TC(dbregs_dr1_trap_variable_writeonly_2bytes);
597ATF_TC_HEAD(dbregs_dr1_trap_variable_writeonly_2bytes, tc) 597ATF_TC_HEAD(dbregs_dr1_trap_variable_writeonly_2bytes, tc)
598{ 598{
599 atf_tc_set_md_var(tc, "descr", 599 atf_tc_set_md_var(tc, "descr",
600 "Verify that setting trap with DR1 triggers SIGTRAP " 600 "Verify that setting trap with DR1 triggers SIGTRAP "
601 "(break on data writes only and 2 bytes mode)"); 601 "(break on data writes only and 2 bytes mode)");
602} 602}
603 603
604ATF_TC_BODY(dbregs_dr1_trap_variable_writeonly_2bytes, tc) 604ATF_TC_BODY(dbregs_dr1_trap_variable_writeonly_2bytes, tc)
605{ 605{
606 /* 0b01 -- break on data write only */ 606 /* 0b01 -- break on data write only */
607 /* 0b01 -- 2 bytes */ 607 /* 0b01 -- 2 bytes */
608 608
609 dbregs_trap_variable(1, 1, 1, true); 609 dbregs_trap_variable(1, 1, 1, true);
610} 610}
611 611
612ATF_TC(dbregs_dr2_trap_variable_writeonly_2bytes); 612ATF_TC(dbregs_dr2_trap_variable_writeonly_2bytes);
613ATF_TC_HEAD(dbregs_dr2_trap_variable_writeonly_2bytes, tc) 613ATF_TC_HEAD(dbregs_dr2_trap_variable_writeonly_2bytes, tc)
614{ 614{
615 atf_tc_set_md_var(tc, "descr", 615 atf_tc_set_md_var(tc, "descr",
616 "Verify that setting trap with DR2 triggers SIGTRAP " 616 "Verify that setting trap with DR2 triggers SIGTRAP "
617 "(break on data writes only and 2 bytes mode)"); 617 "(break on data writes only and 2 bytes mode)");
618} 618}
619 619
620ATF_TC_BODY(dbregs_dr2_trap_variable_writeonly_2bytes, tc) 620ATF_TC_BODY(dbregs_dr2_trap_variable_writeonly_2bytes, tc)
621{ 621{
622 /* 0b01 -- break on data write only */ 622 /* 0b01 -- break on data write only */
623 /* 0b01 -- 2 bytes */ 623 /* 0b01 -- 2 bytes */
624 624
625 dbregs_trap_variable(2, 1, 1, true); 625 dbregs_trap_variable(2, 1, 1, true);
626} 626}
627 627
628ATF_TC(dbregs_dr3_trap_variable_writeonly_2bytes); 628ATF_TC(dbregs_dr3_trap_variable_writeonly_2bytes);
629ATF_TC_HEAD(dbregs_dr3_trap_variable_writeonly_2bytes, tc) 629ATF_TC_HEAD(dbregs_dr3_trap_variable_writeonly_2bytes, tc)
630{ 630{
631 atf_tc_set_md_var(tc, "descr", 631 atf_tc_set_md_var(tc, "descr",
632 "Verify that setting trap with DR3 triggers SIGTRAP " 632 "Verify that setting trap with DR3 triggers SIGTRAP "
633 "(break on data writes only and 2 bytes mode)"); 633 "(break on data writes only and 2 bytes mode)");
634} 634}
635 635
636ATF_TC_BODY(dbregs_dr3_trap_variable_writeonly_2bytes, tc) 636ATF_TC_BODY(dbregs_dr3_trap_variable_writeonly_2bytes, tc)
637{ 637{
638 /* 0b01 -- break on data write only */ 638 /* 0b01 -- break on data write only */
639 /* 0b01 -- 2 bytes */ 639 /* 0b01 -- 2 bytes */
640 640
641 dbregs_trap_variable(3, 1, 1, true); 641 dbregs_trap_variable(3, 1, 1, true);
642} 642}
643 643
644ATF_TC(dbregs_dr0_trap_variable_writeonly_4bytes); 644ATF_TC(dbregs_dr0_trap_variable_writeonly_4bytes);
645ATF_TC_HEAD(dbregs_dr0_trap_variable_writeonly_4bytes, tc) 645ATF_TC_HEAD(dbregs_dr0_trap_variable_writeonly_4bytes, tc)
646{ 646{
647 atf_tc_set_md_var(tc, "descr", 647 atf_tc_set_md_var(tc, "descr",
648 "Verify that setting trap with DR0 triggers SIGTRAP " 648 "Verify that setting trap with DR0 triggers SIGTRAP "
649 "(break on data writes only and 4 bytes mode)"); 649 "(break on data writes only and 4 bytes mode)");
650} 650}
651 651
652ATF_TC_BODY(dbregs_dr0_trap_variable_writeonly_4bytes, tc) 652ATF_TC_BODY(dbregs_dr0_trap_variable_writeonly_4bytes, tc)
653{ 653{
654 /* 0b01 -- break on data write only */ 654 /* 0b01 -- break on data write only */
655 /* 0b11 -- 4 bytes */ 655 /* 0b11 -- 4 bytes */
656 656
657 dbregs_trap_variable(0, 1, 3, true); 657 dbregs_trap_variable(0, 1, 3, true);
658} 658}
659 659
660ATF_TC(dbregs_dr1_trap_variable_writeonly_4bytes); 660ATF_TC(dbregs_dr1_trap_variable_writeonly_4bytes);
661ATF_TC_HEAD(dbregs_dr1_trap_variable_writeonly_4bytes, tc) 661ATF_TC_HEAD(dbregs_dr1_trap_variable_writeonly_4bytes, tc)
662{ 662{
663 atf_tc_set_md_var(tc, "descr", 663 atf_tc_set_md_var(tc, "descr",
664 "Verify that setting trap with DR1 triggers SIGTRAP " 664 "Verify that setting trap with DR1 triggers SIGTRAP "
665 "(break on data writes only and 4 bytes mode)"); 665 "(break on data writes only and 4 bytes mode)");
666} 666}
667 667
668ATF_TC_BODY(dbregs_dr1_trap_variable_writeonly_4bytes, tc) 668ATF_TC_BODY(dbregs_dr1_trap_variable_writeonly_4bytes, tc)
669{ 669{
670 /* 0b01 -- break on data write only */ 670 /* 0b01 -- break on data write only */
671 /* 0b11 -- 4 bytes */ 671 /* 0b11 -- 4 bytes */
672 672
673 dbregs_trap_variable(1, 1, 3, true); 673 dbregs_trap_variable(1, 1, 3, true);
674} 674}
675 675
676ATF_TC(dbregs_dr2_trap_variable_writeonly_4bytes); 676ATF_TC(dbregs_dr2_trap_variable_writeonly_4bytes);
677ATF_TC_HEAD(dbregs_dr2_trap_variable_writeonly_4bytes, tc) 677ATF_TC_HEAD(dbregs_dr2_trap_variable_writeonly_4bytes, tc)
678{ 678{
679 atf_tc_set_md_var(tc, "descr", 679 atf_tc_set_md_var(tc, "descr",
680 "Verify that setting trap with DR2 triggers SIGTRAP " 680 "Verify that setting trap with DR2 triggers SIGTRAP "
681 "(break on data writes only and 4 bytes mode)"); 681 "(break on data writes only and 4 bytes mode)");
682} 682}
683 683
684ATF_TC_BODY(dbregs_dr2_trap_variable_writeonly_4bytes, tc) 684ATF_TC_BODY(dbregs_dr2_trap_variable_writeonly_4bytes, tc)
685{ 685{
686 /* 0b01 -- break on data write only */ 686 /* 0b01 -- break on data write only */
687 /* 0b11 -- 4 bytes */ 687 /* 0b11 -- 4 bytes */
688 688
689 dbregs_trap_variable(2, 1, 3, true); 689 dbregs_trap_variable(2, 1, 3, true);
690} 690}
691 691
692ATF_TC(dbregs_dr3_trap_variable_writeonly_4bytes); 692ATF_TC(dbregs_dr3_trap_variable_writeonly_4bytes);
693ATF_TC_HEAD(dbregs_dr3_trap_variable_writeonly_4bytes, tc) 693ATF_TC_HEAD(dbregs_dr3_trap_variable_writeonly_4bytes, tc)
694{ 694{
695 atf_tc_set_md_var(tc, "descr", 695 atf_tc_set_md_var(tc, "descr",
696 "Verify that setting trap with DR3 triggers SIGTRAP " 696 "Verify that setting trap with DR3 triggers SIGTRAP "
697 "(break on data writes only and 4 bytes mode)"); 697 "(break on data writes only and 4 bytes mode)");
698} 698}
699 699
700ATF_TC_BODY(dbregs_dr3_trap_variable_writeonly_4bytes, tc) 700ATF_TC_BODY(dbregs_dr3_trap_variable_writeonly_4bytes, tc)
701{ 701{
702 /* 0b01 -- break on data write only */ 702 /* 0b01 -- break on data write only */
703 /* 0b11 -- 4 bytes */ 703 /* 0b11 -- 4 bytes */
704 704
705 dbregs_trap_variable(3, 1, 3, true); 705 dbregs_trap_variable(3, 1, 3, true);
706} 706}
707 707
708ATF_TC(dbregs_dr0_trap_variable_readwrite_write_byte); 708ATF_TC(dbregs_dr0_trap_variable_readwrite_write_byte);
709ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_write_byte, tc) 709ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_write_byte, tc)
710{ 710{
711 atf_tc_set_md_var(tc, "descr", 711 atf_tc_set_md_var(tc, "descr",
712 "Verify that setting trap with DR0 triggers SIGTRAP " 712 "Verify that setting trap with DR0 triggers SIGTRAP "
713 "(break on data read/write trap in read 1 byte mode)"); 713 "(break on data read/write trap in read 1 byte mode)");
714} 714}
715 715
716ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_write_byte, tc) 716ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_write_byte, tc)
717{ 717{
718 /* 0b11 -- break on data write&read */ 718 /* 0b11 -- break on data write&read */
719 /* 0b00 -- 1 byte */ 719 /* 0b00 -- 1 byte */
720 720
721 dbregs_trap_variable(0, 3, 0, true); 721 dbregs_trap_variable(0, 3, 0, true);
722} 722}
723 723
724ATF_TC(dbregs_dr1_trap_variable_readwrite_write_byte); 724ATF_TC(dbregs_dr1_trap_variable_readwrite_write_byte);
725ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_write_byte, tc) 725ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_write_byte, tc)
726{ 726{
727 atf_tc_set_md_var(tc, "descr", 727 atf_tc_set_md_var(tc, "descr",
728 "Verify that setting trap with DR1 triggers SIGTRAP " 728 "Verify that setting trap with DR1 triggers SIGTRAP "
729 "(break on data read/write trap in read 1 byte mode)"); 729 "(break on data read/write trap in read 1 byte mode)");
730} 730}
731 731
732ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_write_byte, tc) 732ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_write_byte, tc)
733{ 733{
734 /* 0b11 -- break on data write&read */ 734 /* 0b11 -- break on data write&read */
735 /* 0b00 -- 1 byte */ 735 /* 0b00 -- 1 byte */
736 736
737 dbregs_trap_variable(1, 3, 0, true); 737 dbregs_trap_variable(1, 3, 0, true);
738} 738}
739 739
740ATF_TC(dbregs_dr2_trap_variable_readwrite_write_byte); 740ATF_TC(dbregs_dr2_trap_variable_readwrite_write_byte);
741ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_write_byte, tc) 741ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_write_byte, tc)
742{ 742{
743 atf_tc_set_md_var(tc, "descr", 743 atf_tc_set_md_var(tc, "descr",
744 "Verify that setting trap with DR2 triggers SIGTRAP " 744 "Verify that setting trap with DR2 triggers SIGTRAP "
745 "(break on data read/write trap in read 1 byte mode)"); 745 "(break on data read/write trap in read 1 byte mode)");
746} 746}
747 747
748ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_write_byte, tc) 748ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_write_byte, tc)
749{ 749{
750 /* 0b11 -- break on data write&read */ 750 /* 0b11 -- break on data write&read */
751 /* 0b00 -- 1 byte */ 751 /* 0b00 -- 1 byte */
752 752
753 dbregs_trap_variable(2, 3, 0, true); 753 dbregs_trap_variable(2, 3, 0, true);
754} 754}
755 755
756ATF_TC(dbregs_dr3_trap_variable_readwrite_write_byte); 756ATF_TC(dbregs_dr3_trap_variable_readwrite_write_byte);
757ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_write_byte, tc) 757ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_write_byte, tc)
758{ 758{
759 atf_tc_set_md_var(tc, "descr", 759 atf_tc_set_md_var(tc, "descr",
760 "Verify that setting trap with DR3 triggers SIGTRAP " 760 "Verify that setting trap with DR3 triggers SIGTRAP "
761 "(break on data read/write trap in read 1 byte mode)"); 761 "(break on data read/write trap in read 1 byte mode)");
762} 762}
763 763
764ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_write_byte, tc) 764ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_write_byte, tc)
765{ 765{
766 /* 0b11 -- break on data write&read */ 766 /* 0b11 -- break on data write&read */
767 /* 0b00 -- 1 byte */ 767 /* 0b00 -- 1 byte */
768 768
769 dbregs_trap_variable(3, 3, 0, true); 769 dbregs_trap_variable(3, 3, 0, true);
770} 770}
771 771
772ATF_TC(dbregs_dr0_trap_variable_readwrite_write_2bytes); 772ATF_TC(dbregs_dr0_trap_variable_readwrite_write_2bytes);
773ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_write_2bytes, tc) 773ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_write_2bytes, tc)
774{ 774{
775 atf_tc_set_md_var(tc, "descr", 775 atf_tc_set_md_var(tc, "descr",
776 "Verify that setting trap with DR0 triggers SIGTRAP " 776 "Verify that setting trap with DR0 triggers SIGTRAP "
777 "(break on data read/write trap in read 2 bytes mode)"); 777 "(break on data read/write trap in read 2 bytes mode)");
778} 778}
779 779
780ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_write_2bytes, tc) 780ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_write_2bytes, tc)
781{ 781{
782 /* 0b11 -- break on data write&read */ 782 /* 0b11 -- break on data write&read */
783 /* 0b01 -- 2 bytes */ 783 /* 0b01 -- 2 bytes */
784 784
785 dbregs_trap_variable(0, 3, 1, true); 785 dbregs_trap_variable(0, 3, 1, true);
786} 786}
787 787
788ATF_TC(dbregs_dr1_trap_variable_readwrite_write_2bytes); 788ATF_TC(dbregs_dr1_trap_variable_readwrite_write_2bytes);
789ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_write_2bytes, tc) 789ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_write_2bytes, tc)
790{ 790{
791 atf_tc_set_md_var(tc, "descr", 791 atf_tc_set_md_var(tc, "descr",
792 "Verify that setting trap with DR1 triggers SIGTRAP " 792 "Verify that setting trap with DR1 triggers SIGTRAP "
793 "(break on data read/write trap in read 2 bytes mode)"); 793 "(break on data read/write trap in read 2 bytes mode)");
794} 794}
795 795
796ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_write_2bytes, tc) 796ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_write_2bytes, tc)
797{ 797{
798 /* 0b11 -- break on data write&read */ 798 /* 0b11 -- break on data write&read */
799 /* 0b01 -- 2 bytes */ 799 /* 0b01 -- 2 bytes */
800 800
801 dbregs_trap_variable(1, 3, 1, true); 801 dbregs_trap_variable(1, 3, 1, true);
802} 802}
803 803
804ATF_TC(dbregs_dr2_trap_variable_readwrite_write_2bytes); 804ATF_TC(dbregs_dr2_trap_variable_readwrite_write_2bytes);
805ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_write_2bytes, tc) 805ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_write_2bytes, tc)
806{ 806{
807 atf_tc_set_md_var(tc, "descr", 807 atf_tc_set_md_var(tc, "descr",
808 "Verify that setting trap with DR2 triggers SIGTRAP " 808 "Verify that setting trap with DR2 triggers SIGTRAP "
809 "(break on data read/write trap in read 2 bytes mode)"); 809 "(break on data read/write trap in read 2 bytes mode)");
810} 810}
811 811
812ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_write_2bytes, tc) 812ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_write_2bytes, tc)
813{ 813{
814 /* 0b11 -- break on data write&read */ 814 /* 0b11 -- break on data write&read */
815 /* 0b01 -- 2 bytes */ 815 /* 0b01 -- 2 bytes */
816 816
817 dbregs_trap_variable(2, 3, 1, true); 817 dbregs_trap_variable(2, 3, 1, true);
818} 818}
819 819
820ATF_TC(dbregs_dr3_trap_variable_readwrite_write_2bytes); 820ATF_TC(dbregs_dr3_trap_variable_readwrite_write_2bytes);
821ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_write_2bytes, tc) 821ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_write_2bytes, tc)
822{ 822{
823 atf_tc_set_md_var(tc, "descr", 823 atf_tc_set_md_var(tc, "descr",
824 "Verify that setting trap with DR3 triggers SIGTRAP " 824 "Verify that setting trap with DR3 triggers SIGTRAP "
825 "(break on data read/write trap in read 2 bytes mode)"); 825 "(break on data read/write trap in read 2 bytes mode)");
826} 826}
827 827
828ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_write_2bytes, tc) 828ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_write_2bytes, tc)
829{ 829{
830 /* 0b11 -- break on data write&read */ 830 /* 0b11 -- break on data write&read */
831 /* 0b01 -- 2 bytes */ 831 /* 0b01 -- 2 bytes */
832 832
833 dbregs_trap_variable(3, 3, 1, true); 833 dbregs_trap_variable(3, 3, 1, true);
834} 834}
835 835
836ATF_TC(dbregs_dr0_trap_variable_readwrite_write_4bytes); 836ATF_TC(dbregs_dr0_trap_variable_readwrite_write_4bytes);
837ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_write_4bytes, tc) 837ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_write_4bytes, tc)
838{ 838{
839 atf_tc_set_md_var(tc, "descr", 839 atf_tc_set_md_var(tc, "descr",
840 "Verify that setting trap with DR0 triggers SIGTRAP " 840 "Verify that setting trap with DR0 triggers SIGTRAP "
841 "(break on data read/write trap in read 4 bytes mode)"); 841 "(break on data read/write trap in read 4 bytes mode)");
842} 842}
843 843
844ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_write_4bytes, tc) 844ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_write_4bytes, tc)
845{ 845{
846 /* 0b11 -- break on data write&read */ 846 /* 0b11 -- break on data write&read */
847 /* 0b11 -- 4 bytes */ 847 /* 0b11 -- 4 bytes */
848 848
849 dbregs_trap_variable(0, 3, 3, true); 849 dbregs_trap_variable(0, 3, 3, true);
850} 850}
851 851
852ATF_TC(dbregs_dr1_trap_variable_readwrite_write_4bytes); 852ATF_TC(dbregs_dr1_trap_variable_readwrite_write_4bytes);
853ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_write_4bytes, tc) 853ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_write_4bytes, tc)
854{ 854{
855 atf_tc_set_md_var(tc, "descr", 855 atf_tc_set_md_var(tc, "descr",
856 "Verify that setting trap with DR1 triggers SIGTRAP " 856 "Verify that setting trap with DR1 triggers SIGTRAP "
857 "(break on data read/write trap in read 4 bytes mode)"); 857 "(break on data read/write trap in read 4 bytes mode)");
858} 858}
859 859
860ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_write_4bytes, tc) 860ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_write_4bytes, tc)
861{ 861{
862 /* 0b11 -- break on data write&read */ 862 /* 0b11 -- break on data write&read */
863 /* 0b11 -- 4 bytes */ 863 /* 0b11 -- 4 bytes */
864 864
865 dbregs_trap_variable(1, 3, 3, true); 865 dbregs_trap_variable(1, 3, 3, true);
866} 866}
867 867
868ATF_TC(dbregs_dr2_trap_variable_readwrite_write_4bytes); 868ATF_TC(dbregs_dr2_trap_variable_readwrite_write_4bytes);
869ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_write_4bytes, tc) 869ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_write_4bytes, tc)
870{ 870{
871 atf_tc_set_md_var(tc, "descr", 871 atf_tc_set_md_var(tc, "descr",
872 "Verify that setting trap with DR2 triggers SIGTRAP " 872 "Verify that setting trap with DR2 triggers SIGTRAP "
873 "(break on data read/write trap in read 4 bytes mode)"); 873 "(break on data read/write trap in read 4 bytes mode)");
874} 874}
875 875
876ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_write_4bytes, tc) 876ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_write_4bytes, tc)
877{ 877{
878 /* 0b11 -- break on data write&read */ 878 /* 0b11 -- break on data write&read */
879 /* 0b11 -- 4 bytes */ 879 /* 0b11 -- 4 bytes */
880 880
881 dbregs_trap_variable(2, 3, 3, true); 881 dbregs_trap_variable(2, 3, 3, true);
882} 882}
883 883
884ATF_TC(dbregs_dr3_trap_variable_readwrite_write_4bytes); 884ATF_TC(dbregs_dr3_trap_variable_readwrite_write_4bytes);
885ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_write_4bytes, tc) 885ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_write_4bytes, tc)
886{ 886{
887 atf_tc_set_md_var(tc, "descr", 887 atf_tc_set_md_var(tc, "descr",
888 "Verify that setting trap with DR3 triggers SIGTRAP " 888 "Verify that setting trap with DR3 triggers SIGTRAP "
889 "(break on data read/write trap in read 4 bytes mode)"); 889 "(break on data read/write trap in read 4 bytes mode)");
890} 890}
891 891
892ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_write_4bytes, tc) 892ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_write_4bytes, tc)
893{ 893{
894 /* 0b11 -- break on data write&read */ 894 /* 0b11 -- break on data write&read */
895 /* 0b11 -- 4 bytes */ 895 /* 0b11 -- 4 bytes */
896 896
897 dbregs_trap_variable(3, 3, 3, true); 897 dbregs_trap_variable(3, 3, 3, true);
898} 898}
899 899
900ATF_TC(dbregs_dr0_trap_variable_readwrite_read_byte); 900ATF_TC(dbregs_dr0_trap_variable_readwrite_read_byte);
901ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_read_byte, tc) 901ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_read_byte, tc)
902{ 902{
903 atf_tc_set_md_var(tc, "descr", 903 atf_tc_set_md_var(tc, "descr",
904 "Verify that setting trap with DR0 triggers SIGTRAP " 904 "Verify that setting trap with DR0 triggers SIGTRAP "
905 "(break on data read/write trap in write 1 byte mode)"); 905 "(break on data read/write trap in write 1 byte mode)");
906} 906}
907 907
908ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_read_byte, tc) 908ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_read_byte, tc)
909{ 909{
910 /* 0b11 -- break on data write&read */ 910 /* 0b11 -- break on data write&read */
911 /* 0b00 -- 1 byte */ 911 /* 0b00 -- 1 byte */
912 912
913 dbregs_trap_variable(0, 3, 0, false); 913 dbregs_trap_variable(0, 3, 0, false);
914} 914}
915 915
916ATF_TC(dbregs_dr1_trap_variable_readwrite_read_byte); 916ATF_TC(dbregs_dr1_trap_variable_readwrite_read_byte);
917ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_read_byte, tc) 917ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_read_byte, tc)
918{ 918{
919 atf_tc_set_md_var(tc, "descr", 919 atf_tc_set_md_var(tc, "descr",
920 "Verify that setting trap with DR1 triggers SIGTRAP " 920 "Verify that setting trap with DR1 triggers SIGTRAP "
921 "(break on data read/write trap in write 1 byte mode)"); 921 "(break on data read/write trap in write 1 byte mode)");
922} 922}
923 923
924ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_read_byte, tc) 924ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_read_byte, tc)
925{ 925{
926 /* 0b11 -- break on data write&read */ 926 /* 0b11 -- break on data write&read */
927 /* 0b00 -- 1 byte */ 927 /* 0b00 -- 1 byte */
928 928
929 dbregs_trap_variable(1, 3, 0, false); 929 dbregs_trap_variable(1, 3, 0, false);
930} 930}
931 931
932ATF_TC(dbregs_dr2_trap_variable_readwrite_read_byte); 932ATF_TC(dbregs_dr2_trap_variable_readwrite_read_byte);
933ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_read_byte, tc) 933ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_read_byte, tc)
934{ 934{
935 atf_tc_set_md_var(tc, "descr", 935 atf_tc_set_md_var(tc, "descr",
936 "Verify that setting trap with DR2 triggers SIGTRAP " 936 "Verify that setting trap with DR2 triggers SIGTRAP "
937 "(break on data read/write trap in write 1 byte mode)"); 937 "(break on data read/write trap in write 1 byte mode)");
938} 938}
939 939
940ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_read_byte, tc) 940ATF_TC_BODY(dbregs_dr2_trap_variable_readwrite_read_byte, tc)
941{ 941{
942 /* 0b11 -- break on data write&read */ 942 /* 0b11 -- break on data write&read */
943 /* 0b00 -- 1 byte */ 943 /* 0b00 -- 1 byte */
944 944
945 dbregs_trap_variable(2, 3, 0, false); 945 dbregs_trap_variable(2, 3, 0, false);
946} 946}
947 947
948ATF_TC(dbregs_dr3_trap_variable_readwrite_read_byte); 948ATF_TC(dbregs_dr3_trap_variable_readwrite_read_byte);
949ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_read_byte, tc) 949ATF_TC_HEAD(dbregs_dr3_trap_variable_readwrite_read_byte, tc)
950{ 950{
951 atf_tc_set_md_var(tc, "descr", 951 atf_tc_set_md_var(tc, "descr",
952 "Verify that setting trap with DR3 triggers SIGTRAP " 952 "Verify that setting trap with DR3 triggers SIGTRAP "
953 "(break on data read/write trap in write 1 byte mode)"); 953 "(break on data read/write trap in write 1 byte mode)");
954} 954}
955 955
956ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_read_byte, tc) 956ATF_TC_BODY(dbregs_dr3_trap_variable_readwrite_read_byte, tc)
957{ 957{
958 /* 0b11 -- break on data write&read */ 958 /* 0b11 -- break on data write&read */
959 /* 0b00 -- 1 byte */ 959 /* 0b00 -- 1 byte */
960 960
961 dbregs_trap_variable(3, 3, 0, false); 961 dbregs_trap_variable(3, 3, 0, false);
962} 962}
963 963
964ATF_TC(dbregs_dr0_trap_variable_readwrite_read_2bytes); 964ATF_TC(dbregs_dr0_trap_variable_readwrite_read_2bytes);
965ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_read_2bytes, tc) 965ATF_TC_HEAD(dbregs_dr0_trap_variable_readwrite_read_2bytes, tc)
966{ 966{
967 atf_tc_set_md_var(tc, "descr", 967 atf_tc_set_md_var(tc, "descr",
968 "Verify that setting trap with DR0 triggers SIGTRAP " 968 "Verify that setting trap with DR0 triggers SIGTRAP "
969 "(break on data read/write trap in write 2 bytes mode)"); 969 "(break on data read/write trap in write 2 bytes mode)");
970} 970}
971 971
972ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_read_2bytes, tc) 972ATF_TC_BODY(dbregs_dr0_trap_variable_readwrite_read_2bytes, tc)
973{ 973{
974 /* 0b11 -- break on data write&read */ 974 /* 0b11 -- break on data write&read */
975 /* 0b01 -- 2 bytes */ 975 /* 0b01 -- 2 bytes */
976 976
977 dbregs_trap_variable(0, 3, 1, false); 977 dbregs_trap_variable(0, 3, 1, false);
978} 978}
979 979
980ATF_TC(dbregs_dr1_trap_variable_readwrite_read_2bytes); 980ATF_TC(dbregs_dr1_trap_variable_readwrite_read_2bytes);
981ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_read_2bytes, tc) 981ATF_TC_HEAD(dbregs_dr1_trap_variable_readwrite_read_2bytes, tc)
982{ 982{
983 atf_tc_set_md_var(tc, "descr", 983 atf_tc_set_md_var(tc, "descr",
984 "Verify that setting trap with DR1 triggers SIGTRAP " 984 "Verify that setting trap with DR1 triggers SIGTRAP "
985 "(break on data read/write trap in write 2 bytes mode)"); 985 "(break on data read/write trap in write 2 bytes mode)");
986} 986}
987 987
988ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_read_2bytes, tc) 988ATF_TC_BODY(dbregs_dr1_trap_variable_readwrite_read_2bytes, tc)
989{ 989{
990 /* 0b11 -- break on data write&read */ 990 /* 0b11 -- break on data write&read */
991 /* 0b01 -- 2 bytes */ 991 /* 0b01 -- 2 bytes */
992 992
993 dbregs_trap_variable(1, 3, 1, false); 993 dbregs_trap_variable(1, 3, 1, false);
994} 994}
995 995
996ATF_TC(dbregs_dr2_trap_variable_readwrite_read_2bytes); 996ATF_TC(dbregs_dr2_trap_variable_readwrite_read_2bytes);
997ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_read_2bytes, tc) 997ATF_TC_HEAD(dbregs_dr2_trap_variable_readwrite_read_2bytes, tc)
998{ 998{
999 atf_tc_set_md_var(tc, "descr", 999 atf_tc_set_md_var(tc, "descr",
1000 "Verify that setting trap with DR2 triggers SIGTRAP " 1000 "Verify that setting trap with DR2 triggers SIGTRAP "
@@ -1181,2821 +1181,3374 @@ ATF_TC_BODY(dbregs_dr0_trap_code, tc) @@ -1181,2821 +1181,3374 @@ ATF_TC_BODY(dbregs_dr0_trap_code, tc)
1181 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n"); 1181 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n");
1182 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1); 1182 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1);
1183 1183
1184 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid); 1184 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid);
1185 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n", 1185 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n",
1186 info.psi_siginfo.si_signo, info.psi_siginfo.si_code, 1186 info.psi_siginfo.si_signo, info.psi_siginfo.si_code,
1187 info.psi_siginfo.si_errno); 1187 info.psi_siginfo.si_errno);
1188 1188
1189 DPRINTF("Before checking siginfo_t\n"); 1189 DPRINTF("Before checking siginfo_t\n");
1190 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP); 1190 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP);
1191 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG); 1191 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG);
1192 1192
1193 DPRINTF("Remove code trap from check_happy=%p\n", check_happy); 1193 DPRINTF("Remove code trap from check_happy=%p\n", check_happy);
1194 dr7.bits.global_dr0_breakpoint = 0; 1194 dr7.bits.global_dr0_breakpoint = 0;
1195 r1.dr[7] = dr7.raw; 1195 r1.dr[7] = dr7.raw;
1196 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 1196 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
1197 r1.dr[7]); 1197 r1.dr[7]);
1198 1198
1199 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1199 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1200 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1200 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1201 1201
1202 DPRINTF("Call CONTINUE for the child process\n"); 1202 DPRINTF("Call CONTINUE for the child process\n");
1203 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1203 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1204 1204
1205 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1205 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1206 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1206 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1207 1207
1208 validate_status_stopped(status, sigval); 1208 validate_status_stopped(status, sigval);
1209 1209
1210 DPRINTF("Before resuming the child process where it left off and " 1210 DPRINTF("Before resuming the child process where it left off and "
1211 "without signal to be sent\n"); 1211 "without signal to be sent\n");
1212 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1212 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1213 1213
1214 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1214 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1215 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1215 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1216 1216
1217 validate_status_exited(status, exitval); 1217 validate_status_exited(status, exitval);
1218 1218
1219 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1219 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1220 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 1220 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
1221} 1221}
1222#endif 1222#endif
1223 1223
1224#if defined(HAVE_DBREGS) 1224#if defined(HAVE_DBREGS)
1225ATF_TC(dbregs_dr1_trap_code); 1225ATF_TC(dbregs_dr1_trap_code);
1226ATF_TC_HEAD(dbregs_dr1_trap_code, tc) 1226ATF_TC_HEAD(dbregs_dr1_trap_code, tc)
1227{ 1227{
1228 atf_tc_set_md_var(tc, "descr", 1228 atf_tc_set_md_var(tc, "descr",
1229 "Verify that setting trap with DR1 triggers SIGTRAP " 1229 "Verify that setting trap with DR1 triggers SIGTRAP "
1230 "(break on code execution trap)"); 1230 "(break on code execution trap)");
1231} 1231}
1232 1232
1233ATF_TC_BODY(dbregs_dr1_trap_code, tc) 1233ATF_TC_BODY(dbregs_dr1_trap_code, tc)
1234{ 1234{
1235 const int exitval = 5; 1235 const int exitval = 5;
1236 const int sigval = SIGSTOP; 1236 const int sigval = SIGSTOP;
1237 pid_t child, wpid; 1237 pid_t child, wpid;
1238#if defined(TWAIT_HAVE_STATUS) 1238#if defined(TWAIT_HAVE_STATUS)
1239 int status; 1239 int status;
1240#endif 1240#endif
1241 struct dbreg r1; 1241 struct dbreg r1;
1242 size_t i; 1242 size_t i;
1243 volatile int watchme = 1; 1243 volatile int watchme = 1;
1244 union u dr7; 1244 union u dr7;
1245 1245
1246 struct ptrace_siginfo info; 1246 struct ptrace_siginfo info;
1247 memset(&info, 0, sizeof(info)); 1247 memset(&info, 0, sizeof(info));
1248 1248
1249 if (!can_we_set_dbregs()) { 1249 if (!can_we_set_dbregs()) {
1250 atf_tc_skip("Either run this test as root or set sysctl(3) " 1250 atf_tc_skip("Either run this test as root or set sysctl(3) "
1251 "security.models.extensions.user_set_dbregs to 1"); 1251 "security.models.extensions.user_set_dbregs to 1");
1252 } 1252 }
1253 1253
1254 dr7.raw = 0; 1254 dr7.raw = 0;
1255 dr7.bits.global_dr1_breakpoint = 1; 1255 dr7.bits.global_dr1_breakpoint = 1;
1256 dr7.bits.condition_dr1 = 0; /* 0b00 -- break on code execution */ 1256 dr7.bits.condition_dr1 = 0; /* 0b00 -- break on code execution */
1257 dr7.bits.len_dr1 = 0; /* 0b00 -- 1 byte */ 1257 dr7.bits.len_dr1 = 0; /* 0b00 -- 1 byte */
1258 1258
1259 DPRINTF("Before forking process PID=%d\n", getpid()); 1259 DPRINTF("Before forking process PID=%d\n", getpid());
1260 SYSCALL_REQUIRE((child = fork()) != -1); 1260 SYSCALL_REQUIRE((child = fork()) != -1);
1261 if (child == 0) { 1261 if (child == 0) {
1262 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 1262 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
1263 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 1263 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
1264 1264
1265 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1265 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1266 FORKEE_ASSERT(raise(sigval) == 0); 1266 FORKEE_ASSERT(raise(sigval) == 0);
1267 1267
1268 printf("check_happy(%d)=%d\n", watchme, check_happy(watchme)); 1268 printf("check_happy(%d)=%d\n", watchme, check_happy(watchme));
1269 1269
1270 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1270 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1271 FORKEE_ASSERT(raise(sigval) == 0); 1271 FORKEE_ASSERT(raise(sigval) == 0);
1272 1272
1273 DPRINTF("Before exiting of the child process\n"); 1273 DPRINTF("Before exiting of the child process\n");
1274 _exit(exitval); 1274 _exit(exitval);
1275 } 1275 }
1276 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 1276 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
1277 1277
1278 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1278 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1279 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1279 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1280 1280
1281 validate_status_stopped(status, sigval); 1281 validate_status_stopped(status, sigval);
1282 1282
1283 DPRINTF("Call GETDBREGS for the child process (r1)\n"); 1283 DPRINTF("Call GETDBREGS for the child process (r1)\n");
1284 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1); 1284 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1);
1285 1285
1286 DPRINTF("State of the debug registers (r1):\n"); 1286 DPRINTF("State of the debug registers (r1):\n");
1287 for (i = 0; i < __arraycount(r1.dr); i++) 1287 for (i = 0; i < __arraycount(r1.dr); i++)
1288 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1288 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1289 1289
1290 r1.dr[1] = (long)(intptr_t)check_happy; 1290 r1.dr[1] = (long)(intptr_t)check_happy;
1291 DPRINTF("Set DR1 (r1.dr[1]) to new value %" PRIxREGISTER "\n", 1291 DPRINTF("Set DR1 (r1.dr[1]) to new value %" PRIxREGISTER "\n",
1292 r1.dr[1]); 1292 r1.dr[1]);
1293 1293
1294 r1.dr[7] = dr7.raw; 1294 r1.dr[7] = dr7.raw;
1295 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 1295 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
1296 r1.dr[7]); 1296 r1.dr[7]);
1297 1297
1298 DPRINTF("New state of the debug registers (r1):\n"); 1298 DPRINTF("New state of the debug registers (r1):\n");
1299 for (i = 0; i < __arraycount(r1.dr); i++) 1299 for (i = 0; i < __arraycount(r1.dr); i++)
1300 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1300 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1301 1301
1302 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1302 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1303 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1303 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1304 1304
1305 DPRINTF("Call CONTINUE for the child process\n"); 1305 DPRINTF("Call CONTINUE for the child process\n");
1306 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1306 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1307 1307
1308 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1308 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1309 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1309 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1310 1310
1311 validate_status_stopped(status, SIGTRAP); 1311 validate_status_stopped(status, SIGTRAP);
1312 1312
1313 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n"); 1313 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n");
1314 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1); 1314 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1);
1315 1315
1316 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid); 1316 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid);
1317 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n", 1317 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n",
1318 info.psi_siginfo.si_signo, info.psi_siginfo.si_code, 1318 info.psi_siginfo.si_signo, info.psi_siginfo.si_code,
1319 info.psi_siginfo.si_errno); 1319 info.psi_siginfo.si_errno);
1320 1320
1321 DPRINTF("Before checking siginfo_t\n"); 1321 DPRINTF("Before checking siginfo_t\n");
1322 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP); 1322 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP);
1323 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG); 1323 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG);
1324 1324
1325 DPRINTF("Remove code trap from check_happy=%p\n", check_happy); 1325 DPRINTF("Remove code trap from check_happy=%p\n", check_happy);
1326 dr7.bits.global_dr1_breakpoint = 0; 1326 dr7.bits.global_dr1_breakpoint = 0;
1327 r1.dr[7] = dr7.raw; 1327 r1.dr[7] = dr7.raw;
1328 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 1328 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
1329 r1.dr[7]); 1329 r1.dr[7]);
1330 1330
1331 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1331 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1332 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1332 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1333 1333
1334 DPRINTF("Call CONTINUE for the child process\n"); 1334 DPRINTF("Call CONTINUE for the child process\n");
1335 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1335 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1336 1336
1337 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1337 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1338 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1338 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1339 1339
1340 validate_status_stopped(status, sigval); 1340 validate_status_stopped(status, sigval);
1341 1341
1342 DPRINTF("Before resuming the child process where it left off and " 1342 DPRINTF("Before resuming the child process where it left off and "
1343 "without signal to be sent\n"); 1343 "without signal to be sent\n");
1344 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1344 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1345 1345
1346 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1346 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1347 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1347 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1348 1348
1349 validate_status_exited(status, exitval); 1349 validate_status_exited(status, exitval);
1350 1350
1351 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1351 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1352 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 1352 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
1353} 1353}
1354#endif 1354#endif
1355 1355
1356#if defined(HAVE_DBREGS) 1356#if defined(HAVE_DBREGS)
1357ATF_TC(dbregs_dr2_trap_code); 1357ATF_TC(dbregs_dr2_trap_code);
1358ATF_TC_HEAD(dbregs_dr2_trap_code, tc) 1358ATF_TC_HEAD(dbregs_dr2_trap_code, tc)
1359{ 1359{
1360 atf_tc_set_md_var(tc, "descr", 1360 atf_tc_set_md_var(tc, "descr",
1361 "Verify that setting trap with DR2 triggers SIGTRAP " 1361 "Verify that setting trap with DR2 triggers SIGTRAP "
1362 "(break on code execution trap)"); 1362 "(break on code execution trap)");
1363} 1363}
1364 1364
1365ATF_TC_BODY(dbregs_dr2_trap_code, tc) 1365ATF_TC_BODY(dbregs_dr2_trap_code, tc)
1366{ 1366{
1367 const int exitval = 5; 1367 const int exitval = 5;
1368 const int sigval = SIGSTOP; 1368 const int sigval = SIGSTOP;
1369 pid_t child, wpid; 1369 pid_t child, wpid;
1370#if defined(TWAIT_HAVE_STATUS) 1370#if defined(TWAIT_HAVE_STATUS)
1371 int status; 1371 int status;
1372#endif 1372#endif
1373 struct dbreg r1; 1373 struct dbreg r1;
1374 size_t i; 1374 size_t i;
1375 volatile int watchme = 1; 1375 volatile int watchme = 1;
1376 union u dr7; 1376 union u dr7;
1377 1377
1378 struct ptrace_siginfo info; 1378 struct ptrace_siginfo info;
1379 memset(&info, 0, sizeof(info)); 1379 memset(&info, 0, sizeof(info));
1380 1380
1381 if (!can_we_set_dbregs()) { 1381 if (!can_we_set_dbregs()) {
1382 atf_tc_skip("Either run this test as root or set sysctl(3) " 1382 atf_tc_skip("Either run this test as root or set sysctl(3) "
1383 "security.models.extensions.user_set_dbregs to 1"); 1383 "security.models.extensions.user_set_dbregs to 1");
1384 } 1384 }
1385 1385
1386 dr7.raw = 0; 1386 dr7.raw = 0;
1387 dr7.bits.global_dr2_breakpoint = 1; 1387 dr7.bits.global_dr2_breakpoint = 1;
1388 dr7.bits.condition_dr2 = 0; /* 0b00 -- break on code execution */ 1388 dr7.bits.condition_dr2 = 0; /* 0b00 -- break on code execution */
1389 dr7.bits.len_dr2 = 0; /* 0b00 -- 1 byte */ 1389 dr7.bits.len_dr2 = 0; /* 0b00 -- 1 byte */
1390 1390
1391 DPRINTF("Before forking process PID=%d\n", getpid()); 1391 DPRINTF("Before forking process PID=%d\n", getpid());
1392 SYSCALL_REQUIRE((child = fork()) != -1); 1392 SYSCALL_REQUIRE((child = fork()) != -1);
1393 if (child == 0) { 1393 if (child == 0) {
1394 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 1394 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
1395 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 1395 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
1396 1396
1397 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1397 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1398 FORKEE_ASSERT(raise(sigval) == 0); 1398 FORKEE_ASSERT(raise(sigval) == 0);
1399 1399
1400 printf("check_happy(%d)=%d\n", watchme, check_happy(watchme)); 1400 printf("check_happy(%d)=%d\n", watchme, check_happy(watchme));
1401 1401
1402 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1402 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1403 FORKEE_ASSERT(raise(sigval) == 0); 1403 FORKEE_ASSERT(raise(sigval) == 0);
1404 1404
1405 DPRINTF("Before exiting of the child process\n"); 1405 DPRINTF("Before exiting of the child process\n");
1406 _exit(exitval); 1406 _exit(exitval);
1407 } 1407 }
1408 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 1408 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
1409 1409
1410 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1410 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1411 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1411 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1412 1412
1413 validate_status_stopped(status, sigval); 1413 validate_status_stopped(status, sigval);
1414 1414
1415 DPRINTF("Call GETDBREGS for the child process (r1)\n"); 1415 DPRINTF("Call GETDBREGS for the child process (r1)\n");
1416 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1); 1416 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1);
1417 1417
1418 DPRINTF("State of the debug registers (r1):\n"); 1418 DPRINTF("State of the debug registers (r1):\n");
1419 for (i = 0; i < __arraycount(r1.dr); i++) 1419 for (i = 0; i < __arraycount(r1.dr); i++)
1420 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1420 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1421 1421
1422 r1.dr[2] = (long)(intptr_t)check_happy; 1422 r1.dr[2] = (long)(intptr_t)check_happy;
1423 DPRINTF("Set DR2 (r1.dr[2]) to new value %" PRIxREGISTER "\n", 1423 DPRINTF("Set DR2 (r1.dr[2]) to new value %" PRIxREGISTER "\n",
1424 r1.dr[2]); 1424 r1.dr[2]);
1425 1425
1426 r1.dr[7] = dr7.raw; 1426 r1.dr[7] = dr7.raw;
1427 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 1427 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
1428 r1.dr[7]); 1428 r1.dr[7]);
1429 1429
1430 DPRINTF("New state of the debug registers (r1):\n"); 1430 DPRINTF("New state of the debug registers (r1):\n");
1431 for (i = 0; i < __arraycount(r1.dr); i++) 1431 for (i = 0; i < __arraycount(r1.dr); i++)
1432 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1432 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1433 1433
1434 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1434 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1435 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1435 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1436 1436
1437 DPRINTF("Call CONTINUE for the child process\n"); 1437 DPRINTF("Call CONTINUE for the child process\n");
1438 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1438 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1439 1439
1440 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1440 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1441 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1441 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1442 1442
1443 validate_status_stopped(status, SIGTRAP); 1443 validate_status_stopped(status, SIGTRAP);
1444 1444
1445 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n"); 1445 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n");
1446 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1); 1446 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1);
1447 1447
1448 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid); 1448 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid);
1449 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n", 1449 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n",
1450 info.psi_siginfo.si_signo, info.psi_siginfo.si_code, 1450 info.psi_siginfo.si_signo, info.psi_siginfo.si_code,
1451 info.psi_siginfo.si_errno); 1451 info.psi_siginfo.si_errno);
1452 1452
1453 DPRINTF("Before checking siginfo_t\n"); 1453 DPRINTF("Before checking siginfo_t\n");
1454 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP); 1454 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP);
1455 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG); 1455 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG);
1456 1456
1457 DPRINTF("Remove code trap from check_happy=%p\n", check_happy); 1457 DPRINTF("Remove code trap from check_happy=%p\n", check_happy);
1458 dr7.bits.global_dr2_breakpoint = 0; 1458 dr7.bits.global_dr2_breakpoint = 0;
1459 r1.dr[7] = dr7.raw; 1459 r1.dr[7] = dr7.raw;
1460 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 1460 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
1461 r1.dr[7]); 1461 r1.dr[7]);
1462 1462
1463 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1463 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1464 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1464 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1465 1465
1466 DPRINTF("Call CONTINUE for the child process\n"); 1466 DPRINTF("Call CONTINUE for the child process\n");
1467 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1467 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1468 1468
1469 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1469 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1470 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1470 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1471 1471
1472 validate_status_stopped(status, sigval); 1472 validate_status_stopped(status, sigval);
1473 1473
1474 DPRINTF("Before resuming the child process where it left off and " 1474 DPRINTF("Before resuming the child process where it left off and "
1475 "without signal to be sent\n"); 1475 "without signal to be sent\n");
1476 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1476 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1477 1477
1478 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1478 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1479 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1479 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1480 1480
1481 validate_status_exited(status, exitval); 1481 validate_status_exited(status, exitval);
1482 1482
1483 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1483 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1484 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 1484 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
1485} 1485}
1486#endif 1486#endif
1487 1487
1488#if defined(HAVE_DBREGS) 1488#if defined(HAVE_DBREGS)
1489ATF_TC(dbregs_dr3_trap_code); 1489ATF_TC(dbregs_dr3_trap_code);
1490ATF_TC_HEAD(dbregs_dr3_trap_code, tc) 1490ATF_TC_HEAD(dbregs_dr3_trap_code, tc)
1491{ 1491{
1492 atf_tc_set_md_var(tc, "descr", 1492 atf_tc_set_md_var(tc, "descr",
1493 "Verify that setting trap with DR3 triggers SIGTRAP " 1493 "Verify that setting trap with DR3 triggers SIGTRAP "
1494 "(break on code execution trap)"); 1494 "(break on code execution trap)");
1495} 1495}
1496 1496
1497ATF_TC_BODY(dbregs_dr3_trap_code, tc) 1497ATF_TC_BODY(dbregs_dr3_trap_code, tc)
1498{ 1498{
1499 const int exitval = 5; 1499 const int exitval = 5;
1500 const int sigval = SIGSTOP; 1500 const int sigval = SIGSTOP;
1501 pid_t child, wpid; 1501 pid_t child, wpid;
1502#if defined(TWAIT_HAVE_STATUS) 1502#if defined(TWAIT_HAVE_STATUS)
1503 int status; 1503 int status;
1504#endif 1504#endif
1505 struct dbreg r1; 1505 struct dbreg r1;
1506 size_t i; 1506 size_t i;
1507 volatile int watchme = 1; 1507 volatile int watchme = 1;
1508 union u dr7; 1508 union u dr7;
1509 1509
1510 struct ptrace_siginfo info; 1510 struct ptrace_siginfo info;
1511 memset(&info, 0, sizeof(info)); 1511 memset(&info, 0, sizeof(info));
1512 1512
1513 if (!can_we_set_dbregs()) { 1513 if (!can_we_set_dbregs()) {
1514 atf_tc_skip("Either run this test as root or set sysctl(3) " 1514 atf_tc_skip("Either run this test as root or set sysctl(3) "
1515 "security.models.extensions.user_set_dbregs to 1"); 1515 "security.models.extensions.user_set_dbregs to 1");
1516 } 1516 }
1517 1517
1518 dr7.raw = 0; 1518 dr7.raw = 0;
1519 dr7.bits.global_dr3_breakpoint = 1; 1519 dr7.bits.global_dr3_breakpoint = 1;
1520 dr7.bits.condition_dr3 = 0; /* 0b00 -- break on code execution */ 1520 dr7.bits.condition_dr3 = 0; /* 0b00 -- break on code execution */
1521 dr7.bits.len_dr3 = 0; /* 0b00 -- 1 byte */ 1521 dr7.bits.len_dr3 = 0; /* 0b00 -- 1 byte */
1522 1522
1523 DPRINTF("Before forking process PID=%d\n", getpid()); 1523 DPRINTF("Before forking process PID=%d\n", getpid());
1524 SYSCALL_REQUIRE((child = fork()) != -1); 1524 SYSCALL_REQUIRE((child = fork()) != -1);
1525 if (child == 0) { 1525 if (child == 0) {
1526 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 1526 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
1527 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 1527 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
1528 1528
1529 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1529 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1530 FORKEE_ASSERT(raise(sigval) == 0); 1530 FORKEE_ASSERT(raise(sigval) == 0);
1531 1531
1532 printf("check_happy(%d)=%d\n", watchme, check_happy(watchme)); 1532 printf("check_happy(%d)=%d\n", watchme, check_happy(watchme));
1533 1533
1534 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1534 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1535 FORKEE_ASSERT(raise(sigval) == 0); 1535 FORKEE_ASSERT(raise(sigval) == 0);
1536 1536
1537 DPRINTF("Before exiting of the child process\n"); 1537 DPRINTF("Before exiting of the child process\n");
1538 _exit(exitval); 1538 _exit(exitval);
1539 } 1539 }
1540 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 1540 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
1541 1541
1542 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1542 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1543 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1543 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1544 1544
1545 validate_status_stopped(status, sigval); 1545 validate_status_stopped(status, sigval);
1546 1546
1547 DPRINTF("Call GETDBREGS for the child process (r1)\n"); 1547 DPRINTF("Call GETDBREGS for the child process (r1)\n");
1548 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1); 1548 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1);
1549 1549
1550 DPRINTF("State of the debug registers (r1):\n"); 1550 DPRINTF("State of the debug registers (r1):\n");
1551 for (i = 0; i < __arraycount(r1.dr); i++) 1551 for (i = 0; i < __arraycount(r1.dr); i++)
1552 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1552 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1553 1553
1554 r1.dr[3] = (long)(intptr_t)check_happy; 1554 r1.dr[3] = (long)(intptr_t)check_happy;
1555 DPRINTF("Set DR3 (r1.dr[3]) to new value %" PRIxREGISTER "\n", 1555 DPRINTF("Set DR3 (r1.dr[3]) to new value %" PRIxREGISTER "\n",
1556 r1.dr[3]); 1556 r1.dr[3]);
1557 1557
1558 r1.dr[7] = dr7.raw; 1558 r1.dr[7] = dr7.raw;
1559 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 1559 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
1560 r1.dr[7]); 1560 r1.dr[7]);
1561 1561
1562 DPRINTF("New state of the debug registers (r1):\n"); 1562 DPRINTF("New state of the debug registers (r1):\n");
1563 for (i = 0; i < __arraycount(r1.dr); i++) 1563 for (i = 0; i < __arraycount(r1.dr); i++)
1564 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1564 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1565 1565
1566 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1566 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1567 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1567 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1568 1568
1569 DPRINTF("Call CONTINUE for the child process\n"); 1569 DPRINTF("Call CONTINUE for the child process\n");
1570 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1570 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1571 1571
1572 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1572 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1573 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1573 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1574 1574
1575 validate_status_stopped(status, SIGTRAP); 1575 validate_status_stopped(status, SIGTRAP);
1576 1576
1577 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n"); 1577 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n");
1578 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1); 1578 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1);
1579 1579
1580 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid); 1580 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid);
1581 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n", 1581 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n",
1582 info.psi_siginfo.si_signo, info.psi_siginfo.si_code, 1582 info.psi_siginfo.si_signo, info.psi_siginfo.si_code,
1583 info.psi_siginfo.si_errno); 1583 info.psi_siginfo.si_errno);
1584 1584
1585 DPRINTF("Before checking siginfo_t\n"); 1585 DPRINTF("Before checking siginfo_t\n");
1586 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP); 1586 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, SIGTRAP);
1587 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG); 1587 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_DBREG);
1588 1588
1589 DPRINTF("Remove code trap from check_happy=%p\n", check_happy); 1589 DPRINTF("Remove code trap from check_happy=%p\n", check_happy);
1590 dr7.bits.global_dr3_breakpoint = 0; 1590 dr7.bits.global_dr3_breakpoint = 0;
1591 r1.dr[7] = dr7.raw; 1591 r1.dr[7] = dr7.raw;
1592 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n", 1592 DPRINTF("Set DR7 (r1.dr[7]) to new value %" PRIxREGISTER "\n",
1593 r1.dr[7]); 1593 r1.dr[7]);
1594 1594
1595 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1595 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1596 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1596 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1597 1597
1598 DPRINTF("Call CONTINUE for the child process\n"); 1598 DPRINTF("Call CONTINUE for the child process\n");
1599 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1599 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1600 1600
1601 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1601 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1602 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1602 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1603 1603
1604 validate_status_stopped(status, sigval); 1604 validate_status_stopped(status, sigval);
1605 1605
1606 DPRINTF("Before resuming the child process where it left off and " 1606 DPRINTF("Before resuming the child process where it left off and "
1607 "without signal to be sent\n"); 1607 "without signal to be sent\n");
1608 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1608 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1609 1609
1610 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1610 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1611 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1611 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1612 1612
1613 validate_status_exited(status, exitval); 1613 validate_status_exited(status, exitval);
1614 1614
1615 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1615 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1616 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 1616 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
1617} 1617}
1618#endif 1618#endif
1619 1619
1620static void * __used 1620static void * __used
1621x86_main_func(void *arg) 1621x86_main_func(void *arg)
1622{ 1622{
1623 1623
1624 return arg; 1624 return arg;
1625} 1625}
1626 1626
1627static void 1627static void
1628dbregs_dont_inherit_lwp(int reg) 1628dbregs_dont_inherit_lwp(int reg)
1629{ 1629{
1630 const int exitval = 5; 1630 const int exitval = 5;
1631 const int sigval = SIGSTOP; 1631 const int sigval = SIGSTOP;
1632 pid_t child, wpid; 1632 pid_t child, wpid;
1633#if defined(TWAIT_HAVE_STATUS) 1633#if defined(TWAIT_HAVE_STATUS)
1634 int status; 1634 int status;
1635#endif 1635#endif
1636 ptrace_state_t state; 1636 ptrace_state_t state;
1637 const int slen = sizeof(state); 1637 const int slen = sizeof(state);
1638 ptrace_event_t event; 1638 ptrace_event_t event;
1639 const int elen = sizeof(event); 1639 const int elen = sizeof(event);
1640 pthread_t t; 1640 pthread_t t;
1641 lwpid_t lid; 1641 lwpid_t lid;
1642 size_t i; 1642 size_t i;
1643 struct dbreg r1; 1643 struct dbreg r1;
1644 struct dbreg r2; 1644 struct dbreg r2;
1645 1645
1646 if (!can_we_set_dbregs()) { 1646 if (!can_we_set_dbregs()) {
1647 atf_tc_skip("Either run this test as root or set sysctl(3) " 1647 atf_tc_skip("Either run this test as root or set sysctl(3) "
1648 "security.models.extensions.user_set_dbregs to 1"); 1648 "security.models.extensions.user_set_dbregs to 1");
1649 } 1649 }
1650 1650
1651 DPRINTF("Before forking process PID=%d\n", getpid()); 1651 DPRINTF("Before forking process PID=%d\n", getpid());
1652 SYSCALL_REQUIRE((child = fork()) != -1); 1652 SYSCALL_REQUIRE((child = fork()) != -1);
1653 if (child == 0) { 1653 if (child == 0) {
1654 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 1654 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
1655 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 1655 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
1656 1656
1657 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1657 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1658 FORKEE_ASSERT(raise(sigval) == 0); 1658 FORKEE_ASSERT(raise(sigval) == 0);
1659 1659
1660 FORKEE_ASSERT(!pthread_create(&t, NULL, x86_main_func, NULL)); 1660 FORKEE_ASSERT(!pthread_create(&t, NULL, x86_main_func, NULL));
1661 1661
1662 DPRINTF("Before waiting for thread to exit\n"); 1662 DPRINTF("Before waiting for thread to exit\n");
1663 FORKEE_ASSERT(!pthread_join(t, NULL)); 1663 FORKEE_ASSERT(!pthread_join(t, NULL));
1664 1664
1665 DPRINTF("Before exiting of the child process\n"); 1665 DPRINTF("Before exiting of the child process\n");
1666 _exit(exitval); 1666 _exit(exitval);
1667 } 1667 }
1668 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 1668 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
1669 1669
1670 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1670 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1671 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1671 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1672 1672
1673 validate_status_stopped(status, sigval); 1673 validate_status_stopped(status, sigval);
1674 1674
1675 DPRINTF("Set empty EVENT_MASK for the child %d\n", child); 1675 DPRINTF("Set empty EVENT_MASK for the child %d\n", child);
1676 event.pe_set_event = PTRACE_LWP_CREATE; 1676 event.pe_set_event = PTRACE_LWP_CREATE;
1677 SYSCALL_REQUIRE(ptrace(PT_SET_EVENT_MASK, child, &event, elen) != -1); 1677 SYSCALL_REQUIRE(ptrace(PT_SET_EVENT_MASK, child, &event, elen) != -1);
1678 1678
1679 DPRINTF("Call GETDBREGS for the child process (r1)\n"); 1679 DPRINTF("Call GETDBREGS for the child process (r1)\n");
1680 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1); 1680 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1);
1681 1681
1682 DPRINTF("State of the debug registers (r1):\n"); 1682 DPRINTF("State of the debug registers (r1):\n");
1683 for (i = 0; i < __arraycount(r1.dr); i++) 1683 for (i = 0; i < __arraycount(r1.dr); i++)
1684 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1684 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1685 1685
1686 r1.dr[reg] = (long)(intptr_t)check_happy; 1686 r1.dr[reg] = (long)(intptr_t)check_happy;
1687 DPRINTF("Set DR%d (r1.dr[%d]) to new value %" PRIxREGISTER "\n", 1687 DPRINTF("Set DR%d (r1.dr[%d]) to new value %" PRIxREGISTER "\n",
1688 reg, reg, r1.dr[0]); 1688 reg, reg, r1.dr[0]);
1689 1689
1690 DPRINTF("New state of the debug registers (r1):\n"); 1690 DPRINTF("New state of the debug registers (r1):\n");
1691 for (i = 0; i < __arraycount(r1.dr); i++) 1691 for (i = 0; i < __arraycount(r1.dr); i++)
1692 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1692 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1693 1693
1694 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1694 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1695 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1695 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1696 1696
1697 DPRINTF("Before resuming the child process where it left off and " 1697 DPRINTF("Before resuming the child process where it left off and "
1698 "without signal to be sent\n"); 1698 "without signal to be sent\n");
1699 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1699 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1700 1700
1701 DPRINTF("Before calling %s() for the child - expected stopped " 1701 DPRINTF("Before calling %s() for the child - expected stopped "
1702 "SIGTRAP\n", TWAIT_FNAME); 1702 "SIGTRAP\n", TWAIT_FNAME);
1703 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1703 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1704 1704
1705 validate_status_stopped(status, SIGTRAP); 1705 validate_status_stopped(status, SIGTRAP);
1706 1706
1707 SYSCALL_REQUIRE(ptrace(PT_GET_PROCESS_STATE, child, &state, slen) != -1); 1707 SYSCALL_REQUIRE(ptrace(PT_GET_PROCESS_STATE, child, &state, slen) != -1);
1708 1708
1709 ATF_REQUIRE_EQ(state.pe_report_event, PTRACE_LWP_CREATE); 1709 ATF_REQUIRE_EQ(state.pe_report_event, PTRACE_LWP_CREATE);
1710 1710
1711 lid = state.pe_lwp; 1711 lid = state.pe_lwp;
1712 DPRINTF("Reported PTRACE_LWP_CREATE event with lid %d\n", lid); 1712 DPRINTF("Reported PTRACE_LWP_CREATE event with lid %d\n", lid);
1713 1713
1714 DPRINTF("Call GETDBREGS for the child process new lwp (r2)\n"); 1714 DPRINTF("Call GETDBREGS for the child process new lwp (r2)\n");
1715 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r2, lid) != -1); 1715 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r2, lid) != -1);
1716 1716
1717 DPRINTF("State of the debug registers (r2):\n"); 1717 DPRINTF("State of the debug registers (r2):\n");
1718 for (i = 0; i < __arraycount(r2.dr); i++) 1718 for (i = 0; i < __arraycount(r2.dr); i++)
1719 DPRINTF("r2[%zu]=%" PRIxREGISTER "\n", i, r2.dr[i]); 1719 DPRINTF("r2[%zu]=%" PRIxREGISTER "\n", i, r2.dr[i]);
1720 1720
1721 DPRINTF("Assert that (r1) and (r2) are not the same\n"); 1721 DPRINTF("Assert that (r1) and (r2) are not the same\n");
1722 ATF_REQUIRE(memcmp(&r1, &r2, sizeof(r1)) != 0); 1722 ATF_REQUIRE(memcmp(&r1, &r2, sizeof(r1)) != 0);
1723 1723
1724 DPRINTF("Before resuming the child process where it left off and " 1724 DPRINTF("Before resuming the child process where it left off and "
1725 "without signal to be sent\n"); 1725 "without signal to be sent\n");
1726 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1726 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1727 1727
1728 DPRINTF("Before calling %s() for the child - expected exited\n", 1728 DPRINTF("Before calling %s() for the child - expected exited\n",
1729 TWAIT_FNAME); 1729 TWAIT_FNAME);
1730 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1730 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1731 1731
1732 validate_status_exited(status, exitval); 1732 validate_status_exited(status, exitval);
1733 1733
1734 DPRINTF("Before calling %s() for the child - expected no process\n", 1734 DPRINTF("Before calling %s() for the child - expected no process\n",
1735 TWAIT_FNAME); 1735 TWAIT_FNAME);
1736 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 1736 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
1737} 1737}
1738 1738
1739ATF_TC(dbregs_dr0_dont_inherit_lwp); 1739ATF_TC(dbregs_dr0_dont_inherit_lwp);
1740ATF_TC_HEAD(dbregs_dr0_dont_inherit_lwp, tc) 1740ATF_TC_HEAD(dbregs_dr0_dont_inherit_lwp, tc)
1741{ 1741{
1742 atf_tc_set_md_var(tc, "descr", 1742 atf_tc_set_md_var(tc, "descr",
1743 "Verify that 1 LWP creation is intercepted by ptrace(2) with " 1743 "Verify that 1 LWP creation is intercepted by ptrace(2) with "
1744 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 0 from " 1744 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 0 from "
1745 "the forker thread is not inherited"); 1745 "the forker thread is not inherited");
1746} 1746}
1747 1747
1748ATF_TC_BODY(dbregs_dr0_dont_inherit_lwp, tc) 1748ATF_TC_BODY(dbregs_dr0_dont_inherit_lwp, tc)
1749{ 1749{
1750 dbregs_dont_inherit_lwp(0); 1750 dbregs_dont_inherit_lwp(0);
1751} 1751}
1752 1752
1753ATF_TC(dbregs_dr1_dont_inherit_lwp); 1753ATF_TC(dbregs_dr1_dont_inherit_lwp);
1754ATF_TC_HEAD(dbregs_dr1_dont_inherit_lwp, tc) 1754ATF_TC_HEAD(dbregs_dr1_dont_inherit_lwp, tc)
1755{ 1755{
1756 atf_tc_set_md_var(tc, "descr", 1756 atf_tc_set_md_var(tc, "descr",
1757 "Verify that 1 LWP creation is intercepted by ptrace(2) with " 1757 "Verify that 1 LWP creation is intercepted by ptrace(2) with "
1758 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 1 from " 1758 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 1 from "
1759 "the forker thread is not inherited"); 1759 "the forker thread is not inherited");
1760} 1760}
1761 1761
1762ATF_TC_BODY(dbregs_dr1_dont_inherit_lwp, tc) 1762ATF_TC_BODY(dbregs_dr1_dont_inherit_lwp, tc)
1763{ 1763{
1764 dbregs_dont_inherit_lwp(1); 1764 dbregs_dont_inherit_lwp(1);
1765} 1765}
1766 1766
1767ATF_TC(dbregs_dr2_dont_inherit_lwp); 1767ATF_TC(dbregs_dr2_dont_inherit_lwp);
1768ATF_TC_HEAD(dbregs_dr2_dont_inherit_lwp, tc) 1768ATF_TC_HEAD(dbregs_dr2_dont_inherit_lwp, tc)
1769{ 1769{
1770 atf_tc_set_md_var(tc, "descr", 1770 atf_tc_set_md_var(tc, "descr",
1771 "Verify that 1 LWP creation is intercepted by ptrace(2) with " 1771 "Verify that 1 LWP creation is intercepted by ptrace(2) with "
1772 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 2 from " 1772 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 2 from "
1773 "the forker thread is not inherited"); 1773 "the forker thread is not inherited");
1774} 1774}
1775 1775
1776ATF_TC_BODY(dbregs_dr2_dont_inherit_lwp, tc) 1776ATF_TC_BODY(dbregs_dr2_dont_inherit_lwp, tc)
1777{ 1777{
1778 dbregs_dont_inherit_lwp(2); 1778 dbregs_dont_inherit_lwp(2);
1779} 1779}
1780 1780
1781ATF_TC(dbregs_dr3_dont_inherit_lwp); 1781ATF_TC(dbregs_dr3_dont_inherit_lwp);
1782ATF_TC_HEAD(dbregs_dr3_dont_inherit_lwp, tc) 1782ATF_TC_HEAD(dbregs_dr3_dont_inherit_lwp, tc)
1783{ 1783{
1784 atf_tc_set_md_var(tc, "descr", 1784 atf_tc_set_md_var(tc, "descr",
1785 "Verify that 1 LWP creation is intercepted by ptrace(2) with " 1785 "Verify that 1 LWP creation is intercepted by ptrace(2) with "
1786 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 3 from " 1786 "EVENT_MASK set to PTRACE_LWP_CREATE and Debug Register 3 from "
1787 "the forker thread is not inherited"); 1787 "the forker thread is not inherited");
1788} 1788}
1789 1789
1790ATF_TC_BODY(dbregs_dr3_dont_inherit_lwp, tc) 1790ATF_TC_BODY(dbregs_dr3_dont_inherit_lwp, tc)
1791{ 1791{
1792 dbregs_dont_inherit_lwp(3); 1792 dbregs_dont_inherit_lwp(3);
1793} 1793}
1794 1794
1795static void 1795static void
1796dbregs_dont_inherit_execve(int reg) 1796dbregs_dont_inherit_execve(int reg)
1797{ 1797{
1798 const int sigval = SIGTRAP; 1798 const int sigval = SIGTRAP;
1799 pid_t child, wpid; 1799 pid_t child, wpid;
1800#if defined(TWAIT_HAVE_STATUS) 1800#if defined(TWAIT_HAVE_STATUS)
1801 int status; 1801 int status;
1802#endif 1802#endif
1803 size_t i; 1803 size_t i;
1804 struct dbreg r1; 1804 struct dbreg r1;
1805 struct dbreg r2; 1805 struct dbreg r2;
1806 1806
1807 struct ptrace_siginfo info; 1807 struct ptrace_siginfo info;
1808 memset(&info, 0, sizeof(info)); 1808 memset(&info, 0, sizeof(info));
1809 1809
1810 if (!can_we_set_dbregs()) { 1810 if (!can_we_set_dbregs()) {
1811 atf_tc_skip("Either run this test as root or set sysctl(3) " 1811 atf_tc_skip("Either run this test as root or set sysctl(3) "
1812 "security.models.extensions.user_set_dbregs to 1"); 1812 "security.models.extensions.user_set_dbregs to 1");
1813 } 1813 }
1814 1814
1815 DPRINTF("Before forking process PID=%d\n", getpid()); 1815 DPRINTF("Before forking process PID=%d\n", getpid());
1816 SYSCALL_REQUIRE((child = fork()) != -1); 1816 SYSCALL_REQUIRE((child = fork()) != -1);
1817 if (child == 0) { 1817 if (child == 0) {
1818 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 1818 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
1819 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 1819 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
1820 1820
1821 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 1821 DPRINTF("Before raising %s from child\n", strsignal(sigval));
1822 FORKEE_ASSERT(raise(sigval) == 0); 1822 FORKEE_ASSERT(raise(sigval) == 0);
1823 1823
1824 DPRINTF("Before calling execve(2) from child\n"); 1824 DPRINTF("Before calling execve(2) from child\n");
1825 execlp("/bin/echo", "/bin/echo", NULL); 1825 execlp("/bin/echo", "/bin/echo", NULL);
1826 1826
1827 FORKEE_ASSERT(0 && "Not reached"); 1827 FORKEE_ASSERT(0 && "Not reached");
1828 } 1828 }
1829 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 1829 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
1830 1830
1831 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1831 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1832 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1832 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1833 1833
1834 validate_status_stopped(status, sigval); 1834 validate_status_stopped(status, sigval);
1835 1835
1836 DPRINTF("Call GETDBREGS for the child process (r1)\n"); 1836 DPRINTF("Call GETDBREGS for the child process (r1)\n");
1837 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1); 1837 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r1, 0) != -1);
1838 1838
1839 DPRINTF("State of the debug registers (r1):\n"); 1839 DPRINTF("State of the debug registers (r1):\n");
1840 for (i = 0; i < __arraycount(r1.dr); i++) 1840 for (i = 0; i < __arraycount(r1.dr); i++)
1841 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1841 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1842 1842
1843 r1.dr[reg] = (long)(intptr_t)check_happy; 1843 r1.dr[reg] = (long)(intptr_t)check_happy;
1844 DPRINTF("Set DR%d (r1.dr[%d]) to new value %" PRIxREGISTER "\n", 1844 DPRINTF("Set DR%d (r1.dr[%d]) to new value %" PRIxREGISTER "\n",
1845 reg, reg, r1.dr[reg]); 1845 reg, reg, r1.dr[reg]);
1846 1846
1847 DPRINTF("New state of the debug registers (r1):\n"); 1847 DPRINTF("New state of the debug registers (r1):\n");
1848 for (i = 0; i < __arraycount(r1.dr); i++) 1848 for (i = 0; i < __arraycount(r1.dr); i++)
1849 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]); 1849 DPRINTF("r1[%zu]=%" PRIxREGISTER "\n", i, r1.dr[i]);
1850 1850
1851 DPRINTF("Call SETDBREGS for the child process (r1)\n"); 1851 DPRINTF("Call SETDBREGS for the child process (r1)\n");
1852 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1); 1852 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r1, 0) != -1);
1853 1853
1854 DPRINTF("Before resuming the child process where it left off and " 1854 DPRINTF("Before resuming the child process where it left off and "
1855 "without signal to be sent\n"); 1855 "without signal to be sent\n");
1856 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1856 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1857 1857
1858 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1858 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1859 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1859 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1860 1860
1861 validate_status_stopped(status, sigval); 1861 validate_status_stopped(status, sigval);
1862 1862
1863 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n"); 1863 DPRINTF("Before calling ptrace(2) with PT_GET_SIGINFO for child\n");
1864 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1); 1864 SYSCALL_REQUIRE(ptrace(PT_GET_SIGINFO, child, &info, sizeof(info)) != -1);
1865 1865
1866 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid); 1866 DPRINTF("Signal traced to lwpid=%d\n", info.psi_lwpid);
1867 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n", 1867 DPRINTF("Signal properties: si_signo=%#x si_code=%#x si_errno=%#x\n",
1868 info.psi_siginfo.si_signo, info.psi_siginfo.si_code, 1868 info.psi_siginfo.si_signo, info.psi_siginfo.si_code,
1869 info.psi_siginfo.si_errno); 1869 info.psi_siginfo.si_errno);
1870 1870
1871 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, sigval); 1871 ATF_REQUIRE_EQ(info.psi_siginfo.si_signo, sigval);
1872 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_EXEC); 1872 ATF_REQUIRE_EQ(info.psi_siginfo.si_code, TRAP_EXEC);
1873 1873
1874 DPRINTF("Call GETDBREGS for the child process after execve(2)\n"); 1874 DPRINTF("Call GETDBREGS for the child process after execve(2)\n");
1875 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r2, 0) != -1); 1875 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r2, 0) != -1);
1876 1876
1877 DPRINTF("State of the debug registers (r2):\n"); 1877 DPRINTF("State of the debug registers (r2):\n");
1878 for (i = 0; i < __arraycount(r2.dr); i++) 1878 for (i = 0; i < __arraycount(r2.dr); i++)
1879 DPRINTF("r2[%zu]=%" PRIxREGISTER "\n", i, r2.dr[i]); 1879 DPRINTF("r2[%zu]=%" PRIxREGISTER "\n", i, r2.dr[i]);
1880 1880
1881 DPRINTF("Assert that (r1) and (r2) are not the same\n"); 1881 DPRINTF("Assert that (r1) and (r2) are not the same\n");
1882 ATF_REQUIRE(memcmp(&r1, &r2, sizeof(r1)) != 0); 1882 ATF_REQUIRE(memcmp(&r1, &r2, sizeof(r1)) != 0);
1883 1883
1884 DPRINTF("Before resuming the child process where it left off and " 1884 DPRINTF("Before resuming the child process where it left off and "
1885 "without signal to be sent\n"); 1885 "without signal to be sent\n");
1886 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 1886 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
1887 1887
1888 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1888 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1889 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 1889 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
1890 1890
1891 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 1891 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
1892 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 1892 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
1893} 1893}
1894 1894
1895ATF_TC(dbregs_dr0_dont_inherit_execve); 1895ATF_TC(dbregs_dr0_dont_inherit_execve);
1896ATF_TC_HEAD(dbregs_dr0_dont_inherit_execve, tc) 1896ATF_TC_HEAD(dbregs_dr0_dont_inherit_execve, tc)
1897{ 1897{
1898 atf_tc_set_md_var(tc, "descr", 1898 atf_tc_set_md_var(tc, "descr",
1899 "Verify that execve(2) is intercepted by tracer and Debug " 1899 "Verify that execve(2) is intercepted by tracer and Debug "
1900 "Register 0 is reset"); 1900 "Register 0 is reset");
1901} 1901}
1902 1902
1903ATF_TC_BODY(dbregs_dr0_dont_inherit_execve, tc) 1903ATF_TC_BODY(dbregs_dr0_dont_inherit_execve, tc)
1904{ 1904{
1905 dbregs_dont_inherit_execve(0); 1905 dbregs_dont_inherit_execve(0);
1906} 1906}
1907 1907
1908ATF_TC(dbregs_dr1_dont_inherit_execve); 1908ATF_TC(dbregs_dr1_dont_inherit_execve);
1909ATF_TC_HEAD(dbregs_dr1_dont_inherit_execve, tc) 1909ATF_TC_HEAD(dbregs_dr1_dont_inherit_execve, tc)
1910{ 1910{
1911 atf_tc_set_md_var(tc, "descr", 1911 atf_tc_set_md_var(tc, "descr",
1912 "Verify that execve(2) is intercepted by tracer and Debug " 1912 "Verify that execve(2) is intercepted by tracer and Debug "
1913 "Register 1 is reset"); 1913 "Register 1 is reset");
1914} 1914}
1915 1915
1916ATF_TC_BODY(dbregs_dr1_dont_inherit_execve, tc) 1916ATF_TC_BODY(dbregs_dr1_dont_inherit_execve, tc)
1917{ 1917{
1918 dbregs_dont_inherit_execve(1); 1918 dbregs_dont_inherit_execve(1);
1919} 1919}
1920 1920
1921ATF_TC(dbregs_dr2_dont_inherit_execve); 1921ATF_TC(dbregs_dr2_dont_inherit_execve);
1922ATF_TC_HEAD(dbregs_dr2_dont_inherit_execve, tc) 1922ATF_TC_HEAD(dbregs_dr2_dont_inherit_execve, tc)
1923{ 1923{
1924 atf_tc_set_md_var(tc, "descr", 1924 atf_tc_set_md_var(tc, "descr",
1925 "Verify that execve(2) is intercepted by tracer and Debug " 1925 "Verify that execve(2) is intercepted by tracer and Debug "
1926 "Register 2 is reset"); 1926 "Register 2 is reset");
1927} 1927}
1928 1928
1929ATF_TC_BODY(dbregs_dr2_dont_inherit_execve, tc) 1929ATF_TC_BODY(dbregs_dr2_dont_inherit_execve, tc)
1930{ 1930{
1931 dbregs_dont_inherit_execve(2); 1931 dbregs_dont_inherit_execve(2);
1932} 1932}
1933 1933
1934ATF_TC(dbregs_dr3_dont_inherit_execve); 1934ATF_TC(dbregs_dr3_dont_inherit_execve);
1935ATF_TC_HEAD(dbregs_dr3_dont_inherit_execve, tc) 1935ATF_TC_HEAD(dbregs_dr3_dont_inherit_execve, tc)
1936{ 1936{
1937 atf_tc_set_md_var(tc, "descr", 1937 atf_tc_set_md_var(tc, "descr",
1938 "Verify that execve(2) is intercepted by tracer and Debug " 1938 "Verify that execve(2) is intercepted by tracer and Debug "
1939 "Register 3 is reset"); 1939 "Register 3 is reset");
1940} 1940}
1941 1941
1942ATF_TC_BODY(dbregs_dr3_dont_inherit_execve, tc) 1942ATF_TC_BODY(dbregs_dr3_dont_inherit_execve, tc)
1943{ 1943{
1944 dbregs_dont_inherit_execve(3); 1944 dbregs_dont_inherit_execve(3);
1945} 1945}
1946 1946
1947/// ---------------------------------------------------------------------------- 1947/// ----------------------------------------------------------------------------
1948 1948
1949ATF_TC(x86_cve_2018_8897); 1949ATF_TC(x86_cve_2018_8897);
1950ATF_TC_HEAD(x86_cve_2018_8897, tc) 1950ATF_TC_HEAD(x86_cve_2018_8897, tc)
1951{ 1951{
1952 atf_tc_set_md_var(tc, "descr", 1952 atf_tc_set_md_var(tc, "descr",
1953 "Verify mitigation for CVE-2018-8897 (POP SS debug exception)"); 1953 "Verify mitigation for CVE-2018-8897 (POP SS debug exception)");
1954} 1954}
1955 1955
1956#define X86_CVE_2018_8897_PAGE 0x5000 /* page addressable by 32-bit registers */ 1956#define X86_CVE_2018_8897_PAGE 0x5000 /* page addressable by 32-bit registers */
1957 1957
1958static void 1958static void
1959x86_cve_2018_8897_trigger(void) 1959x86_cve_2018_8897_trigger(void)
1960{ 1960{
1961 /* 1961 /*
1962 * A function to trigger the POP SS (CVE-2018-8897) vulnerability 1962 * A function to trigger the POP SS (CVE-2018-8897) vulnerability
1963 * 1963 *
1964 * ifdef __x86_64__ 1964 * ifdef __x86_64__
1965 * 1965 *
1966 * We need to switch to 32-bit mode execution on 64-bit kernel. 1966 * We need to switch to 32-bit mode execution on 64-bit kernel.
1967 * This is achieved with far jump instruction and GDT descriptor 1967 * This is achieved with far jump instruction and GDT descriptor
1968 * set to 32-bit CS selector. The 32-bit CS selector is kernel 1968 * set to 32-bit CS selector. The 32-bit CS selector is kernel
1969 * specific, in the NetBSD case registered as GUCODE32_SEL 1969 * specific, in the NetBSD case registered as GUCODE32_SEL
1970 * that is equal to (14 (decimal) << 3) with GDT and user 1970 * that is equal to (14 (decimal) << 3) with GDT and user
1971 * privilege level (this makes it 0x73). 1971 * privilege level (this makes it 0x73).
1972 * 1972 *
1973 * In UNIX as(1) assembly x86_64 far jump is coded as ljmp. 1973 * In UNIX as(1) assembly x86_64 far jump is coded as ljmp.
1974 * amd64 ljmp requires an indirect address with cs:RIP. 1974 * amd64 ljmp requires an indirect address with cs:RIP.
1975 * 1975 *
1976 * When we are running in 32-bit mode, it's similar to the 1976 * When we are running in 32-bit mode, it's similar to the
1977 * mode as if the binary had been launched in netbsd32. 1977 * mode as if the binary had been launched in netbsd32.
1978 * 1978 *
1979 * There are two versions of this exploit, one with RIP 1979 * There are two versions of this exploit, one with RIP
1980 * relative code and the other with static addresses. 1980 * relative code and the other with static addresses.
1981 * The first one is PIE code aware, the other no-PIE one. 1981 * The first one is PIE code aware, the other no-PIE one.
1982 * 1982 *
1983 * 1983 *
1984 * After switching to the 32-bit mode we can move on to the remaining 1984 * After switching to the 32-bit mode we can move on to the remaining
1985 * part of the exploit. 1985 * part of the exploit.
1986 * 1986 *
1987 * endif // __x86_64__ 1987 * endif // __x86_64__
1988 * 1988 *
1989 * Set the stack pointer to the page we allocated earlier. Remember 1989 * Set the stack pointer to the page we allocated earlier. Remember
1990 * that we put an SS selector exactly at this address, so we can pop. 1990 * that we put an SS selector exactly at this address, so we can pop.
1991 * 1991 *
1992 * movl $0x5000,%esp 1992 * movl $0x5000,%esp
1993 * 1993 *
1994 * Pop the SS selector off the stack. This reloads the SS selector, 1994 * Pop the SS selector off the stack. This reloads the SS selector,
1995 * which is fine. Remember that we set DR0 at address 0x5000, which 1995 * which is fine. Remember that we set DR0 at address 0x5000, which
1996 * we are now reading. Therefore, on this instruction, the CPU will 1996 * we are now reading. Therefore, on this instruction, the CPU will
1997 * raise a #DB exception. 1997 * raise a #DB exception.
1998 * 1998 *
1999 * But the "pop %ss" instruction is special: it blocks exceptions 1999 * But the "pop %ss" instruction is special: it blocks exceptions
2000 * until the next instruction is executed. So the #DB that we just 2000 * until the next instruction is executed. So the #DB that we just
2001 * raised is actually blocked. 2001 * raised is actually blocked.
2002 * 2002 *
2003 * pop %ss 2003 * pop %ss
2004 * 2004 *
2005 * We are still here, and didn't receive the #DB. After we execute 2005 * We are still here, and didn't receive the #DB. After we execute
2006 * this instruction, the effect of "pop %ss" will disappear, and 2006 * this instruction, the effect of "pop %ss" will disappear, and
2007 * we will receive the #DB for real. 2007 * we will receive the #DB for real.
2008 * 2008 *
2009 * int $4 2009 * int $4
2010 * 2010 *
2011 * Here the bug happens. We executed "int $4", so we entered the 2011 * Here the bug happens. We executed "int $4", so we entered the
2012 * kernel, with interrupts disabled. The #DB that was pending is 2012 * kernel, with interrupts disabled. The #DB that was pending is
2013 * received. But, it is received immediately in kernel mode, and is 2013 * received. But, it is received immediately in kernel mode, and is
2014 * _NOT_ received when interrupts are enabled again. 2014 * _NOT_ received when interrupts are enabled again.
2015 * 2015 *
2016 * It means that, in the first instruction of the $4 handler, we 2016 * It means that, in the first instruction of the $4 handler, we
2017 * think we are safe with interrupts disabled. But we aren't, and 2017 * think we are safe with interrupts disabled. But we aren't, and
2018 * just got interrupted.  2018 * just got interrupted.
2019 * 2019 *
2020 * The new interrupt handler doesn't handle this particular context: 2020 * The new interrupt handler doesn't handle this particular context:
2021 * we are entered in kernel mode, the previous context was kernel 2021 * we are entered in kernel mode, the previous context was kernel
2022 * mode too but it still had the user context loaded. 2022 * mode too but it still had the user context loaded.
2023 * 2023 *
2024 * We find ourselves not doing a 'swapgs'. At the end of the day, it 2024 * We find ourselves not doing a 'swapgs'. At the end of the day, it
2025 * means that we call trap() with a curcpu() that is fully 2025 * means that we call trap() with a curcpu() that is fully
2026 * controllable by userland. From then on, it is easy to escalate 2026 * controllable by userland. From then on, it is easy to escalate
2027 * privileges. 2027 * privileges.
2028 * 2028 *
2029 * With SVS it also means we don't switch CR3, so this results in a 2029 * With SVS it also means we don't switch CR3, so this results in a
2030 * triple fault, which this time cannot be turned to a privilege 2030 * triple fault, which this time cannot be turned to a privilege
2031 * escalation. 2031 * escalation.
2032 */ 2032 */
2033 2033
2034#if __x86_64__ 2034#if __x86_64__
2035#if __PIE__ 2035#if __PIE__
2036 void *csRIP; 2036 void *csRIP;
2037 2037
2038 csRIP = malloc(sizeof(int) + sizeof(short)); 2038 csRIP = malloc(sizeof(int) + sizeof(short));
2039 FORKEE_ASSERT(csRIP != NULL); 2039 FORKEE_ASSERT(csRIP != NULL);
2040 2040
2041 __asm__ __volatile__( 2041 __asm__ __volatile__(
2042 " leal 24(%%eip), %%eax\n\t" 2042 " leal 24(%%eip), %%eax\n\t"
2043 " movq %0, %%rdx\n\t" 2043 " movq %0, %%rdx\n\t"
2044 " movl %%eax, (%%rdx)\n\t" 2044 " movl %%eax, (%%rdx)\n\t"
2045 " movw $0x73, 4(%%rdx)\n\t" 2045 " movw $0x73, 4(%%rdx)\n\t"
2046 " movq %1, %%rax\n\t" 2046 " movq %1, %%rax\n\t"
2047 " ljmp *(%%rax)\n\t" 2047 " ljmp *(%%rax)\n\t"
2048 " .code32\n\t" 2048 " .code32\n\t"
2049 " movl $0x5000, %%esp\n\t" 2049 " movl $0x5000, %%esp\n\t"
2050 " pop %%ss\n\t" 2050 " pop %%ss\n\t"
2051 " int $4\n\t" 2051 " int $4\n\t"
2052 " .code64\n\t" 2052 " .code64\n\t"
2053 : "=m"(csRIP) 2053 : "=m"(csRIP)
2054 : "m"(csRIP) 2054 : "m"(csRIP)
2055 : "%rax", "%rdx", "%rsp" 2055 : "%rax", "%rdx", "%rsp"
2056 ); 2056 );
2057#else /* !__PIE__ */ 2057#else /* !__PIE__ */
2058 __asm__ __volatile__( 2058 __asm__ __volatile__(
2059 " movq $farjmp32%=, %%rax\n\t" 2059 " movq $farjmp32%=, %%rax\n\t"
2060 " ljmp *(%%rax)\n\t" 2060 " ljmp *(%%rax)\n\t"
2061 "farjmp32%=:\n\t" 2061 "farjmp32%=:\n\t"
2062 " .long trigger32%=\n\t" 2062 " .long trigger32%=\n\t"
2063 " .word 0x73\n\t" 2063 " .word 0x73\n\t"
2064 " .code32\n\t" 2064 " .code32\n\t"
2065 "trigger32%=:\n\t" 2065 "trigger32%=:\n\t"
2066 " movl $0x5000, %%esp\n\t" 2066 " movl $0x5000, %%esp\n\t"
2067 " pop %%ss\n\t" 2067 " pop %%ss\n\t"
2068 " int $4\n\t" 2068 " int $4\n\t"
2069 " .code64\n\t" 2069 " .code64\n\t"
2070 : 2070 :
2071 : 2071 :
2072 : "%rax", "%rsp" 2072 : "%rax", "%rsp"
2073 ); 2073 );
2074#endif 2074#endif
2075#elif __i386__ 2075#elif __i386__
2076 __asm__ __volatile__( 2076 __asm__ __volatile__(
2077 "movl $0x5000, %%esp\n\t" 2077 "movl $0x5000, %%esp\n\t"
2078 "pop %%ss\n\t" 2078 "pop %%ss\n\t"
2079 "int $4\n\t" 2079 "int $4\n\t"
2080 : 2080 :
2081 : 2081 :
2082 : "%esp" 2082 : "%esp"
2083 ); 2083 );
2084#endif 2084#endif
2085} 2085}
2086 2086
2087ATF_TC_BODY(x86_cve_2018_8897, tc) 2087ATF_TC_BODY(x86_cve_2018_8897, tc)
2088{ 2088{
2089 const int sigval = SIGSTOP; 2089 const int sigval = SIGSTOP;
2090 pid_t child, wpid; 2090 pid_t child, wpid;
2091#if defined(TWAIT_HAVE_STATUS) 2091#if defined(TWAIT_HAVE_STATUS)
2092 int status; 2092 int status;
2093#endif 2093#endif
2094 char *trap_page; 2094 char *trap_page;
2095 struct dbreg db; 2095 struct dbreg db;
2096  2096
2097 2097
2098 if (!can_we_set_dbregs()) { 2098 if (!can_we_set_dbregs()) {
2099 atf_tc_skip("Either run this test as root or set sysctl(3) " 2099 atf_tc_skip("Either run this test as root or set sysctl(3) "
2100 "security.models.extensions.user_set_dbregs to 1"); 2100 "security.models.extensions.user_set_dbregs to 1");
2101 } 2101 }
2102 2102
2103 DPRINTF("Before forking process PID=%d\n", getpid()); 2103 DPRINTF("Before forking process PID=%d\n", getpid());
2104 SYSCALL_REQUIRE((child = fork()) != -1); 2104 SYSCALL_REQUIRE((child = fork()) != -1);
2105 if (child == 0) { 2105 if (child == 0) {
2106 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 2106 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
2107 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 2107 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
2108 2108
2109 trap_page = mmap((void *)X86_CVE_2018_8897_PAGE, 2109 trap_page = mmap((void *)X86_CVE_2018_8897_PAGE,
2110 sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, 2110 sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE,
2111 MAP_FIXED|MAP_ANON|MAP_PRIVATE, -1, 0); 2111 MAP_FIXED|MAP_ANON|MAP_PRIVATE, -1, 0);
2112 2112
2113 /* trigger page fault */ 2113 /* trigger page fault */
2114 memset(trap_page, 0, sysconf(_SC_PAGESIZE)); 2114 memset(trap_page, 0, sysconf(_SC_PAGESIZE));
2115 2115
2116 // kernel GDT 2116 // kernel GDT
2117#if __x86_64__ 2117#if __x86_64__
2118 /* SS selector (descriptor 9 (0x4f >> 3)) */ 2118 /* SS selector (descriptor 9 (0x4f >> 3)) */
2119 *trap_page = 0x4f; 2119 *trap_page = 0x4f;
2120#elif __i386__ 2120#elif __i386__
2121 /* SS selector (descriptor 4 (0x23 >> 3)) */ 2121 /* SS selector (descriptor 4 (0x23 >> 3)) */
2122 *trap_page = 0x23; 2122 *trap_page = 0x23;
2123#endif 2123#endif
2124 2124
2125 DPRINTF("Before raising %s from child\n", strsignal(sigval)); 2125 DPRINTF("Before raising %s from child\n", strsignal(sigval));
2126 FORKEE_ASSERT(raise(sigval) == 0); 2126 FORKEE_ASSERT(raise(sigval) == 0);
2127 2127
2128 x86_cve_2018_8897_trigger(); 2128 x86_cve_2018_8897_trigger();
2129 2129
2130 /* NOTREACHED */ 2130 /* NOTREACHED */
2131 FORKEE_ASSERTX(0 && "This shall not be reached"); 2131 FORKEE_ASSERTX(0 && "This shall not be reached");
2132 } 2132 }
2133 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 2133 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
2134 2134
2135 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 2135 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
2136 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 2136 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
2137 2137
2138 validate_status_stopped(status, sigval); 2138 validate_status_stopped(status, sigval);
2139 2139
2140 DPRINTF("Call GETDBREGS for the child process\n"); 2140 DPRINTF("Call GETDBREGS for the child process\n");
2141 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &db, 0) != -1); 2141 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &db, 0) != -1);
2142 2142
2143 /* 2143 /*
2144 * Set up the dbregs. We put the 0x5000 address in DR0. 2144 * Set up the dbregs. We put the 0x5000 address in DR0.
2145 * It means that, the first time we touch this, the CPU will trigger a 2145 * It means that, the first time we touch this, the CPU will trigger a
2146 * #DB exception. 2146 * #DB exception.
2147 */ 2147 */
2148 db.dr[0] = X86_CVE_2018_8897_PAGE; 2148 db.dr[0] = X86_CVE_2018_8897_PAGE;
2149 db.dr[7] = 0x30003; 2149 db.dr[7] = 0x30003;
2150 2150
2151 DPRINTF("Call SETDBREGS for the child process\n"); 2151 DPRINTF("Call SETDBREGS for the child process\n");
2152 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &db, 0) != -1); 2152 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &db, 0) != -1);
2153 2153
2154 DPRINTF("Before resuming the child process where it left off and " 2154 DPRINTF("Before resuming the child process where it left off and "
2155 "without signal to be sent\n"); 2155 "without signal to be sent\n");
2156 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 2156 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
2157 2157
2158 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 2158 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
2159 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 2159 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
2160 2160
2161 // In this test we receive SIGFPE, is this appropriate? 2161 // In this test we receive SIGFPE, is this appropriate?
2162// validate_status_stopped(status, SIGFPE); 2162// validate_status_stopped(status, SIGFPE);
2163 2163
2164 DPRINTF("Kill the child process\n"); 2164 DPRINTF("Kill the child process\n");
2165 SYSCALL_REQUIRE(ptrace(PT_KILL, child, NULL, 0) != -1); 2165 SYSCALL_REQUIRE(ptrace(PT_KILL, child, NULL, 0) != -1);
2166 2166
2167 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 2167 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
2168 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 2168 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
2169 2169
2170 validate_status_signaled(status, SIGKILL, 0); 2170 validate_status_signaled(status, SIGKILL, 0);
2171 2171
2172 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 2172 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
2173 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 2173 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
2174} 2174}
2175 2175
2176/// ---------------------------------------------------------------------------- 2176/// ----------------------------------------------------------------------------
2177 2177
2178union x86_test_register { 2178union x86_test_register {
2179 struct { 2179 struct {
 2180 uint64_t a, b, c, d, e, f, g, h;
 2181 } zmm;
 2182 struct {
2180 uint64_t a, b, c, d; 2183 uint64_t a, b, c, d;
2181 } ymm; 2184 } ymm;
2182 struct { 2185 struct {
2183 uint64_t a, b; 2186 uint64_t a, b;
2184 } xmm; 2187 } xmm;
2185 uint64_t u64; 2188 uint64_t u64;
2186 uint32_t u32; 2189 uint32_t u32;
2187}; 2190};
2188 2191
2189struct x86_test_fpu_registers { 2192struct x86_test_fpu_registers {
2190 struct { 2193 struct {
2191 uint64_t mantissa; 2194 uint64_t mantissa;
2192 uint16_t sign_exp; 2195 uint16_t sign_exp;
2193 } __aligned(16) st[8]; 2196 } __aligned(16) st[8];
2194 2197
2195 uint16_t cw; 2198 uint16_t cw;
2196 uint16_t sw; 2199 uint16_t sw;
2197 uint16_t tw; 2200 uint16_t tw;
2198 uint8_t tw_abridged; 2201 uint8_t tw_abridged;
2199 uint16_t opcode; 2202 uint16_t opcode;
2200 union fp_addr ip; 2203 union fp_addr ip;
2201 union fp_addr dp; 2204 union fp_addr dp;
2202}; 2205};
2203 2206
2204enum x86_test_regset { 2207enum x86_test_regset {
2205 TEST_GPREGS, 2208 TEST_GPREGS,
2206 TEST_FPREGS, 2209 TEST_FPREGS,
2207 TEST_XMMREGS, 2210 TEST_XMMREGS,
2208 TEST_XSTATE 2211 TEST_XSTATE
2209}; 2212};
2210 2213
2211/* Please keep them grouped by acceptable x86_test_regset. */ 2214/* Please keep them grouped by acceptable x86_test_regset. */
2212enum x86_test_registers { 2215enum x86_test_registers {
2213 /* TEST_GPREGS */ 2216 /* TEST_GPREGS */
2214 GPREGS_32, 2217 GPREGS_32,
2215 GPREGS_32_EBP_ESP, 2218 GPREGS_32_EBP_ESP,
2216 GPREGS_64, 2219 GPREGS_64,
2217 GPREGS_64_R8, 2220 GPREGS_64_R8,
2218 /* TEST_FPREGS/TEST_XMMREGS */ 2221 /* TEST_FPREGS/TEST_XMMREGS */
2219 FPREGS_FPU, 2222 FPREGS_FPU,
2220 FPREGS_MM, 2223 FPREGS_MM,
2221 FPREGS_XMM, 2224 FPREGS_XMM,
2222 /* TEST_XSTATE */ 2225 /* TEST_XSTATE */
2223 FPREGS_YMM 2226 FPREGS_YMM,
 2227 FPREGS_ZMM
2224}; 2228};
2225 2229
2226enum x86_test_regmode { 2230enum x86_test_regmode {
2227 TEST_GETREGS, 2231 TEST_GETREGS,
2228 TEST_SETREGS, 2232 TEST_SETREGS,
2229 TEST_COREDUMP 2233 TEST_COREDUMP
2230}; 2234};
2231 2235
2232static __inline void get_gp32_regs(union x86_test_register out[]) 2236static __inline void get_gp32_regs(union x86_test_register out[])
2233{ 2237{
2234#if defined(__i386__) 2238#if defined(__i386__)
2235 const uint32_t fill = 0x0F0F0F0F; 2239 const uint32_t fill = 0x0F0F0F0F;
2236 2240
2237 __asm__ __volatile__( 2241 __asm__ __volatile__(
2238 /* fill registers with clobber pattern */ 2242 /* fill registers with clobber pattern */
2239 "movl %6, %%eax\n\t" 2243 "movl %6, %%eax\n\t"
2240 "movl %6, %%ebx\n\t" 2244 "movl %6, %%ebx\n\t"
2241 "movl %6, %%ecx\n\t" 2245 "movl %6, %%ecx\n\t"
2242 "movl %6, %%edx\n\t" 2246 "movl %6, %%edx\n\t"
2243 "movl %6, %%esi\n\t" 2247 "movl %6, %%esi\n\t"
2244 "movl %6, %%edi\n\t" 2248 "movl %6, %%edi\n\t"
2245 "\n\t" 2249 "\n\t"
2246 "int3\n\t" 2250 "int3\n\t"
2247 : "=a"(out[0].u32), "=b"(out[1].u32), "=c"(out[2].u32), 2251 : "=a"(out[0].u32), "=b"(out[1].u32), "=c"(out[2].u32),
2248 "=d"(out[3].u32), "=S"(out[4].u32), "=D"(out[5].u32) 2252 "=d"(out[3].u32), "=S"(out[4].u32), "=D"(out[5].u32)
2249 : "g"(fill) 2253 : "g"(fill)
2250 ); 2254 );
2251#else 2255#else
2252 __unreachable(); 2256 __unreachable();
2253#endif 2257#endif
2254} 2258}
2255 2259
2256static __inline void set_gp32_regs(const union x86_test_register data[]) 2260static __inline void set_gp32_regs(const union x86_test_register data[])
2257{ 2261{
2258#if defined(__i386__) 2262#if defined(__i386__)
2259 __asm__ __volatile__( 2263 __asm__ __volatile__(
2260 "int3\n\t" 2264 "int3\n\t"
2261 : 2265 :
2262 : "a"(data[0].u32), "b"(data[1].u32), "c"(data[2].u32), 2266 : "a"(data[0].u32), "b"(data[1].u32), "c"(data[2].u32),
2263 "d"(data[3].u32), "S"(data[4].u32), "D"(data[5].u32) 2267 "d"(data[3].u32), "S"(data[4].u32), "D"(data[5].u32)
2264 : 2268 :
2265 ); 2269 );
2266#else 2270#else
2267 __unreachable(); 2271 __unreachable();
2268#endif 2272#endif
2269} 2273}
2270 2274
2271static __inline void get_gp32_ebp_esp_regs(union x86_test_register out[]) 2275static __inline void get_gp32_ebp_esp_regs(union x86_test_register out[])
2272{ 2276{
2273#if defined(__i386__) 2277#if defined(__i386__)
2274 const uint32_t fill = 0x0F0F0F0F; 2278 const uint32_t fill = 0x0F0F0F0F;
2275 2279
2276 __asm__ __volatile__( 2280 __asm__ __volatile__(
2277 /* save original ebp & esp using our output registers */ 2281 /* save original ebp & esp using our output registers */
2278 "movl %%esp, %0\n\t" 2282 "movl %%esp, %0\n\t"
2279 "movl %%ebp, %1\n\t" 2283 "movl %%ebp, %1\n\t"
2280 /* fill them with clobber pattern */ 2284 /* fill them with clobber pattern */
2281 "movl %2, %%esp\n\t" 2285 "movl %2, %%esp\n\t"
2282 "movl %2, %%ebp\n\t" 2286 "movl %2, %%ebp\n\t"
2283 "\n\t" 2287 "\n\t"
2284 "int3\n\t" 2288 "int3\n\t"
2285 "\n\t" 2289 "\n\t"
2286 /* restore ebp & esp, and save the result */ 2290 /* restore ebp & esp, and save the result */
2287 "xchgl %%esp, %0\n\t" 2291 "xchgl %%esp, %0\n\t"
2288 "xchgl %%ebp, %1\n\t" 2292 "xchgl %%ebp, %1\n\t"
2289 : "=r"(out[0].u32), "=r"(out[1].u32) 2293 : "=r"(out[0].u32), "=r"(out[1].u32)
2290 : "g"(fill) 2294 : "g"(fill)
2291 : 2295 :
2292 ); 2296 );
2293#else 2297#else
2294 __unreachable(); 2298 __unreachable();
2295#endif 2299#endif
2296} 2300}
2297 2301
2298static __inline void set_gp32_ebp_esp_regs(const union x86_test_register data[]) 2302static __inline void set_gp32_ebp_esp_regs(const union x86_test_register data[])
2299{ 2303{
2300#if defined(__i386__) 2304#if defined(__i386__)
2301 __asm__ __volatile__( 2305 __asm__ __volatile__(
2302 /* ebp & ebp are a bit tricky, we must not clobber them */ 2306 /* ebp & ebp are a bit tricky, we must not clobber them */
2303 "movl %%esp, %%eax\n\t" 2307 "movl %%esp, %%eax\n\t"
2304 "movl %%ebp, %%ebx\n\t" 2308 "movl %%ebp, %%ebx\n\t"
2305 "movl %0, %%esp\n\t" 2309 "movl %0, %%esp\n\t"
2306 "movl %1, %%ebp\n\t" 2310 "movl %1, %%ebp\n\t"
2307 "\n\t" 2311 "\n\t"
2308 "int3\n\t" 2312 "int3\n\t"
2309 "\n\t" 2313 "\n\t"
2310 "movl %%eax, %%esp\n\t" 2314 "movl %%eax, %%esp\n\t"
2311 "movl %%ebx, %%ebp\n\t" 2315 "movl %%ebx, %%ebp\n\t"
2312 : 2316 :
2313 : "ri"(data[0].u32), "ri"(data[1].u32) 2317 : "ri"(data[0].u32), "ri"(data[1].u32)
2314 : "%eax", "%ebx" 2318 : "%eax", "%ebx"
2315 ); 2319 );
2316#else 2320#else
2317 __unreachable(); 2321 __unreachable();
2318#endif 2322#endif
2319} 2323}
2320 2324
2321static __inline void get_gp64_regs(union x86_test_register out[]) 2325static __inline void get_gp64_regs(union x86_test_register out[])
2322{ 2326{
2323#if defined(__x86_64__) 2327#if defined(__x86_64__)
2324 const uint64_t fill = 0x0F0F0F0F0F0F0F0F; 2328 const uint64_t fill = 0x0F0F0F0F0F0F0F0F;
2325 2329
2326 __asm__ __volatile__( 2330 __asm__ __volatile__(
2327 /* save rsp & rbp */ 2331 /* save rsp & rbp */
2328 "movq %%rsp, %6\n\t" 2332 "movq %%rsp, %6\n\t"
2329 "movq %%rbp, %7\n\t" 2333 "movq %%rbp, %7\n\t"
2330 "\n\t" 2334 "\n\t"
2331 /* fill registers with clobber pattern */ 2335 /* fill registers with clobber pattern */
2332 "movq %8, %%rax\n\t" 2336 "movq %8, %%rax\n\t"
2333 "movq %8, %%rbx\n\t" 2337 "movq %8, %%rbx\n\t"
2334 "movq %8, %%rcx\n\t" 2338 "movq %8, %%rcx\n\t"
2335 "movq %8, %%rdx\n\t" 2339 "movq %8, %%rdx\n\t"
2336 "movq %8, %%rsp\n\t" 2340 "movq %8, %%rsp\n\t"
2337 "movq %8, %%rbp\n\t" 2341 "movq %8, %%rbp\n\t"
2338 "movq %8, %%rsi\n\t" 2342 "movq %8, %%rsi\n\t"
2339 "movq %8, %%rdi\n\t" 2343 "movq %8, %%rdi\n\t"
2340 "\n\t" 2344 "\n\t"
2341 "int3\n\t" 2345 "int3\n\t"
2342 "\n\t" 2346 "\n\t"
2343 /* swap saved & current rsp & rbp */ 2347 /* swap saved & current rsp & rbp */
2344 "xchgq %%rsp, %6\n\t" 2348 "xchgq %%rsp, %6\n\t"
2345 "xchgq %%rbp, %7\n\t" 2349 "xchgq %%rbp, %7\n\t"
2346 : "=a"(out[0].u64), "=b"(out[1].u64), "=c"(out[2].u64), 2350 : "=a"(out[0].u64), "=b"(out[1].u64), "=c"(out[2].u64),
2347 "=d"(out[3].u64), "=S"(out[4].u64), "=D"(out[5].u64), 2351 "=d"(out[3].u64), "=S"(out[4].u64), "=D"(out[5].u64),
2348 "=r"(out[6].u64), "=r"(out[7].u64) 2352 "=r"(out[6].u64), "=r"(out[7].u64)
2349 : "g"(fill) 2353 : "g"(fill)
2350 ); 2354 );
2351#else 2355#else
2352 __unreachable(); 2356 __unreachable();
2353#endif 2357#endif
2354} 2358}
2355 2359
2356static __inline void set_gp64_regs(const union x86_test_register data[]) 2360static __inline void set_gp64_regs(const union x86_test_register data[])
2357{ 2361{
2358#if defined(__x86_64__) 2362#if defined(__x86_64__)
2359 __asm__ __volatile__( 2363 __asm__ __volatile__(
2360 /* rbp & rbp are a bit tricky, we must not clobber them */ 2364 /* rbp & rbp are a bit tricky, we must not clobber them */
2361 "movq %%rsp, %%r8\n\t" 2365 "movq %%rsp, %%r8\n\t"
2362 "movq %%rbp, %%r9\n\t" 2366 "movq %%rbp, %%r9\n\t"
2363 "movq %6, %%rsp\n\t" 2367 "movq %6, %%rsp\n\t"
2364 "movq %7, %%rbp\n\t" 2368 "movq %7, %%rbp\n\t"
2365 "\n\t" 2369 "\n\t"
2366 "int3\n\t" 2370 "int3\n\t"
2367 "\n\t" 2371 "\n\t"
2368 "movq %%r8, %%rsp\n\t" 2372 "movq %%r8, %%rsp\n\t"
2369 "movq %%r9, %%rbp\n\t" 2373 "movq %%r9, %%rbp\n\t"
2370 : 2374 :
2371 : "a"(data[0].u64), "b"(data[1].u64), "c"(data[2].u64), 2375 : "a"(data[0].u64), "b"(data[1].u64), "c"(data[2].u64),
2372 "d"(data[3].u64), "S"(data[4].u64), "D"(data[5].u64), 2376 "d"(data[3].u64), "S"(data[4].u64), "D"(data[5].u64),
2373 "r"(data[6].u64), "r"(data[7].u64) 2377 "r"(data[6].u64), "r"(data[7].u64)
2374 : "%r8", "%r9" 2378 : "%r8", "%r9"
2375 ); 2379 );
2376#else 2380#else
2377 __unreachable(); 2381 __unreachable();
2378#endif 2382#endif
2379} 2383}
2380 2384
2381static __inline void get_gp64_r8_regs(union x86_test_register out[]) 2385static __inline void get_gp64_r8_regs(union x86_test_register out[])
2382{ 2386{
2383#if defined(__x86_64__) 2387#if defined(__x86_64__)
2384 const uint64_t fill = 0x0F0F0F0F0F0F0F0F; 2388 const uint64_t fill = 0x0F0F0F0F0F0F0F0F;
2385 2389
2386 __asm__ __volatile__( 2390 __asm__ __volatile__(
2387 /* fill registers with clobber pattern */ 2391 /* fill registers with clobber pattern */
2388 "movq %1, %%r8\n\t" 2392 "movq %1, %%r8\n\t"
2389 "movq %1, %%r9\n\t" 2393 "movq %1, %%r9\n\t"
2390 "movq %1, %%r10\n\t" 2394 "movq %1, %%r10\n\t"
2391 "movq %1, %%r11\n\t" 2395 "movq %1, %%r11\n\t"
2392 "movq %1, %%r12\n\t" 2396 "movq %1, %%r12\n\t"
2393 "movq %1, %%r13\n\t" 2397 "movq %1, %%r13\n\t"
2394 "movq %1, %%r14\n\t" 2398 "movq %1, %%r14\n\t"
2395 "movq %1, %%r15\n\t" 2399 "movq %1, %%r15\n\t"
2396 "\n\t" 2400 "\n\t"
2397 "int3\n\t" 2401 "int3\n\t"
2398 "\n\t" 2402 "\n\t"
2399 "movq %%r8, 0x00(%0)\n\t" 2403 "movq %%r8, 0x000(%0)\n\t"
2400 "movq %%r9, 0x20(%0)\n\t" 2404 "movq %%r9, 0x040(%0)\n\t"
2401 "movq %%r10, 0x40(%0)\n\t" 2405 "movq %%r10, 0x080(%0)\n\t"
2402 "movq %%r11, 0x60(%0)\n\t" 2406 "movq %%r11, 0x0C0(%0)\n\t"
2403 "movq %%r12, 0x80(%0)\n\t" 2407 "movq %%r12, 0x100(%0)\n\t"
2404 "movq %%r13, 0xA0(%0)\n\t" 2408 "movq %%r13, 0x140(%0)\n\t"
2405 "movq %%r14, 0xC0(%0)\n\t" 2409 "movq %%r14, 0x180(%0)\n\t"
2406 "movq %%r15, 0xE0(%0)\n\t" 2410 "movq %%r15, 0x1C0(%0)\n\t"
2407 : 2411 :
2408 : "a"(out), "m"(fill) 2412 : "a"(out), "m"(fill)
2409 : "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 2413 : "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
2410 ); 2414 );
2411#else 2415#else
2412 __unreachable(); 2416 __unreachable();
2413#endif 2417#endif
2414} 2418}
2415 2419
2416static __inline void set_gp64_r8_regs(const union x86_test_register data[]) 2420static __inline void set_gp64_r8_regs(const union x86_test_register data[])
2417{ 2421{
2418#if defined(__x86_64__) 2422#if defined(__x86_64__)
2419 __asm__ __volatile__( 2423 __asm__ __volatile__(
2420 "movq 0x00(%0), %%r8\n\t" 2424 "movq 0x000(%0), %%r8\n\t"
2421 "movq 0x20(%0), %%r9\n\t" 2425 "movq 0x040(%0), %%r9\n\t"
2422 "movq 0x40(%0), %%r10\n\t" 2426 "movq 0x080(%0), %%r10\n\t"
2423 "movq 0x60(%0), %%r11\n\t" 2427 "movq 0x0C0(%0), %%r11\n\t"
2424 "movq 0x80(%0), %%r12\n\t" 2428 "movq 0x100(%0), %%r12\n\t"
2425 "movq 0xA0(%0), %%r13\n\t" 2429 "movq 0x140(%0), %%r13\n\t"
2426 "movq 0xC0(%0), %%r14\n\t" 2430 "movq 0x180(%0), %%r14\n\t"
2427 "movq 0xE0(%0), %%r15\n\t" 2431 "movq 0x1C0(%0), %%r15\n\t"
2428 "int3\n\t" 2432 "int3\n\t"
2429 : 2433 :
2430 : "b"(data) 2434 : "b"(data)
2431 : "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 2435 : "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
2432 ); 2436 );
2433#else 2437#else
2434 __unreachable(); 2438 __unreachable();
2435#endif 2439#endif
2436} 2440}
2437 2441
2438static __inline void get_fpu_regs(struct x86_test_fpu_registers *out) 2442static __inline void get_fpu_regs(struct x86_test_fpu_registers *out)
2439{ 2443{
2440 struct save87 fsave; 2444 struct save87 fsave;
2441 struct fxsave fxsave; 2445 struct fxsave fxsave;
2442 2446
2443 __CTASSERT(sizeof(out->st[0]) == 16); 2447 __CTASSERT(sizeof(out->st[0]) == 16);
2444 2448
2445 __asm__ __volatile__( 2449 __asm__ __volatile__(
2446 "finit\n\t" 2450 "finit\n\t"
2447 "int3\n\t" 2451 "int3\n\t"
2448#if defined(__x86_64__) 2452#if defined(__x86_64__)
2449 "fxsave64 %2\n\t" 2453 "fxsave64 %2\n\t"
2450#else 2454#else
2451 "fxsave %2\n\t" 2455 "fxsave %2\n\t"
2452#endif 2456#endif
2453 "fnstenv %1\n\t" 2457 "fnstenv %1\n\t"
2454 "fnclex\n\t" 2458 "fnclex\n\t"
2455 "fstpt 0x00(%0)\n\t" 2459 "fstpt 0x00(%0)\n\t"
2456 "fstpt 0x10(%0)\n\t" 2460 "fstpt 0x10(%0)\n\t"
2457 "fstpt 0x20(%0)\n\t" 2461 "fstpt 0x20(%0)\n\t"
2458 "fstpt 0x30(%0)\n\t" 2462 "fstpt 0x30(%0)\n\t"
2459 "fstpt 0x40(%0)\n\t" 2463 "fstpt 0x40(%0)\n\t"
2460 "fstpt 0x50(%0)\n\t" 2464 "fstpt 0x50(%0)\n\t"
2461 "fstpt 0x60(%0)\n\t" 2465 "fstpt 0x60(%0)\n\t"
2462 "fstpt 0x70(%0)\n\t" 2466 "fstpt 0x70(%0)\n\t"
2463 : 2467 :
2464 : "a"(out->st), "m"(fsave), "m"(fxsave) 2468 : "a"(out->st), "m"(fsave), "m"(fxsave)
2465 : "st", "memory" 2469 : "st", "memory"
2466 ); 2470 );
2467 2471
2468 FORKEE_ASSERT(fsave.s87_cw == fxsave.fx_cw); 2472 FORKEE_ASSERT(fsave.s87_cw == fxsave.fx_cw);
2469 FORKEE_ASSERT(fsave.s87_sw == fxsave.fx_sw); 2473 FORKEE_ASSERT(fsave.s87_sw == fxsave.fx_sw);
2470 2474
2471 /* fsave contains full tw */ 2475 /* fsave contains full tw */
2472 out->cw = fsave.s87_cw; 2476 out->cw = fsave.s87_cw;
2473 out->sw = fsave.s87_sw; 2477 out->sw = fsave.s87_sw;
2474 out->tw = fsave.s87_tw; 2478 out->tw = fsave.s87_tw;
2475 out->tw_abridged = fxsave.fx_tw; 2479 out->tw_abridged = fxsave.fx_tw;
2476 out->opcode = fxsave.fx_opcode; 2480 out->opcode = fxsave.fx_opcode;
2477 out->ip = fxsave.fx_ip; 2481 out->ip = fxsave.fx_ip;
2478 out->dp = fxsave.fx_dp; 2482 out->dp = fxsave.fx_dp;
2479} 2483}
2480 2484
2481/* used as single-precision float */ 2485/* used as single-precision float */
2482uint32_t x86_test_zero = 0; 2486uint32_t x86_test_zero = 0;
2483 2487
2484static __inline void set_fpu_regs(const struct x86_test_fpu_registers *data) 2488static __inline void set_fpu_regs(const struct x86_test_fpu_registers *data)
2485{ 2489{
2486 __CTASSERT(sizeof(data->st[0]) == 16); 2490 __CTASSERT(sizeof(data->st[0]) == 16);
2487 2491
2488 __asm__ __volatile__( 2492 __asm__ __volatile__(
2489 "finit\n\t" 2493 "finit\n\t"
2490 "fldcw %1\n\t" 2494 "fldcw %1\n\t"
2491 /* load on stack in reverse order to make it easier to read */ 2495 /* load on stack in reverse order to make it easier to read */
2492 "fldt 0x70(%0)\n\t" 2496 "fldt 0x70(%0)\n\t"
2493 "fldt 0x60(%0)\n\t" 2497 "fldt 0x60(%0)\n\t"
2494 "fldt 0x50(%0)\n\t" 2498 "fldt 0x50(%0)\n\t"
2495 "fldt 0x40(%0)\n\t" 2499 "fldt 0x40(%0)\n\t"
2496 "fldt 0x30(%0)\n\t" 2500 "fldt 0x30(%0)\n\t"
2497 "fldt 0x20(%0)\n\t" 2501 "fldt 0x20(%0)\n\t"
2498 "fldt 0x10(%0)\n\t" 2502 "fldt 0x10(%0)\n\t"
2499 "fldt 0x00(%0)\n\t" 2503 "fldt 0x00(%0)\n\t"
2500 /* free st7 */ 2504 /* free st7 */
2501 "ffree %%st(7)\n\t" 2505 "ffree %%st(7)\n\t"
2502 /* this should trigger a divide-by-zero */ 2506 /* this should trigger a divide-by-zero */
2503 "fdivs (%2)\n\t" 2507 "fdivs (%2)\n\t"
2504 "int3\n\t" 2508 "int3\n\t"
2505 : 2509 :
2506 : "a"(&data->st), "m"(data->cw), "b"(&x86_test_zero) 2510 : "a"(&data->st), "m"(data->cw), "b"(&x86_test_zero)
2507 : "st" 2511 : "st"
2508 ); 2512 );
2509} 2513}
2510 2514
2511__attribute__((target("mmx"))) 2515__attribute__((target("mmx")))
2512static __inline void get_mm_regs(union x86_test_register out[]) 2516static __inline void get_mm_regs(union x86_test_register out[])
2513{ 2517{
2514 const uint64_t fill = 0x0F0F0F0F0F0F0F0F; 2518 const uint64_t fill = 0x0F0F0F0F0F0F0F0F;
2515 2519
2516 __asm__ __volatile__( 2520 __asm__ __volatile__(
2517 /* fill registers with clobber pattern */ 2521 /* fill registers with clobber pattern */
2518 "movq %1, %%mm0\n\t" 2522 "movq %1, %%mm0\n\t"
2519 "movq %1, %%mm1\n\t" 2523 "movq %1, %%mm1\n\t"
2520 "movq %1, %%mm2\n\t" 2524 "movq %1, %%mm2\n\t"
2521 "movq %1, %%mm3\n\t" 2525 "movq %1, %%mm3\n\t"
2522 "movq %1, %%mm4\n\t" 2526 "movq %1, %%mm4\n\t"
2523 "movq %1, %%mm5\n\t" 2527 "movq %1, %%mm5\n\t"
2524 "movq %1, %%mm6\n\t" 2528 "movq %1, %%mm6\n\t"
2525 "movq %1, %%mm7\n\t" 2529 "movq %1, %%mm7\n\t"
2526 "\n\t" 2530 "\n\t"
2527 "int3\n\t" 2531 "int3\n\t"
2528 "\n\t" 2532 "\n\t"
2529 "movq %%mm0, 0x00(%0)\n\t" 2533 "movq %%mm0, 0x000(%0)\n\t"
2530 "movq %%mm1, 0x20(%0)\n\t" 2534 "movq %%mm1, 0x040(%0)\n\t"
2531 "movq %%mm2, 0x40(%0)\n\t" 2535 "movq %%mm2, 0x080(%0)\n\t"
2532 "movq %%mm3, 0x60(%0)\n\t" 2536 "movq %%mm3, 0x0C0(%0)\n\t"
2533 "movq %%mm4, 0x80(%0)\n\t" 2537 "movq %%mm4, 0x100(%0)\n\t"
2534 "movq %%mm5, 0xA0(%0)\n\t" 2538 "movq %%mm5, 0x140(%0)\n\t"
2535 "movq %%mm6, 0xC0(%0)\n\t" 2539 "movq %%mm6, 0x180(%0)\n\t"
2536 "movq %%mm7, 0xE0(%0)\n\t" 2540 "movq %%mm7, 0x1C0(%0)\n\t"
2537 : 2541 :
2538 : "a"(out), "m"(fill) 2542 : "a"(out), "m"(fill)
2539 : "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7" 2543 : "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7"
2540 ); 2544 );
2541} 2545}
2542 2546
2543__attribute__((target("mmx"))) 2547__attribute__((target("mmx")))
2544static __inline void set_mm_regs(const union x86_test_register data[]) 2548static __inline void set_mm_regs(const union x86_test_register data[])
2545{ 2549{
2546 __asm__ __volatile__( 2550 __asm__ __volatile__(
2547 "movq 0x00(%0), %%mm0\n\t" 2551 "movq 0x000(%0), %%mm0\n\t"
2548 "movq 0x20(%0), %%mm1\n\t" 2552 "movq 0x040(%0), %%mm1\n\t"
2549 "movq 0x40(%0), %%mm2\n\t" 2553 "movq 0x080(%0), %%mm2\n\t"
2550 "movq 0x60(%0), %%mm3\n\t" 2554 "movq 0x0C0(%0), %%mm3\n\t"
2551 "movq 0x80(%0), %%mm4\n\t" 2555 "movq 0x100(%0), %%mm4\n\t"
2552 "movq 0xA0(%0), %%mm5\n\t" 2556 "movq 0x140(%0), %%mm5\n\t"
2553 "movq 0xC0(%0), %%mm6\n\t" 2557 "movq 0x180(%0), %%mm6\n\t"
2554 "movq 0xE0(%0), %%mm7\n\t" 2558 "movq 0x1C0(%0), %%mm7\n\t"
2555 "int3\n\t" 2559 "int3\n\t"
2556 : 2560 :
2557 : "b"(data) 2561 : "b"(data)
2558 : "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7" 2562 : "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7"
2559 ); 2563 );
2560} 2564}
2561 2565
2562__attribute__((target("sse"))) 2566__attribute__((target("sse")))
2563static __inline void get_xmm_regs(union x86_test_register out[]) 2567static __inline void get_xmm_regs(union x86_test_register out[])
2564{ 2568{
2565 union x86_test_register fill __aligned(32) = { 2569 union x86_test_register fill __aligned(32) = {
2566 .xmm={ 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F } 2570 .xmm={ 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F }
2567 }; 2571 };
2568 2572
2569 __asm__ __volatile__( 2573 __asm__ __volatile__(
2570 /* fill registers with clobber pattern */ 2574 /* fill registers with clobber pattern */
2571 "movaps %1, %%xmm0\n\t" 2575 "movaps %1, %%xmm0\n\t"
2572 "movaps %1, %%xmm1\n\t" 2576 "movaps %1, %%xmm1\n\t"
2573 "movaps %1, %%xmm2\n\t" 2577 "movaps %1, %%xmm2\n\t"
2574 "movaps %1, %%xmm3\n\t" 2578 "movaps %1, %%xmm3\n\t"
2575 "movaps %1, %%xmm4\n\t" 2579 "movaps %1, %%xmm4\n\t"
2576 "movaps %1, %%xmm5\n\t" 2580 "movaps %1, %%xmm5\n\t"
2577 "movaps %1, %%xmm6\n\t" 2581 "movaps %1, %%xmm6\n\t"
2578 "movaps %1, %%xmm7\n\t" 2582 "movaps %1, %%xmm7\n\t"
2579#if defined(__x86_64__) 2583#if defined(__x86_64__)
2580 "movaps %1, %%xmm8\n\t" 2584 "movaps %1, %%xmm8\n\t"
2581 "movaps %1, %%xmm9\n\t" 2585 "movaps %1, %%xmm9\n\t"
2582 "movaps %1, %%xmm10\n\t" 2586 "movaps %1, %%xmm10\n\t"
2583 "movaps %1, %%xmm11\n\t" 2587 "movaps %1, %%xmm11\n\t"
2584 "movaps %1, %%xmm12\n\t" 2588 "movaps %1, %%xmm12\n\t"
2585 "movaps %1, %%xmm13\n\t" 2589 "movaps %1, %%xmm13\n\t"
2586 "movaps %1, %%xmm14\n\t" 2590 "movaps %1, %%xmm14\n\t"
2587 "movaps %1, %%xmm15\n\t" 2591 "movaps %1, %%xmm15\n\t"
2588#endif 2592#endif
2589 "\n\t" 2593 "\n\t"
2590 "int3\n\t" 2594 "int3\n\t"
2591 "\n\t" 2595 "\n\t"
2592 "movaps %%xmm0, 0x000(%0)\n\t" 2596 "movaps %%xmm0, 0x000(%0)\n\t"
2593 "movaps %%xmm1, 0x020(%0)\n\t" 2597 "movaps %%xmm1, 0x040(%0)\n\t"
2594 "movaps %%xmm2, 0x040(%0)\n\t" 2598 "movaps %%xmm2, 0x080(%0)\n\t"
2595 "movaps %%xmm3, 0x060(%0)\n\t" 2599 "movaps %%xmm3, 0x0C0(%0)\n\t"
2596 "movaps %%xmm4, 0x080(%0)\n\t" 2600 "movaps %%xmm4, 0x100(%0)\n\t"
2597 "movaps %%xmm5, 0x0A0(%0)\n\t" 2601 "movaps %%xmm5, 0x140(%0)\n\t"
2598 "movaps %%xmm6, 0x0C0(%0)\n\t" 2602 "movaps %%xmm6, 0x180(%0)\n\t"
2599 "movaps %%xmm7, 0x0E0(%0)\n\t" 2603 "movaps %%xmm7, 0x1C0(%0)\n\t"
2600#if defined(__x86_64__) 2604#if defined(__x86_64__)
2601 "movaps %%xmm8, 0x100(%0)\n\t" 2605 "movaps %%xmm8, 0x200(%0)\n\t"
2602 "movaps %%xmm9, 0x120(%0)\n\t" 2606 "movaps %%xmm9, 0x240(%0)\n\t"
2603 "movaps %%xmm10, 0x140(%0)\n\t" 2607 "movaps %%xmm10, 0x280(%0)\n\t"
2604 "movaps %%xmm11, 0x160(%0)\n\t" 2608 "movaps %%xmm11, 0x2C0(%0)\n\t"
2605 "movaps %%xmm12, 0x180(%0)\n\t" 2609 "movaps %%xmm12, 0x300(%0)\n\t"
2606 "movaps %%xmm13, 0x1A0(%0)\n\t" 2610 "movaps %%xmm13, 0x340(%0)\n\t"
2607 "movaps %%xmm14, 0x1C0(%0)\n\t" 2611 "movaps %%xmm14, 0x380(%0)\n\t"
2608 "movaps %%xmm15, 0x1E0(%0)\n\t" 2612 "movaps %%xmm15, 0x3C0(%0)\n\t"
2609#endif 2613#endif
2610 : 2614 :
2611 : "a"(out), "m"(fill) 2615 : "a"(out), "m"(fill)
2612 : "%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6", "%xmm7" 2616 : "%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6", "%xmm7"
2613#if defined(__x86_64__) 2617#if defined(__x86_64__)
2614 , "%xmm8", "%xmm9", "%xmm10", "%xmm11", "%xmm12", "%xmm13", "%xmm14", 2618 , "%xmm8", "%xmm9", "%xmm10", "%xmm11", "%xmm12", "%xmm13", "%xmm14",
2615 "%xmm15" 2619 "%xmm15"
2616#endif 2620#endif
2617 ); 2621 );
2618} 2622}
2619 2623
2620__attribute__((target("sse"))) 2624__attribute__((target("sse")))
2621static __inline void set_xmm_regs(const union x86_test_register data[]) 2625static __inline void set_xmm_regs(const union x86_test_register data[])
2622{ 2626{
2623 __asm__ __volatile__( 2627 __asm__ __volatile__(
2624 "movaps 0x000(%0), %%xmm0\n\t" 2628 "movaps 0x000(%0), %%xmm0\n\t"
2625 "movaps 0x020(%0), %%xmm1\n\t" 2629 "movaps 0x040(%0), %%xmm1\n\t"
2626 "movaps 0x040(%0), %%xmm2\n\t" 2630 "movaps 0x080(%0), %%xmm2\n\t"
2627 "movaps 0x060(%0), %%xmm3\n\t" 2631 "movaps 0x0C0(%0), %%xmm3\n\t"
2628 "movaps 0x080(%0), %%xmm4\n\t" 2632 "movaps 0x100(%0), %%xmm4\n\t"
2629 "movaps 0x0A0(%0), %%xmm5\n\t" 2633 "movaps 0x140(%0), %%xmm5\n\t"
2630 "movaps 0x0C0(%0), %%xmm6\n\t" 2634 "movaps 0x180(%0), %%xmm6\n\t"
2631 "movaps 0x0E0(%0), %%xmm7\n\t" 2635 "movaps 0x1C0(%0), %%xmm7\n\t"
2632#if defined(__x86_64__) 2636#if defined(__x86_64__)
2633 "movaps 0x100(%0), %%xmm8\n\t" 2637 "movaps 0x200(%0), %%xmm8\n\t"
2634 "movaps 0x120(%0), %%xmm9\n\t" 2638 "movaps 0x240(%0), %%xmm9\n\t"
2635 "movaps 0x140(%0), %%xmm10\n\t" 2639 "movaps 0x280(%0), %%xmm10\n\t"
2636 "movaps 0x160(%0), %%xmm11\n\t" 2640 "movaps 0x2C0(%0), %%xmm11\n\t"
2637 "movaps 0x180(%0), %%xmm12\n\t" 2641 "movaps 0x300(%0), %%xmm12\n\t"
2638 "movaps 0x1A0(%0), %%xmm13\n\t" 2642 "movaps 0x340(%0), %%xmm13\n\t"
2639 "movaps 0x1C0(%0), %%xmm14\n\t" 2643 "movaps 0x380(%0), %%xmm14\n\t"
2640 "movaps 0x1E0(%0), %%xmm15\n\t" 2644 "movaps 0x3C0(%0), %%xmm15\n\t"
2641#endif 2645#endif
2642 "int3\n\t" 2646 "int3\n\t"
2643 : 2647 :
2644 : "b"(data) 2648 : "b"(data)
2645 : "%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6", 2649 : "%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6",
2646 "%xmm7" 2650 "%xmm7"
2647#if defined(__x86_64__) 2651#if defined(__x86_64__)
2648 , "%xmm8", "%xmm9", "%xmm10", "%xmm11", "%xmm12", "%xmm13", 2652 , "%xmm8", "%xmm9", "%xmm10", "%xmm11", "%xmm12", "%xmm13",
2649 "%xmm14", "%xmm15" 2653 "%xmm14", "%xmm15"
2650#endif 2654#endif
2651 ); 2655 );
2652} 2656}
2653 2657
2654__attribute__((target("avx"))) 2658__attribute__((target("avx")))
2655static __inline void get_ymm_regs(union x86_test_register out[]) 2659static __inline void get_ymm_regs(union x86_test_register out[])
2656{ 2660{
2657 union x86_test_register fill __aligned(32) = { 2661 union x86_test_register fill __aligned(32) = {
2658 { 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F, 2662 .ymm = {
2659 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F } 2663 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F,
 2664 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F
 2665 }
2660 }; 2666 };
2661 2667
2662 __asm__ __volatile__( 2668 __asm__ __volatile__(
2663 /* fill registers with clobber pattern */ 2669 /* fill registers with clobber pattern */
2664 "vmovaps %1, %%ymm0\n\t" 2670 "vmovaps %1, %%ymm0\n\t"
2665 "vmovaps %1, %%ymm1\n\t" 2671 "vmovaps %1, %%ymm1\n\t"
2666 "vmovaps %1, %%ymm2\n\t" 2672 "vmovaps %1, %%ymm2\n\t"
2667 "vmovaps %1, %%ymm3\n\t" 2673 "vmovaps %1, %%ymm3\n\t"
2668 "vmovaps %1, %%ymm4\n\t" 2674 "vmovaps %1, %%ymm4\n\t"
2669 "vmovaps %1, %%ymm5\n\t" 2675 "vmovaps %1, %%ymm5\n\t"
2670 "vmovaps %1, %%ymm6\n\t" 2676 "vmovaps %1, %%ymm6\n\t"
2671 "vmovaps %1, %%ymm7\n\t" 2677 "vmovaps %1, %%ymm7\n\t"
2672#if defined(__x86_64__) 2678#if defined(__x86_64__)
2673 "vmovaps %1, %%ymm8\n\t" 2679 "vmovaps %1, %%ymm8\n\t"
2674 "vmovaps %1, %%ymm9\n\t" 2680 "vmovaps %1, %%ymm9\n\t"
2675 "vmovaps %1, %%ymm10\n\t" 2681 "vmovaps %1, %%ymm10\n\t"
2676 "vmovaps %1, %%ymm11\n\t" 2682 "vmovaps %1, %%ymm11\n\t"
2677 "vmovaps %1, %%ymm12\n\t" 2683 "vmovaps %1, %%ymm12\n\t"
2678 "vmovaps %1, %%ymm13\n\t" 2684 "vmovaps %1, %%ymm13\n\t"
2679 "vmovaps %1, %%ymm14\n\t" 2685 "vmovaps %1, %%ymm14\n\t"
2680 "vmovaps %1, %%ymm15\n\t" 2686 "vmovaps %1, %%ymm15\n\t"
2681#endif 2687#endif
2682 "\n\t" 2688 "\n\t"
2683 "int3\n\t" 2689 "int3\n\t"
2684 "\n\t" 2690 "\n\t"
2685 "vmovaps %%ymm0, 0x000(%0)\n\t" 2691 "vmovaps %%ymm0, 0x000(%0)\n\t"
2686 "vmovaps %%ymm1, 0x020(%0)\n\t" 2692 "vmovaps %%ymm1, 0x040(%0)\n\t"
2687 "vmovaps %%ymm2, 0x040(%0)\n\t" 2693 "vmovaps %%ymm2, 0x080(%0)\n\t"
2688 "vmovaps %%ymm3, 0x060(%0)\n\t" 2694 "vmovaps %%ymm3, 0x0C0(%0)\n\t"
2689 "vmovaps %%ymm4, 0x080(%0)\n\t" 2695 "vmovaps %%ymm4, 0x100(%0)\n\t"
2690 "vmovaps %%ymm5, 0x0A0(%0)\n\t" 2696 "vmovaps %%ymm5, 0x140(%0)\n\t"
2691 "vmovaps %%ymm6, 0x0C0(%0)\n\t" 2697 "vmovaps %%ymm6, 0x180(%0)\n\t"
2692 "vmovaps %%ymm7, 0x0E0(%0)\n\t" 2698 "vmovaps %%ymm7, 0x1C0(%0)\n\t"
2693#if defined(__x86_64__) 2699#if defined(__x86_64__)
2694 "vmovaps %%ymm8, 0x100(%0)\n\t" 2700 "vmovaps %%ymm8, 0x200(%0)\n\t"
2695 "vmovaps %%ymm9, 0x120(%0)\n\t" 2701 "vmovaps %%ymm9, 0x240(%0)\n\t"
2696 "vmovaps %%ymm10, 0x140(%0)\n\t" 2702 "vmovaps %%ymm10, 0x280(%0)\n\t"
2697 "vmovaps %%ymm11, 0x160(%0)\n\t" 2703 "vmovaps %%ymm11, 0x2C0(%0)\n\t"
2698 "vmovaps %%ymm12, 0x180(%0)\n\t" 2704 "vmovaps %%ymm12, 0x300(%0)\n\t"
2699 "vmovaps %%ymm13, 0x1A0(%0)\n\t" 2705 "vmovaps %%ymm13, 0x340(%0)\n\t"
2700 "vmovaps %%ymm14, 0x1C0(%0)\n\t" 2706 "vmovaps %%ymm14, 0x380(%0)\n\t"
2701 "vmovaps %%ymm15, 0x1E0(%0)\n\t" 2707 "vmovaps %%ymm15, 0x3C0(%0)\n\t"
2702#endif 2708#endif
2703 : 2709 :
2704 : "a"(out), "m"(fill) 2710 : "a"(out), "m"(fill)
2705 : "%ymm0", "%ymm1", "%ymm2", "%ymm3", "%ymm4", "%ymm5", "%ymm6", "%ymm7" 2711 : "%ymm0", "%ymm1", "%ymm2", "%ymm3", "%ymm4", "%ymm5", "%ymm6", "%ymm7"
2706#if defined(__x86_64__) 2712#if defined(__x86_64__)
2707 , "%ymm8", "%ymm9", "%ymm10", "%ymm11", "%ymm12", "%ymm13", "%ymm14", 2713 , "%ymm8", "%ymm9", "%ymm10", "%ymm11", "%ymm12", "%ymm13", "%ymm14",
2708 "%ymm15" 2714 "%ymm15"
2709#endif 2715#endif
2710 ); 2716 );
2711} 2717}
2712 2718
2713__attribute__((target("avx"))) 2719__attribute__((target("avx")))
2714static __inline void set_ymm_regs(const union x86_test_register data[]) 2720static __inline void set_ymm_regs(const union x86_test_register data[])
2715{ 2721{
2716 __asm__ __volatile__( 2722 __asm__ __volatile__(
2717 "vmovaps 0x000(%0), %%ymm0\n\t" 2723 "vmovaps 0x000(%0), %%ymm0\n\t"
2718 "vmovaps 0x020(%0), %%ymm1\n\t" 2724 "vmovaps 0x040(%0), %%ymm1\n\t"
2719 "vmovaps 0x040(%0), %%ymm2\n\t" 2725 "vmovaps 0x080(%0), %%ymm2\n\t"
2720 "vmovaps 0x060(%0), %%ymm3\n\t" 2726 "vmovaps 0x0C0(%0), %%ymm3\n\t"
2721 "vmovaps 0x080(%0), %%ymm4\n\t" 2727 "vmovaps 0x100(%0), %%ymm4\n\t"
2722 "vmovaps 0x0A0(%0), %%ymm5\n\t" 2728 "vmovaps 0x140(%0), %%ymm5\n\t"
2723 "vmovaps 0x0C0(%0), %%ymm6\n\t" 2729 "vmovaps 0x180(%0), %%ymm6\n\t"
2724 "vmovaps 0x0E0(%0), %%ymm7\n\t" 2730 "vmovaps 0x1C0(%0), %%ymm7\n\t"
2725#if defined(__x86_64__) 2731#if defined(__x86_64__)
2726 "vmovaps 0x100(%0), %%ymm8\n\t" 2732 "vmovaps 0x200(%0), %%ymm8\n\t"
2727 "vmovaps 0x120(%0), %%ymm9\n\t" 2733 "vmovaps 0x240(%0), %%ymm9\n\t"
2728 "vmovaps 0x140(%0), %%ymm10\n\t" 2734 "vmovaps 0x280(%0), %%ymm10\n\t"
2729 "vmovaps 0x160(%0), %%ymm11\n\t" 2735 "vmovaps 0x2C0(%0), %%ymm11\n\t"
2730 "vmovaps 0x180(%0), %%ymm12\n\t" 2736 "vmovaps 0x300(%0), %%ymm12\n\t"
2731 "vmovaps 0x1A0(%0), %%ymm13\n\t" 2737 "vmovaps 0x340(%0), %%ymm13\n\t"
2732 "vmovaps 0x1C0(%0), %%ymm14\n\t" 2738 "vmovaps 0x380(%0), %%ymm14\n\t"
2733 "vmovaps 0x1E0(%0), %%ymm15\n\t" 2739 "vmovaps 0x3C0(%0), %%ymm15\n\t"
2734#endif 2740#endif
2735 "int3\n\t" 2741 "int3\n\t"
2736 : 2742 :
2737 : "b"(data) 2743 : "b"(data)
2738 : "%ymm0", "%ymm1", "%ymm2", "%ymm3", "%ymm4", "%ymm5", "%ymm6", 2744 : "%ymm0", "%ymm1", "%ymm2", "%ymm3", "%ymm4", "%ymm5", "%ymm6",
2739 "%ymm7" 2745 "%ymm7"
2740#if defined(__x86_64__) 2746#if defined(__x86_64__)
2741 , "%ymm8", "%ymm9", "%ymm10", "%ymm11", "%ymm12", "%ymm13", 2747 , "%ymm8", "%ymm9", "%ymm10", "%ymm11", "%ymm12", "%ymm13",
2742 "%ymm14", "%ymm15" 2748 "%ymm14", "%ymm15"
2743#endif 2749#endif
2744 ); 2750 );
2745} 2751}
2746 2752
 2753__attribute__((target("avx512f")))
 2754static __inline void get_zmm_regs(union x86_test_register out[])
 2755{
 2756 union x86_test_register fill __aligned(64) = {
 2757 .zmm = {
 2758 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F,
 2759 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F,
 2760 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F,
 2761 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F
 2762 }
 2763 };
 2764
 2765 __asm__ __volatile__(
 2766 /* fill registers with clobber pattern */
 2767 "vmovaps %1, %%zmm0\n\t"
 2768 "vmovaps %1, %%zmm1\n\t"
 2769 "vmovaps %1, %%zmm2\n\t"
 2770 "vmovaps %1, %%zmm3\n\t"
 2771 "vmovaps %1, %%zmm4\n\t"
 2772 "vmovaps %1, %%zmm5\n\t"
 2773 "vmovaps %1, %%zmm6\n\t"
 2774 "vmovaps %1, %%zmm7\n\t"
 2775#if defined(__x86_64__)
 2776 "vmovaps %1, %%zmm8\n\t"
 2777 "vmovaps %1, %%zmm9\n\t"
 2778 "vmovaps %1, %%zmm10\n\t"
 2779 "vmovaps %1, %%zmm11\n\t"
 2780 "vmovaps %1, %%zmm12\n\t"
 2781 "vmovaps %1, %%zmm13\n\t"
 2782 "vmovaps %1, %%zmm14\n\t"
 2783 "vmovaps %1, %%zmm15\n\t"
 2784 "vmovaps %1, %%zmm16\n\t"
 2785 "vmovaps %1, %%zmm17\n\t"
 2786 "vmovaps %1, %%zmm18\n\t"
 2787 "vmovaps %1, %%zmm19\n\t"
 2788 "vmovaps %1, %%zmm20\n\t"
 2789 "vmovaps %1, %%zmm21\n\t"
 2790 "vmovaps %1, %%zmm22\n\t"
 2791 "vmovaps %1, %%zmm23\n\t"
 2792 "vmovaps %1, %%zmm24\n\t"
 2793 "vmovaps %1, %%zmm25\n\t"
 2794 "vmovaps %1, %%zmm26\n\t"
 2795 "vmovaps %1, %%zmm27\n\t"
 2796 "vmovaps %1, %%zmm28\n\t"
 2797 "vmovaps %1, %%zmm29\n\t"
 2798 "vmovaps %1, %%zmm30\n\t"
 2799 "vmovaps %1, %%zmm31\n\t"
 2800#endif
 2801 "kmovq %1, %%k0\n\t"
 2802 "kmovq %1, %%k1\n\t"
 2803 "kmovq %1, %%k2\n\t"
 2804 "kmovq %1, %%k3\n\t"
 2805 "kmovq %1, %%k4\n\t"
 2806 "kmovq %1, %%k5\n\t"
 2807 "kmovq %1, %%k6\n\t"
 2808 "kmovq %1, %%k7\n\t"
 2809 "\n\t"
 2810 "int3\n\t"
 2811 "\n\t"
 2812 "vmovaps %%zmm0, 0x000(%0)\n\t"
 2813 "vmovaps %%zmm1, 0x040(%0)\n\t"
 2814 "vmovaps %%zmm2, 0x080(%0)\n\t"
 2815 "vmovaps %%zmm3, 0x0C0(%0)\n\t"
 2816 "vmovaps %%zmm4, 0x100(%0)\n\t"
 2817 "vmovaps %%zmm5, 0x140(%0)\n\t"
 2818 "vmovaps %%zmm6, 0x180(%0)\n\t"
 2819 "vmovaps %%zmm7, 0x1C0(%0)\n\t"
 2820#if defined(__x86_64__)
 2821 "vmovaps %%zmm8, 0x200(%0)\n\t"
 2822 "vmovaps %%zmm9, 0x240(%0)\n\t"
 2823 "vmovaps %%zmm10, 0x280(%0)\n\t"
 2824 "vmovaps %%zmm11, 0x2C0(%0)\n\t"
 2825 "vmovaps %%zmm12, 0x300(%0)\n\t"
 2826 "vmovaps %%zmm13, 0x340(%0)\n\t"
 2827 "vmovaps %%zmm14, 0x380(%0)\n\t"
 2828 "vmovaps %%zmm15, 0x3C0(%0)\n\t"
 2829 "vmovaps %%zmm16, 0x400(%0)\n\t"
 2830 "vmovaps %%zmm17, 0x440(%0)\n\t"
 2831 "vmovaps %%zmm18, 0x480(%0)\n\t"
 2832 "vmovaps %%zmm19, 0x4C0(%0)\n\t"
 2833 "vmovaps %%zmm20, 0x500(%0)\n\t"
 2834 "vmovaps %%zmm21, 0x540(%0)\n\t"
 2835 "vmovaps %%zmm22, 0x580(%0)\n\t"
 2836 "vmovaps %%zmm23, 0x5C0(%0)\n\t"
 2837 "vmovaps %%zmm24, 0x600(%0)\n\t"
 2838 "vmovaps %%zmm25, 0x640(%0)\n\t"
 2839 "vmovaps %%zmm26, 0x680(%0)\n\t"
 2840 "vmovaps %%zmm27, 0x6C0(%0)\n\t"
 2841 "vmovaps %%zmm28, 0x700(%0)\n\t"
 2842 "vmovaps %%zmm29, 0x740(%0)\n\t"
 2843 "vmovaps %%zmm30, 0x780(%0)\n\t"
 2844 "vmovaps %%zmm31, 0x7C0(%0)\n\t"
 2845#endif
 2846 "kmovq %%k0, 0x800(%0)\n\t"
 2847 "kmovq %%k1, 0x808(%0)\n\t"
 2848 "kmovq %%k2, 0x810(%0)\n\t"
 2849 "kmovq %%k3, 0x818(%0)\n\t"
 2850 "kmovq %%k4, 0x820(%0)\n\t"
 2851 "kmovq %%k5, 0x828(%0)\n\t"
 2852 "kmovq %%k6, 0x830(%0)\n\t"
 2853 "kmovq %%k7, 0x838(%0)\n\t"
 2854 :
 2855 : "a"(out), "m"(fill)
 2856 : "%zmm0", "%zmm1", "%zmm2", "%zmm3", "%zmm4", "%zmm5", "%zmm6", "%zmm7"
 2857#if defined(__x86_64__)
 2858 , "%zmm8", "%zmm9", "%zmm10", "%zmm11", "%zmm12", "%zmm13", "%zmm14",
 2859 "%zmm15", "%zmm16", "%zmm17", "%zmm18", "%zmm19", "%zmm20", "%zmm21",
 2860 "%zmm22", "%zmm23", "%zmm24", "%zmm25", "%zmm26", "%zmm27", "%zmm28",
 2861 "%zmm29", "%zmm30", "%zmm31"
 2862#endif
 2863 , "%k0", "%k1", "%k2", "%k3", "%k4", "%k5", "%k6", "%k7"
 2864 );
 2865}
 2866
 2867__attribute__((target("avx512f")))
 2868static __inline void set_zmm_regs(const union x86_test_register data[])
 2869{
 2870 __asm__ __volatile__(
 2871 "vmovaps 0x000(%0), %%zmm0\n\t"
 2872 "vmovaps 0x040(%0), %%zmm1\n\t"
 2873 "vmovaps 0x080(%0), %%zmm2\n\t"
 2874 "vmovaps 0x0C0(%0), %%zmm3\n\t"
 2875 "vmovaps 0x100(%0), %%zmm4\n\t"
 2876 "vmovaps 0x140(%0), %%zmm5\n\t"
 2877 "vmovaps 0x180(%0), %%zmm6\n\t"
 2878 "vmovaps 0x1C0(%0), %%zmm7\n\t"
 2879#if defined(__x86_64__)
 2880 "vmovaps 0x200(%0), %%zmm8\n\t"
 2881 "vmovaps 0x240(%0), %%zmm9\n\t"
 2882 "vmovaps 0x280(%0), %%zmm10\n\t"
 2883 "vmovaps 0x2C0(%0), %%zmm11\n\t"
 2884 "vmovaps 0x300(%0), %%zmm12\n\t"
 2885 "vmovaps 0x340(%0), %%zmm13\n\t"
 2886 "vmovaps 0x380(%0), %%zmm14\n\t"
 2887 "vmovaps 0x3C0(%0), %%zmm15\n\t"
 2888 "vmovaps 0x400(%0), %%zmm16\n\t"
 2889 "vmovaps 0x440(%0), %%zmm17\n\t"
 2890 "vmovaps 0x480(%0), %%zmm18\n\t"
 2891 "vmovaps 0x4C0(%0), %%zmm19\n\t"
 2892 "vmovaps 0x500(%0), %%zmm20\n\t"
 2893 "vmovaps 0x540(%0), %%zmm21\n\t"
 2894 "vmovaps 0x580(%0), %%zmm22\n\t"
 2895 "vmovaps 0x5C0(%0), %%zmm23\n\t"
 2896 "vmovaps 0x600(%0), %%zmm24\n\t"
 2897 "vmovaps 0x640(%0), %%zmm25\n\t"
 2898 "vmovaps 0x680(%0), %%zmm26\n\t"
 2899 "vmovaps 0x6C0(%0), %%zmm27\n\t"
 2900 "vmovaps 0x700(%0), %%zmm28\n\t"
 2901 "vmovaps 0x740(%0), %%zmm29\n\t"
 2902 "vmovaps 0x780(%0), %%zmm30\n\t"
 2903 "vmovaps 0x7C0(%0), %%zmm31\n\t"
 2904#endif
 2905 "kmovq 0x800(%0), %%k0\n\t"
 2906 "kmovq 0x808(%0), %%k1\n\t"
 2907 "kmovq 0x810(%0), %%k2\n\t"
 2908 "kmovq 0x818(%0), %%k3\n\t"
 2909 "kmovq 0x820(%0), %%k4\n\t"
 2910 "kmovq 0x828(%0), %%k5\n\t"
 2911 "kmovq 0x830(%0), %%k6\n\t"
 2912 "kmovq 0x838(%0), %%k7\n\t"
 2913 "int3\n\t"
 2914 :
 2915 : "b"(data)
 2916 : "%zmm0", "%zmm1", "%zmm2", "%zmm3", "%zmm4", "%zmm5", "%zmm6", "%zmm7"
 2917#if defined(__x86_64__)
 2918 , "%zmm8", "%zmm9", "%zmm10", "%zmm11", "%zmm12", "%zmm13", "%zmm14",
 2919 "%zmm15", "%zmm16", "%zmm17", "%zmm18", "%zmm19", "%zmm20", "%zmm21",
 2920 "%zmm22", "%zmm23", "%zmm24", "%zmm25", "%zmm26", "%zmm27", "%zmm28",
 2921 "%zmm29", "%zmm30", "%zmm31"
 2922#endif
 2923 , "%k0", "%k1", "%k2", "%k3", "%k4",
 2924 "%k5", "%k6", "%k7"
 2925 );
 2926}
 2927
2747static void 2928static void
2748x86_register_test(enum x86_test_regset regset, enum x86_test_registers regs, 2929x86_register_test(enum x86_test_regset regset, enum x86_test_registers regs,
2749 enum x86_test_regmode regmode) 2930 enum x86_test_regmode regmode)
2750{ 2931{
2751 const int exitval = 5; 2932 const int exitval = 5;
2752 pid_t child, wpid; 2933 pid_t child, wpid;
2753#if defined(TWAIT_HAVE_STATUS) 2934#if defined(TWAIT_HAVE_STATUS)
2754 const int sigval = SIGTRAP; 2935 const int sigval = SIGTRAP;
2755 int status; 2936 int status;
2756#endif 2937#endif
2757 struct reg gpr; 2938 struct reg gpr;
2758 struct fpreg fpr; 2939 struct fpreg fpr;
2759#if defined(__i386__) 2940#if defined(__i386__)
2760 struct xmmregs xmm; 2941 struct xmmregs xmm;
2761#endif 2942#endif
2762 struct xstate xst; 2943 struct xstate xst;
2763 struct iovec iov; 2944 struct iovec iov;
2764 struct fxsave* fxs = NULL; 2945 struct fxsave* fxs = NULL;
2765 uint64_t xst_flags = 0; 2946 uint64_t xst_flags = 0;
2766 char core_path[] = "/tmp/core.XXXXXX"; 2947 char core_path[] = "/tmp/core.XXXXXX";
2767 int core_fd; 2948 int core_fd;
2768 2949
2769 const union x86_test_register expected[] __aligned(32) = { 2950 const union x86_test_register expected[] __aligned(64) = {
2770 {{ 0x0706050403020100, 0x0F0E0D0C0B0A0908, 2951 {{ 0x0706050403020100, 0x0F0E0D0C0B0A0908,
2771 0x1716151413121110, 0x1F1E1D1C1B1A1918, }}, 2952 0x1716151413121110, 0x1F1E1D1C1B1A1918,
 2953 0x2726252423222120, 0x2F2E2D2C2B2A2928,
 2954 0x3736353433323130, 0x3F3E3D3C3B3A3938, }},
2772 {{ 0x0807060504030201, 0x100F0E0D0C0B0A09, 2955 {{ 0x0807060504030201, 0x100F0E0D0C0B0A09,
2773 0x1817161514131211, 0x201F1E1D1C1B1A19, }}, 2956 0x1817161514131211, 0x201F1E1D1C1B1A19,
 2957 0x2827262524232221, 0x302F2E2D2C2B2A29,
 2958 0x3837363534333231, 0x403F3E3D3C3B3A39, }},
2774 {{ 0x0908070605040302, 0x11100F0E0D0C0B0A, 2959 {{ 0x0908070605040302, 0x11100F0E0D0C0B0A,
2775 0x1918171615141312, 0x21201F1E1D1C1B1A, }}, 2960 0x1918171615141312, 0x21201F1E1D1C1B1A,
 2961 0x2928272625242322, 0x31302F2E2D2C2B2A,
 2962 0x3938373635343332, 0x41403F3E3D3C3B3A, }},
2776 {{ 0x0A09080706050403, 0x1211100F0E0D0C0B, 2963 {{ 0x0A09080706050403, 0x1211100F0E0D0C0B,
2777 0x1A19181716151413, 0x2221201F1E1D1C1B, }}, 2964 0x1A19181716151413, 0x2221201F1E1D1C1B,
 2965 0x2A29282726252423, 0x3231302F2E2D2C2B,
 2966 0x3A39383736353433, 0x4241403F3E3D3C3B, }},
2778 {{ 0x0B0A090807060504, 0x131211100F0E0D0C, 2967 {{ 0x0B0A090807060504, 0x131211100F0E0D0C,
2779 0x1B1A191817161514, 0x232221201F1E1D1C, }}, 2968 0x1B1A191817161514, 0x232221201F1E1D1C,
 2969 0x2B2A292827262524, 0x333231302F2E2D2C,
 2970 0x3B3A393837363534, 0x434241403F3E3D3C, }},
2780 {{ 0x0C0B0A0908070605, 0x14131211100F0E0D, 2971 {{ 0x0C0B0A0908070605, 0x14131211100F0E0D,
2781 0x1C1B1A1918171615, 0x24232221201F1E1D, }}, 2972 0x1C1B1A1918171615, 0x24232221201F1E1D,
 2973 0x2C2B2A2928272625, 0x34333231302F2E2D,
 2974 0x3C3B3A3938373635, 0x44434241403F3E3D, }},
2782 {{ 0x0D0C0B0A09080706, 0x1514131211100F0E, 2975 {{ 0x0D0C0B0A09080706, 0x1514131211100F0E,
2783 0x1D1C1B1A19181716, 0x2524232221201F1E, }}, 2976 0x1D1C1B1A19181716, 0x2524232221201F1E,
 2977 0x2D2C2B2A29282726, 0x3534333231302F2E,
 2978 0x3D3C3B3A39383736, 0x4544434241403F3E, }},
2784 {{ 0x0E0D0C0B0A090807, 0x161514131211100F, 2979 {{ 0x0E0D0C0B0A090807, 0x161514131211100F,
2785 0x1E1D1C1B1A191817, 0x262524232221201F, }}, 2980 0x1E1D1C1B1A191817, 0x262524232221201F,
 2981 0x2E2D2C2B2A292827, 0x363534333231302F,
 2982 0x3E3D3C3B3A393837, 0x464544434241403F, }},
2786 {{ 0x0F0E0D0C0B0A0908, 0x1716151413121110, 2983 {{ 0x0F0E0D0C0B0A0908, 0x1716151413121110,
2787 0x1F1E1D1C1B1A1918, 0x2726252423222120, }}, 2984 0x1F1E1D1C1B1A1918, 0x2726252423222120,
 2985 0x2F2E2D2C2B2A2928, 0x3736353433323130,
 2986 0x3F3E3D3C3B3A3938, 0x4746454443424140, }},
2788 {{ 0x100F0E0D0C0B0A09, 0x1817161514131211, 2987 {{ 0x100F0E0D0C0B0A09, 0x1817161514131211,
2789 0x201F1E1D1C1B1A19, 0x2827262524232221, }}, 2988 0x201F1E1D1C1B1A19, 0x2827262524232221,
 2989 0x302F2E2D2C2B2A29, 0x3837363534333231,
 2990 0x403F3E3D3C3B3A39, 0x4847464544434241, }},
2790 {{ 0x11100F0E0D0C0B0A, 0x1918171615141312, 2991 {{ 0x11100F0E0D0C0B0A, 0x1918171615141312,
2791 0x21201F1E1D1C1B1A, 0x2928272625242322, }}, 2992 0x21201F1E1D1C1B1A, 0x2928272625242322,
 2993 0x31302F2E2D2C2B2A, 0x3938373635343332,
 2994 0x41403F3E3D3C3B3A, 0x4948474645444342, }},
2792 {{ 0x1211100F0E0D0C0B, 0x1A19181716151413, 2995 {{ 0x1211100F0E0D0C0B, 0x1A19181716151413,
2793 0x2221201F1E1D1C1B, 0x2A29282726252423, }}, 2996 0x2221201F1E1D1C1B, 0x2A29282726252423,
 2997 0x3231302F2E2D2C2B, 0x3A39383736353433,
 2998 0x4241403F3E3D3C3B, 0x4A49484746454443, }},
2794 {{ 0x131211100F0E0D0C, 0x1B1A191817161514, 2999 {{ 0x131211100F0E0D0C, 0x1B1A191817161514,
2795 0x232221201F1E1D1C, 0x2B2A292827262524, }}, 3000 0x232221201F1E1D1C, 0x2B2A292827262524,
 3001 0x333231302F2E2D2C, 0x3B3A393837363534,
 3002 0x434241403F3E3D3C, 0x4B4A494847464544, }},
2796 {{ 0x14131211100F0E0D, 0x1C1B1A1918171615, 3003 {{ 0x14131211100F0E0D, 0x1C1B1A1918171615,
2797 0x24232221201F1E1D, 0x2C2B2A2928272625, }}, 3004 0x24232221201F1E1D, 0x2C2B2A2928272625,
 3005 0x34333231302F2E2D, 0x3C3B3A3938373635,
 3006 0x44434241403F3E3D, 0x4C4B4A4948474645, }},
2798 {{ 0x1514131211100F0E, 0x1D1C1B1A19181716, 3007 {{ 0x1514131211100F0E, 0x1D1C1B1A19181716,
2799 0x2524232221201F1E, 0x2D2C2B2A29282726, }}, 3008 0x2524232221201F1E, 0x2D2C2B2A29282726,
 3009 0x3534333231302F2E, 0x3D3C3B3A39383736,
 3010 0x4544434241403F3E, 0x4D4C4B4A49484746, }},
2800 {{ 0x161514131211100F, 0x1E1D1C1B1A191817, 3011 {{ 0x161514131211100F, 0x1E1D1C1B1A191817,
2801 0x262524232221201F, 0x2E2D2C2B2A292827, }}, 3012 0x262524232221201F, 0x2E2D2C2B2A292827,
 3013 0x363534333231302F, 0x3E3D3C3B3A393837,
 3014 0x464544434241403F, 0x4E4D4C4B4A494847, }},
 3015 {{ 0x1716151413121110, 0x1F1E1D1C1B1A1918,
 3016 0x2726252423222120, 0x2F2E2D2C2B2A2928,
 3017 0x3736353433323130, 0x3F3E3D3C3B3A3938,
 3018 0x4746454443424140, 0x4F4E4D4C4B4A4948, }},
 3019 {{ 0x1817161514131211, 0x201F1E1D1C1B1A19,
 3020 0x2827262524232221, 0x302F2E2D2C2B2A29,
 3021 0x3837363534333231, 0x403F3E3D3C3B3A39,
 3022 0x4847464544434241, 0x504F4E4D4C4B4A49, }},
 3023 {{ 0x1918171615141312, 0x21201F1E1D1C1B1A,
 3024 0x2928272625242322, 0x31302F2E2D2C2B2A,
 3025 0x3938373635343332, 0x41403F3E3D3C3B3A,
 3026 0x4948474645444342, 0x51504F4E4D4C4B4A, }},
 3027 {{ 0x1A19181716151413, 0x2221201F1E1D1C1B,
 3028 0x2A29282726252423, 0x3231302F2E2D2C2B,
 3029 0x3A39383736353433, 0x4241403F3E3D3C3B,
 3030 0x4A49484746454443, 0x5251504F4E4D4C4B, }},
 3031 {{ 0x1B1A191817161514, 0x232221201F1E1D1C,
 3032 0x2B2A292827262524, 0x333231302F2E2D2C,
 3033 0x3B3A393837363534, 0x434241403F3E3D3C,
 3034 0x4B4A494847464544, 0x535251504F4E4D4C, }},
 3035 {{ 0x1C1B1A1918171615, 0x24232221201F1E1D,
 3036 0x2C2B2A2928272625, 0x34333231302F2E2D,
 3037 0x3C3B3A3938373635, 0x44434241403F3E3D,
 3038 0x4C4B4A4948474645, 0x54535251504F4E4D, }},
 3039 {{ 0x1D1C1B1A19181716, 0x2524232221201F1E,
 3040 0x2D2C2B2A29282726, 0x3534333231302F2E,
 3041 0x3D3C3B3A39383736, 0x4544434241403F3E,
 3042 0x4D4C4B4A49484746, 0x5554535251504F4E, }},
 3043 {{ 0x1E1D1C1B1A191817, 0x262524232221201F,
 3044 0x2E2D2C2B2A292827, 0x363534333231302F,
 3045 0x3E3D3C3B3A393837, 0x464544434241403F,
 3046 0x4E4D4C4B4A494847, 0x565554535251504F, }},
 3047 {{ 0x1F1E1D1C1B1A1918, 0x2726252423222120,
 3048 0x2F2E2D2C2B2A2928, 0x3736353433323130,
 3049 0x3F3E3D3C3B3A3938, 0x4746454443424140,
 3050 0x4F4E4D4C4B4A4948, 0x5756555453525150, }},
 3051 {{ 0x201F1E1D1C1B1A19, 0x2827262524232221,
 3052 0x302F2E2D2C2B2A29, 0x3837363534333231,
 3053 0x403F3E3D3C3B3A39, 0x4847464544434241,
 3054 0x504F4E4D4C4B4A49, 0x5857565554535251, }},
 3055 {{ 0x21201F1E1D1C1B1A, 0x2928272625242322,
 3056 0x31302F2E2D2C2B2A, 0x3938373635343332,
 3057 0x41403F3E3D3C3B3A, 0x4948474645444342,
 3058 0x51504F4E4D4C4B4A, 0x5958575655545352, }},
 3059 {{ 0x2221201F1E1D1C1B, 0x2A29282726252423,
 3060 0x3231302F2E2D2C2B, 0x3A39383736353433,
 3061 0x4241403F3E3D3C3B, 0x4A49484746454443,
 3062 0x5251504F4E4D4C4B, 0x5A59585756555453, }},
 3063 {{ 0x232221201F1E1D1C, 0x2B2A292827262524,
 3064 0x333231302F2E2D2C, 0x3B3A393837363534,
 3065 0x434241403F3E3D3C, 0x4B4A494847464544,
 3066 0x535251504F4E4D4C, 0x5B5A595857565554, }},
 3067 {{ 0x24232221201F1E1D, 0x2C2B2A2928272625,
 3068 0x34333231302F2E2D, 0x3C3B3A3938373635,
 3069 0x44434241403F3E3D, 0x4C4B4A4948474645,
 3070 0x54535251504F4E4D, 0x5C5B5A5958575655, }},
 3071 {{ 0x2524232221201F1E, 0x2D2C2B2A29282726,
 3072 0x3534333231302F2E, 0x3D3C3B3A39383736,
 3073 0x4544434241403F3E, 0x4D4C4B4A49484746,
 3074 0x5554535251504F4E, 0x5D5C5B5A59585756, }},
 3075 {{ 0x262524232221201F, 0x2E2D2C2B2A292827,
 3076 0x363534333231302F, 0x3E3D3C3B3A393837,
 3077 0x464544434241403F, 0x4E4D4C4B4A494847,
 3078 0x565554535251504F, 0x5E5D5C5B5A595857, }},
 3079 /* k0..k7 */
 3080 {{ 0x2726252423222120, 0x2F2E2D2C2B2A2928,
 3081 0x3736353433323130, 0x3F3E3D3C3B3A3938,
 3082 0x4746454443424140, 0x4F4E4D4C4B4A4948,
 3083 0x5756555453525150, 0x5F5E5D5C5B5A5958, }},
2802 }; 3084 };
2803 3085
2804 const struct x86_test_fpu_registers expected_fpu = { 3086 const struct x86_test_fpu_registers expected_fpu = {
2805 .st = { 3087 .st = {
2806 {0x8000000000000000, 0x4000}, /* +2.0 */ 3088 {0x8000000000000000, 0x4000}, /* +2.0 */
2807 {0x3f00000000000000, 0x0000}, /* 1.654785e-4932 */ 3089 {0x3f00000000000000, 0x0000}, /* 1.654785e-4932 */
2808 {0x0000000000000000, 0x0000}, /* +0 */ 3090 {0x0000000000000000, 0x0000}, /* +0 */
2809 {0x0000000000000000, 0x8000}, /* -0 */ 3091 {0x0000000000000000, 0x8000}, /* -0 */
2810 {0x8000000000000000, 0x7fff}, /* +inf */ 3092 {0x8000000000000000, 0x7fff}, /* +inf */
2811 {0x8000000000000000, 0xffff}, /* -inf */ 3093 {0x8000000000000000, 0xffff}, /* -inf */
2812 {0xc000000000000000, 0xffff}, /* nan */ 3094 {0xc000000000000000, 0xffff}, /* nan */
2813 /* st(7) will be freed to test tag word better */ 3095 /* st(7) will be freed to test tag word better */
2814 {0x0000000000000000, 0x0000}, /* +0 */ 3096 {0x0000000000000000, 0x0000}, /* +0 */
2815 }, 3097 },
2816 /* 0000 0011 0111 1011 3098 /* 0000 0011 0111 1011
2817 * PU OZDI -- unmask divide-by-zero exc. 3099 * PU OZDI -- unmask divide-by-zero exc.
2818 * RR --------- reserved 3100 * RR --------- reserved
2819 * PC ------------ 64-bit precision 3101 * PC ------------ 64-bit precision
2820 * RC -------------- round to nearest 3102 * RC -------------- round to nearest
2821 * I ----------------- allow interrupts (unused) 3103 * I ----------------- allow interrupts (unused)
2822 */ 3104 */
2823 .cw = 0x037b, 3105 .cw = 0x037b,
2824 /* 1000 0000 1000 0100 3106 /* 1000 0000 1000 0100
2825 * SPU OZDI -- divide-by-zero exception 3107 * SPU OZDI -- divide-by-zero exception
2826 * I ---------- interrupt (exception handling) 3108 * I ---------- interrupt (exception handling)
2827 * C CCC ------------ condition codes 3109 * C CCC ------------ condition codes
2828 * TO P --------------- top register is 0 3110 * TO P --------------- top register is 0
2829 * B -------------------- FPU is busy 3111 * B -------------------- FPU is busy
2830 */ 3112 */
2831 .sw = 0x8084, 3113 .sw = 0x8084,
2832 /* 1110 1010 0101 1000 3114 /* 1110 1010 0101 1000
2833 * R7R6 R5R4 R3R2 R1R0 3115 * R7R6 R5R4 R3R2 R1R0
2834 * nz -- non-zero (+2.0) 3116 * nz -- non-zero (+2.0)
2835 * sp ---- special (denormal) 3117 * sp ---- special (denormal)
2836 * zrzr ------- zeroes 3118 * zrzr ------- zeroes
2837 * sp spsp ------------ specials (NaN + infinities) 3119 * sp spsp ------------ specials (NaN + infinities)
2838 * em ------------------- empty register 3120 * em ------------------- empty register
2839 */ 3121 */
2840 .tw = 0xea58, 3122 .tw = 0xea58,
2841 /* 0111 1111 -- registers 0 to 6 are used */ 3123 /* 0111 1111 -- registers 0 to 6 are used */
2842 .tw_abridged = 0x7f, 3124 .tw_abridged = 0x7f,
2843 /* FDIV */ 3125 /* FDIV */
2844 .opcode = 0x0033, 3126 .opcode = 0x0033,
2845 /* random bits for IP/DP write test 3127 /* random bits for IP/DP write test
2846 * keep it below 48 bits since it can be truncated 3128 * keep it below 48 bits since it can be truncated
2847 */ 3129 */
2848 .ip = {.fa_64 = 0x00000a9876543210}, 3130 .ip = {.fa_64 = 0x00000a9876543210},
2849 .dp = {.fa_64 = 0x0000056789abcdef}, 3131 .dp = {.fa_64 = 0x0000056789abcdef},
2850 }; 3132 };
2851 3133
2852 bool need_32 = false, need_64 = false, need_cpuid = false; 3134 bool need_32 = false, need_64 = false, need_cpuid = false;
2853 3135
2854 switch (regs) { 3136 switch (regs) {
2855 case GPREGS_32: 3137 case GPREGS_32:
2856 case GPREGS_32_EBP_ESP: 3138 case GPREGS_32_EBP_ESP:
2857 need_32 = true; 3139 need_32 = true;
2858 break; 3140 break;
2859 case GPREGS_64: 3141 case GPREGS_64:
2860 case GPREGS_64_R8: 3142 case GPREGS_64_R8:
2861 need_64 = true; 3143 need_64 = true;
2862 break; 3144 break;
2863 case FPREGS_FPU: 3145 case FPREGS_FPU:
2864 break; 3146 break;
2865 case FPREGS_MM: 3147 case FPREGS_MM:
2866 case FPREGS_XMM: 3148 case FPREGS_XMM:
2867 case FPREGS_YMM: 3149 case FPREGS_YMM:
 3150 case FPREGS_ZMM:
2868 need_cpuid = true; 3151 need_cpuid = true;
2869 break; 3152 break;
2870 } 3153 }
2871 3154
2872 if (need_32) { 3155 if (need_32) {
2873#if defined(__x86_64__) 3156#if defined(__x86_64__)
2874 atf_tc_skip("Test requires 32-bit mode"); 3157 atf_tc_skip("Test requires 32-bit mode");
2875#endif 3158#endif
2876 } 3159 }
2877 if (need_64) { 3160 if (need_64) {
2878#if defined(__i386__) 3161#if defined(__i386__)
2879 atf_tc_skip("Test requires 64-bit mode"); 3162 atf_tc_skip("Test requires 64-bit mode");
2880#endif 3163#endif
2881 } 3164 }
2882 3165
2883 if (need_cpuid) { 3166 if (need_cpuid) {
2884 /* verify whether needed instruction sets are supported here */ 3167 /* verify whether needed instruction sets are supported here */
2885 unsigned int eax, ebx, ecx, edx; 3168 unsigned int eax, ebx, ecx, edx;
 3169 unsigned int eax7, ebx7, ecx7, edx7;
2886 3170
2887 DPRINTF("Before invoking cpuid\n"); 3171 DPRINTF("Before invoking cpuid\n");
2888 if (!__get_cpuid(1, &eax, &ebx, &ecx, &edx)) 3172 if (!__get_cpuid(1, &eax, &ebx, &ecx, &edx))
2889 atf_tc_skip("CPUID is not supported by the CPU"); 3173 atf_tc_skip("CPUID is not supported by the CPU");
2890 3174
2891 DPRINTF("cpuid: ECX = %08x, EDX = %08xd\n", ecx, edx); 3175 DPRINTF("cpuid[eax=1]: ECX = %08x, EDX = %08xd\n", ecx, edx);
2892 3176
2893 switch (regs) { 3177 switch (regs) {
 3178 case FPREGS_ZMM:
 3179 /* ZMM is in EAX=7, ECX=0 */
 3180 if (!__get_cpuid_count(7, 0, &eax7, &ebx7, &ecx7, &edx7))
 3181 atf_tc_skip(
 3182 "AVX512F is not supported by the CPU");
 3183 DPRINTF("cpuid[eax=7,ecx=0]: EBX = %08x\n", ebx7);
 3184 if (!(ebx7 & bit_AVX512F))
 3185 atf_tc_skip(
 3186 "AVX512F is not supported by the CPU");
 3187 /*FALLTHROUGH*/
2894 case FPREGS_YMM: 3188 case FPREGS_YMM:
2895 if (!(ecx & bit_AVX)) 3189 if (!(ecx & bit_AVX))
2896 atf_tc_skip("AVX is not supported by the CPU"); 3190 atf_tc_skip("AVX is not supported by the CPU");
2897 /*FALLTHROUGH*/ 3191 /*FALLTHROUGH*/
2898 case FPREGS_XMM: 3192 case FPREGS_XMM:
2899 if (!(edx & bit_SSE)) 3193 if (!(edx & bit_SSE))
2900 atf_tc_skip("SSE is not supported by the CPU"); 3194 atf_tc_skip("SSE is not supported by the CPU");
2901 break; 3195 break;
2902 case FPREGS_MM: 3196 case FPREGS_MM:
2903 if (!(edx & bit_MMX)) 3197 if (!(edx & bit_MMX))
2904 atf_tc_skip("MMX is not supported by the CPU"); 3198 atf_tc_skip("MMX is not supported by the CPU");
2905 break; 3199 break;
2906 case GPREGS_32: 3200 case GPREGS_32:
2907 case GPREGS_32_EBP_ESP: 3201 case GPREGS_32_EBP_ESP:
2908 case GPREGS_64: 3202 case GPREGS_64:
2909 case GPREGS_64_R8: 3203 case GPREGS_64_R8:
2910 case FPREGS_FPU: 3204 case FPREGS_FPU:
2911 __unreachable(); 3205 __unreachable();
2912 } 3206 }
2913 } 3207 }
2914 3208
2915 DPRINTF("Before forking process PID=%d\n", getpid()); 3209 DPRINTF("Before forking process PID=%d\n", getpid());
2916 SYSCALL_REQUIRE((child = fork()) != -1); 3210 SYSCALL_REQUIRE((child = fork()) != -1);
2917 if (child == 0) { 3211 if (child == 0) {
2918 union x86_test_register vals[16] __aligned(32); 3212 union x86_test_register vals[__arraycount(expected)] __aligned(64);
2919 struct x86_test_fpu_registers vals_fpu; 3213 struct x86_test_fpu_registers vals_fpu;
2920 3214
2921 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid()); 3215 DPRINTF("Before calling PT_TRACE_ME from child %d\n", getpid());
2922 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); 3216 FORKEE_ASSERT(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1);
2923 3217
2924 DPRINTF("Before running assembly from child\n"); 3218 DPRINTF("Before running assembly from child\n");
2925 switch (regmode) { 3219 switch (regmode) {
2926 case TEST_GETREGS: 3220 case TEST_GETREGS:
2927 case TEST_COREDUMP: 3221 case TEST_COREDUMP:
2928 switch (regs) { 3222 switch (regs) {
2929 case GPREGS_32: 3223 case GPREGS_32:
2930 set_gp32_regs(expected); 3224 set_gp32_regs(expected);
2931 break; 3225 break;
2932 case GPREGS_32_EBP_ESP: 3226 case GPREGS_32_EBP_ESP:
2933 set_gp32_ebp_esp_regs(expected); 3227 set_gp32_ebp_esp_regs(expected);
2934 break; 3228 break;
2935 case GPREGS_64: 3229 case GPREGS_64:
2936 set_gp64_regs(expected); 3230 set_gp64_regs(expected);
2937 break; 3231 break;
2938 case GPREGS_64_R8: 3232 case GPREGS_64_R8:
2939 set_gp64_r8_regs(expected); 3233 set_gp64_r8_regs(expected);
2940 break; 3234 break;
2941 case FPREGS_FPU: 3235 case FPREGS_FPU:
2942 set_fpu_regs(&expected_fpu); 3236 set_fpu_regs(&expected_fpu);
2943 break; 3237 break;
2944 case FPREGS_MM: 3238 case FPREGS_MM:
2945 set_mm_regs(expected); 3239 set_mm_regs(expected);
2946 break; 3240 break;
2947 case FPREGS_XMM: 3241 case FPREGS_XMM:
2948 set_xmm_regs(expected); 3242 set_xmm_regs(expected);
2949 break; 3243 break;
2950 case FPREGS_YMM: 3244 case FPREGS_YMM:
2951 set_ymm_regs(expected); 3245 set_ymm_regs(expected);
2952 break; 3246 break;
 3247 case FPREGS_ZMM:
 3248 set_zmm_regs(expected);
 3249 break;
2953 } 3250 }
2954 break; 3251 break;
2955 case TEST_SETREGS: 3252 case TEST_SETREGS:
2956 switch (regs) { 3253 switch (regs) {
2957 case GPREGS_32: 3254 case GPREGS_32:
2958 get_gp32_regs(vals); 3255 get_gp32_regs(vals);
2959 break; 3256 break;
2960 case GPREGS_32_EBP_ESP: 3257 case GPREGS_32_EBP_ESP:
2961 get_gp32_ebp_esp_regs(vals); 3258 get_gp32_ebp_esp_regs(vals);
2962 break; 3259 break;
2963 case GPREGS_64: 3260 case GPREGS_64:
2964 get_gp64_regs(vals); 3261 get_gp64_regs(vals);
2965 break; 3262 break;
2966 case GPREGS_64_R8: 3263 case GPREGS_64_R8:
2967 get_gp64_r8_regs(vals); 3264 get_gp64_r8_regs(vals);
2968 break; 3265 break;
2969 case FPREGS_FPU: 3266 case FPREGS_FPU:
2970 get_fpu_regs(&vals_fpu); 3267 get_fpu_regs(&vals_fpu);
2971 break; 3268 break;
2972 case FPREGS_MM: 3269 case FPREGS_MM:
2973 get_mm_regs(vals); 3270 get_mm_regs(vals);
2974 break; 3271 break;
2975 case FPREGS_XMM: 3272 case FPREGS_XMM:
2976 get_xmm_regs(vals); 3273 get_xmm_regs(vals);
2977 break; 3274 break;
2978 case FPREGS_YMM: 3275 case FPREGS_YMM:
2979 get_ymm_regs(vals); 3276 get_ymm_regs(vals);
2980 break; 3277 break;
 3278 case FPREGS_ZMM:
 3279 get_zmm_regs(vals);
 3280 break;
2981 } 3281 }
2982 3282
2983 DPRINTF("Before comparing results\n"); 3283 DPRINTF("Before comparing results\n");
2984 switch (regs) { 3284 switch (regs) {
2985 case GPREGS_32: 3285 case GPREGS_32:
2986 FORKEE_ASSERT(!memcmp(&vals[5].u32, 3286 FORKEE_ASSERT(!memcmp(&vals[5].u32,
2987 &expected[5].u32, sizeof(vals->u32))); 3287 &expected[5].u32, sizeof(vals->u32)));
2988 FORKEE_ASSERT(!memcmp(&vals[4].u32, 3288 FORKEE_ASSERT(!memcmp(&vals[4].u32,
2989 &expected[4].u32, sizeof(vals->u32))); 3289 &expected[4].u32, sizeof(vals->u32)));
2990 FORKEE_ASSERT(!memcmp(&vals[3].u32, 3290 FORKEE_ASSERT(!memcmp(&vals[3].u32,
2991 &expected[3].u32, sizeof(vals->u32))); 3291 &expected[3].u32, sizeof(vals->u32)));
2992 FORKEE_ASSERT(!memcmp(&vals[2].u32, 3292 FORKEE_ASSERT(!memcmp(&vals[2].u32,
2993 &expected[2].u32, sizeof(vals->u32))); 3293 &expected[2].u32, sizeof(vals->u32)));
2994 /*FALLTHROUGH*/ 3294 /*FALLTHROUGH*/
2995 case GPREGS_32_EBP_ESP: 3295 case GPREGS_32_EBP_ESP:
2996 FORKEE_ASSERT(!memcmp(&vals[1].u32, 3296 FORKEE_ASSERT(!memcmp(&vals[1].u32,
2997 &expected[1].u32, sizeof(vals->u32))); 3297 &expected[1].u32, sizeof(vals->u32)));
2998 FORKEE_ASSERT(!memcmp(&vals[0].u32, 3298 FORKEE_ASSERT(!memcmp(&vals[0].u32,
2999 &expected[0].u32, sizeof(vals->u32))); 3299 &expected[0].u32, sizeof(vals->u32)));
3000 break; 3300 break;
3001 case GPREGS_64: 3301 case GPREGS_64:
3002 case GPREGS_64_R8: 3302 case GPREGS_64_R8:
3003 case FPREGS_MM: 3303 case FPREGS_MM:
3004 FORKEE_ASSERT(!memcmp(&vals[0].u64, 3304 FORKEE_ASSERT(!memcmp(&vals[0].u64,
3005 &expected[0].u64, sizeof(vals->u64))); 3305 &expected[0].u64, sizeof(vals->u64)));
3006 FORKEE_ASSERT(!memcmp(&vals[1].u64, 3306 FORKEE_ASSERT(!memcmp(&vals[1].u64,
3007 &expected[1].u64, sizeof(vals->u64))); 3307 &expected[1].u64, sizeof(vals->u64)));
3008 FORKEE_ASSERT(!memcmp(&vals[2].u64, 3308 FORKEE_ASSERT(!memcmp(&vals[2].u64,
3009 &expected[2].u64, sizeof(vals->u64))); 3309 &expected[2].u64, sizeof(vals->u64)));
3010 FORKEE_ASSERT(!memcmp(&vals[3].u64, 3310 FORKEE_ASSERT(!memcmp(&vals[3].u64,
3011 &expected[3].u64, sizeof(vals->u64))); 3311 &expected[3].u64, sizeof(vals->u64)));
3012 FORKEE_ASSERT(!memcmp(&vals[4].u64, 3312 FORKEE_ASSERT(!memcmp(&vals[4].u64,
3013 &expected[4].u64, sizeof(vals->u64))); 3313 &expected[4].u64, sizeof(vals->u64)));
3014 FORKEE_ASSERT(!memcmp(&vals[5].u64, 3314 FORKEE_ASSERT(!memcmp(&vals[5].u64,
3015 &expected[5].u64, sizeof(vals->u64))); 3315 &expected[5].u64, sizeof(vals->u64)));
3016 FORKEE_ASSERT(!memcmp(&vals[6].u64, 3316 FORKEE_ASSERT(!memcmp(&vals[6].u64,
3017 &expected[6].u64, sizeof(vals->u64))); 3317 &expected[6].u64, sizeof(vals->u64)));
3018 FORKEE_ASSERT(!memcmp(&vals[7].u64, 3318 FORKEE_ASSERT(!memcmp(&vals[7].u64,
3019 &expected[7].u64, sizeof(vals->u64))); 3319 &expected[7].u64, sizeof(vals->u64)));
3020 break; 3320 break;
3021 case FPREGS_FPU: 3321 case FPREGS_FPU:
3022 FORKEE_ASSERT(vals_fpu.cw == expected_fpu.cw); 3322 FORKEE_ASSERT(vals_fpu.cw == expected_fpu.cw);
3023 FORKEE_ASSERT(vals_fpu.sw == expected_fpu.sw); 3323 FORKEE_ASSERT(vals_fpu.sw == expected_fpu.sw);
3024 FORKEE_ASSERT(vals_fpu.tw == expected_fpu.tw); 3324 FORKEE_ASSERT(vals_fpu.tw == expected_fpu.tw);
3025 FORKEE_ASSERT(vals_fpu.tw_abridged 3325 FORKEE_ASSERT(vals_fpu.tw_abridged
3026 == expected_fpu.tw_abridged); 3326 == expected_fpu.tw_abridged);
3027 FORKEE_ASSERT(vals_fpu.ip.fa_64 3327 FORKEE_ASSERT(vals_fpu.ip.fa_64
3028 == expected_fpu.ip.fa_64); 3328 == expected_fpu.ip.fa_64);
3029 FORKEE_ASSERT(vals_fpu.dp.fa_64 3329 FORKEE_ASSERT(vals_fpu.dp.fa_64
3030 == expected_fpu.dp.fa_64); 3330 == expected_fpu.dp.fa_64);
3031 3331
3032 FORKEE_ASSERT(vals_fpu.st[0].sign_exp 3332 FORKEE_ASSERT(vals_fpu.st[0].sign_exp
3033 == expected_fpu.st[0].sign_exp); 3333 == expected_fpu.st[0].sign_exp);
3034 FORKEE_ASSERT(vals_fpu.st[0].mantissa 3334 FORKEE_ASSERT(vals_fpu.st[0].mantissa
3035 == expected_fpu.st[0].mantissa); 3335 == expected_fpu.st[0].mantissa);
3036 FORKEE_ASSERT(vals_fpu.st[1].sign_exp 3336 FORKEE_ASSERT(vals_fpu.st[1].sign_exp
3037 == expected_fpu.st[1].sign_exp); 3337 == expected_fpu.st[1].sign_exp);
3038 FORKEE_ASSERT(vals_fpu.st[1].mantissa 3338 FORKEE_ASSERT(vals_fpu.st[1].mantissa
3039 == expected_fpu.st[1].mantissa); 3339 == expected_fpu.st[1].mantissa);
3040 FORKEE_ASSERT(vals_fpu.st[2].sign_exp 3340 FORKEE_ASSERT(vals_fpu.st[2].sign_exp
3041 == expected_fpu.st[2].sign_exp); 3341 == expected_fpu.st[2].sign_exp);
3042 FORKEE_ASSERT(vals_fpu.st[2].mantissa 3342 FORKEE_ASSERT(vals_fpu.st[2].mantissa
3043 == expected_fpu.st[2].mantissa); 3343 == expected_fpu.st[2].mantissa);
3044 FORKEE_ASSERT(vals_fpu.st[3].sign_exp 3344 FORKEE_ASSERT(vals_fpu.st[3].sign_exp
3045 == expected_fpu.st[3].sign_exp); 3345 == expected_fpu.st[3].sign_exp);
3046 FORKEE_ASSERT(vals_fpu.st[3].mantissa 3346 FORKEE_ASSERT(vals_fpu.st[3].mantissa
3047 == expected_fpu.st[3].mantissa); 3347 == expected_fpu.st[3].mantissa);
3048 FORKEE_ASSERT(vals_fpu.st[4].sign_exp 3348 FORKEE_ASSERT(vals_fpu.st[4].sign_exp
3049 == expected_fpu.st[4].sign_exp); 3349 == expected_fpu.st[4].sign_exp);
3050 FORKEE_ASSERT(vals_fpu.st[4].mantissa 3350 FORKEE_ASSERT(vals_fpu.st[4].mantissa
3051 == expected_fpu.st[4].mantissa); 3351 == expected_fpu.st[4].mantissa);
3052 FORKEE_ASSERT(vals_fpu.st[5].sign_exp 3352 FORKEE_ASSERT(vals_fpu.st[5].sign_exp
3053 == expected_fpu.st[5].sign_exp); 3353 == expected_fpu.st[5].sign_exp);
3054 FORKEE_ASSERT(vals_fpu.st[5].mantissa 3354 FORKEE_ASSERT(vals_fpu.st[5].mantissa
3055 == expected_fpu.st[5].mantissa); 3355 == expected_fpu.st[5].mantissa);
3056 FORKEE_ASSERT(vals_fpu.st[6].sign_exp 3356 FORKEE_ASSERT(vals_fpu.st[6].sign_exp
3057 == expected_fpu.st[6].sign_exp); 3357 == expected_fpu.st[6].sign_exp);
3058 FORKEE_ASSERT(vals_fpu.st[6].mantissa 3358 FORKEE_ASSERT(vals_fpu.st[6].mantissa
3059 == expected_fpu.st[6].mantissa); 3359 == expected_fpu.st[6].mantissa);
3060 /* st(7) is left empty == undefined */ 3360 /* st(7) is left empty == undefined */
3061 break; 3361 break;
3062 case FPREGS_XMM: 3362 case FPREGS_XMM:
3063 FORKEE_ASSERT(!memcmp(&vals[0].xmm, 3363 FORKEE_ASSERT(!memcmp(&vals[0].xmm,
3064 &expected[0].xmm, sizeof(vals->xmm))); 3364 &expected[0].xmm, sizeof(vals->xmm)));
3065 FORKEE_ASSERT(!memcmp(&vals[1].xmm, 3365 FORKEE_ASSERT(!memcmp(&vals[1].xmm,
3066 &expected[1].xmm, sizeof(vals->xmm))); 3366 &expected[1].xmm, sizeof(vals->xmm)));
3067 FORKEE_ASSERT(!memcmp(&vals[2].xmm, 3367 FORKEE_ASSERT(!memcmp(&vals[2].xmm,
3068 &expected[2].xmm, sizeof(vals->xmm))); 3368 &expected[2].xmm, sizeof(vals->xmm)));
3069 FORKEE_ASSERT(!memcmp(&vals[3].xmm, 3369 FORKEE_ASSERT(!memcmp(&vals[3].xmm,
3070 &expected[3].xmm, sizeof(vals->xmm))); 3370 &expected[3].xmm, sizeof(vals->xmm)));
3071 FORKEE_ASSERT(!memcmp(&vals[4].xmm, 3371 FORKEE_ASSERT(!memcmp(&vals[4].xmm,
3072 &expected[4].xmm, sizeof(vals->xmm))); 3372 &expected[4].xmm, sizeof(vals->xmm)));
3073 FORKEE_ASSERT(!memcmp(&vals[5].xmm, 3373 FORKEE_ASSERT(!memcmp(&vals[5].xmm,
3074 &expected[5].xmm, sizeof(vals->xmm))); 3374 &expected[5].xmm, sizeof(vals->xmm)));
3075 FORKEE_ASSERT(!memcmp(&vals[6].xmm, 3375 FORKEE_ASSERT(!memcmp(&vals[6].xmm,
3076 &expected[6].xmm, sizeof(vals->xmm))); 3376 &expected[6].xmm, sizeof(vals->xmm)));
3077 FORKEE_ASSERT(!memcmp(&vals[7].xmm, 3377 FORKEE_ASSERT(!memcmp(&vals[7].xmm,
3078 &expected[7].xmm, sizeof(vals->xmm))); 3378 &expected[7].xmm, sizeof(vals->xmm)));
3079#if defined(__x86_64__) 3379#if defined(__x86_64__)
3080 FORKEE_ASSERT(!memcmp(&vals[8].xmm, 3380 FORKEE_ASSERT(!memcmp(&vals[8].xmm,
3081 &expected[8].xmm, sizeof(vals->xmm))); 3381 &expected[8].xmm, sizeof(vals->xmm)));
3082 FORKEE_ASSERT(!memcmp(&vals[9].xmm, 3382 FORKEE_ASSERT(!memcmp(&vals[9].xmm,
3083 &expected[9].xmm, sizeof(vals->xmm))); 3383 &expected[9].xmm, sizeof(vals->xmm)));
3084 FORKEE_ASSERT(!memcmp(&vals[10].xmm, 3384 FORKEE_ASSERT(!memcmp(&vals[10].xmm,
3085 &expected[10].xmm, sizeof(vals->xmm))); 3385 &expected[10].xmm, sizeof(vals->xmm)));
3086 FORKEE_ASSERT(!memcmp(&vals[11].xmm, 3386 FORKEE_ASSERT(!memcmp(&vals[11].xmm,
3087 &expected[11].xmm, sizeof(vals->xmm))); 3387 &expected[11].xmm, sizeof(vals->xmm)));
3088 FORKEE_ASSERT(!memcmp(&vals[12].xmm, 3388 FORKEE_ASSERT(!memcmp(&vals[12].xmm,
3089 &expected[12].xmm, sizeof(vals->xmm))); 3389 &expected[12].xmm, sizeof(vals->xmm)));
3090 FORKEE_ASSERT(!memcmp(&vals[13].xmm, 3390 FORKEE_ASSERT(!memcmp(&vals[13].xmm,
3091 &expected[13].xmm, sizeof(vals->xmm))); 3391 &expected[13].xmm, sizeof(vals->xmm)));
3092 FORKEE_ASSERT(!memcmp(&vals[14].xmm, 3392 FORKEE_ASSERT(!memcmp(&vals[14].xmm,
3093 &expected[14].xmm, sizeof(vals->xmm))); 3393 &expected[14].xmm, sizeof(vals->xmm)));
3094 FORKEE_ASSERT(!memcmp(&vals[15].xmm, 3394 FORKEE_ASSERT(!memcmp(&vals[15].xmm,
3095 &expected[15].xmm, sizeof(vals->xmm))); 3395 &expected[15].xmm, sizeof(vals->xmm)));
3096#endif 3396#endif
3097 break; 3397 break;
3098 case FPREGS_YMM: 3398 case FPREGS_YMM:
3099 FORKEE_ASSERT(!memcmp(&vals[0].ymm, 3399 FORKEE_ASSERT(!memcmp(&vals[0].ymm,
3100 &expected[0].ymm, sizeof(vals->ymm))); 3400 &expected[0].ymm, sizeof(vals->ymm)));
3101 FORKEE_ASSERT(!memcmp(&vals[1].ymm, 3401 FORKEE_ASSERT(!memcmp(&vals[1].ymm,
3102 &expected[1].ymm, sizeof(vals->ymm))); 3402 &expected[1].ymm, sizeof(vals->ymm)));
3103 FORKEE_ASSERT(!memcmp(&vals[2].ymm, 3403 FORKEE_ASSERT(!memcmp(&vals[2].ymm,
3104 &expected[2].ymm, sizeof(vals->ymm))); 3404 &expected[2].ymm, sizeof(vals->ymm)));
3105 FORKEE_ASSERT(!memcmp(&vals[3].ymm, 3405 FORKEE_ASSERT(!memcmp(&vals[3].ymm,
3106 &expected[3].ymm, sizeof(vals->ymm))); 3406 &expected[3].ymm, sizeof(vals->ymm)));
3107 FORKEE_ASSERT(!memcmp(&vals[4].ymm, 3407 FORKEE_ASSERT(!memcmp(&vals[4].ymm,
3108 &expected[4].ymm, sizeof(vals->ymm))); 3408 &expected[4].ymm, sizeof(vals->ymm)));
3109 FORKEE_ASSERT(!memcmp(&vals[5].ymm, 3409 FORKEE_ASSERT(!memcmp(&vals[5].ymm,
3110 &expected[5].ymm, sizeof(vals->ymm))); 3410 &expected[5].ymm, sizeof(vals->ymm)));
3111 FORKEE_ASSERT(!memcmp(&vals[6].ymm, 3411 FORKEE_ASSERT(!memcmp(&vals[6].ymm,
3112 &expected[6].ymm, sizeof(vals->ymm))); 3412 &expected[6].ymm, sizeof(vals->ymm)));
3113 FORKEE_ASSERT(!memcmp(&vals[7].ymm, 3413 FORKEE_ASSERT(!memcmp(&vals[7].ymm,
3114 &expected[7].ymm, sizeof(vals->ymm))); 3414 &expected[7].ymm, sizeof(vals->ymm)));
3115#if defined(__x86_64__) 3415#if defined(__x86_64__)
3116 FORKEE_ASSERT(!memcmp(&vals[8].ymm, 3416 FORKEE_ASSERT(!memcmp(&vals[8].ymm,
3117 &expected[8].ymm, sizeof(vals->ymm))); 3417 &expected[8].ymm, sizeof(vals->ymm)));
3118 FORKEE_ASSERT(!memcmp(&vals[9].ymm, 3418 FORKEE_ASSERT(!memcmp(&vals[9].ymm,
3119 &expected[9].ymm, sizeof(vals->ymm))); 3419 &expected[9].ymm, sizeof(vals->ymm)));
3120 FORKEE_ASSERT(!memcmp(&vals[10].ymm, 3420 FORKEE_ASSERT(!memcmp(&vals[10].ymm,
3121 &expected[10].ymm, sizeof(vals->ymm))); 3421 &expected[10].ymm, sizeof(vals->ymm)));
3122 FORKEE_ASSERT(!memcmp(&vals[11].ymm, 3422 FORKEE_ASSERT(!memcmp(&vals[11].ymm,
3123 &expected[11].ymm, sizeof(vals->ymm))); 3423 &expected[11].ymm, sizeof(vals->ymm)));
3124 FORKEE_ASSERT(!memcmp(&vals[12].ymm, 3424 FORKEE_ASSERT(!memcmp(&vals[12].ymm,
3125 &expected[12].ymm, sizeof(vals->ymm))); 3425 &expected[12].ymm, sizeof(vals->ymm)));
3126 FORKEE_ASSERT(!memcmp(&vals[13].ymm, 3426 FORKEE_ASSERT(!memcmp(&vals[13].ymm,
3127 &expected[13].ymm, sizeof(vals->ymm))); 3427 &expected[13].ymm, sizeof(vals->ymm)));
3128 FORKEE_ASSERT(!memcmp(&vals[14].ymm, 3428 FORKEE_ASSERT(!memcmp(&vals[14].ymm,
3129 &expected[14].ymm, sizeof(vals->ymm))); 3429 &expected[14].ymm, sizeof(vals->ymm)));
3130 FORKEE_ASSERT(!memcmp(&vals[15].ymm, 3430 FORKEE_ASSERT(!memcmp(&vals[15].ymm,
3131 &expected[15].ymm, sizeof(vals->ymm))); 3431 &expected[15].ymm, sizeof(vals->ymm)));
3132#endif 3432#endif
3133 break; 3433 break;
 3434 case FPREGS_ZMM:
 3435 FORKEE_ASSERT(!memcmp(&vals[0].zmm,
 3436 &expected[0].zmm, sizeof(vals->zmm)));
 3437 FORKEE_ASSERT(!memcmp(&vals[1].zmm,
 3438 &expected[1].zmm, sizeof(vals->zmm)));
 3439 FORKEE_ASSERT(!memcmp(&vals[2].zmm,
 3440 &expected[2].zmm, sizeof(vals->zmm)));
 3441 FORKEE_ASSERT(!memcmp(&vals[3].zmm,
 3442 &expected[3].zmm, sizeof(vals->zmm)));
 3443 FORKEE_ASSERT(!memcmp(&vals[4].zmm,
 3444 &expected[4].zmm, sizeof(vals->zmm)));
 3445 FORKEE_ASSERT(!memcmp(&vals[5].zmm,
 3446 &expected[5].zmm, sizeof(vals->zmm)));
 3447 FORKEE_ASSERT(!memcmp(&vals[6].zmm,
 3448 &expected[6].zmm, sizeof(vals->zmm)));
 3449 FORKEE_ASSERT(!memcmp(&vals[7].zmm,
 3450 &expected[7].zmm, sizeof(vals->zmm)));
 3451#if defined(__x86_64__)
 3452 FORKEE_ASSERT(!memcmp(&vals[8].zmm,
 3453 &expected[8].zmm, sizeof(vals->zmm)));
 3454 FORKEE_ASSERT(!memcmp(&vals[9].zmm,
 3455 &expected[9].zmm, sizeof(vals->zmm)));
 3456 FORKEE_ASSERT(!memcmp(&vals[10].zmm,
 3457 &expected[10].zmm, sizeof(vals->zmm)));
 3458 FORKEE_ASSERT(!memcmp(&vals[11].zmm,
 3459 &expected[11].zmm, sizeof(vals->zmm)));
 3460 FORKEE_ASSERT(!memcmp(&vals[12].zmm,
 3461 &expected[12].zmm, sizeof(vals->zmm)));
 3462 FORKEE_ASSERT(!memcmp(&vals[13].zmm,
 3463 &expected[13].zmm, sizeof(vals->zmm)));
 3464 FORKEE_ASSERT(!memcmp(&vals[14].zmm,
 3465 &expected[14].zmm, sizeof(vals->zmm)));
 3466 FORKEE_ASSERT(!memcmp(&vals[15].zmm,
 3467 &expected[15].zmm, sizeof(vals->zmm)));
 3468 FORKEE_ASSERT(!memcmp(&vals[16].zmm,
 3469 &expected[16].zmm, sizeof(vals->zmm)));
 3470 FORKEE_ASSERT(!memcmp(&vals[17].zmm,
 3471 &expected[17].zmm, sizeof(vals->zmm)));
 3472 FORKEE_ASSERT(!memcmp(&vals[18].zmm,
 3473 &expected[18].zmm, sizeof(vals->zmm)));
 3474 FORKEE_ASSERT(!memcmp(&vals[19].zmm,
 3475 &expected[19].zmm, sizeof(vals->zmm)));
 3476 FORKEE_ASSERT(!memcmp(&vals[20].zmm,
 3477 &expected[20].zmm, sizeof(vals->zmm)));
 3478 FORKEE_ASSERT(!memcmp(&vals[21].zmm,
 3479 &expected[21].zmm, sizeof(vals->zmm)));
 3480 FORKEE_ASSERT(!memcmp(&vals[22].zmm,
 3481 &expected[22].zmm, sizeof(vals->zmm)));
 3482 FORKEE_ASSERT(!memcmp(&vals[23].zmm,
 3483 &expected[23].zmm, sizeof(vals->zmm)));
 3484 FORKEE_ASSERT(!memcmp(&vals[24].zmm,
 3485 &expected[24].zmm, sizeof(vals->zmm)));
 3486 FORKEE_ASSERT(!memcmp(&vals[25].zmm,
 3487 &expected[25].zmm, sizeof(vals->zmm)));
 3488 FORKEE_ASSERT(!memcmp(&vals[26].zmm,
 3489 &expected[26].zmm, sizeof(vals->zmm)));
 3490 FORKEE_ASSERT(!memcmp(&vals[27].zmm,
 3491 &expected[27].zmm, sizeof(vals->zmm)));
 3492 FORKEE_ASSERT(!memcmp(&vals[28].zmm,
 3493 &expected[28].zmm, sizeof(vals->zmm)));
 3494 FORKEE_ASSERT(!memcmp(&vals[29].zmm,
 3495 &expected[29].zmm, sizeof(vals->zmm)));
 3496 FORKEE_ASSERT(!memcmp(&vals[30].zmm,
 3497 &expected[30].zmm, sizeof(vals->zmm)));
 3498 FORKEE_ASSERT(!memcmp(&vals[31].zmm,
 3499 &expected[31].zmm, sizeof(vals->zmm)));
 3500#endif
 3501 /* k0..k7 */
 3502 FORKEE_ASSERT(vals[32].zmm.a == expected[32].zmm.a);
 3503 FORKEE_ASSERT(vals[32].zmm.b == expected[32].zmm.b);
 3504 FORKEE_ASSERT(vals[32].zmm.c == expected[32].zmm.c);
 3505 FORKEE_ASSERT(vals[32].zmm.d == expected[32].zmm.d);
 3506 FORKEE_ASSERT(vals[32].zmm.e == expected[32].zmm.e);
 3507 FORKEE_ASSERT(vals[32].zmm.f == expected[32].zmm.f);
 3508 FORKEE_ASSERT(vals[32].zmm.g == expected[32].zmm.g);
 3509 FORKEE_ASSERT(vals[32].zmm.h == expected[32].zmm.h);
 3510 break;
3134 } 3511 }
3135 break; 3512 break;
3136 } 3513 }
3137 3514
3138 DPRINTF("Before exiting of the child process\n"); 3515 DPRINTF("Before exiting of the child process\n");
3139 _exit(exitval); 3516 _exit(exitval);
3140 } 3517 }
3141 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child); 3518 DPRINTF("Parent process PID=%d, child's PID=%d\n", getpid(), child);
3142 3519
3143 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 3520 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
3144 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 3521 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
3145 3522
3146 validate_status_stopped(status, sigval); 3523 validate_status_stopped(status, sigval);
3147 3524
3148 if (regset == TEST_XSTATE) { 3525 if (regset == TEST_XSTATE) {
3149 switch (regs) { 3526 switch (regs) {
3150 case FPREGS_FPU: 3527 case FPREGS_FPU:
3151 case FPREGS_MM: 3528 case FPREGS_MM:
3152 xst_flags |= XCR0_X87; 3529 xst_flags |= XCR0_X87;
3153 break; 3530 break;
 3531 case FPREGS_ZMM:
 3532 xst_flags |= XCR0_Opmask | XCR0_ZMM_Hi256;
 3533#if defined(__x86_64__)
 3534 xst_flags |= XCR0_Hi16_ZMM;
 3535#endif
 3536 /*FALLTHROUGH*/
3154 case FPREGS_YMM: 3537 case FPREGS_YMM:
3155 xst_flags |= XCR0_YMM_Hi128; 3538 xst_flags |= XCR0_YMM_Hi128;
3156 /*FALLTHROUGH*/ 3539 /*FALLTHROUGH*/
3157 case FPREGS_XMM: 3540 case FPREGS_XMM:
3158 xst_flags |= XCR0_SSE; 3541 xst_flags |= XCR0_SSE;
3159 break; 3542 break;
3160 case GPREGS_32: 3543 case GPREGS_32:
3161 case GPREGS_32_EBP_ESP: 3544 case GPREGS_32_EBP_ESP:
3162 case GPREGS_64: 3545 case GPREGS_64:
3163 case GPREGS_64_R8: 3546 case GPREGS_64_R8:
3164 __unreachable(); 3547 __unreachable();
3165 break; 3548 break;
3166 } 3549 }
3167 } 3550 }
3168 3551
3169 switch (regmode) { 3552 switch (regmode) {
3170 case TEST_GETREGS: 3553 case TEST_GETREGS:
3171 case TEST_SETREGS: 3554 case TEST_SETREGS:
3172 if (regset == TEST_GPREGS || regs == FPREGS_FPU) { 3555 if (regset == TEST_GPREGS || regs == FPREGS_FPU) {
3173 DPRINTF("Call GETREGS for the child process\n"); 3556 DPRINTF("Call GETREGS for the child process\n");
3174 SYSCALL_REQUIRE(ptrace(PT_GETREGS, child, &gpr, 0) 3557 SYSCALL_REQUIRE(ptrace(PT_GETREGS, child, &gpr, 0)
3175 != -1); 3558 != -1);
3176 } 3559 }
3177 3560
3178 switch (regset) { 3561 switch (regset) {
3179 case TEST_GPREGS: 3562 case TEST_GPREGS:
3180 /* already handled above */ 3563 /* already handled above */
3181 break; 3564 break;
3182 case TEST_XMMREGS: 3565 case TEST_XMMREGS:
3183#if defined(__i386__) 3566#if defined(__i386__)
3184 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM); 3567 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM);
3185 DPRINTF("Call GETXMMREGS for the child process\n"); 3568 DPRINTF("Call GETXMMREGS for the child process\n");
3186 SYSCALL_REQUIRE(ptrace(PT_GETXMMREGS, child, &xmm, 0) 3569 SYSCALL_REQUIRE(ptrace(PT_GETXMMREGS, child, &xmm, 0)
3187 != -1); 3570 != -1);
3188 fxs = &xmm.fxstate; 3571 fxs = &xmm.fxstate;
3189 break; 3572 break;
3190#else 3573#else
3191 /*FALLTHROUGH*/ 3574 /*FALLTHROUGH*/
3192#endif 3575#endif
3193 case TEST_FPREGS: 3576 case TEST_FPREGS:
3194#if defined(__x86_64__) 3577#if defined(__x86_64__)
3195 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM); 3578 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM);
3196 fxs = &fpr.fxstate; 3579 fxs = &fpr.fxstate;
3197#else 3580#else
3198 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_XMM); 3581 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_XMM);
3199#endif 3582#endif
3200 DPRINTF("Call GETFPREGS for the child process\n"); 3583 DPRINTF("Call GETFPREGS for the child process\n");
3201 SYSCALL_REQUIRE(ptrace(PT_GETFPREGS, child, &fpr, 0) 3584 SYSCALL_REQUIRE(ptrace(PT_GETFPREGS, child, &fpr, 0)
3202 != -1); 3585 != -1);
3203 break; 3586 break;
3204 case TEST_XSTATE: 3587 case TEST_XSTATE:
3205 ATF_REQUIRE(regs >= FPREGS_FPU); 3588 ATF_REQUIRE(regs >= FPREGS_FPU);
3206 iov.iov_base = &xst; 3589 iov.iov_base = &xst;
3207 iov.iov_len = sizeof(xst); 3590 iov.iov_len = sizeof(xst);
3208 3591
3209 DPRINTF("Call GETXSTATE for the child process\n"); 3592 DPRINTF("Call GETXSTATE for the child process\n");
3210 SYSCALL_REQUIRE(ptrace(PT_GETXSTATE, child, &iov, 0) 3593 SYSCALL_REQUIRE(ptrace(PT_GETXSTATE, child, &iov, 0)
3211 != -1); 3594 != -1);
3212 3595
3213 ATF_REQUIRE((xst.xs_rfbm & xst_flags) == xst_flags); 3596 ATF_REQUIRE((xst.xs_rfbm & xst_flags) == xst_flags);
3214 switch (regmode) { 3597 switch (regmode) {
3215 case TEST_SETREGS: 3598 case TEST_SETREGS:
3216 xst.xs_rfbm = xst_flags; 3599 xst.xs_rfbm = xst_flags;
3217 xst.xs_xstate_bv = xst_flags; 3600 xst.xs_xstate_bv = xst_flags;
3218 break; 3601 break;
3219 case TEST_GETREGS: 3602 case TEST_GETREGS:
3220 ATF_REQUIRE((xst.xs_xstate_bv & xst_flags) 3603 ATF_REQUIRE((xst.xs_xstate_bv & xst_flags)
3221 == xst_flags); 3604 == xst_flags);
3222 break; 3605 break;
3223 case TEST_COREDUMP: 3606 case TEST_COREDUMP:
3224 __unreachable(); 3607 __unreachable();
3225 break; 3608 break;
3226 } 3609 }
3227 3610
3228 fxs = &xst.xs_fxsave; 3611 fxs = &xst.xs_fxsave;
3229 break; 3612 break;
3230 } 3613 }
3231 break; 3614 break;
3232 case TEST_COREDUMP: 3615 case TEST_COREDUMP:
3233 SYSCALL_REQUIRE((core_fd = mkstemp(core_path)) != -1); 3616 SYSCALL_REQUIRE((core_fd = mkstemp(core_path)) != -1);
3234 close(core_fd); 3617 close(core_fd);
3235 3618
3236 DPRINTF("Call DUMPCORE for the child process\n"); 3619 DPRINTF("Call DUMPCORE for the child process\n");
3237 SYSCALL_REQUIRE(ptrace(PT_DUMPCORE, child, core_path, 3620 SYSCALL_REQUIRE(ptrace(PT_DUMPCORE, child, core_path,
3238 strlen(core_path)) != -1); 3621 strlen(core_path)) != -1);
3239 3622
3240 if (regset == TEST_GPREGS || regs == FPREGS_FPU) { 3623 if (regset == TEST_GPREGS || regs == FPREGS_FPU) {
3241 DPRINTF("Parse core file for PT_GETREGS\n"); 3624 DPRINTF("Parse core file for PT_GETREGS\n");
3242 ATF_REQUIRE_EQ(core_find_note(core_path, 3625 ATF_REQUIRE_EQ(core_find_note(core_path,
3243 "NetBSD-CORE@*", PT_GETREGS, &gpr, sizeof(gpr)), 3626 "NetBSD-CORE@*", PT_GETREGS, &gpr, sizeof(gpr)),
3244 sizeof(gpr)); 3627 sizeof(gpr));
3245 } 3628 }
3246 3629
3247 switch (regset) { 3630 switch (regset) {
3248 case TEST_GPREGS: 3631 case TEST_GPREGS:
3249 /* handled above */ 3632 /* handled above */
3250 break; 3633 break;
3251 case TEST_XMMREGS: 3634 case TEST_XMMREGS:
3252#if defined(__i386__) 3635#if defined(__i386__)
3253 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM); 3636 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM);
3254 unlink(core_path); 3637 unlink(core_path);
3255 atf_tc_skip("XMMREGS not supported in core dumps"); 3638 atf_tc_skip("XMMREGS not supported in core dumps");
3256 break; 3639 break;
3257#else 3640#else
3258 /*FALLTHROUGH*/ 3641 /*FALLTHROUGH*/
3259#endif 3642#endif
3260 case TEST_FPREGS: 3643 case TEST_FPREGS:
3261#if defined(__x86_64__) 3644#if defined(__x86_64__)
3262 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM); 3645 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_YMM);
3263 fxs = &fpr.fxstate; 3646 fxs = &fpr.fxstate;
3264#else 3647#else
3265 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_XMM); 3648 ATF_REQUIRE(regs >= FPREGS_FPU && regs < FPREGS_XMM);
3266#endif 3649#endif
3267 DPRINTF("Parse core file for PT_GETFPREGS\n"); 3650 DPRINTF("Parse core file for PT_GETFPREGS\n");
3268 ATF_REQUIRE_EQ(core_find_note(core_path, 3651 ATF_REQUIRE_EQ(core_find_note(core_path,
3269 "NetBSD-CORE@*", PT_GETFPREGS, &fpr, sizeof(fpr)), 3652 "NetBSD-CORE@*", PT_GETFPREGS, &fpr, sizeof(fpr)),
3270 sizeof(fpr)); 3653 sizeof(fpr));
3271 break; 3654 break;
3272 case TEST_XSTATE: 3655 case TEST_XSTATE:
3273 ATF_REQUIRE(regs >= FPREGS_FPU); 3656 ATF_REQUIRE(regs >= FPREGS_FPU);
3274 DPRINTF("Parse core file for PT_GETXSTATE\n"); 3657 DPRINTF("Parse core file for PT_GETXSTATE\n");
3275 ATF_REQUIRE_EQ(core_find_note(core_path, 3658 ATF_REQUIRE_EQ(core_find_note(core_path,
3276 "NetBSD-CORE@*", PT_GETXSTATE, &xst, sizeof(xst)), 3659 "NetBSD-CORE@*", PT_GETXSTATE, &xst, sizeof(xst)),
3277 sizeof(xst)); 3660 sizeof(xst));
3278 ATF_REQUIRE((xst.xs_xstate_bv & xst_flags) 3661 ATF_REQUIRE((xst.xs_xstate_bv & xst_flags)
3279 == xst_flags); 3662 == xst_flags);
3280 fxs = &xst.xs_fxsave; 3663 fxs = &xst.xs_fxsave;
3281 break; 3664 break;
3282 } 3665 }
3283 unlink(core_path); 3666 unlink(core_path);
3284 } 3667 }
3285 3668
3286#if defined(__x86_64__) 3669#if defined(__x86_64__)
3287#define ST_EXP(n) fxs->fx_87_ac[n].r.f87_exp_sign 3670#define ST_EXP(n) fxs->fx_87_ac[n].r.f87_exp_sign
3288#define ST_MAN(n) fxs->fx_87_ac[n].r.f87_mantissa 3671#define ST_MAN(n) fxs->fx_87_ac[n].r.f87_mantissa
3289#else 3672#else
3290#define ST_EXP(n) *( \ 3673#define ST_EXP(n) *( \
3291 regset == TEST_FPREGS \ 3674 regset == TEST_FPREGS \
3292 ? &fpr.fstate.s87_ac[n].f87_exp_sign \ 3675 ? &fpr.fstate.s87_ac[n].f87_exp_sign \
3293 : &fxs->fx_87_ac[n].r.f87_exp_sign \ 3676 : &fxs->fx_87_ac[n].r.f87_exp_sign \
3294 ) 3677 )
3295#define ST_MAN(n) *( \ 3678#define ST_MAN(n) *( \
3296 regset == TEST_FPREGS \ 3679 regset == TEST_FPREGS \
3297 ? &fpr.fstate.s87_ac[n].f87_mantissa \ 3680 ? &fpr.fstate.s87_ac[n].f87_mantissa \
3298 : &fxs->fx_87_ac[n].r.f87_mantissa \ 3681 : &fxs->fx_87_ac[n].r.f87_mantissa \
3299 ) 3682 )
3300#endif 3683#endif
3301 3684
3302 switch (regmode) { 3685 switch (regmode) {
3303 case TEST_GETREGS: 3686 case TEST_GETREGS:
3304 case TEST_COREDUMP: 3687 case TEST_COREDUMP:
3305 switch (regs) { 3688 switch (regs) {
3306 case GPREGS_32: 3689 case GPREGS_32:
3307#if defined(__i386__) 3690#if defined(__i386__)
3308 ATF_CHECK_EQ((uint32_t)gpr.r_eax, expected[0].u32); 3691 ATF_CHECK_EQ((uint32_t)gpr.r_eax, expected[0].u32);
3309 ATF_CHECK_EQ((uint32_t)gpr.r_ebx, expected[1].u32); 3692 ATF_CHECK_EQ((uint32_t)gpr.r_ebx, expected[1].u32);
3310 ATF_CHECK_EQ((uint32_t)gpr.r_ecx, expected[2].u32); 3693 ATF_CHECK_EQ((uint32_t)gpr.r_ecx, expected[2].u32);
3311 ATF_CHECK_EQ((uint32_t)gpr.r_edx, expected[3].u32); 3694 ATF_CHECK_EQ((uint32_t)gpr.r_edx, expected[3].u32);
3312 ATF_CHECK_EQ((uint32_t)gpr.r_esi, expected[4].u32); 3695 ATF_CHECK_EQ((uint32_t)gpr.r_esi, expected[4].u32);
3313 ATF_CHECK_EQ((uint32_t)gpr.r_edi, expected[5].u32); 3696 ATF_CHECK_EQ((uint32_t)gpr.r_edi, expected[5].u32);
3314#endif 3697#endif
3315 break; 3698 break;
3316 case GPREGS_32_EBP_ESP: 3699 case GPREGS_32_EBP_ESP:
3317#if defined(__i386__) 3700#if defined(__i386__)
3318 ATF_CHECK_EQ((uint32_t)gpr.r_esp, expected[0].u32); 3701 ATF_CHECK_EQ((uint32_t)gpr.r_esp, expected[0].u32);
3319 ATF_CHECK_EQ((uint32_t)gpr.r_ebp, expected[1].u32); 3702 ATF_CHECK_EQ((uint32_t)gpr.r_ebp, expected[1].u32);
3320#endif 3703#endif
3321 break; 3704 break;
3322 case GPREGS_64: 3705 case GPREGS_64:
3323#if defined(__x86_64__) 3706#if defined(__x86_64__)
3324 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RAX], 3707 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RAX],
3325 expected[0].u64); 3708 expected[0].u64);
3326 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RBX], 3709 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RBX],
3327 expected[1].u64); 3710 expected[1].u64);
3328 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RCX], 3711 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RCX],
3329 expected[2].u64); 3712 expected[2].u64);
3330 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RDX], 3713 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RDX],
3331 expected[3].u64); 3714 expected[3].u64);
3332 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RSI], 3715 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RSI],
3333 expected[4].u64); 3716 expected[4].u64);
3334 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RDI], 3717 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RDI],
3335 expected[5].u64); 3718 expected[5].u64);
3336 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RSP], 3719 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RSP],
3337 expected[6].u64); 3720 expected[6].u64);
3338 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RBP], 3721 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_RBP],
3339 expected[7].u64); 3722 expected[7].u64);
3340#endif 3723#endif
3341 break; 3724 break;
3342 case GPREGS_64_R8: 3725 case GPREGS_64_R8:
3343#if defined(__x86_64__) 3726#if defined(__x86_64__)
3344 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R8], 3727 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R8],
3345 expected[0].u64); 3728 expected[0].u64);
3346 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R9], 3729 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R9],
3347 expected[1].u64); 3730 expected[1].u64);
3348 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R10], 3731 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R10],
3349 expected[2].u64); 3732 expected[2].u64);
3350 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R11], 3733 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R11],
3351 expected[3].u64); 3734 expected[3].u64);
3352 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R12], 3735 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R12],
3353 expected[4].u64); 3736 expected[4].u64);
3354 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R13], 3737 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R13],
3355 expected[5].u64); 3738 expected[5].u64);
3356 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R14], 3739 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R14],
3357 expected[6].u64); 3740 expected[6].u64);
3358 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R15], 3741 ATF_CHECK_EQ((uint64_t)gpr.regs[_REG_R15],
3359 expected[7].u64); 3742 expected[7].u64);
3360#endif 3743#endif
3361 break; 3744 break;
3362 case FPREGS_FPU: 3745 case FPREGS_FPU:
3363#if defined(__i386__) 3746#if defined(__i386__)
3364 if (regset == TEST_FPREGS) { 3747 if (regset == TEST_FPREGS) {
3365 /* GETFPREGS on i386 */ 3748 /* GETFPREGS on i386 */
3366 ATF_CHECK_EQ(fpr.fstate.s87_cw, 3749 ATF_CHECK_EQ(fpr.fstate.s87_cw,
3367 expected_fpu.cw); 3750 expected_fpu.cw);
3368 ATF_CHECK_EQ(fpr.fstate.s87_sw, 3751 ATF_CHECK_EQ(fpr.fstate.s87_sw,
3369 expected_fpu.sw); 3752 expected_fpu.sw);
3370 ATF_CHECK_EQ(fpr.fstate.s87_tw, 3753 ATF_CHECK_EQ(fpr.fstate.s87_tw,
3371 expected_fpu.tw); 3754 expected_fpu.tw);
3372 ATF_CHECK_EQ(fpr.fstate.s87_opcode, 3755 ATF_CHECK_EQ(fpr.fstate.s87_opcode,
3373 expected_fpu.opcode); 3756 expected_fpu.opcode);
3374 ATF_CHECK_EQ(fpr.fstate.s87_ip.fa_32.fa_off, 3757 ATF_CHECK_EQ(fpr.fstate.s87_ip.fa_32.fa_off,
3375 (uint32_t)gpr.r_eip - 3); 3758 (uint32_t)gpr.r_eip - 3);
3376 ATF_CHECK_EQ(fpr.fstate.s87_dp.fa_32.fa_off, 3759 ATF_CHECK_EQ(fpr.fstate.s87_dp.fa_32.fa_off,
3377 (uint32_t)&x86_test_zero); 3760 (uint32_t)&x86_test_zero);
3378 /* note: fa_seg is missing on newer CPUs */ 3761 /* note: fa_seg is missing on newer CPUs */
3379 } else 3762 } else
3380#endif 3763#endif
3381 { 3764 {
3382 /* amd64 or GETXSTATE on i386 */ 3765 /* amd64 or GETXSTATE on i386 */
3383 ATF_CHECK_EQ(fxs->fx_cw, expected_fpu.cw); 3766 ATF_CHECK_EQ(fxs->fx_cw, expected_fpu.cw);
3384 ATF_CHECK_EQ(fxs->fx_sw, expected_fpu.sw); 3767 ATF_CHECK_EQ(fxs->fx_sw, expected_fpu.sw);
3385 ATF_CHECK_EQ(fxs->fx_tw, 3768 ATF_CHECK_EQ(fxs->fx_tw,
3386 expected_fpu.tw_abridged); 3769 expected_fpu.tw_abridged);
3387 ATF_CHECK_EQ(fxs->fx_opcode, 3770 ATF_CHECK_EQ(fxs->fx_opcode,
3388 expected_fpu.opcode); 3771 expected_fpu.opcode);
3389#if defined(__x86_64__) 3772#if defined(__x86_64__)
3390 ATF_CHECK_EQ(fxs->fx_ip.fa_64, 3773 ATF_CHECK_EQ(fxs->fx_ip.fa_64,
3391 ((uint64_t)gpr.regs[_REG_RIP]) - 3); 3774 ((uint64_t)gpr.regs[_REG_RIP]) - 3);
3392 ATF_CHECK_EQ(fxs->fx_dp.fa_64, 3775 ATF_CHECK_EQ(fxs->fx_dp.fa_64,
3393 (uint64_t)&x86_test_zero); 3776 (uint64_t)&x86_test_zero);
3394#else 3777#else
3395 ATF_CHECK_EQ(fxs->fx_ip.fa_32.fa_off, 3778 ATF_CHECK_EQ(fxs->fx_ip.fa_32.fa_off,
3396 (uint32_t)gpr.r_eip - 3); 3779 (uint32_t)gpr.r_eip - 3);
3397 ATF_CHECK_EQ(fxs->fx_dp.fa_32.fa_off, 3780 ATF_CHECK_EQ(fxs->fx_dp.fa_32.fa_off,
3398 (uint32_t)&x86_test_zero); 3781 (uint32_t)&x86_test_zero);
3399 /* note: fa_seg is missing on newer CPUs */ 3782 /* note: fa_seg is missing on newer CPUs */
3400#endif 3783#endif
3401 } 3784 }
3402 3785
3403 ATF_CHECK_EQ(ST_EXP(0), expected_fpu.st[0].sign_exp); 3786 ATF_CHECK_EQ(ST_EXP(0), expected_fpu.st[0].sign_exp);
3404 ATF_CHECK_EQ(ST_MAN(0), expected_fpu.st[0].mantissa); 3787 ATF_CHECK_EQ(ST_MAN(0), expected_fpu.st[0].mantissa);
3405 ATF_CHECK_EQ(ST_EXP(1), expected_fpu.st[1].sign_exp); 3788 ATF_CHECK_EQ(ST_EXP(1), expected_fpu.st[1].sign_exp);
3406 ATF_CHECK_EQ(ST_MAN(1), expected_fpu.st[1].mantissa); 3789 ATF_CHECK_EQ(ST_MAN(1), expected_fpu.st[1].mantissa);
3407 ATF_CHECK_EQ(ST_EXP(2), expected_fpu.st[2].sign_exp); 3790 ATF_CHECK_EQ(ST_EXP(2), expected_fpu.st[2].sign_exp);
3408 ATF_CHECK_EQ(ST_MAN(2), expected_fpu.st[2].mantissa); 3791 ATF_CHECK_EQ(ST_MAN(2), expected_fpu.st[2].mantissa);
3409 ATF_CHECK_EQ(ST_EXP(3), expected_fpu.st[3].sign_exp); 3792 ATF_CHECK_EQ(ST_EXP(3), expected_fpu.st[3].sign_exp);
3410 ATF_CHECK_EQ(ST_MAN(3), expected_fpu.st[3].mantissa); 3793 ATF_CHECK_EQ(ST_MAN(3), expected_fpu.st[3].mantissa);
3411 ATF_CHECK_EQ(ST_EXP(4), expected_fpu.st[4].sign_exp); 3794 ATF_CHECK_EQ(ST_EXP(4), expected_fpu.st[4].sign_exp);
3412 ATF_CHECK_EQ(ST_MAN(4), expected_fpu.st[4].mantissa); 3795 ATF_CHECK_EQ(ST_MAN(4), expected_fpu.st[4].mantissa);
3413 ATF_CHECK_EQ(ST_EXP(5), expected_fpu.st[5].sign_exp); 3796 ATF_CHECK_EQ(ST_EXP(5), expected_fpu.st[5].sign_exp);
3414 ATF_CHECK_EQ(ST_MAN(5), expected_fpu.st[5].mantissa); 3797 ATF_CHECK_EQ(ST_MAN(5), expected_fpu.st[5].mantissa);
3415 ATF_CHECK_EQ(ST_EXP(6), expected_fpu.st[6].sign_exp); 3798 ATF_CHECK_EQ(ST_EXP(6), expected_fpu.st[6].sign_exp);
3416 ATF_CHECK_EQ(ST_MAN(6), expected_fpu.st[6].mantissa); 3799 ATF_CHECK_EQ(ST_MAN(6), expected_fpu.st[6].mantissa);
3417 ATF_CHECK_EQ(ST_EXP(7), expected_fpu.st[7].sign_exp); 3800 ATF_CHECK_EQ(ST_EXP(7), expected_fpu.st[7].sign_exp);
3418 ATF_CHECK_EQ(ST_MAN(7), expected_fpu.st[7].mantissa); 3801 ATF_CHECK_EQ(ST_MAN(7), expected_fpu.st[7].mantissa);
3419 break; 3802 break;
3420 case FPREGS_MM: 3803 case FPREGS_MM:
3421 ATF_CHECK_EQ(ST_MAN(0), expected[0].u64); 3804 ATF_CHECK_EQ(ST_MAN(0), expected[0].u64);
3422 ATF_CHECK_EQ(ST_MAN(1), expected[1].u64); 3805 ATF_CHECK_EQ(ST_MAN(1), expected[1].u64);
3423 ATF_CHECK_EQ(ST_MAN(2), expected[2].u64); 3806 ATF_CHECK_EQ(ST_MAN(2), expected[2].u64);
3424 ATF_CHECK_EQ(ST_MAN(3), expected[3].u64); 3807 ATF_CHECK_EQ(ST_MAN(3), expected[3].u64);
3425 ATF_CHECK_EQ(ST_MAN(4), expected[4].u64); 3808 ATF_CHECK_EQ(ST_MAN(4), expected[4].u64);
3426 ATF_CHECK_EQ(ST_MAN(5), expected[5].u64); 3809 ATF_CHECK_EQ(ST_MAN(5), expected[5].u64);
3427 ATF_CHECK_EQ(ST_MAN(6), expected[6].u64); 3810 ATF_CHECK_EQ(ST_MAN(6), expected[6].u64);
3428 ATF_CHECK_EQ(ST_MAN(7), expected[7].u64); 3811 ATF_CHECK_EQ(ST_MAN(7), expected[7].u64);
3429 break; 3812 break;
 3813 case FPREGS_ZMM:
 3814 /* zmm0..zmm15 are split between xmm, ymm_hi128 and zmm_hi256 */
 3815 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[0],
 3816 &expected[0].zmm.e, sizeof(expected->zmm)/2));
 3817 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[1],
 3818 &expected[1].zmm.e, sizeof(expected->zmm)/2));
 3819 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[2],
 3820 &expected[2].zmm.e, sizeof(expected->zmm)/2));
 3821 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[3],
 3822 &expected[3].zmm.e, sizeof(expected->zmm)/2));
 3823 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[4],
 3824 &expected[4].zmm.e, sizeof(expected->zmm)/2));
 3825 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[5],
 3826 &expected[5].zmm.e, sizeof(expected->zmm)/2));
 3827 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[6],
 3828 &expected[6].zmm.e, sizeof(expected->zmm)/2));
 3829 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[7],
 3830 &expected[7].zmm.e, sizeof(expected->zmm)/2));
 3831#if defined(__x86_64__)
 3832 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[8],
 3833 &expected[8].zmm.e, sizeof(expected->zmm)/2));
 3834 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[9],
 3835 &expected[9].zmm.e, sizeof(expected->zmm)/2));
 3836 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[10],
 3837 &expected[10].zmm.e, sizeof(expected->zmm)/2));
 3838 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[11],
 3839 &expected[11].zmm.e, sizeof(expected->zmm)/2));
 3840 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[12],
 3841 &expected[12].zmm.e, sizeof(expected->zmm)/2));
 3842 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[13],
 3843 &expected[13].zmm.e, sizeof(expected->zmm)/2));
 3844 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[14],
 3845 &expected[14].zmm.e, sizeof(expected->zmm)/2));
 3846 ATF_CHECK(!memcmp(&xst.xs_zmm_hi256.xs_zmm[15],
 3847 &expected[15].zmm.e, sizeof(expected->zmm)/2));
 3848 /* zmm16..zmm31 are stored as a whole */
 3849 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[0],
 3850 &expected[16].zmm, sizeof(expected->zmm)));
 3851 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[1],
 3852 &expected[17].zmm, sizeof(expected->zmm)));
 3853 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[2],
 3854 &expected[18].zmm, sizeof(expected->zmm)));
 3855 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[3],
 3856 &expected[19].zmm, sizeof(expected->zmm)));
 3857 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[4],
 3858 &expected[20].zmm, sizeof(expected->zmm)));
 3859 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[5],
 3860 &expected[21].zmm, sizeof(expected->zmm)));
 3861 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[6],
 3862 &expected[22].zmm, sizeof(expected->zmm)));
 3863 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[7],
 3864 &expected[23].zmm, sizeof(expected->zmm)));
 3865 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[8],
 3866 &expected[24].zmm, sizeof(expected->zmm)));
 3867 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[9],
 3868 &expected[25].zmm, sizeof(expected->zmm)));
 3869 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[10],
 3870 &expected[26].zmm, sizeof(expected->zmm)));
 3871 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[11],
 3872 &expected[27].zmm, sizeof(expected->zmm)));
 3873 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[12],
 3874 &expected[28].zmm, sizeof(expected->zmm)));
 3875 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[13],
 3876 &expected[29].zmm, sizeof(expected->zmm)));
 3877 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[14],
 3878 &expected[30].zmm, sizeof(expected->zmm)));
 3879 ATF_CHECK(!memcmp(&xst.xs_hi16_zmm.xs_hi16_zmm[15],
 3880 &expected[31].zmm, sizeof(expected->zmm)));
 3881#endif
 3882 /* k0..k7 */
 3883 ATF_CHECK(xst.xs_opmask.xs_k[0] == expected[32].zmm.a);
 3884 ATF_CHECK(xst.xs_opmask.xs_k[1] == expected[32].zmm.b);
 3885 ATF_CHECK(xst.xs_opmask.xs_k[2] == expected[32].zmm.c);
 3886 ATF_CHECK(xst.xs_opmask.xs_k[3] == expected[32].zmm.d);
 3887 ATF_CHECK(xst.xs_opmask.xs_k[4] == expected[32].zmm.e);
 3888 ATF_CHECK(xst.xs_opmask.xs_k[5] == expected[32].zmm.f);
 3889 ATF_CHECK(xst.xs_opmask.xs_k[6] == expected[32].zmm.g);
 3890 ATF_CHECK(xst.xs_opmask.xs_k[7] == expected[32].zmm.h);
 3891 /*FALLTHROUGH*/
3430 case FPREGS_YMM: 3892 case FPREGS_YMM:
3431 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[0], 3893 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[0],
3432 &expected[0].ymm.c, sizeof(expected->ymm)/2)); 3894 &expected[0].ymm.c, sizeof(expected->ymm)/2));
3433 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[1], 3895 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[1],
3434 &expected[1].ymm.c, sizeof(expected->ymm)/2)); 3896 &expected[1].ymm.c, sizeof(expected->ymm)/2));
3435 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[2], 3897 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[2],
3436 &expected[2].ymm.c, sizeof(expected->ymm)/2)); 3898 &expected[2].ymm.c, sizeof(expected->ymm)/2));
3437 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[3], 3899 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[3],
3438 &expected[3].ymm.c, sizeof(expected->ymm)/2)); 3900 &expected[3].ymm.c, sizeof(expected->ymm)/2));
3439 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[4], 3901 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[4],
3440 &expected[4].ymm.c, sizeof(expected->ymm)/2)); 3902 &expected[4].ymm.c, sizeof(expected->ymm)/2));
3441 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[5], 3903 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[5],
3442 &expected[5].ymm.c, sizeof(expected->ymm)/2)); 3904 &expected[5].ymm.c, sizeof(expected->ymm)/2));
3443 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[6], 3905 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[6],
3444 &expected[6].ymm.c, sizeof(expected->ymm)/2)); 3906 &expected[6].ymm.c, sizeof(expected->ymm)/2));
3445 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[7], 3907 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[7],
3446 &expected[7].ymm.c, sizeof(expected->ymm)/2)); 3908 &expected[7].ymm.c, sizeof(expected->ymm)/2));
3447#if defined(__x86_64__) 3909#if defined(__x86_64__)
3448 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[8], 3910 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[8],
3449 &expected[8].ymm.c, sizeof(expected->ymm)/2)); 3911 &expected[8].ymm.c, sizeof(expected->ymm)/2));
3450 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[9], 3912 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[9],
3451 &expected[9].ymm.c, sizeof(expected->ymm)/2)); 3913 &expected[9].ymm.c, sizeof(expected->ymm)/2));
3452 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[10], 3914 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[10],
3453 &expected[10].ymm.c, sizeof(expected->ymm)/2)); 3915 &expected[10].ymm.c, sizeof(expected->ymm)/2));
3454 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[11], 3916 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[11],
3455 &expected[11].ymm.c, sizeof(expected->ymm)/2)); 3917 &expected[11].ymm.c, sizeof(expected->ymm)/2));
3456 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[12], 3918 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[12],
3457 &expected[12].ymm.c, sizeof(expected->ymm)/2)); 3919 &expected[12].ymm.c, sizeof(expected->ymm)/2));
3458 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[13], 3920 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[13],
3459 &expected[13].ymm.c, sizeof(expected->ymm)/2)); 3921 &expected[13].ymm.c, sizeof(expected->ymm)/2));
3460 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[14], 3922 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[14],
3461 &expected[14].ymm.c, sizeof(expected->ymm)/2)); 3923 &expected[14].ymm.c, sizeof(expected->ymm)/2));
3462 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[15], 3924 ATF_CHECK(!memcmp(&xst.xs_ymm_hi128.xs_ymm[15],
3463 &expected[15].ymm.c, sizeof(expected->ymm)/2)); 3925 &expected[15].ymm.c, sizeof(expected->ymm)/2));
3464#endif 3926#endif
3465 /*FALLTHROUGH*/ 3927 /*FALLTHROUGH*/
3466 case FPREGS_XMM: 3928 case FPREGS_XMM:
3467 ATF_CHECK(!memcmp(&fxs->fx_xmm[0], &expected[0].ymm.a, 3929 ATF_CHECK(!memcmp(&fxs->fx_xmm[0], &expected[0].ymm.a,
3468 sizeof(expected->ymm)/2)); 3930 sizeof(expected->ymm)/2));
3469 ATF_CHECK(!memcmp(&fxs->fx_xmm[1], &expected[1].ymm.a, 3931 ATF_CHECK(!memcmp(&fxs->fx_xmm[1], &expected[1].ymm.a,
3470 sizeof(expected->ymm)/2)); 3932 sizeof(expected->ymm)/2));
3471 ATF_CHECK(!memcmp(&fxs->fx_xmm[2], &expected[2].ymm.a, 3933 ATF_CHECK(!memcmp(&fxs->fx_xmm[2], &expected[2].ymm.a,
3472 sizeof(expected->ymm)/2)); 3934 sizeof(expected->ymm)/2));
3473 ATF_CHECK(!memcmp(&fxs->fx_xmm[3], &expected[3].ymm.a, 3935 ATF_CHECK(!memcmp(&fxs->fx_xmm[3], &expected[3].ymm.a,
3474 sizeof(expected->ymm)/2)); 3936 sizeof(expected->ymm)/2));
3475 ATF_CHECK(!memcmp(&fxs->fx_xmm[4], &expected[4].ymm.a, 3937 ATF_CHECK(!memcmp(&fxs->fx_xmm[4], &expected[4].ymm.a,
3476 sizeof(expected->ymm)/2)); 3938 sizeof(expected->ymm)/2));
3477 ATF_CHECK(!memcmp(&fxs->fx_xmm[5], &expected[5].ymm.a, 3939 ATF_CHECK(!memcmp(&fxs->fx_xmm[5], &expected[5].ymm.a,
3478 sizeof(expected->ymm)/2)); 3940 sizeof(expected->ymm)/2));
3479 ATF_CHECK(!memcmp(&fxs->fx_xmm[6], &expected[6].ymm.a, 3941 ATF_CHECK(!memcmp(&fxs->fx_xmm[6], &expected[6].ymm.a,
3480 sizeof(expected->ymm)/2)); 3942 sizeof(expected->ymm)/2));
3481 ATF_CHECK(!memcmp(&fxs->fx_xmm[7], &expected[7].ymm.a, 3943 ATF_CHECK(!memcmp(&fxs->fx_xmm[7], &expected[7].ymm.a,
3482 sizeof(expected->ymm)/2)); 3944 sizeof(expected->ymm)/2));
3483#if defined(__x86_64__) 3945#if defined(__x86_64__)
3484 ATF_CHECK(!memcmp(&fxs->fx_xmm[8], &expected[8].ymm.a, 3946 ATF_CHECK(!memcmp(&fxs->fx_xmm[8], &expected[8].ymm.a,
3485 sizeof(expected->ymm)/2)); 3947 sizeof(expected->ymm)/2));
3486 ATF_CHECK(!memcmp(&fxs->fx_xmm[9], &expected[9].ymm.a, 3948 ATF_CHECK(!memcmp(&fxs->fx_xmm[9], &expected[9].ymm.a,
3487 sizeof(expected->ymm)/2)); 3949 sizeof(expected->ymm)/2));
3488 ATF_CHECK(!memcmp(&fxs->fx_xmm[10], &expected[10].ymm.a, 3950 ATF_CHECK(!memcmp(&fxs->fx_xmm[10], &expected[10].ymm.a,
3489 sizeof(expected->ymm)/2)); 3951 sizeof(expected->ymm)/2));
3490 ATF_CHECK(!memcmp(&fxs->fx_xmm[11], &expected[11].ymm.a, 3952 ATF_CHECK(!memcmp(&fxs->fx_xmm[11], &expected[11].ymm.a,
3491 sizeof(expected->ymm)/2)); 3953 sizeof(expected->ymm)/2));
3492 ATF_CHECK(!memcmp(&fxs->fx_xmm[12], &expected[12].ymm.a, 3954 ATF_CHECK(!memcmp(&fxs->fx_xmm[12], &expected[12].ymm.a,
3493 sizeof(expected->ymm)/2)); 3955 sizeof(expected->ymm)/2));
3494 ATF_CHECK(!memcmp(&fxs->fx_xmm[13], &expected[13].ymm.a, 3956 ATF_CHECK(!memcmp(&fxs->fx_xmm[13], &expected[13].ymm.a,
3495 sizeof(expected->ymm)/2)); 3957 sizeof(expected->ymm)/2));
3496 ATF_CHECK(!memcmp(&fxs->fx_xmm[14], &expected[14].ymm.a, 3958 ATF_CHECK(!memcmp(&fxs->fx_xmm[14], &expected[14].ymm.a,
3497 sizeof(expected->ymm)/2)); 3959 sizeof(expected->ymm)/2));
3498 ATF_CHECK(!memcmp(&fxs->fx_xmm[15], &expected[15].ymm.a, 3960 ATF_CHECK(!memcmp(&fxs->fx_xmm[15], &expected[15].ymm.a,
3499 sizeof(expected->ymm)/2)); 3961 sizeof(expected->ymm)/2));
3500#endif 3962#endif
3501 break; 3963 break;
3502 } 3964 }
3503 break; 3965 break;
3504 case TEST_SETREGS: 3966 case TEST_SETREGS:
3505 switch (regs) { 3967 switch (regs) {
3506 case GPREGS_32: 3968 case GPREGS_32:
3507#if defined(__i386__) 3969#if defined(__i386__)
3508 gpr.r_eax = expected[0].u32; 3970 gpr.r_eax = expected[0].u32;
3509 gpr.r_ebx = expected[1].u32; 3971 gpr.r_ebx = expected[1].u32;
3510 gpr.r_ecx = expected[2].u32; 3972 gpr.r_ecx = expected[2].u32;
3511 gpr.r_edx = expected[3].u32; 3973 gpr.r_edx = expected[3].u32;
3512 gpr.r_esi = expected[4].u32; 3974 gpr.r_esi = expected[4].u32;
3513 gpr.r_edi = expected[5].u32; 3975 gpr.r_edi = expected[5].u32;
3514#endif 3976#endif
3515 break; 3977 break;
3516 case GPREGS_32_EBP_ESP: 3978 case GPREGS_32_EBP_ESP:
3517#if defined(__i386__) 3979#if defined(__i386__)
3518 gpr.r_esp = expected[0].u32; 3980 gpr.r_esp = expected[0].u32;
3519 gpr.r_ebp = expected[1].u32; 3981 gpr.r_ebp = expected[1].u32;
3520#endif 3982#endif
3521 break; 3983 break;
3522 case GPREGS_64: 3984 case GPREGS_64:
3523#if defined(__x86_64__) 3985#if defined(__x86_64__)
3524 gpr.regs[_REG_RAX] = expected[0].u64; 3986 gpr.regs[_REG_RAX] = expected[0].u64;
3525 gpr.regs[_REG_RBX] = expected[1].u64; 3987 gpr.regs[_REG_RBX] = expected[1].u64;
3526 gpr.regs[_REG_RCX] = expected[2].u64; 3988 gpr.regs[_REG_RCX] = expected[2].u64;
3527 gpr.regs[_REG_RDX] = expected[3].u64; 3989 gpr.regs[_REG_RDX] = expected[3].u64;
3528 gpr.regs[_REG_RSI] = expected[4].u64; 3990 gpr.regs[_REG_RSI] = expected[4].u64;
3529 gpr.regs[_REG_RDI] = expected[5].u64; 3991 gpr.regs[_REG_RDI] = expected[5].u64;
3530 gpr.regs[_REG_RSP] = expected[6].u64; 3992 gpr.regs[_REG_RSP] = expected[6].u64;
3531 gpr.regs[_REG_RBP] = expected[7].u64; 3993 gpr.regs[_REG_RBP] = expected[7].u64;
3532#endif 3994#endif
3533 break; 3995 break;
3534 case GPREGS_64_R8: 3996 case GPREGS_64_R8:
3535#if defined(__x86_64__) 3997#if defined(__x86_64__)
3536 gpr.regs[_REG_R8] = expected[0].u64; 3998 gpr.regs[_REG_R8] = expected[0].u64;
3537 gpr.regs[_REG_R9] = expected[1].u64; 3999 gpr.regs[_REG_R9] = expected[1].u64;
3538 gpr.regs[_REG_R10] = expected[2].u64; 4000 gpr.regs[_REG_R10] = expected[2].u64;
3539 gpr.regs[_REG_R11] = expected[3].u64; 4001 gpr.regs[_REG_R11] = expected[3].u64;
3540 gpr.regs[_REG_R12] = expected[4].u64; 4002 gpr.regs[_REG_R12] = expected[4].u64;
3541 gpr.regs[_REG_R13] = expected[5].u64; 4003 gpr.regs[_REG_R13] = expected[5].u64;
3542 gpr.regs[_REG_R14] = expected[6].u64; 4004 gpr.regs[_REG_R14] = expected[6].u64;
3543 gpr.regs[_REG_R15] = expected[7].u64; 4005 gpr.regs[_REG_R15] = expected[7].u64;
3544#endif 4006#endif
3545 break; 4007 break;
3546 case FPREGS_FPU: 4008 case FPREGS_FPU:
3547#if defined(__i386__) 4009#if defined(__i386__)
3548 if (regset == TEST_FPREGS) { 4010 if (regset == TEST_FPREGS) {
3549 /* SETFPREGS on i386 */ 4011 /* SETFPREGS on i386 */
3550 fpr.fstate.s87_cw = expected_fpu.cw; 4012 fpr.fstate.s87_cw = expected_fpu.cw;
3551 fpr.fstate.s87_sw = expected_fpu.sw; 4013 fpr.fstate.s87_sw = expected_fpu.sw;
3552 fpr.fstate.s87_tw = expected_fpu.tw; 4014 fpr.fstate.s87_tw = expected_fpu.tw;
3553 fpr.fstate.s87_opcode = expected_fpu.opcode; 4015 fpr.fstate.s87_opcode = expected_fpu.opcode;
3554 fpr.fstate.s87_ip = expected_fpu.ip; 4016 fpr.fstate.s87_ip = expected_fpu.ip;
3555 fpr.fstate.s87_dp = expected_fpu.dp; 4017 fpr.fstate.s87_dp = expected_fpu.dp;
3556 } else 4018 } else
3557#endif /*defined(__i386__)*/ 4019#endif /*defined(__i386__)*/
3558 { 4020 {
3559 /* amd64 or SETXSTATE on i386 */ 4021 /* amd64 or SETXSTATE on i386 */
3560 fxs->fx_cw = expected_fpu.cw; 4022 fxs->fx_cw = expected_fpu.cw;
3561 fxs->fx_sw = expected_fpu.sw; 4023 fxs->fx_sw = expected_fpu.sw;
3562 fxs->fx_tw = expected_fpu.tw_abridged; 4024 fxs->fx_tw = expected_fpu.tw_abridged;
3563 fxs->fx_opcode = expected_fpu.opcode; 4025 fxs->fx_opcode = expected_fpu.opcode;
3564 fxs->fx_ip = expected_fpu.ip; 4026 fxs->fx_ip = expected_fpu.ip;
3565 fxs->fx_dp = expected_fpu.dp; 4027 fxs->fx_dp = expected_fpu.dp;
3566 } 4028 }
3567 4029
3568 ST_EXP(0) = expected_fpu.st[0].sign_exp; 4030 ST_EXP(0) = expected_fpu.st[0].sign_exp;
3569 ST_MAN(0) = expected_fpu.st[0].mantissa; 4031 ST_MAN(0) = expected_fpu.st[0].mantissa;
3570 ST_EXP(1) = expected_fpu.st[1].sign_exp; 4032 ST_EXP(1) = expected_fpu.st[1].sign_exp;
3571 ST_MAN(1) = expected_fpu.st[1].mantissa; 4033 ST_MAN(1) = expected_fpu.st[1].mantissa;
3572 ST_EXP(2) = expected_fpu.st[2].sign_exp; 4034 ST_EXP(2) = expected_fpu.st[2].sign_exp;
3573 ST_MAN(2) = expected_fpu.st[2].mantissa; 4035 ST_MAN(2) = expected_fpu.st[2].mantissa;
3574 ST_EXP(3) = expected_fpu.st[3].sign_exp; 4036 ST_EXP(3) = expected_fpu.st[3].sign_exp;
3575 ST_MAN(3) = expected_fpu.st[3].mantissa; 4037 ST_MAN(3) = expected_fpu.st[3].mantissa;
3576 ST_EXP(4) = expected_fpu.st[4].sign_exp; 4038 ST_EXP(4) = expected_fpu.st[4].sign_exp;
3577 ST_MAN(4) = expected_fpu.st[4].mantissa; 4039 ST_MAN(4) = expected_fpu.st[4].mantissa;
3578 ST_EXP(5) = expected_fpu.st[5].sign_exp; 4040 ST_EXP(5) = expected_fpu.st[5].sign_exp;
3579 ST_MAN(5) = expected_fpu.st[5].mantissa; 4041 ST_MAN(5) = expected_fpu.st[5].mantissa;
3580 ST_EXP(6) = expected_fpu.st[6].sign_exp; 4042 ST_EXP(6) = expected_fpu.st[6].sign_exp;
3581 ST_MAN(6) = expected_fpu.st[6].mantissa; 4043 ST_MAN(6) = expected_fpu.st[6].mantissa;
3582 ST_EXP(7) = expected_fpu.st[7].sign_exp; 4044 ST_EXP(7) = expected_fpu.st[7].sign_exp;
3583 ST_MAN(7) = expected_fpu.st[7].mantissa; 4045 ST_MAN(7) = expected_fpu.st[7].mantissa;
3584 break; 4046 break;
3585 case FPREGS_MM: 4047 case FPREGS_MM:
3586 ST_MAN(0) = expected[0].u64; 4048 ST_MAN(0) = expected[0].u64;
3587 ST_MAN(1) = expected[1].u64; 4049 ST_MAN(1) = expected[1].u64;
3588 ST_MAN(2) = expected[2].u64; 4050 ST_MAN(2) = expected[2].u64;
3589 ST_MAN(3) = expected[3].u64; 4051 ST_MAN(3) = expected[3].u64;
3590 ST_MAN(4) = expected[4].u64; 4052 ST_MAN(4) = expected[4].u64;
3591 ST_MAN(5) = expected[5].u64; 4053 ST_MAN(5) = expected[5].u64;
3592 ST_MAN(6) = expected[6].u64; 4054 ST_MAN(6) = expected[6].u64;
3593 ST_MAN(7) = expected[7].u64; 4055 ST_MAN(7) = expected[7].u64;
3594 break; 4056 break;
 4057 case FPREGS_ZMM:
 4058 /* zmm0..zmm15 are split between xmm, ymm_hi128, zmm_hi256 */
 4059 memcpy(&xst.xs_zmm_hi256.xs_zmm[0],
 4060 &expected[0].zmm.e, sizeof(expected->zmm)/2);
 4061 memcpy(&xst.xs_zmm_hi256.xs_zmm[1],
 4062 &expected[1].zmm.e, sizeof(expected->zmm)/2);
 4063 memcpy(&xst.xs_zmm_hi256.xs_zmm[2],
 4064 &expected[2].zmm.e, sizeof(expected->zmm)/2);
 4065 memcpy(&xst.xs_zmm_hi256.xs_zmm[3],
 4066 &expected[3].zmm.e, sizeof(expected->zmm)/2);
 4067 memcpy(&xst.xs_zmm_hi256.xs_zmm[4],
 4068 &expected[4].zmm.e, sizeof(expected->zmm)/2);
 4069 memcpy(&xst.xs_zmm_hi256.xs_zmm[5],
 4070 &expected[5].zmm.e, sizeof(expected->zmm)/2);
 4071 memcpy(&xst.xs_zmm_hi256.xs_zmm[6],
 4072 &expected[6].zmm.e, sizeof(expected->zmm)/2);
 4073 memcpy(&xst.xs_zmm_hi256.xs_zmm[7],
 4074 &expected[7].zmm.e, sizeof(expected->zmm)/2);
 4075#if defined(__x86_64__)
 4076 memcpy(&xst.xs_zmm_hi256.xs_zmm[8],
 4077 &expected[8].zmm.e, sizeof(expected->zmm)/2);
 4078 memcpy(&xst.xs_zmm_hi256.xs_zmm[9],
 4079 &expected[9].zmm.e, sizeof(expected->zmm)/2);
 4080 memcpy(&xst.xs_zmm_hi256.xs_zmm[10],
 4081 &expected[10].zmm.e, sizeof(expected->zmm)/2);
 4082 memcpy(&xst.xs_zmm_hi256.xs_zmm[11],
 4083 &expected[11].zmm.e, sizeof(expected->zmm)/2);
 4084 memcpy(&xst.xs_zmm_hi256.xs_zmm[12],
 4085 &expected[12].zmm.e, sizeof(expected->zmm)/2);
 4086 memcpy(&xst.xs_zmm_hi256.xs_zmm[13],
 4087 &expected[13].zmm.e, sizeof(expected->zmm)/2);
 4088 memcpy(&xst.xs_zmm_hi256.xs_zmm[14],
 4089 &expected[14].zmm.e, sizeof(expected->zmm)/2);
 4090 memcpy(&xst.xs_zmm_hi256.xs_zmm[15],
 4091 &expected[15].zmm.e, sizeof(expected->zmm)/2);
 4092 /* zmm16..zmm31 are stored as a whole */
 4093 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[0],
 4094 &expected[16].zmm, sizeof(expected->zmm));
 4095 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[1],
 4096 &expected[17].zmm, sizeof(expected->zmm));
 4097 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[2],
 4098 &expected[18].zmm, sizeof(expected->zmm));
 4099 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[3],
 4100 &expected[19].zmm, sizeof(expected->zmm));
 4101 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[4],
 4102 &expected[20].zmm, sizeof(expected->zmm));
 4103 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[5],
 4104 &expected[21].zmm, sizeof(expected->zmm));
 4105 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[6],
 4106 &expected[22].zmm, sizeof(expected->zmm));
 4107 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[7],
 4108 &expected[23].zmm, sizeof(expected->zmm));
 4109 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[8],
 4110 &expected[24].zmm, sizeof(expected->zmm));
 4111 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[9],
 4112 &expected[25].zmm, sizeof(expected->zmm));
 4113 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[10],
 4114 &expected[26].zmm, sizeof(expected->zmm));
 4115 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[11],
 4116 &expected[27].zmm, sizeof(expected->zmm));
 4117 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[12],
 4118 &expected[28].zmm, sizeof(expected->zmm));
 4119 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[13],
 4120 &expected[29].zmm, sizeof(expected->zmm));
 4121 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[14],
 4122 &expected[30].zmm, sizeof(expected->zmm));
 4123 memcpy(&xst.xs_hi16_zmm.xs_hi16_zmm[15],
 4124 &expected[31].zmm, sizeof(expected->zmm));
 4125#endif
 4126 /* k0..k7 */
 4127 xst.xs_opmask.xs_k[0] = expected[32].zmm.a;
 4128 xst.xs_opmask.xs_k[1] = expected[32].zmm.b;
 4129 xst.xs_opmask.xs_k[2] = expected[32].zmm.c;
 4130 xst.xs_opmask.xs_k[3] = expected[32].zmm.d;
 4131 xst.xs_opmask.xs_k[4] = expected[32].zmm.e;
 4132 xst.xs_opmask.xs_k[5] = expected[32].zmm.f;
 4133 xst.xs_opmask.xs_k[6] = expected[32].zmm.g;
 4134 xst.xs_opmask.xs_k[7] = expected[32].zmm.h;
 4135 /*FALLTHROUGH*/
3595 case FPREGS_YMM: 4136 case FPREGS_YMM:
3596 memcpy(&xst.xs_ymm_hi128.xs_ymm[0], 4137 memcpy(&xst.xs_ymm_hi128.xs_ymm[0],
3597 &expected[0].ymm.c, sizeof(expected->ymm)/2); 4138 &expected[0].ymm.c, sizeof(expected->ymm)/2);
3598 memcpy(&xst.xs_ymm_hi128.xs_ymm[1], 4139 memcpy(&xst.xs_ymm_hi128.xs_ymm[1],
3599 &expected[1].ymm.c, sizeof(expected->ymm)/2); 4140 &expected[1].ymm.c, sizeof(expected->ymm)/2);
3600 memcpy(&xst.xs_ymm_hi128.xs_ymm[2], 4141 memcpy(&xst.xs_ymm_hi128.xs_ymm[2],
3601 &expected[2].ymm.c, sizeof(expected->ymm)/2); 4142 &expected[2].ymm.c, sizeof(expected->ymm)/2);
3602 memcpy(&xst.xs_ymm_hi128.xs_ymm[3], 4143 memcpy(&xst.xs_ymm_hi128.xs_ymm[3],
3603 &expected[3].ymm.c, sizeof(expected->ymm)/2); 4144 &expected[3].ymm.c, sizeof(expected->ymm)/2);
3604 memcpy(&xst.xs_ymm_hi128.xs_ymm[4], 4145 memcpy(&xst.xs_ymm_hi128.xs_ymm[4],
3605 &expected[4].ymm.c, sizeof(expected->ymm)/2); 4146 &expected[4].ymm.c, sizeof(expected->ymm)/2);
3606 memcpy(&xst.xs_ymm_hi128.xs_ymm[5], 4147 memcpy(&xst.xs_ymm_hi128.xs_ymm[5],
3607 &expected[5].ymm.c, sizeof(expected->ymm)/2); 4148 &expected[5].ymm.c, sizeof(expected->ymm)/2);
3608 memcpy(&xst.xs_ymm_hi128.xs_ymm[6], 4149 memcpy(&xst.xs_ymm_hi128.xs_ymm[6],
3609 &expected[6].ymm.c, sizeof(expected->ymm)/2); 4150 &expected[6].ymm.c, sizeof(expected->ymm)/2);
3610 memcpy(&xst.xs_ymm_hi128.xs_ymm[7], 4151 memcpy(&xst.xs_ymm_hi128.xs_ymm[7],
3611 &expected[7].ymm.c, sizeof(expected->ymm)/2); 4152 &expected[7].ymm.c, sizeof(expected->ymm)/2);
3612#if defined(__x86_64__) 4153#if defined(__x86_64__)
3613 memcpy(&xst.xs_ymm_hi128.xs_ymm[8], 4154 memcpy(&xst.xs_ymm_hi128.xs_ymm[8],
3614 &expected[8].ymm.c, sizeof(expected->ymm)/2); 4155 &expected[8].ymm.c, sizeof(expected->ymm)/2);
3615 memcpy(&xst.xs_ymm_hi128.xs_ymm[9], 4156 memcpy(&xst.xs_ymm_hi128.xs_ymm[9],
3616 &expected[9].ymm.c, sizeof(expected->ymm)/2); 4157 &expected[9].ymm.c, sizeof(expected->ymm)/2);
3617 memcpy(&xst.xs_ymm_hi128.xs_ymm[10], 4158 memcpy(&xst.xs_ymm_hi128.xs_ymm[10],
3618 &expected[10].ymm.c, sizeof(expected->ymm)/2); 4159 &expected[10].ymm.c, sizeof(expected->ymm)/2);
3619 memcpy(&xst.xs_ymm_hi128.xs_ymm[11], 4160 memcpy(&xst.xs_ymm_hi128.xs_ymm[11],
3620 &expected[11].ymm.c, sizeof(expected->ymm)/2); 4161 &expected[11].ymm.c, sizeof(expected->ymm)/2);
3621 memcpy(&xst.xs_ymm_hi128.xs_ymm[12], 4162 memcpy(&xst.xs_ymm_hi128.xs_ymm[12],
3622 &expected[12].ymm.c, sizeof(expected->ymm)/2); 4163 &expected[12].ymm.c, sizeof(expected->ymm)/2);
3623 memcpy(&xst.xs_ymm_hi128.xs_ymm[13], 4164 memcpy(&xst.xs_ymm_hi128.xs_ymm[13],
3624 &expected[13].ymm.c, sizeof(expected->ymm)/2); 4165 &expected[13].ymm.c, sizeof(expected->ymm)/2);
3625 memcpy(&xst.xs_ymm_hi128.xs_ymm[14], 4166 memcpy(&xst.xs_ymm_hi128.xs_ymm[14],
3626 &expected[14].ymm.c, sizeof(expected->ymm)/2); 4167 &expected[14].ymm.c, sizeof(expected->ymm)/2);
3627 memcpy(&xst.xs_ymm_hi128.xs_ymm[15], 4168 memcpy(&xst.xs_ymm_hi128.xs_ymm[15],
3628 &expected[15].ymm.c, sizeof(expected->ymm)/2); 4169 &expected[15].ymm.c, sizeof(expected->ymm)/2);
3629#endif 4170#endif
3630 /*FALLTHROUGH*/ 4171 /*FALLTHROUGH*/
3631 case FPREGS_XMM: 4172 case FPREGS_XMM:
3632 memcpy(&fxs->fx_xmm[0], &expected[0].ymm.a, 4173 memcpy(&fxs->fx_xmm[0], &expected[0].ymm.a,
3633 sizeof(expected->ymm)/2); 4174 sizeof(expected->ymm)/2);
3634 memcpy(&fxs->fx_xmm[1], &expected[1].ymm.a, 4175 memcpy(&fxs->fx_xmm[1], &expected[1].ymm.a,
3635 sizeof(expected->ymm)/2); 4176 sizeof(expected->ymm)/2);
3636 memcpy(&fxs->fx_xmm[2], &expected[2].ymm.a, 4177 memcpy(&fxs->fx_xmm[2], &expected[2].ymm.a,
3637 sizeof(expected->ymm)/2); 4178 sizeof(expected->ymm)/2);
3638 memcpy(&fxs->fx_xmm[3], &expected[3].ymm.a, 4179 memcpy(&fxs->fx_xmm[3], &expected[3].ymm.a,
3639 sizeof(expected->ymm)/2); 4180 sizeof(expected->ymm)/2);
3640 memcpy(&fxs->fx_xmm[4], &expected[4].ymm.a, 4181 memcpy(&fxs->fx_xmm[4], &expected[4].ymm.a,
3641 sizeof(expected->ymm)/2); 4182 sizeof(expected->ymm)/2);
3642 memcpy(&fxs->fx_xmm[5], &expected[5].ymm.a, 4183 memcpy(&fxs->fx_xmm[5], &expected[5].ymm.a,
3643 sizeof(expected->ymm)/2); 4184 sizeof(expected->ymm)/2);
3644 memcpy(&fxs->fx_xmm[6], &expected[6].ymm.a, 4185 memcpy(&fxs->fx_xmm[6], &expected[6].ymm.a,
3645 sizeof(expected->ymm)/2); 4186 sizeof(expected->ymm)/2);
3646 memcpy(&fxs->fx_xmm[7], &expected[7].ymm.a, 4187 memcpy(&fxs->fx_xmm[7], &expected[7].ymm.a,
3647 sizeof(expected->ymm)/2); 4188 sizeof(expected->ymm)/2);
3648#if defined(__x86_64__) 4189#if defined(__x86_64__)
3649 memcpy(&fxs->fx_xmm[8], &expected[8].ymm.a, 4190 memcpy(&fxs->fx_xmm[8], &expected[8].ymm.a,
3650 sizeof(expected->ymm)/2); 4191 sizeof(expected->ymm)/2);
3651 memcpy(&fxs->fx_xmm[9], &expected[9].ymm.a, 4192 memcpy(&fxs->fx_xmm[9], &expected[9].ymm.a,
3652 sizeof(expected->ymm)/2); 4193 sizeof(expected->ymm)/2);
3653 memcpy(&fxs->fx_xmm[10], &expected[10].ymm.a, 4194 memcpy(&fxs->fx_xmm[10], &expected[10].ymm.a,
3654 sizeof(expected->ymm)/2); 4195 sizeof(expected->ymm)/2);
3655 memcpy(&fxs->fx_xmm[11], &expected[11].ymm.a, 4196 memcpy(&fxs->fx_xmm[11], &expected[11].ymm.a,
3656 sizeof(expected->ymm)/2); 4197 sizeof(expected->ymm)/2);
3657 memcpy(&fxs->fx_xmm[12], &expected[12].ymm.a, 4198 memcpy(&fxs->fx_xmm[12], &expected[12].ymm.a,
3658 sizeof(expected->ymm)/2); 4199 sizeof(expected->ymm)/2);
3659 memcpy(&fxs->fx_xmm[13], &expected[13].ymm.a, 4200 memcpy(&fxs->fx_xmm[13], &expected[13].ymm.a,
3660 sizeof(expected->ymm)/2); 4201 sizeof(expected->ymm)/2);
3661 memcpy(&fxs->fx_xmm[14], &expected[14].ymm.a, 4202 memcpy(&fxs->fx_xmm[14], &expected[14].ymm.a,
3662 sizeof(expected->ymm)/2); 4203 sizeof(expected->ymm)/2);
3663 memcpy(&fxs->fx_xmm[15], &expected[15].ymm.a, 4204 memcpy(&fxs->fx_xmm[15], &expected[15].ymm.a,
3664 sizeof(expected->ymm)/2); 4205 sizeof(expected->ymm)/2);
3665#endif 4206#endif
3666 break; 4207 break;
3667 } 4208 }
3668 4209
3669 switch (regset) { 4210 switch (regset) {
3670 case TEST_GPREGS: 4211 case TEST_GPREGS:
3671 DPRINTF("Call SETREGS for the child process\n"); 4212 DPRINTF("Call SETREGS for the child process\n");
3672 SYSCALL_REQUIRE(ptrace(PT_SETREGS, child, &gpr, 0) 4213 SYSCALL_REQUIRE(ptrace(PT_SETREGS, child, &gpr, 0)
3673 != -1); 4214 != -1);
3674 break; 4215 break;
3675 case TEST_XMMREGS: 4216 case TEST_XMMREGS:
3676#if defined(__i386__) 4217#if defined(__i386__)
3677 DPRINTF("Call SETXMMREGS for the child process\n"); 4218 DPRINTF("Call SETXMMREGS for the child process\n");
3678 SYSCALL_REQUIRE(ptrace(PT_SETXMMREGS, child, &xmm, 0) 4219 SYSCALL_REQUIRE(ptrace(PT_SETXMMREGS, child, &xmm, 0)
3679 != -1); 4220 != -1);
3680 break; 4221 break;
3681#else 4222#else
3682 /*FALLTHROUGH*/ 4223 /*FALLTHROUGH*/
3683#endif 4224#endif
3684 case TEST_FPREGS: 4225 case TEST_FPREGS:
3685 DPRINTF("Call SETFPREGS for the child process\n"); 4226 DPRINTF("Call SETFPREGS for the child process\n");
3686 SYSCALL_REQUIRE(ptrace(PT_SETFPREGS, child, &fpr, 0) 4227 SYSCALL_REQUIRE(ptrace(PT_SETFPREGS, child, &fpr, 0)
3687 != -1); 4228 != -1);
3688 break; 4229 break;
3689 case TEST_XSTATE: 4230 case TEST_XSTATE:
3690 DPRINTF("Call SETXSTATE for the child process\n"); 4231 DPRINTF("Call SETXSTATE for the child process\n");
3691 SYSCALL_REQUIRE(ptrace(PT_SETXSTATE, child, &iov, 0) 4232 SYSCALL_REQUIRE(ptrace(PT_SETXSTATE, child, &iov, 0)
3692 != -1); 4233 != -1);
3693 break; 4234 break;
3694 } 4235 }
3695 break; 4236 break;
3696 } 4237 }
3697 4238
3698#undef ST_EXP 4239#undef ST_EXP
3699#undef ST_MAN 4240#undef ST_MAN
3700 4241
3701 DPRINTF("Before resuming the child process where it left off and " 4242 DPRINTF("Before resuming the child process where it left off and "
3702 "without signal to be sent\n"); 4243 "without signal to be sent\n");
3703 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1); 4244 SYSCALL_REQUIRE(ptrace(PT_CONTINUE, child, (void *)1, 0) != -1);
3704 4245
3705 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 4246 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
3706 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child); 4247 TWAIT_REQUIRE_SUCCESS(wpid = TWAIT_GENERIC(child, &status, 0), child);
3707 4248
3708 validate_status_exited(status, exitval); 4249 validate_status_exited(status, exitval);
3709 4250
3710 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME); 4251 DPRINTF("Before calling %s() for the child\n", TWAIT_FNAME);
3711 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0)); 4252 TWAIT_REQUIRE_FAILURE(ECHILD, wpid = TWAIT_GENERIC(child, &status, 0));
3712} 4253}
3713 4254
3714#define X86_REGISTER_TEST(test, regset, regs, regmode, descr) \ 4255#define X86_REGISTER_TEST(test, regset, regs, regmode, descr) \
3715ATF_TC(test); \ 4256ATF_TC(test); \
3716ATF_TC_HEAD(test, tc) \ 4257ATF_TC_HEAD(test, tc) \
3717{ \ 4258{ \
3718 atf_tc_set_md_var(tc, "descr", descr); \ 4259 atf_tc_set_md_var(tc, "descr", descr); \
3719} \ 4260} \
3720 \ 4261 \
3721ATF_TC_BODY(test, tc) \ 4262ATF_TC_BODY(test, tc) \
3722{ \ 4263{ \
3723 x86_register_test(regset, regs, regmode); \ 4264 x86_register_test(regset, regs, regmode); \
3724} 4265}
3725 4266
3726X86_REGISTER_TEST(x86_gpregs32_read, TEST_GPREGS, GPREGS_32, TEST_GETREGS, 4267X86_REGISTER_TEST(x86_gpregs32_read, TEST_GPREGS, GPREGS_32, TEST_GETREGS,
3727 "Test reading basic 32-bit gp registers from debugged program " 4268 "Test reading basic 32-bit gp registers from debugged program "
3728 "via PT_GETREGS."); 4269 "via PT_GETREGS.");
3729X86_REGISTER_TEST(x86_gpregs32_write, TEST_GPREGS, GPREGS_32, TEST_SETREGS, 4270X86_REGISTER_TEST(x86_gpregs32_write, TEST_GPREGS, GPREGS_32, TEST_SETREGS,
3730 "Test writing basic 32-bit gp registers into debugged program " 4271 "Test writing basic 32-bit gp registers into debugged program "
3731 "via PT_SETREGS."); 4272 "via PT_SETREGS.");
3732X86_REGISTER_TEST(x86_gpregs32_core, TEST_GPREGS, GPREGS_32, TEST_COREDUMP, 4273X86_REGISTER_TEST(x86_gpregs32_core, TEST_GPREGS, GPREGS_32, TEST_COREDUMP,
3733 "Test reading basic 32-bit gp registers from core dump."); 4274 "Test reading basic 32-bit gp registers from core dump.");
3734X86_REGISTER_TEST(x86_gpregs32_ebp_esp_read, TEST_GPREGS, GPREGS_32_EBP_ESP, 4275X86_REGISTER_TEST(x86_gpregs32_ebp_esp_read, TEST_GPREGS, GPREGS_32_EBP_ESP,
3735 TEST_GETREGS, "Test reading ebp & esp registers from debugged program " 4276 TEST_GETREGS, "Test reading ebp & esp registers from debugged program "
3736 "via PT_GETREGS."); 4277 "via PT_GETREGS.");
3737X86_REGISTER_TEST(x86_gpregs32_ebp_esp_write, TEST_GPREGS, GPREGS_32_EBP_ESP, 4278X86_REGISTER_TEST(x86_gpregs32_ebp_esp_write, TEST_GPREGS, GPREGS_32_EBP_ESP,
3738 TEST_SETREGS, "Test writing ebp & esp registers into debugged program " 4279 TEST_SETREGS, "Test writing ebp & esp registers into debugged program "
3739 "via PT_SETREGS."); 4280 "via PT_SETREGS.");
3740X86_REGISTER_TEST(x86_gpregs32_ebp_esp_core, TEST_GPREGS, GPREGS_32_EBP_ESP, 4281X86_REGISTER_TEST(x86_gpregs32_ebp_esp_core, TEST_GPREGS, GPREGS_32_EBP_ESP,
3741 TEST_COREDUMP, "Test reading ebp & esp registers from core dump."); 4282 TEST_COREDUMP, "Test reading ebp & esp registers from core dump.");
3742 4283
3743X86_REGISTER_TEST(x86_gpregs64_read, TEST_GPREGS, GPREGS_64, TEST_GETREGS, 4284X86_REGISTER_TEST(x86_gpregs64_read, TEST_GPREGS, GPREGS_64, TEST_GETREGS,
3744 "Test reading basic 64-bit gp registers from debugged program " 4285 "Test reading basic 64-bit gp registers from debugged program "
3745 "via PT_GETREGS."); 4286 "via PT_GETREGS.");
3746X86_REGISTER_TEST(x86_gpregs64_write, TEST_GPREGS, GPREGS_64, TEST_SETREGS, 4287X86_REGISTER_TEST(x86_gpregs64_write, TEST_GPREGS, GPREGS_64, TEST_SETREGS,
3747 "Test writing basic 64-bit gp registers into debugged program " 4288 "Test writing basic 64-bit gp registers into debugged program "
3748 "via PT_SETREGS."); 4289 "via PT_SETREGS.");
3749X86_REGISTER_TEST(x86_gpregs64_core, TEST_GPREGS, GPREGS_64, TEST_COREDUMP, 4290X86_REGISTER_TEST(x86_gpregs64_core, TEST_GPREGS, GPREGS_64, TEST_COREDUMP,
3750 "Test reading basic 64-bit gp registers from core dump."); 4291 "Test reading basic 64-bit gp registers from core dump.");
3751X86_REGISTER_TEST(x86_gpregs64_r8_read, TEST_GPREGS, GPREGS_64_R8, TEST_GETREGS, 4292X86_REGISTER_TEST(x86_gpregs64_r8_read, TEST_GPREGS, GPREGS_64_R8, TEST_GETREGS,
3752 "Test reading r8..r15 registers from debugged program via PT_GETREGS."); 4293 "Test reading r8..r15 registers from debugged program via PT_GETREGS.");
3753X86_REGISTER_TEST(x86_gpregs64_r8_write, TEST_GPREGS, GPREGS_64_R8, 4294X86_REGISTER_TEST(x86_gpregs64_r8_write, TEST_GPREGS, GPREGS_64_R8,
3754 TEST_SETREGS, "Test writing r8..r15 registers into debugged program " 4295 TEST_SETREGS, "Test writing r8..r15 registers into debugged program "
3755 "via PT_SETREGS."); 4296 "via PT_SETREGS.");
3756X86_REGISTER_TEST(x86_gpregs64_r8_core, TEST_GPREGS, GPREGS_64_R8, 4297X86_REGISTER_TEST(x86_gpregs64_r8_core, TEST_GPREGS, GPREGS_64_R8,
3757 TEST_COREDUMP, "Test reading r8..r15 registers from core dump."); 4298 TEST_COREDUMP, "Test reading r8..r15 registers from core dump.");
3758 4299
3759X86_REGISTER_TEST(x86_fpregs_fpu_read, TEST_FPREGS, FPREGS_FPU, TEST_GETREGS, 4300X86_REGISTER_TEST(x86_fpregs_fpu_read, TEST_FPREGS, FPREGS_FPU, TEST_GETREGS,
3760 "Test reading base FPU registers from debugged program via PT_GETFPREGS."); 4301 "Test reading base FPU registers from debugged program via PT_GETFPREGS.");
3761X86_REGISTER_TEST(x86_fpregs_fpu_write, TEST_FPREGS, FPREGS_FPU, TEST_SETREGS, 4302X86_REGISTER_TEST(x86_fpregs_fpu_write, TEST_FPREGS, FPREGS_FPU, TEST_SETREGS,
3762 "Test writing base FPU registers into debugged program via PT_SETFPREGS."); 4303 "Test writing base FPU registers into debugged program via PT_SETFPREGS.");
3763X86_REGISTER_TEST(x86_fpregs_fpu_core, TEST_FPREGS, FPREGS_FPU, TEST_COREDUMP, 4304X86_REGISTER_TEST(x86_fpregs_fpu_core, TEST_FPREGS, FPREGS_FPU, TEST_COREDUMP,
3764 "Test reading base FPU registers from coredump."); 4305 "Test reading base FPU registers from coredump.");
3765X86_REGISTER_TEST(x86_fpregs_mm_read, TEST_FPREGS, FPREGS_MM, TEST_GETREGS, 4306X86_REGISTER_TEST(x86_fpregs_mm_read, TEST_FPREGS, FPREGS_MM, TEST_GETREGS,
3766 "Test reading mm0..mm7 registers from debugged program " 4307 "Test reading mm0..mm7 registers from debugged program "
3767 "via PT_GETFPREGS."); 4308 "via PT_GETFPREGS.");
3768X86_REGISTER_TEST(x86_fpregs_mm_write, TEST_FPREGS, FPREGS_MM, TEST_SETREGS, 4309X86_REGISTER_TEST(x86_fpregs_mm_write, TEST_FPREGS, FPREGS_MM, TEST_SETREGS,
3769 "Test writing mm0..mm7 registers into debugged program " 4310 "Test writing mm0..mm7 registers into debugged program "
3770 "via PT_SETFPREGS."); 4311 "via PT_SETFPREGS.");
3771X86_REGISTER_TEST(x86_fpregs_mm_core, TEST_FPREGS, FPREGS_MM, TEST_COREDUMP, 4312X86_REGISTER_TEST(x86_fpregs_mm_core, TEST_FPREGS, FPREGS_MM, TEST_COREDUMP,
3772 "Test reading mm0..mm7 registers from coredump."); 4313 "Test reading mm0..mm7 registers from coredump.");
3773X86_REGISTER_TEST(x86_fpregs_xmm_read, TEST_XMMREGS, FPREGS_XMM, TEST_GETREGS, 4314X86_REGISTER_TEST(x86_fpregs_xmm_read, TEST_XMMREGS, FPREGS_XMM, TEST_GETREGS,
3774 "Test reading xmm0..xmm15 (..xmm7 on i386) from debugged program " 4315 "Test reading xmm0..xmm15 (..xmm7 on i386) from debugged program "
3775 "via PT_GETFPREGS (PT_GETXMMREGS on i386)."); 4316 "via PT_GETFPREGS (PT_GETXMMREGS on i386).");
3776X86_REGISTER_TEST(x86_fpregs_xmm_write, TEST_XMMREGS, FPREGS_XMM, TEST_SETREGS, 4317X86_REGISTER_TEST(x86_fpregs_xmm_write, TEST_XMMREGS, FPREGS_XMM, TEST_SETREGS,
3777 "Test writing xmm0..xmm15 (..xmm7 on i386) into debugged program " 4318 "Test writing xmm0..xmm15 (..xmm7 on i386) into debugged program "
3778 "via PT_SETFPREGS (PT_SETXMMREGS on i386)."); 4319 "via PT_SETFPREGS (PT_SETXMMREGS on i386).");
3779X86_REGISTER_TEST(x86_fpregs_xmm_core, TEST_XMMREGS, FPREGS_XMM, TEST_COREDUMP, 4320X86_REGISTER_TEST(x86_fpregs_xmm_core, TEST_XMMREGS, FPREGS_XMM, TEST_COREDUMP,
3780 "Test reading xmm0..xmm15 (..xmm7 on i386) from coredump."); 4321 "Test reading xmm0..xmm15 (..xmm7 on i386) from coredump.");
3781 4322
3782X86_REGISTER_TEST(x86_xstate_fpu_read, TEST_XSTATE, FPREGS_FPU, TEST_GETREGS, 4323X86_REGISTER_TEST(x86_xstate_fpu_read, TEST_XSTATE, FPREGS_FPU, TEST_GETREGS,
3783 "Test reading base FPU registers from debugged program via PT_GETXSTATE."); 4324 "Test reading base FPU registers from debugged program via PT_GETXSTATE.");
3784X86_REGISTER_TEST(x86_xstate_fpu_write, TEST_XSTATE, FPREGS_FPU, TEST_SETREGS, 4325X86_REGISTER_TEST(x86_xstate_fpu_write, TEST_XSTATE, FPREGS_FPU, TEST_SETREGS,
3785 "Test writing base FPU registers into debugged program via PT_SETXSTATE."); 4326 "Test writing base FPU registers into debugged program via PT_SETXSTATE.");
3786X86_REGISTER_TEST(x86_xstate_fpu_core, TEST_XSTATE, FPREGS_FPU, TEST_COREDUMP, 4327X86_REGISTER_TEST(x86_xstate_fpu_core, TEST_XSTATE, FPREGS_FPU, TEST_COREDUMP,
3787 "Test reading base FPU registers from core dump via XSTATE note."); 4328 "Test reading base FPU registers from core dump via XSTATE note.");
3788X86_REGISTER_TEST(x86_xstate_mm_read, TEST_XSTATE, FPREGS_MM, TEST_GETREGS, 4329X86_REGISTER_TEST(x86_xstate_mm_read, TEST_XSTATE, FPREGS_MM, TEST_GETREGS,
3789 "Test reading mm0..mm7 registers from debugged program " 4330 "Test reading mm0..mm7 registers from debugged program "
3790 "via PT_GETXSTATE."); 4331 "via PT_GETXSTATE.");
3791X86_REGISTER_TEST(x86_xstate_mm_write, TEST_XSTATE, FPREGS_MM, TEST_SETREGS, 4332X86_REGISTER_TEST(x86_xstate_mm_write, TEST_XSTATE, FPREGS_MM, TEST_SETREGS,
3792 "Test writing mm0..mm7 registers into debugged program " 4333 "Test writing mm0..mm7 registers into debugged program "
3793 "via PT_SETXSTATE."); 4334 "via PT_SETXSTATE.");
3794X86_REGISTER_TEST(x86_xstate_mm_core, TEST_XSTATE, FPREGS_MM, TEST_COREDUMP, 4335X86_REGISTER_TEST(x86_xstate_mm_core, TEST_XSTATE, FPREGS_MM, TEST_COREDUMP,
3795 "Test reading mm0..mm7 registers from core dump via XSTATE note."); 4336 "Test reading mm0..mm7 registers from core dump via XSTATE note.");
3796X86_REGISTER_TEST(x86_xstate_xmm_read, TEST_XSTATE, FPREGS_XMM, TEST_GETREGS, 4337X86_REGISTER_TEST(x86_xstate_xmm_read, TEST_XSTATE, FPREGS_XMM, TEST_GETREGS,
3797 "Test reading xmm0..xmm15 (..xmm7 on i386) from debugged program " 4338 "Test reading xmm0..xmm15 (..xmm7 on i386) from debugged program "
3798 "via PT_GETXSTATE."); 4339 "via PT_GETXSTATE.");
3799X86_REGISTER_TEST(x86_xstate_xmm_write, TEST_XSTATE, FPREGS_XMM, TEST_SETREGS, 4340X86_REGISTER_TEST(x86_xstate_xmm_write, TEST_XSTATE, FPREGS_XMM, TEST_SETREGS,
3800 "Test writing xmm0..xmm15 (..xmm7 on i386) into debugged program " 4341 "Test writing xmm0..xmm15 (..xmm7 on i386) into debugged program "
3801 "via PT_SETXSTATE."); 4342 "via PT_SETXSTATE.");
3802X86_REGISTER_TEST(x86_xstate_xmm_core, TEST_XSTATE, FPREGS_XMM, TEST_COREDUMP, 4343X86_REGISTER_TEST(x86_xstate_xmm_core, TEST_XSTATE, FPREGS_XMM, TEST_COREDUMP,
3803 "Test reading xmm0..xmm15 (..xmm7 on i386) from coredump via XSTATE note."); 4344 "Test reading xmm0..xmm15 (..xmm7 on i386) from coredump via XSTATE note.");
3804X86_REGISTER_TEST(x86_xstate_ymm_read, TEST_XSTATE, FPREGS_YMM, TEST_GETREGS, 4345X86_REGISTER_TEST(x86_xstate_ymm_read, TEST_XSTATE, FPREGS_YMM, TEST_GETREGS,
3805 "Test reading ymm0..ymm15 (..ymm7 on i386) from debugged program " 4346 "Test reading ymm0..ymm15 (..ymm7 on i386) from debugged program "
3806 "via PT_GETXSTATE."); 4347 "via PT_GETXSTATE.");
3807X86_REGISTER_TEST(x86_xstate_ymm_write, TEST_XSTATE, FPREGS_YMM, TEST_SETREGS, 4348X86_REGISTER_TEST(x86_xstate_ymm_write, TEST_XSTATE, FPREGS_YMM, TEST_SETREGS,
3808 "Test writing ymm0..ymm15 (..ymm7 on i386) into debugged program " 4349 "Test writing ymm0..ymm15 (..ymm7 on i386) into debugged program "
3809 "via PT_SETXSTATE."); 4350 "via PT_SETXSTATE.");
3810X86_REGISTER_TEST(x86_xstate_ymm_core, TEST_XSTATE, FPREGS_YMM, TEST_COREDUMP, 4351X86_REGISTER_TEST(x86_xstate_ymm_core, TEST_XSTATE, FPREGS_YMM, TEST_COREDUMP,
3811 "Test reading ymm0..ymm15 (..ymm7 on i386) from coredump via XSTATE note."); 4352 "Test reading ymm0..ymm15 (..ymm7 on i386) from coredump via XSTATE note.");
 4353X86_REGISTER_TEST(x86_xstate_zmm_read, TEST_XSTATE, FPREGS_ZMM, TEST_GETREGS,
 4354 "Test reading zmm0..zmm31 (..zmm7 on i386), k0..k7 from debugged program "
 4355 "via PT_GETXSTATE.");
 4356X86_REGISTER_TEST(x86_xstate_zmm_write, TEST_XSTATE, FPREGS_ZMM, TEST_SETREGS,
 4357 "Test writing zmm0..zmm31 (..zmm7 on i386), k0..k7 into debugged program "
 4358 "via PT_SETXSTATE.");
 4359X86_REGISTER_TEST(x86_xstate_zmm_core, TEST_XSTATE, FPREGS_ZMM, TEST_COREDUMP,
 4360 "Test reading zmm0..zmm31 (..zmm7 on i386), k0..k7 from coredump "
 4361 "via XSTATE note.");
3812 4362
3813/// ---------------------------------------------------------------------------- 4363/// ----------------------------------------------------------------------------
3814 4364
3815#if defined(TWAIT_HAVE_STATUS) 4365#if defined(TWAIT_HAVE_STATUS)
3816 4366
3817static void 4367static void
3818thread_concurrent_lwp_setup(pid_t child, lwpid_t lwpid) 4368thread_concurrent_lwp_setup(pid_t child, lwpid_t lwpid)
3819{ 4369{
3820 struct dbreg r; 4370 struct dbreg r;
3821 union u dr7; 4371 union u dr7;
3822 4372
3823 /* We need to set debug registers for every child */ 4373 /* We need to set debug registers for every child */
3824 DPRINTF("Call GETDBREGS for LWP %d\n", lwpid); 4374 DPRINTF("Call GETDBREGS for LWP %d\n", lwpid);
3825 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r, lwpid) != -1); 4375 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r, lwpid) != -1);
3826 4376
3827 dr7.raw = 0; 4377 dr7.raw = 0;
3828 /* should be set to 1 according to Intel manual, 17.2 */ 4378 /* should be set to 1 according to Intel manual, 17.2 */
3829 dr7.bits.reserved_10 = 1; 4379 dr7.bits.reserved_10 = 1;
3830 dr7.bits.local_exact_breakpt = 1; 4380 dr7.bits.local_exact_breakpt = 1;
3831 dr7.bits.global_exact_breakpt = 1; 4381 dr7.bits.global_exact_breakpt = 1;
3832 /* use DR0 for breakpoints */ 4382 /* use DR0 for breakpoints */
3833 dr7.bits.global_dr0_breakpoint = 1; 4383 dr7.bits.global_dr0_breakpoint = 1;
3834 dr7.bits.condition_dr0 = 0; /* exec */ 4384 dr7.bits.condition_dr0 = 0; /* exec */
3835 dr7.bits.len_dr0 = 0; 4385 dr7.bits.len_dr0 = 0;
3836 /* use DR1 for watchpoints */ 4386 /* use DR1 for watchpoints */
3837 dr7.bits.global_dr1_breakpoint = 1; 4387 dr7.bits.global_dr1_breakpoint = 1;
3838 dr7.bits.condition_dr1 = 1; /* write */ 4388 dr7.bits.condition_dr1 = 1; /* write */
3839 dr7.bits.len_dr1 = 3; /* 4 bytes */ 4389 dr7.bits.len_dr1 = 3; /* 4 bytes */
3840 r.dr[7] = dr7.raw; 4390 r.dr[7] = dr7.raw;
3841 r.dr[0] = (long)(intptr_t)check_happy; 4391 r.dr[0] = (long)(intptr_t)check_happy;
3842 r.dr[1] = (long)(intptr_t)&thread_concurrent_watchpoint_var; 4392 r.dr[1] = (long)(intptr_t)&thread_concurrent_watchpoint_var;
3843 DPRINTF("dr0=%" PRIxREGISTER "\n", r.dr[0]); 4393 DPRINTF("dr0=%" PRIxREGISTER "\n", r.dr[0]);
3844 DPRINTF("dr1=%" PRIxREGISTER "\n", r.dr[1]); 4394 DPRINTF("dr1=%" PRIxREGISTER "\n", r.dr[1]);
3845 DPRINTF("dr7=%" PRIxREGISTER "\n", r.dr[7]); 4395 DPRINTF("dr7=%" PRIxREGISTER "\n", r.dr[7]);
3846 4396
3847 DPRINTF("Call SETDBREGS for LWP %d\n", lwpid); 4397 DPRINTF("Call SETDBREGS for LWP %d\n", lwpid);
3848 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r, lwpid) != -1); 4398 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r, lwpid) != -1);
3849} 4399}
3850 4400
3851static enum thread_concurrent_sigtrap_event 4401static enum thread_concurrent_sigtrap_event
3852thread_concurrent_handle_sigtrap(pid_t child, ptrace_siginfo_t *info) 4402thread_concurrent_handle_sigtrap(pid_t child, ptrace_siginfo_t *info)
3853{ 4403{
3854 enum thread_concurrent_sigtrap_event ret = TCSE_UNKNOWN; 4404 enum thread_concurrent_sigtrap_event ret = TCSE_UNKNOWN;
3855 struct dbreg r; 4405 struct dbreg r;
3856 union u dr7; 4406 union u dr7;
3857 4407
3858 ATF_CHECK_EQ_MSG(info->psi_siginfo.si_code, TRAP_DBREG, 4408 ATF_CHECK_EQ_MSG(info->psi_siginfo.si_code, TRAP_DBREG,
3859 "lwp=%d, expected TRAP_DBREG (%d), got %d", info->psi_lwpid, 4409 "lwp=%d, expected TRAP_DBREG (%d), got %d", info->psi_lwpid,
3860 TRAP_DBREG, info->psi_siginfo.si_code); 4410 TRAP_DBREG, info->psi_siginfo.si_code);
3861 4411
3862 DPRINTF("Call GETDBREGS for LWP %d\n", info->psi_lwpid); 4412 DPRINTF("Call GETDBREGS for LWP %d\n", info->psi_lwpid);
3863 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r, info->psi_lwpid) != -1); 4413 SYSCALL_REQUIRE(ptrace(PT_GETDBREGS, child, &r, info->psi_lwpid) != -1);
3864 DPRINTF("dr6=%" PRIxREGISTER ", dr7=%" PRIxREGISTER "\n", 4414 DPRINTF("dr6=%" PRIxREGISTER ", dr7=%" PRIxREGISTER "\n",
3865 r.dr[6], r.dr[7]); 4415 r.dr[6], r.dr[7]);
3866 4416
3867 ATF_CHECK_MSG(r.dr[6] & 3, "lwp=%d, got DR6=%" PRIxREGISTER, 4417 ATF_CHECK_MSG(r.dr[6] & 3, "lwp=%d, got DR6=%" PRIxREGISTER,
3868 info->psi_lwpid, r.dr[6]); 4418 info->psi_lwpid, r.dr[6]);
3869 4419
3870 /* Handle only one event at a time, we should get 4420 /* Handle only one event at a time, we should get
3871 * a separate SIGTRAP for the other one. 4421 * a separate SIGTRAP for the other one.
3872 */ 4422 */
3873 if (r.dr[6] & 1) { 4423 if (r.dr[6] & 1) {
3874 r.dr[6] &= ~1; 4424 r.dr[6] &= ~1;
3875 4425
3876 /* We need to disable the breakpoint to move 4426 /* We need to disable the breakpoint to move
3877 * past it. 4427 * past it.
3878 * 4428 *
3879 * TODO: single-step and reenable it? 4429 * TODO: single-step and reenable it?
3880 */ 4430 */
3881 dr7.raw = r.dr[7]; 4431 dr7.raw = r.dr[7];
3882 dr7.bits.global_dr0_breakpoint = 0; 4432 dr7.bits.global_dr0_breakpoint = 0;
3883 r.dr[7] = dr7.raw; 4433 r.dr[7] = dr7.raw;
3884 4434
3885 ret = TCSE_BREAKPOINT; 4435 ret = TCSE_BREAKPOINT;
3886 } else if (r.dr[6] & 2) { 4436 } else if (r.dr[6] & 2) {
3887 r.dr[6] &= ~2; 4437 r.dr[6] &= ~2;
3888 ret = TCSE_WATCHPOINT; 4438 ret = TCSE_WATCHPOINT;
3889 } 4439 }
3890 4440
3891 DPRINTF("Call SETDBREGS for LWP %d\n", info->psi_lwpid); 4441 DPRINTF("Call SETDBREGS for LWP %d\n", info->psi_lwpid);
3892 DPRINTF("dr6=%" PRIxREGISTER ", dr7=%" PRIxREGISTER "\n", 4442 DPRINTF("dr6=%" PRIxREGISTER ", dr7=%" PRIxREGISTER "\n",
3893 r.dr[6], r.dr[7]); 4443 r.dr[6], r.dr[7]);
3894 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r, info->psi_lwpid) != -1); 4444 SYSCALL_REQUIRE(ptrace(PT_SETDBREGS, child, &r, info->psi_lwpid) != -1);
3895 4445
3896 return ret; 4446 return ret;
3897} 4447}
3898 4448
3899#endif /*defined(TWAIT_HAVE_STATUS)*/ 4449#endif /*defined(TWAIT_HAVE_STATUS)*/
3900 4450
3901/// ---------------------------------------------------------------------------- 4451/// ----------------------------------------------------------------------------
3902 4452
3903#define ATF_TP_ADD_TCS_PTRACE_WAIT_X86() \ 4453#define ATF_TP_ADD_TCS_PTRACE_WAIT_X86() \
3904 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_print); \ 4454 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_print); \
3905 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr0); \ 4455 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr0); \
3906 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr1); \ 4456 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr1); \
3907 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr2); \ 4457 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr2); \
3908 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr3); \ 4458 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr3); \
3909 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr0_yield); \ 4459 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr0_yield); \
3910 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr1_yield); \ 4460 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr1_yield); \
3911 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr2_yield); \ 4461 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr2_yield); \
3912 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr3_yield); \ 4462 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr3_yield); \
3913 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr0_continued); \ 4463 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr0_continued); \
3914 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr1_continued); \ 4464 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr1_continued); \
3915 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr2_continued); \ 4465 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr2_continued); \
3916 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr3_continued); \ 4466 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_preserve_dr3_continued); \
3917 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_writeonly_byte); \ 4467 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_writeonly_byte); \
3918 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_writeonly_byte); \ 4468 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_writeonly_byte); \
3919 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_writeonly_byte); \ 4469 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_writeonly_byte); \
3920 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_writeonly_byte); \ 4470 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_writeonly_byte); \
3921 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_writeonly_2bytes); \ 4471 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_writeonly_2bytes); \
3922 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_writeonly_2bytes); \ 4472 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_writeonly_2bytes); \
3923 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_writeonly_2bytes); \ 4473 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_writeonly_2bytes); \
3924 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_writeonly_2bytes); \ 4474 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_writeonly_2bytes); \
3925 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_writeonly_4bytes); \ 4475 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_writeonly_4bytes); \
3926 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_writeonly_4bytes); \ 4476 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_writeonly_4bytes); \
3927 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_writeonly_4bytes); \ 4477 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_writeonly_4bytes); \
3928 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_writeonly_4bytes); \ 4478 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_writeonly_4bytes); \
3929 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_write_byte); \ 4479 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_write_byte); \
3930 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_write_byte); \ 4480 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_write_byte); \
3931 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_write_byte); \ 4481 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_write_byte); \
3932 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_write_byte); \ 4482 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_write_byte); \
3933 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_write_2bytes); \ 4483 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_write_2bytes); \
3934 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_write_2bytes); \ 4484 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_write_2bytes); \
3935 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_write_2bytes); \ 4485 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_write_2bytes); \
3936 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_write_2bytes); \ 4486 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_write_2bytes); \
3937 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_write_4bytes); \ 4487 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_write_4bytes); \
3938 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_write_4bytes); \ 4488 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_write_4bytes); \
3939 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_write_4bytes); \ 4489 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_write_4bytes); \
3940 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_write_4bytes); \ 4490 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_write_4bytes); \
3941 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_read_byte); \ 4491 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_read_byte); \
3942 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_read_byte); \ 4492 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_read_byte); \
3943 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_read_byte); \ 4493 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_read_byte); \
3944 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_read_byte); \ 4494 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_read_byte); \
3945 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_read_2bytes); \ 4495 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_read_2bytes); \
3946 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_read_2bytes); \ 4496 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_read_2bytes); \
3947 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_read_2bytes); \ 4497 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_read_2bytes); \
3948 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_read_2bytes); \ 4498 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_read_2bytes); \
3949 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_read_4bytes); \ 4499 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_variable_readwrite_read_4bytes); \
3950 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_read_4bytes); \ 4500 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_variable_readwrite_read_4bytes); \
3951 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_read_4bytes); \ 4501 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_variable_readwrite_read_4bytes); \
3952 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_read_4bytes); \ 4502 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_variable_readwrite_read_4bytes); \
3953 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_code); \ 4503 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_trap_code); \
3954 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_code); \ 4504 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_trap_code); \
3955 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_code); \ 4505 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_trap_code); \
3956 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_code); \ 4506 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_trap_code); \
3957 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_dont_inherit_lwp); \ 4507 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_dont_inherit_lwp); \
3958 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_dont_inherit_lwp); \ 4508 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_dont_inherit_lwp); \
3959 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_dont_inherit_lwp); \ 4509 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_dont_inherit_lwp); \
3960 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_dont_inherit_lwp); \ 4510 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_dont_inherit_lwp); \
3961 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_dont_inherit_execve); \ 4511 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr0_dont_inherit_execve); \
3962 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_dont_inherit_execve); \ 4512 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr1_dont_inherit_execve); \
3963 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_dont_inherit_execve); \ 4513 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr2_dont_inherit_execve); \
3964 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_dont_inherit_execve); \ 4514 ATF_TP_ADD_TC_HAVE_DBREGS(tp, dbregs_dr3_dont_inherit_execve); \
3965 ATF_TP_ADD_TC_HAVE_DBREGS(tp, x86_cve_2018_8897); \ 4515 ATF_TP_ADD_TC_HAVE_DBREGS(tp, x86_cve_2018_8897); \
3966 ATF_TP_ADD_TC(tp, x86_gpregs32_read); \ 4516 ATF_TP_ADD_TC(tp, x86_gpregs32_read); \
3967 ATF_TP_ADD_TC(tp, x86_gpregs32_write); \ 4517 ATF_TP_ADD_TC(tp, x86_gpregs32_write); \
3968 ATF_TP_ADD_TC(tp, x86_gpregs32_core); \ 4518 ATF_TP_ADD_TC(tp, x86_gpregs32_core); \
3969 ATF_TP_ADD_TC(tp, x86_gpregs32_ebp_esp_read); \ 4519 ATF_TP_ADD_TC(tp, x86_gpregs32_ebp_esp_read); \
3970 ATF_TP_ADD_TC(tp, x86_gpregs32_ebp_esp_write); \ 4520 ATF_TP_ADD_TC(tp, x86_gpregs32_ebp_esp_write); \
3971 ATF_TP_ADD_TC(tp, x86_gpregs32_ebp_esp_core); \ 4521 ATF_TP_ADD_TC(tp, x86_gpregs32_ebp_esp_core); \
3972 ATF_TP_ADD_TC(tp, x86_gpregs64_read); \ 4522 ATF_TP_ADD_TC(tp, x86_gpregs64_read); \
3973 ATF_TP_ADD_TC(tp, x86_gpregs64_write); \ 4523 ATF_TP_ADD_TC(tp, x86_gpregs64_write); \
3974 ATF_TP_ADD_TC(tp, x86_gpregs64_core); \ 4524 ATF_TP_ADD_TC(tp, x86_gpregs64_core); \
3975 ATF_TP_ADD_TC(tp, x86_gpregs64_r8_read); \ 4525 ATF_TP_ADD_TC(tp, x86_gpregs64_r8_read); \
3976 ATF_TP_ADD_TC(tp, x86_gpregs64_r8_write); \ 4526 ATF_TP_ADD_TC(tp, x86_gpregs64_r8_write); \
3977 ATF_TP_ADD_TC(tp, x86_gpregs64_r8_core); \ 4527 ATF_TP_ADD_TC(tp, x86_gpregs64_r8_core); \
3978 ATF_TP_ADD_TC(tp, x86_fpregs_fpu_read); \ 4528 ATF_TP_ADD_TC(tp, x86_fpregs_fpu_read); \
3979 ATF_TP_ADD_TC(tp, x86_fpregs_fpu_write); \ 4529 ATF_TP_ADD_TC(tp, x86_fpregs_fpu_write); \
3980 ATF_TP_ADD_TC(tp, x86_fpregs_fpu_core); \ 4530 ATF_TP_ADD_TC(tp, x86_fpregs_fpu_core); \
3981 ATF_TP_ADD_TC(tp, x86_fpregs_mm_read); \ 4531 ATF_TP_ADD_TC(tp, x86_fpregs_mm_read); \
3982 ATF_TP_ADD_TC(tp, x86_fpregs_mm_write); \ 4532 ATF_TP_ADD_TC(tp, x86_fpregs_mm_write); \
3983 ATF_TP_ADD_TC(tp, x86_fpregs_mm_core); \ 4533 ATF_TP_ADD_TC(tp, x86_fpregs_mm_core); \
3984 ATF_TP_ADD_TC(tp, x86_fpregs_xmm_read); \ 4534 ATF_TP_ADD_TC(tp, x86_fpregs_xmm_read); \
3985 ATF_TP_ADD_TC(tp, x86_fpregs_xmm_write); \ 4535 ATF_TP_ADD_TC(tp, x86_fpregs_xmm_write); \
3986 ATF_TP_ADD_TC(tp, x86_fpregs_xmm_core); \ 4536 ATF_TP_ADD_TC(tp, x86_fpregs_xmm_core); \
3987 ATF_TP_ADD_TC(tp, x86_xstate_fpu_read); \ 4537 ATF_TP_ADD_TC(tp, x86_xstate_fpu_read); \
3988 ATF_TP_ADD_TC(tp, x86_xstate_fpu_write); \ 4538 ATF_TP_ADD_TC(tp, x86_xstate_fpu_write); \
3989 ATF_TP_ADD_TC(tp, x86_xstate_fpu_core); \ 4539 ATF_TP_ADD_TC(tp, x86_xstate_fpu_core); \
3990 ATF_TP_ADD_TC(tp, x86_xstate_mm_read); \ 4540 ATF_TP_ADD_TC(tp, x86_xstate_mm_read); \
3991 ATF_TP_ADD_TC(tp, x86_xstate_mm_write); \ 4541 ATF_TP_ADD_TC(tp, x86_xstate_mm_write); \
3992 ATF_TP_ADD_TC(tp, x86_xstate_mm_core); \ 4542 ATF_TP_ADD_TC(tp, x86_xstate_mm_core); \
3993 ATF_TP_ADD_TC(tp, x86_xstate_xmm_read); \ 4543 ATF_TP_ADD_TC(tp, x86_xstate_xmm_read); \
3994 ATF_TP_ADD_TC(tp, x86_xstate_xmm_write); \ 4544 ATF_TP_ADD_TC(tp, x86_xstate_xmm_write); \
3995 ATF_TP_ADD_TC(tp, x86_xstate_xmm_core); \ 4545 ATF_TP_ADD_TC(tp, x86_xstate_xmm_core); \
3996 ATF_TP_ADD_TC(tp, x86_xstate_ymm_read); \ 4546 ATF_TP_ADD_TC(tp, x86_xstate_ymm_read); \
3997 ATF_TP_ADD_TC(tp, x86_xstate_ymm_write); \ 4547 ATF_TP_ADD_TC(tp, x86_xstate_ymm_write); \
3998 ATF_TP_ADD_TC(tp, x86_xstate_ymm_core); 4548 ATF_TP_ADD_TC(tp, x86_xstate_ymm_core); \
 4549 ATF_TP_ADD_TC(tp, x86_xstate_zmm_read); \
 4550 ATF_TP_ADD_TC(tp, x86_xstate_zmm_write); \
 4551 ATF_TP_ADD_TC(tp, x86_xstate_zmm_core);
3999#else 4552#else
4000#define ATF_TP_ADD_TCS_PTRACE_WAIT_X86() 4553#define ATF_TP_ADD_TCS_PTRACE_WAIT_X86()
4001#endif 4554#endif