Sun Nov 1 11:04:55 2020 UTC ()
gicv3_irq_handler: No need to call gicv3_set_priority if we are already at
the desired ipl.


(jmcneill)
diff -r1.27 -r1.28 src/sys/arch/arm/cortex/gicv3.c
cvs diff -r1.27 -r1.28 src/sys/arch/arm/cortex/gicv3.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/gicv3.c 2020/11/01 11:03:44 1.27
+++ src/sys/arch/arm/cortex/gicv3.c 2020/11/01 11:04:55 1.28
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: gicv3.c,v 1.27 2020/11/01 11:03:44 jmcneill Exp $ */ 1/* $NetBSD: gicv3.c,v 1.28 2020/11/01 11:04:55 jmcneill Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include "opt_multiprocessor.h" 29#include "opt_multiprocessor.h"
30 30
31#define _INTR_PRIVATE 31#define _INTR_PRIVATE
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.27 2020/11/01 11:03:44 jmcneill Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.28 2020/11/01 11:04:55 jmcneill Exp $");
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38#include <sys/bus.h> 38#include <sys/bus.h>
39#include <sys/device.h> 39#include <sys/device.h>
40#include <sys/intr.h> 40#include <sys/intr.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/cpu.h> 42#include <sys/cpu.h>
43#include <sys/vmem.h> 43#include <sys/vmem.h>
44 44
45#include <machine/cpufunc.h> 45#include <machine/cpufunc.h>
46 46
47#include <arm/locore.h> 47#include <arm/locore.h>
@@ -713,27 +713,27 @@ gicv3_irq_handler(void *frame) @@ -713,27 +713,27 @@ gicv3_irq_handler(void *frame)
713 713
714 pic = irq >= GIC_LPI_BASE ? &sc->sc_lpi : &sc->sc_pic; 714 pic = irq >= GIC_LPI_BASE ? &sc->sc_lpi : &sc->sc_pic;
715 if (irq - pic->pic_irqbase >= pic->pic_maxsources) 715 if (irq - pic->pic_irqbase >= pic->pic_maxsources)
716 continue; 716 continue;
717 717
718 struct intrsource * const is = pic->pic_sources[irq - pic->pic_irqbase]; 718 struct intrsource * const is = pic->pic_sources[irq - pic->pic_irqbase];
719 KASSERT(is != NULL); 719 KASSERT(is != NULL);
720 720
721 const bool early_eoi = irq < GIC_LPI_BASE && is->is_type == IST_EDGE; 721 const bool early_eoi = irq < GIC_LPI_BASE && is->is_type == IST_EDGE;
722 722
723 const int ipl = is->is_ipl; 723 const int ipl = is->is_ipl;
724 if (__predict_false(ipl < ci->ci_cpl)) { 724 if (__predict_false(ipl < ci->ci_cpl)) {
725 pic_do_pending_ints(I32_bit, ipl, frame); 725 pic_do_pending_ints(I32_bit, ipl, frame);
726 } else { 726 } else if (ci->ci_cpl != ipl) {
727 gicv3_set_priority(pic, ipl); 727 gicv3_set_priority(pic, ipl);
728 ci->ci_cpl = ipl; 728 ci->ci_cpl = ipl;
729 } 729 }
730 730
731 if (early_eoi) { 731 if (early_eoi) {
732 icc_eoi1r_write(iar); 732 icc_eoi1r_write(iar);
733 isb(); 733 isb();
734 } 734 }
735 735
736 cpsie(I32_bit); 736 cpsie(I32_bit);
737 pic_dispatch(is, frame); 737 pic_dispatch(is, frame);
738 cpsid(I32_bit); 738 cpsid(I32_bit);
739 739