Sat Dec 26 06:01:22 2020 UTC ()

 Don't use "more" flag for simplify in ixgbe_legacy_irq().
No functional change intended.


(msaitoh)

diff -r1.270 -r1.271 src/sys/dev/pci/ixgbe/ixgbe.c

--- src/sys/dev/pci/ixgbe/ixgbe.c 2020/12/24 22:36:43	1.270
+++ src/sys/dev/pci/ixgbe/ixgbe.c 2020/12/26 06:01:22	1.271

 @@ -1,14 +1,14 @@
-/* $NetBSD: ixgbe.c,v 1.270 2020/12/24 22:36:43 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.271 2020/12/26 06:01:22 msaitoh Exp $ */
 /******************************************************************************
   Copyright (c) 2001-2017, Intel Corporation
   All rights reserved.
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
 . Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
 . Redistributions in binary form must reproduce the above copyright
 @@ -5146,27 +5146,26 @@ ixgbe_ensure_disabled_intr(struct adapte
 } /* ixgbe_ensure_disabled_intr */
 /************************************************************************
  * ixgbe_legacy_irq - Legacy Interrupt Service routine
  ************************************************************************/
 static int
 ixgbe_legacy_irq(void *arg)
+{
 	struct ix_queue *que = arg;
 	struct adapter	*adapter = que->adapter;
 	struct ixgbe_hw	*hw = &adapter->hw;
 	struct ifnet	*ifp = adapter->ifp;
 	struct		tx_ring *txr = adapter->tx_rings;
 	bool		more = false;
 	bool		reenable_intr = true;
 	u32		eicr, eicr_mask;
 	u32		eims_orig;
 	u32		task_requests = 0;
 	eims_orig = IXGBE_READ_REG(hw, IXGBE_EIMS);
 	/*
 	 * Silicon errata #26 on 82598. Disable all interrupts before reading
 	 * EICR.
 	 */
 	IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
 	/* Read and clear EICR */
 @@ -5177,40 +5176,37 @@ ixgbe_legacy_irq(void *arg)
 	if (eicr == 0) {
 		adapter->stats.pf.intzero.ev_count++;
 		IXGBE_WRITE_REG(hw, IXGBE_EIMS, eims_orig);
 		return 0;
+	}
 	if ((ifp->if_flags & IFF_RUNNING) != 0) {
 		/*
 		 * The same as ixgbe_msix_que() about
 		 * "que->txrx_use_workqueue".
 		 */
 		que->txrx_use_workqueue = adapter->txrx_use_workqueue;
 #ifdef __NetBSD__
 		/* Don't run ixgbe_rxeof in interrupt context */
 		more = true;
 #else
 		more = ixgbe_rxeof(que);
 #endif
 		IXGBE_TX_LOCK(txr);
 		ixgbe_txeof(txr);
 #ifdef notyet
 		if (!ixgbe_ring_empty(ifp, txr->br))
 			ixgbe_start_locked(ifp, txr);
 #endif
 		IXGBE_TX_UNLOCK(txr);
 		que->req.ev_count++;
 		ixgbe_sched_handle_que(adapter, que);
 		reenable_intr = false;
+	}
 	/* Link status change */
 	if (eicr & IXGBE_EICR_LSC)
 		task_requests |= IXGBE_REQUEST_TASK_LSC;
 	if (ixgbe_is_sfp(hw)) {
 		/* Pluggable optics-related interrupt */
 		if (hw->mac.type >= ixgbe_mac_X540)
 			eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
 		else
 			eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
 @@ -5232,31 +5228,26 @@ ixgbe_legacy_irq(void *arg)
+		}
+	}
 	/* Check for fan failure */
 	if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
 		ixgbe_check_fan_failure(adapter, eicr, true);
+	}
 	/* External PHY interrupt */
 	if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
 	    (eicr & IXGBE_EICR_GPI_SDP0_X540))
 		task_requests |= IXGBE_REQUEST_TASK_PHY;
 	if (more) {
 		que->req.ev_count++;
 		ixgbe_sched_handle_que(adapter, que);
 		reenable_intr = false;
 	if (task_requests != 0) {
 		/* Re-enabling other interrupts is done in the admin task */
 		task_requests |= IXGBE_REQUEST_TASK_NEED_ACKINTR;
 		mutex_enter(&adapter->admin_mtx);
 		adapter->task_requests |= task_requests;
 		ixgbe_schedule_admin_tasklet(adapter);
 		mutex_exit(&adapter->admin_mtx);
 		reenable_intr = false;
+	}
 	if (reenable_intr == true)