 @@ -1,14 +1,14 @@
-/*	$NetBSD: pxa2x0_intr.c,v 1.21 2013/12/17 01:28:04 joerg Exp $	*/
+/*	$NetBSD: pxa2x0_intr.c,v 1.22 2021/01/04 15:13:06 skrll Exp $	*/
 /*
  * Copyright (c) 2002  Genetec Corporation.  All rights reserved.
  * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -29,27 +29,27 @@
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * IRQ handler for the Intel PXA2X0 processor.
  * It has integrated interrupt controller.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.21 2013/12/17 01:28:04 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.22 2021/01/04 15:13:06 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/malloc.h>
 #include <sys/bus.h>
 #include <machine/intr.h>
 #include <machine/lock.h>
 #include <arm/xscale/pxa2x0cpu.h>
 #include <arm/xscale/pxa2x0reg.h>
 #include <arm/xscale/pxa2x0var.h>
 #include <arm/xscale/pxa2x0_intr.h>
 @@ -242,27 +242,27 @@ pxa2x0_update_intr_masks(int irqno, int
 	pxa2x0_imask[IPL_HIGH] &= pxa2x0_imask[IPL_SCHED];
 	write_icu(SAIPIC_MR, pxa2x0_imask[curcpu()->ci_cpl]);
 	restore_interrupts(psw);
+}
 static void
 init_interrupt_masks(void)
+{
 	/*
-	 * disable all interrups until handlers are installed.
+	 * disable all interrupts until handlers are installed.
 	 */
 	memset(pxa2x0_imask, 0, sizeof(pxa2x0_imask));
+}
 #undef splx
 void
 splx(int ipl)
+{
 	pxa2x0_splx(ipl);
+}
 #undef _splraise

 @@ -1,14 +1,14 @@
- /* $NetBSD: TODO,v 1.29 2019/02/08 19:55:40 palle Exp $ */
+ /* $NetBSD: TODO,v 1.30 2021/01/04 15:13:06 skrll Exp $ */
 Things to be done:
 common:
 - make %g6 point to curcpu
 - make %g7 point to curlwp
 - change run-time checks for cpu type to function pointers
 sun4u:
 - GENERIC.UP kernel hangs on v445 (missing interrupt?)
 sun4v:
  - current status: The kernel boots and starts the init process.
 @@ -18,23 +18,23 @@ sun4v:
 - 32-bit kernel support
 - libkvm
 - ofwboot: tlb_init_sun4v() hardcodes number of slots to 64
 - locore.s: sun4v_datatrap missing implementation for trap level 1
 - check build without SUN4V defined
 - replace relevant references to %ver with GET_MAXCWP
 - pmap_mp_init(): sun4v missing handling
 - replace constructs like "wrpr %g0, PSTATE_KERN, %pstate" with NORMAL_GLOBALS
 - replace constructs line "wrpr %g0, PSTATE_INTR, %pstate" with ALTERNATE_GOBALS
 - sun4v tsb no need to lock... per cpu... anyway...
 - ci_tsb_desc->td_ctxidx: -1 or 1?
 - MP support - currently bypassed in pmap_bootstrap() for sun4v
 - vpci.c/vpcivar.h: cleanup FIXMEs
-- interrups not handled properly (com at ebus only...)
+- interrupts not handled properly (com at ebus only...)
 - mpt(4) complains: mpt0: Phy 0: Link Status Unknown
 - man pages for drivers imported from OpenBSD lke vpci, vbus, cbus, vdsk, ldc etc.
 - vdsk and ldc drivers: code maked with OPENBSD_BUSDMA - make the bus_dma stuff work properly
 - vbus.c: handle prom_getprop() memory leaks
 - locore.s: rft_user (sun4v specific manaul fill) - seems to work, but is it good enough (compared to openbsds rft_user?
  - platforms tested so far:
  -- qemu sun4v/niagara - crash in init process relaed to fork (stack?)
  -- T2000 - mmu fault somewhere
  -- T5 - stickcmpr is not properly initialized ???

 @@ -1,14 +1,14 @@
-/*	$NetBSD: wdc.c,v 1.303 2020/06/03 18:25:26 bouyer Exp $ */
+/*	$NetBSD: wdc.c,v 1.304 2021/01/04 15:13:06 skrll Exp $ */
 /*
  * Copyright (c) 1998, 2001, 2003 Manuel Bouyer.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
 @@ -48,27 +48,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * CODE UNTESTED IN THE CURRENT REVISION:
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: wdc.c,v 1.303 2020/06/03 18:25:26 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: wdc.c,v 1.304 2021/01/04 15:13:06 skrll Exp $");
 #include "opt_ata.h"
 #include "opt_wdc.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/conf.h>
 #include <sys/buf.h>
 #include <sys/device.h>
 #include <sys/malloc.h>
 #include <sys/kmem.h>
 #include <sys/syslog.h>
 @@ -333,27 +333,27 @@ wdc_drvprobe(struct ata_channel *chp)
 			delay(10);	/* 400ns delay */
 			st0 = bus_space_read_1(wdr->cmd_iot,
 			    wdr->cmd_iohs[wd_status], 0);
+		}
 		if ((chp->ch_drive[0].drive_type != ATA_DRIVET_ATA ||
 		     (st0 & WDCS_DRDY)) &&
 		    (chp->ch_ndrives < 2 ||
 		     chp->ch_drive[1].drive_type != ATA_DRIVET_ATA ||
 		     (st1 & WDCS_DRDY)))
 			break;
 #ifdef WDC_NO_IDS
-		/* cannot kpause here (can't enable IPL_BIO interrups),
+		/* cannot kpause here (can't enable IPL_BIO interrupts),
 		 * delay instead
 		 */
 		delay(1000000 / hz);
 #else
 		ata_delay(chp, 1, "atadrdy", AT_WAIT);
 #endif
+	}
 	if ((st0 & WDCS_DRDY) == 0 &&
 	    chp->ch_drive[0].drive_type != ATA_DRIVET_ATAPI)
 		chp->ch_drive[0].drive_type = ATA_DRIVET_NONE;
 	if (chp->ch_ndrives > 1 && (st1 & WDCS_DRDY) == 0 &&
 	    chp->ch_drive[1].drive_type != ATA_DRIVET_ATAPI)
 		chp->ch_drive[1].drive_type = ATA_DRIVET_NONE;