 @@ -1,14 +1,14 @@
-/* $NetBSD: ar_intr.c,v 1.6 2019/11/10 21:16:29 chs Exp $ */
+/* $NetBSD: ar_intr.c,v 1.7 2021/01/04 17:42:29 thorpej Exp $ */
 /*
  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
  * Copyright (c) 2006 Garrett D'Amore.
  * All rights reserved.
+ *
  * This code was written by Garrett D'Amore for the Champaign-Urbana
  * Community Wireless Network Project.
+ *
  * Redistribution and use in source and binary forms, with or
  * without modification, are permitted provided that the following
  * conditions are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -31,35 +31,35 @@
  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ar_intr.c,v 1.6 2019/11/10 21:16:29 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ar_intr.c,v 1.7 2021/01/04 17:42:29 thorpej Exp $");
 #define __INTR_PRIVATE
 #include <sys/param.h>
 #include <sys/intr.h>
 #include <sys/cpu.h>
 #include <sys/kernel.h>
-#include <sys/malloc.h>
+#include <sys/kmem.h>
 #include <mips/cpuregs.h>
 #include <mips/locore.h>
 #include <mips/atheros/include/platform.h>
 #define	REGVAL(x)	*((volatile uint32_t *)(MIPS_PHYS_TO_KSEG1((x))))
 /*
  * Only MISC interrupts are easily masked at the interrupt controller.
  * The others have to be masked at the source.
  */
 #define	NINTRS	7	/* MIPS INT2-INT4 (7 is clock interrupt) */
 @@ -100,27 +100,27 @@ misc_intmask_get(void)
 static void
 misc_intmask_put(uint32_t v)
+{
 	REGVAL(platformsw->apsw_misc_intmask) = v;
+}
 static void *
 genath_cpu_intr_establish(int intr, int (*func)(void *), void *arg)
+{
 	struct atheros_intrhand	*ih;
-	ih = malloc(sizeof(*ih), M_DEVBUF, M_WAITOK);
+	ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
 	ih->ih_func = func;
 	ih->ih_arg = arg;
 	ih->ih_irq = intr;
 	const int s = splhigh();
 	LIST_INSERT_HEAD(&cpu_intrs[intr].intr_qh, ih, ih_q);
 	/*
 	 * The MIPS CPU interrupts are enabled at boot time, so they
 	 * should pretty much always be ready to go.
 	 */
 @@ -128,39 +128,39 @@ genath_cpu_intr_establish(int intr, int
 	return (ih);
+}
 static void
 genath_cpu_intr_disestablish(void *arg)
+{
 	struct atheros_intrhand	* const ih = arg;
 	const int s = splhigh();
 	LIST_REMOVE(ih, ih_q);
 	splx(s);
-	free(ih, M_DEVBUF);
+	kmem_free(ih, sizeof(*ih));
+}
 static void *
 genath_misc_intr_establish(int irq, int (*func)(void *), void *arg)
+{
 	struct atheros_intr * const intr = &misc_intrs[irq];
 	struct atheros_intrhand	*ih;
 	bool first;
 	int s;
-	ih = malloc(sizeof(*ih), M_DEVBUF, M_WAITOK);
+	ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
 	ih->ih_func = func;
 	ih->ih_arg = arg;
 	ih->ih_irq = irq;
 	s = splhigh();
 	first = LIST_EMPTY(&intr->intr_qh);
 	LIST_INSERT_HEAD(&intr->intr_qh, ih, ih_q);
 	if (first) {
 		const uint32_t mask = misc_intmask_get() | __BIT(irq);
 		misc_intmask_put(mask);
 @@ -178,27 +178,27 @@ genath_misc_intr_disestablish(void *arg)
 	struct atheros_intrhand	*ih = arg;
 	struct atheros_intr * const intr = &misc_intrs[ih->ih_irq];
 	const int s = splhigh();
 	LIST_REMOVE(ih, ih_q);
 	if (LIST_EMPTY(&intr->intr_qh)) {
 		const uint32_t mask = misc_intmask_get() & ~__BIT(ih->ih_irq);
 		misc_intmask_put(mask);
 		(void) misc_intmask_get();	/* flush wbuffer */
+	}
 	splx(s);
-	free(ih, M_DEVBUF);
+	kmem_free(ih, sizeof(*ih));
+}
 static int
 genath_misc_intr(void *arg)
+{
 	uint32_t		isr;
 	uint32_t		mask;
 	int			rv = 0;
 	struct atheros_intr	*intr = arg;
 	isr = misc_intstat_get();
 	mask = misc_intmask_get();

 @@ -1,14 +1,14 @@
-/* $NetBSD: arspi.c,v 1.12 2019/08/13 17:03:11 tnn Exp $ */
+/* $NetBSD: arspi.c,v 1.13 2021/01/04 17:42:29 thorpej Exp $ */
 /*-
  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
  * Copyright (c) 2006 Garrett D'Amore.
  * All rights reserved.
+ *
  * Portions of this code were written by Garrett D'Amore for the
  * Champaign-Urbana Community Wireless Network Project.
+ *
  * Redistribution and use in source and binary forms, with or
  * without modification, are permitted provided that the following
  * conditions are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -32,37 +32,37 @@
  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arspi.c,v 1.12 2019/08/13 17:03:11 tnn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arspi.c,v 1.13 2021/01/04 17:42:29 thorpej Exp $");
 #include "locators.h"
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/device.h>
 #include <sys/errno.h>
 #include <sys/kernel.h>
-#include <sys/malloc.h>
+#include <sys/kmem.h>
 #include <sys/proc.h>
 #include <sys/systm.h>
 #include <mips/atheros/include/ar5315reg.h>
 #include <mips/atheros/include/arbusvar.h>
 #include <mips/atheros/dev/arspireg.h>
 #include <dev/spi/spiflash.h>
 #include <dev/spi/spivar.h>
 /*
  * This device is intended only to operate with specific SPI flash
 @@ -250,28 +250,29 @@ arspi_configure(void *cookie, int slave,
 	return 0;
+}
 int
 arspi_transfer(void *cookie, struct spi_transfer *st)
+{
 	struct arspi_softc *sc = cookie;
 	int rv;
 	int s;
 	st->st_busprivate = NULL;
 	if ((rv = arspi_make_job(st)) != 0) {
 		if (st->st_busprivate) {
-			free(st->st_busprivate, M_DEVBUF);
+			struct arspi_job *job = st->st_busprivate;
 			st->st_busprivate = NULL;
 			kmem_free(job, sizeof(*job));
+		}
 		spi_done(st, rv);
 		return rv;
+	}
 	s = splbio();
 	spi_transq_enqueue(&sc->sc_transq, st);
 	if (sc->sc_transfer == NULL) {
 		arspi_sched(sc);
 		if (!sc->sc_interrupts)
 			arspi_poll(sc);
+	}
 	splx(s);
 @@ -372,27 +373,27 @@ arspi_done(struct arspi_softc *sc, int e
 			 * send WREN for each chunk.  These flags facilitate
 			 * that.
 			 */
 			if (job->job_flags & JOB_WRITE)
 				job->job_flags |= (JOB_WAIT | JOB_WREN);
 			job->job_data = GETREG(sc, ARSPI_REG_DATA);
 			arspi_finish_job(st);
+		}
 		if (err || (job->job_flags & JOB_LAST)) {
 			sc->sc_transfer = NULL;
 			st->st_busprivate = NULL;
 			spi_done(st, err);
-			free(job, M_DEVBUF);
+			kmem_free(job, sizeof(*job));
+		}
+	}
 done:
 	arspi_sched(sc);
+}
 int
 arspi_get_byte(struct spi_chunk **chunkp, uint8_t *bytep)
+{
 	struct spi_chunk *chunk;
 	chunk = *chunkp;
 @@ -460,30 +461,27 @@ arspi_put_byte(struct spi_chunk **chunkp
 	*chunkp = chunk;
 	return 0;
+}
 int
 arspi_make_job(struct spi_transfer *st)
+{
 	struct arspi_job *job;
 	struct spi_chunk *chunk;
 	uint8_t byte;
 	int i, rv;
-	job = malloc(sizeof (struct arspi_job), M_DEVBUF, M_ZERO);
+	job = kmem_zalloc(sizeof (struct arspi_job), KM_SLEEP);
 	if (job == NULL) {
 		return ENOMEM;
 	st->st_busprivate = job;
 	/* skip any leading empty chunks (should not be any!) */
 	chunk = st->st_chunks;
 	/* get transfer opcode */
 	if ((rv = arspi_get_byte(&chunk, &byte)) != 0)
 		return rv;
 	job->job_opcode = byte;
 	switch (job->job_opcode) {
 	case SPIFLASH_CMD_WREN:

 @@ -1,14 +1,14 @@
-/* $NetBSD: athflash.c,v 1.11 2019/11/10 21:16:30 chs Exp $ */
+/* $NetBSD: athflash.c,v 1.12 2021/01/04 17:42:29 thorpej Exp $ */
 /*
  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
  * Copyright (c) 2006 Garrett D'Amore.
  * All rights reserved.
+ *
  * Portions of this code were written by Garrett D'Amore for the
  * Champaign-Urbana Community Wireless Network Project.
+ *
  * Redistribution and use in source and binary forms, with or
  * without modification, are permitted provided that the following
  * conditions are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -72,33 +72,33 @@
 /*
  * Flash Memory Driver
+ *
  * XXX This primitive flash driver does *not* support boot sectored devices,
  * XXX and only supports a fairly limited set of devices, that we are likely to
  * XXX to find in an AP30.
  * XXX
  * XXX We also are only supporting flash widths of 16 _for the moment_, and
  * XXX we are only supporting flash devices that use the AMD command sets.
  * XXX All this should be reviewed and improved to be much more generic.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: athflash.c,v 1.11 2019/11/10 21:16:30 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: athflash.c,v 1.12 2021/01/04 17:42:29 thorpej Exp $");
 #include <sys/param.h>
 #include <sys/conf.h>
 #include <sys/device.h>
 #include <sys/kernel.h>
-#include <sys/malloc.h>
+#include <sys/kmem.h>
 #include <sys/proc.h>
 #include <sys/systm.h>
 #include <sys/bus.h>
 #include <mips/atheros/include/arbusvar.h>
 #ifdef FLASH_DEBUG
 int	flash_debug = 0;
 #define DPRINTF(x)	if (flash_debug) printf x
 #else
 #define DPRINTF(x)
 #endif
 @@ -241,27 +241,27 @@ flash_attach(device_t parent, device_t s
 	KASSERT(flash_ids[i].name != NULL);
 	printf(": %s", flash_ids[i].name);
 	if (humanize_number(nbuf, sizeof(nbuf), flash_ids[i].flash_size, "B",
 ) > 0)
 		printf(" (%s)", nbuf);
 	/*
 	 * determine size of the largest block
 	 */
 	sc->sc_size = flash_ids[i].flash_size;
 	sc->sc_sector_size = flash_ids[i].sector_size;
-	sc->sc_buf = malloc(sc->sc_sector_size, M_DEVBUF, M_WAITOK);
+	sc->sc_buf = kmem_alloc(sc->sc_sector_size, KM_SLEEP);
 	printf("\n");
+}
 int
 flashopen(dev_t dev, int flag, int mode, struct lwp *l)
+{
 	struct flash_softc	*sc;
 	sc = device_lookup_private(&athflash_cd, minor(dev));
 	if (sc == NULL)
 		return ENXIO;
 	if (sc->sc_status & FLASH_ST_BUSY)