Sun Jan 24 15:34:08 2021 UTC ()
Redefining bus_space functions in drivers is a bad idea, and we just
should't be in the habit of doing so.  Besides, the previous "solutions"
still did not compile correctly, and this does, so let's be done with
this nonsense, shall we?


(thorpej)
diff -r1.23 -r1.24 src/sys/dev/pci/virtio_pci.c

cvs diff -r1.23 -r1.24 src/sys/dev/pci/virtio_pci.c (expand / switch to unified diff)

--- src/sys/dev/pci/virtio_pci.c 2021/01/24 15:33:02 1.23
+++ src/sys/dev/pci/virtio_pci.c 2021/01/24 15:34:07 1.24
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: virtio_pci.c,v 1.23 2021/01/24 15:33:02 reinoud Exp $ */ 1/* $NetBSD: virtio_pci.c,v 1.24 2021/01/24 15:34:07 thorpej Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2020 The NetBSD Foundation, Inc. 4 * Copyright (c) 2020 The NetBSD Foundation, Inc.
5 * Copyright (c) 2012 Stefan Fritsch. 5 * Copyright (c) 2012 Stefan Fritsch.
6 * Copyright (c) 2010 Minoura Makoto. 6 * Copyright (c) 2010 Minoura Makoto.
7 * All rights reserved. 7 * All rights reserved.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -18,27 +18,27 @@ @@ -18,27 +18,27 @@
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */ 28 */
29 29
30#include <sys/cdefs.h> 30#include <sys/cdefs.h>
31__KERNEL_RCSID(0, "$NetBSD: virtio_pci.c,v 1.23 2021/01/24 15:33:02 reinoud Exp $"); 31__KERNEL_RCSID(0, "$NetBSD: virtio_pci.c,v 1.24 2021/01/24 15:34:07 thorpej Exp $");
32 32
33#include <sys/param.h> 33#include <sys/param.h>
34#include <sys/systm.h> 34#include <sys/systm.h>
35#include <sys/kmem.h> 35#include <sys/kmem.h>
36#include <sys/module.h> 36#include <sys/module.h>
37#include <sys/endian.h> 37#include <sys/endian.h>
38#include <sys/interrupt.h> 38#include <sys/interrupt.h>
39 39
40#include <sys/device.h> 40#include <sys/device.h>
41 41
42#include <dev/pci/pcidevs.h> 42#include <dev/pci/pcidevs.h>
43#include <dev/pci/pcireg.h> 43#include <dev/pci/pcireg.h>
44#include <dev/pci/pcivar.h> 44#include <dev/pci/pcivar.h>
@@ -728,69 +728,71 @@ static uint16_t @@ -728,69 +728,71 @@ static uint16_t
728virtio_pci_read_queue_size_10(struct virtio_softc *sc, uint16_t idx) 728virtio_pci_read_queue_size_10(struct virtio_softc *sc, uint16_t idx)
729{ 729{
730 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 730 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc;
731 bus_space_tag_t iot = psc->sc_iot; 731 bus_space_tag_t iot = psc->sc_iot;
732 bus_space_handle_t ioh = psc->sc_ioh; 732 bus_space_handle_t ioh = psc->sc_ioh;
733 733
734 bus_space_write_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_SELECT, idx); 734 bus_space_write_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_SELECT, idx);
735 return bus_space_read_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_SIZE); 735 return bus_space_read_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_SIZE);
736} 736}
737 737
738/* 738/*
739 * By definition little endian only in v1.0 and 8 byters are allowed to be 739 * By definition little endian only in v1.0 and 8 byters are allowed to be
740 * written as two 4 byters 740 * written as two 4 byters
741 */ 741 *
742#ifndef __HAVE_BUS_SPACE_8 
743/* 
744 * This is not a general purpose function that can be used in any 742 * This is not a general purpose function that can be used in any
745 * driver. Virtio specifically allows the 8 byte bus transaction 743 * driver. Virtio specifically allows the 8 byte bus transaction
746 * to be split into two 4 byte transactions. Do not copy/use it 744 * to be split into two 4 byte transactions. Do not copy/use it
747 * in other device drivers unless you know that the device accepts it. 745 * in other device drivers unless you know that the device accepts it.
748 */ 746 */
749static __inline void 747static __inline void
750bus_space_write_8(bus_space_tag_t iot, bus_space_handle_t ioh, 748virtio_pci_bus_space_write_8(bus_space_tag_t iot, bus_space_handle_t ioh,
751 bus_size_t offset, uint64_t value) 749 bus_size_t offset, uint64_t value)
752{ 750{
753#if _QUAD_HIGHWORD 751#if defined(__HAVE_BUS_SPACE_8)
 752 bus_space_write_8(iot, ioh, offset, value);
 753#elif _QUAD_HIGHWORD
754 bus_space_write_4(iot, ioh, offset, BUS_ADDR_LO32(value)); 754 bus_space_write_4(iot, ioh, offset, BUS_ADDR_LO32(value));
755 bus_space_write_4(iot, ioh, offset + 4, BUS_ADDR_HI32(value)); 755 bus_space_write_4(iot, ioh, offset + 4, BUS_ADDR_HI32(value));
756#else 756#else
757 bus_space_write_4(iot, ioh, offset, BUS_ADDR_HI32(value)); 757 bus_space_write_4(iot, ioh, offset, BUS_ADDR_HI32(value));
758 bus_space_write_4(iot, ioh, offset + 4, BUS_ADDR_LO32(value)); 758 bus_space_write_4(iot, ioh, offset + 4, BUS_ADDR_LO32(value));
759#endif 759#endif
760} 760}
761#endif 
762 761
763static void 762static void
764virtio_pci_setup_queue_10(struct virtio_softc *sc, uint16_t idx, uint64_t addr) 763virtio_pci_setup_queue_10(struct virtio_softc *sc, uint16_t idx, uint64_t addr)
765{ 764{
766 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 765 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc;
767 struct virtqueue *vq = &sc->sc_vqs[idx]; 766 struct virtqueue *vq = &sc->sc_vqs[idx];
768 bus_space_tag_t iot = psc->sc_iot; 767 bus_space_tag_t iot = psc->sc_iot;
769 bus_space_handle_t ioh = psc->sc_ioh; 768 bus_space_handle_t ioh = psc->sc_ioh;
770 KASSERT(vq->vq_index == idx); 769 KASSERT(vq->vq_index == idx);
771 770
772 bus_space_write_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_SELECT, vq->vq_index); 771 bus_space_write_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_SELECT, vq->vq_index);
773 if (addr == 0) { 772 if (addr == 0) {
774 bus_space_write_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_ENABLE, 0); 773 bus_space_write_2(iot, ioh, VIRTIO_CONFIG1_QUEUE_ENABLE, 0);
775 bus_space_write_8(iot, ioh, VIRTIO_CONFIG1_QUEUE_DESC, 0); 774 virtio_pci_bus_space_write_8(iot, ioh,
776 bus_space_write_8(iot, ioh, VIRTIO_CONFIG1_QUEUE_AVAIL, 0); 775 VIRTIO_CONFIG1_QUEUE_DESC, 0);
777 bus_space_write_8(iot, ioh, VIRTIO_CONFIG1_QUEUE_USED, 0); 776 virtio_pci_bus_space_write_8(iot, ioh,
 777 VIRTIO_CONFIG1_QUEUE_AVAIL, 0);
 778 virtio_pci_bus_space_write_8(iot, ioh,
 779 VIRTIO_CONFIG1_QUEUE_USED, 0);
778 } else { 780 } else {
779 bus_space_write_8(iot, ioh, 781 virtio_pci_bus_space_write_8(iot, ioh,
780 VIRTIO_CONFIG1_QUEUE_DESC, addr); 782 VIRTIO_CONFIG1_QUEUE_DESC, addr);
781 bus_space_write_8(iot, ioh, 783 virtio_pci_bus_space_write_8(iot, ioh,
782 VIRTIO_CONFIG1_QUEUE_AVAIL, addr + vq->vq_availoffset); 784 VIRTIO_CONFIG1_QUEUE_AVAIL, addr + vq->vq_availoffset);
783 bus_space_write_8(iot, ioh, 785 virtio_pci_bus_space_write_8(iot, ioh,
784 VIRTIO_CONFIG1_QUEUE_USED, addr + vq->vq_usedoffset); 786 VIRTIO_CONFIG1_QUEUE_USED, addr + vq->vq_usedoffset);
785 bus_space_write_2(iot, ioh, 787 bus_space_write_2(iot, ioh,
786 VIRTIO_CONFIG1_QUEUE_ENABLE, 1); 788 VIRTIO_CONFIG1_QUEUE_ENABLE, 1);
787 vq->vq_notify_off = bus_space_read_2(iot, ioh, 789 vq->vq_notify_off = bus_space_read_2(iot, ioh,
788 VIRTIO_CONFIG1_QUEUE_NOTIFY_OFF); 790 VIRTIO_CONFIG1_QUEUE_NOTIFY_OFF);
789 } 791 }
790 792
791 if (psc->sc_ihs_num > 1) { 793 if (psc->sc_ihs_num > 1) {
792 int vec = VIRTIO_MSIX_QUEUE_VECTOR_INDEX; 794 int vec = VIRTIO_MSIX_QUEUE_VECTOR_INDEX;
793 if (sc->sc_child_mq) 795 if (sc->sc_child_mq)
794 vec += idx; 796 vec += idx;
795 bus_space_write_2(iot, ioh, 797 bus_space_write_2(iot, ioh,
796 VIRTIO_CONFIG1_QUEUE_MSIX_VECTOR, vec); 798 VIRTIO_CONFIG1_QUEUE_MSIX_VECTOR, vec);