 @@ -1,14 +1,14 @@
-/*	$NetBSD: pmap.c,v 1.423 2021/01/24 14:51:01 skrll Exp $	*/
+/*	$NetBSD: pmap.c,v 1.424 2021/01/29 07:00:28 skrll Exp $	*/
 /*
  * Copyright 2003 Wasabi Systems, Inc.
  * All rights reserved.
+ *
  * Written by Steve C. Woodford for Wasabi Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -182,27 +182,27 @@
 /* Include header files */
 #include "opt_arm_debug.h"
 #include "opt_cpuoptions.h"
 #include "opt_ddb.h"
 #include "opt_lockdebug.h"
 #include "opt_multiprocessor.h"
 #ifdef MULTIPROCESSOR
 #define _INTR_PRIVATE
 #endif
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.423 2021/01/24 14:51:01 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.424 2021/01/29 07:00:28 skrll Exp $");
 #include <sys/param.h>
 #include <sys/types.h>
 #include <sys/asan.h>
 #include <sys/atomic.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/intr.h>
 #include <sys/kernel.h>
 #include <sys/kernhist.h>
 #include <sys/kmem.h>
 #include <sys/pool.h>
 @@ -4413,42 +4413,43 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va,
 	l2b = &l2->l2_bucket[L2_BUCKET(l1slot)];
 	if (l2b->l2b_kva == NULL) {
 		UVMHIST_LOG(maphist, " <-- done (no ptep for l1slot %#jx)",
 		    l1slot, 0, 0, 0);
 		goto out;
+	}
 	/*
 	 * Check the PTE itself.
 	 */
 	pt_entry_t * const ptep = &l2b->l2b_kva[l2pte_index(va)];
 	pt_entry_t const opte = *ptep;
 	if (opte == 0 || (opte & L2_TYPE_MASK) == L2_TYPE_L) {
-		UVMHIST_LOG(maphist, " <-- done (empty pde for l1slot %#jx)",
+		UVMHIST_LOG(maphist, " <-- done (empty pte)",
-		    l1slot, 0, 0, 0);
+, 0, 0, 0);
 		goto out;
+	}
 #ifndef ARM_HAS_VBAR
 	/*
 	 * Catch a userland access to the vector page mapped at 0x0
 	 */
 	if (user && (opte & L2_S_PROT_U) == 0) {
 		UVMHIST_LOG(maphist, " <-- done (vector_page)", 0, 0, 0, 0);
 		goto out;
+	}
 #endif
 	pa = l2pte_pa(opte);
 	UVMHIST_LOG(maphist, " pa %#jx opte %#jx ", pa, opte, 0, 0);
 	if ((ftype & VM_PROT_WRITE) && !l2pte_writable_p(opte)) {
 		/*
 		 * This looks like a good candidate for "page modified"
 		 * emulation...
 		 */
 		struct pv_entry *pv;
 		struct vm_page *pg;
 		/* Extract the physical address of the page */
 		if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) {
 			UVMHIST_LOG(maphist, " <-- done (mod/ref unmanaged page)", 0, 0, 0, 0);
 			goto out;
 @@ -4464,26 +4465,27 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va,
 			UVMHIST_LOG(maphist, " <-- done (mod/ref emul: no PV)", 0, 0, 0, 0);
 			goto out;
+		}
 		/*
 		 * Do the flags say this page is writable? If not then it
 		 * is a genuine write fault. If yes then the write fault is
 		 * our fault as we did not reflect the write access in the
 		 * PTE. Now we know a write has occurred we can correct this
 		 * and also set the modified bit
 		 */
 		if ((pv->pv_flags & PVF_WRITE) == 0) {
 			pmap_release_page_lock(md);
 			UVMHIST_LOG(maphist, " <-- done (write fault)", 0, 0, 0, 0);
 			goto out;
+		}
 		md->pvh_attrs |= PVF_REF | PVF_MOD;
 		pv->pv_flags |= PVF_REF | PVF_MOD;
 #if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
 		/*
 		 * If there are cacheable mappings for this page, mark it dirty.
 		 */
 		if ((md->pvh_attrs & PVF_NC) == 0)
 			md->pvh_attrs |= PVF_DIRTY;
 #endif
 #ifdef ARM_MMU_EXTENDED