 @@ -1,1170 +1,1171 @@
-#	$NetBSD: files.pci,v 1.413.2.2 2020/07/07 10:29:05 martin Exp $
+#	$NetBSD: files.pci,v 1.413.2.3 2021/03/11 16:00:24 martin Exp $
+#
 # Config file and device description for machine-independent PCI code.
 # Included by ports that need it.  Requires that the SCSI files be
 # defined first.
 defflag	opt_pci.h	PCIVERBOSE PCI_CONFIG_DUMP PCI_NETBSD_CONFIGURE
 defparam opt_pci.h	PCI_NETBSD_ENABLE_IDE
 defflag	opt_bktr.h	BKTR_430_FX_MODE BKTR_GPIO_ACCESS BKTR_NO_MSP_RESET
 			BKTR_REVERSE_MUTE BKTR_SIS_VIA_MODE BKTR_USE_PLL
 defparam opt_bktr.h	BKTR_OVERRIDE_CARD BKTR_OVERRIDE_TUNER BKTR_OVERRIDE_DBX
 			BKTR_OVERRIDE_MSP BKTR_SYSTEM_DEFAULT
 defflag	opt_pciide.h	PCIIDE_CMD064x_DISABLE PCIIDE_AMD756_ENABLEDMA
 			PCIIDE_CMD0646U_ENABLEUDMA PCIIDE_I31244_DISABLEDMA
 device	pci {[dev = -1], [function = -1]}
 attach	pci at pcibus
 file	dev/pci/pci.c			pci			needs-flag
 file	dev/pci/pci_map.c		pci
 file	dev/pci/pci_quirks.c		pci
 file	dev/pci/pci_subr.c		pci
 file	dev/pci/pci_stub.c		pci
 file	dev/pci/pci_usrreq.c		pci
 file	dev/pci/pciconf.c		pci & pci_netbsd_configure
 file	dev/pci/pcibusprint.c		pcibus
 file	dev/pci/pci_verbose.c		pci & pciverbose
 file	dev/pci/wsdisplay_pci.c		wsdisplay & pci
 # Cypress 82c693 hyperCache(tm) Stand-Alone PCI Peripheral Controller
 # with USB.  This is a combo chip:
+#
 #	PCI-ISA bridge
 #	PCI IDE controller
 #	OHCI USB controller
+#
 # There are some common subroutines that each function needs.
 define	cy82c693
 file	dev/pci/cy82c693.c		cy82c693
 # Adaptec 3940, 2940, and aic78[5678]0 SCSI controllers
 # device declaration in sys/conf/files
 attach	ahc at pci with ahc_pci: ahc_seeprom, smc93cx6
 file	dev/pci/ahc_pci.c		ahc_pci
 attach	ahd at pci with ahd_pci
 file	dev/pci/ahd_pci.c		ahd_pci
 # I2O adapters
 attach	iop at pci with iop_pci
 file	dev/pci/iop_pci.c		iop_pci
 # 3ware RAID controllers
 device	twe {unit = -1}
 attach	twe at pci
 file	dev/pci/twe.c			twe
 attach	ld at twe with ld_twe
 file	dev/pci/ld_twe.c		ld_twe
 device	twa {unit = -1}
 attach	twa at pci
 file	dev/pci/twa.c			twa
 attach	ld at twa with ld_twa
 file	dev/pci/ld_twa.c		ld_twa
 # AMI RAID controllers
 device	amr {unit = -1}
 attach	amr at pci
 file	dev/pci/amr.c			amr
 attach	ld at amr with ld_amr
 file	dev/pci/ld_amr.c		ld_amr
 # Areca SATA RAID Controllers
 device	arcmsr: scsi, sysmon_envsys
 attach	arcmsr at pci
 file	dev/pci/arcmsr.c		arcmsr
 # Compaq RAID controllers
 attach	cac at pci with cac_pci
 file	dev/pci/cac_pci.c		cac_pci
 # Mylex DAC960 RAID controllers
 attach	mlx at pci with mlx_pci
 file	dev/pci/mlx_pci.c		mlx_pci
 # Newer Mylex AcceleRAID and eXtremeRAID controllers
 device	mly: scsi
 attach	mly at pci
 file	dev/pci/mly.c			mly			needs-flag
 # Myson-Century Technology MTD803 3-in-1 Fast Ethernet Controller
 attach	mtd at pci with mtd_pci
 file	dev/pci/if_mtd_pci.c		mtd_pci
 # ICP-Vortex/Intel RAID controllers
 attach	icp at pci with icp_pci
 file	dev/pci/icp_pci.c		icp_pci
 # Adaptec FSA RAID controllers
 attach	aac at pci with aac_pci
 file	dev/pci/aac_pci.c		aac_pci
 # IBM ServeRAID RAID controllers
 device  ips: scsi
 attach  ips at pci
 file    dev/pci/ips.c                   ips
 # DPT EATA SCSI controllers
 attach	dpt at pci with dpt_pci
 file	dev/pci/dpt_pci.c		dpt_pci
 # AdvanSys 1200A, 1200B, and ULTRA SCSI controllers
 # device declaration in sys/conf/files
 attach	adv at pci with adv_pci
 file	dev/pci/adv_pci.c		adv_pci
 # AdvanSys ULTRA WIDE SCSI controllers
 # device declaration in sys/conf/files
 attach	adw at pci with adw_pci
 file	dev/pci/adw_pci.c		adw_pci
 file	dev/ic/adwlib.c			adw_pci
 file	dev/ic/adwmcode.c		adw_pci
 # AMD Am53c974 PCscsi-PCI SCSI controllers
 device	pcscp: scsi, ncr53c9x
 attach	pcscp at pci
 file	dev/pci/pcscp.c			pcscp
 # HP/Compaq Command Interface to Scsi-3
 attach ciss at pci with ciss_pci
 file	dev/pci/ciss_pci.c		ciss_pci
 # BusLogic BT-9xx PCI family
 # device declaration in sys/conf/files
 attach	bha at pci with bha_pci
 file	dev/pci/bha_pci.c		bha_pci
 # Qlogic ISP 10x0 (PCI) family
 # device declaration in sys/conf/files
 attach	isp at pci with isp_pci
 file	dev/pci/isp_pci.c		isp_pci
 # LSILogic MegaRAID SAS
 # device declaration in sys/conf/files
 attach	mfi at pci with mfi_pci
 file	dev/pci/mfi_pci.c		mfi_pci
 # LSI MegaRAID SAS Fusion RAID controllers
 device	mfii: scsi
 attach	mfii at pci
 file	dev/pci/mfii.c			mfii
 # LSILogic Fusion-MPT I/O Processor family
 # device declaration in sys/conf/files
 attach	mpt at pci with mpt_pci
 file	dev/pci/mpt_pci.c		mpt_pci
 # LSI Logic Fusion-MPT Message Passing Interface 2.0
 device	mpii: scsi
 attach	mpii at pci
 file	dev/pci/mpii.c			mpii
 # Aquantia/Atlantic 10-Gigabit Ethernet
 device	aq: ether, ifnet, arp, sysmon_envsys
 attach	aq at pci
 file	dev/pci/if_aq.c			aq
 defflag opt_if_aq.h	AQ_EVENT_COUNTERS
 # Ethernet driver for DC21040-based boards
 device	de: ether, ifnet, arp
 attach	de at pci
 file	dev/pci/if_de.c			de
 # 3Com 3c590 and 3c595 Ethernet controllers
 # device declaration in sys/conf/files
 attach	ep at pci with ep_pci
 file	dev/pci/if_ep_pci.c		ep_pci
 # 3Com 3c90x[B] Ethernet controllers
 # device declaration in sys/conf/files
 attach	ex at pci with ex_pci
 file	dev/pci/if_ex_pci.c		ex_pci
 # Digital DEFPA PCI FDDI Controller
 device	fpa: pdq, fddi, ifnet, arp
 attach	fpa at pci
 file	dev/pci/if_fpa.c		fpa
 # AMD am7990 (LANCE) -based Ethernet controllers
 # device declaration in sys/conf/files
 attach	le at pci with le_pci: le32
 file	dev/pci/if_le_pci.c		le_pci
 # AMD PCnet-PCI Ethernet controller family
 # Supersedes if_le_pci.c
 device	pcn: ether, ifnet, arp, mii
 attach	pcn at pci
 file	dev/pci/if_pcn.c		pcn
 # common code for siop/esiop pci front end
 define	siop_pci_common
 file	dev/pci/siop_pci_common.c	siop_pci_common
 # Symbios 53c8xx SCSI chips
 # device declaration in sys/conf/files
 attach	siop at pci with siop_pci: siop_pci_common
 file	dev/pci/siop_pci.c		siop_pci
 attach	esiop at pci with esiop_pci: siop_pci_common
 file	dev/pci/esiop_pci.c		esiop_pci
 # Initio INIC-940/950 SCSI controllers
 attach	iha at pci with iha_pci
 file	dev/pci/iha_pci.c		iha_pci
 # Tekram DC-395U/UW/F and DC-315/U SCSI controllers
 device	trm: scsi
 attach	trm at pci
 file	dev/pci/trm.c			trm
 # Guillemot Maxi Radio FM 2000 Radio Card
 device	gtp: radiodev, tea5757
 attach	gtp at pci
 file	dev/pci/gtp.c			gtp
 # MediaForte SoundForte SF64-PCR Radio card
 #device	sf4r: radiodev, tea5757
 #attach	sf4r at pci
 #file	dev/pci/sf64pcr.c		sf4r
 # PCI IDE controllers
 define pciide_common
 file dev/pci/pciide_common.c pciide_common
 device	pciide: ata, pciide_common, wdc_common
 attach	pciide at pci
 file	dev/pci/pciide.c		pciide
 # AHCI SATA controllers
 attach	ahcisata at pci with ahcisata_pci
 file	dev/pci/ahcisata_pci.c		ahcisata_pci
 defflag	opt_ahcisata_pci.h		AHCISATA_DISABLE_MSI
 defflag	opt_ahcisata_pci.h		AHCISATA_DISABLE_MSIX
 # Acard IDE controllers
 device	acardide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	acardide at pci
 file	dev/pci/acardide.c		acardide
 # Acer Lab IDE controllers
 device	aceride: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	aceride at pci
 file	dev/pci/aceride.c		aceride
 # Intel i31244 SATA controller
 device	artsata: ata, ata_dma, ata_udma, pciide_common, wdc_common, sata
 attach	artsata at pci
 file	dev/pci/artsata.c		artsata
 # CMD tech IDE controllers
 device	cmdide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	cmdide at pci
 file	dev/pci/cmdide.c		cmdide
 # Cypress IDE controllers
 device	cypide: ata, ata_dma, pciide_common, wdc_common, cy82c693
 attach	cypide at pci
 file	dev/pci/cypide.c		cypide
 # AMD Geode IDE controllers
 device	geodeide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	geodeide at pci
 file	dev/pci/geodeide.c		geodeide
 # Triones/HighPoint IDE controllers
 device	hptide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	hptide at pci
 file	dev/pci/hptide.c		hptide
 # Integrated Technology Express IDE controllers
 device	iteide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	iteide at pci
 file	dev/pci/iteide.c		iteide
 # Jmicron hybrid IDE/AHCI controllers
 define  jmide_hl { }
 device	jmide: ata, ata_dma, ata_udma, pciide_common, wdc_common, jmide_hl
 attach	jmide at pci
 attach	ahcisata at jmide_hl with jmahci
 file	dev/pci/jmide.c			jmide | jmahci needs-flag
 # National Semiconductor IDE controllers
 device	nside: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	nside at pci
 file	dev/pci/nside.c			nside
 # Opti IDE controllers
 device	optiide: ata, ata_dma, pciide_common, wdc_common
 attach	optiide at pci
 file	dev/pci/optiide.c		optiide
 # Intel IDE controllers
 device	piixide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	piixide at pci
 file	dev/pci/piixide.c		piixide
 # Promise Serial ATA controllers
 device	pdcsata: ata, ata_dma, ata_udma, pciide_common, wdc_common, sata
 attach	pdcsata at pci
 file	dev/pci/pdcsata.c		pdcsata
 # Promise IDE controllers
 device	pdcide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	pdcide at pci
 file	dev/pci/pdcide.c		pdcide
 # ServerWorks IDE controllers
 device	rccide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	rccide at pci
 file	dev/pci/rccide.c		rccide
 # RDC IDE controllers
 device	rdcide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	rdcide at pci
 file	dev/pci/rdcide.c		rdcide
 # ServerWorks SATA controllers
 device	svwsata: ata, ata_dma, ata_udma, pciide_common, wdc_common, sata
 attach	svwsata at pci
 file	dev/pci/svwsata.c		svwsata
 # Silicon Image SATALink controllers
 device	satalink: ata, ata_dma, ata_udma, pciide_common, wdc_common, sata
 attach	satalink at pci
 file	dev/pci/satalink.c		satalink
 # Intel SCH IDE controllers
 device	schide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	schide at pci
 file	dev/pci/schide.c		schide
 # SiS IDE controllers
 device	siside: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	siside at pci
 file	dev/pci/siside.c		siside
 # Symphony Labs IDE controllers
 device	slide: ata, ata_dma, pciide_common, wdc_common
 attach	slide at pci
 file	dev/pci/slide.c		slide
 # ServerWorks IDE controllers
 #device	swide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 #attach	swide at pci
 #file	dev/pci/swide.c		swide
 # VIA/AMD/Nvidia IDE controllers
 device	viaide: ata, ata_dma, ata_udma, pciide_common, wdc_common, sata
 attach	viaide at pci
 file	dev/pci/viaide.c	viaide
 # STMicroelectronics STPC IDE controllers
 device	stpcide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	stpcide at pci
 file	dev/pci/stpcide.c	stpcide
 # ATI IXP IDE controllers
 device	ixpide: ata, ata_dma, ata_udma, pciide_common, wdc_common
 attach	ixpide at pci
 file	dev/pci/ixpide.c	ixpide
 # Toshiba PICCOLO IDE controllers
 device	toshide: ata, ata_dma, pciide_common, wdc_common
 attach	toshide at pci
 file	dev/pci/toshide.c	toshide
 # PCI-PCI bridge chips
 device	ppb: pcibus
 attach	ppb at pci
 file	dev/pci/ppb.c			ppb
 defflag opt_ppb.h	PPB_USEINTR
 # Cyclades Cyclom-8/16/32
 attach	cy at pci with cy_pci
 file	dev/pci/cy_pci.c		cy_pci
 # Cyclades-Z series of intelligent multi-port serial adapters
 device	cz
 attach	cz at pci
 file	dev/pci/cz.c			cz			needs-flag
 # Intel EtherExpress PRO 10/100B
 attach	fxp at pci with fxp_pci
 file	dev/pci/if_fxp_pci.c		fxp_pci
 # Sun HME-network
 attach	hme at pci with hme_pci
 file	dev/pci/if_hme_pci.c		hme_pci
 # Sun GEM-network
 attach	gem at pci with gem_pci
 file	dev/pci/if_gem_pci.c		gem_pci
 # Sun Cassini-network
 device	cas: arp, ether, ifnet, mii
 attach	cas at pci
 file	dev/pci/if_cas.c		cas
 # JMicron JMC2[56]0 ethernet controllers
 device	jme: ether, ifnet, arp, mii
 attach	jme at pci
 file	dev/pci/if_jme.c		jme
 # NE2000-compatible PCI Ethernet cards
 attach	ne at pci with ne_pci: rtl80x9
 file	dev/pci/if_ne_pci.c		ne_pci
 # Texas Instruments ThunderLAN Chip.
 device	tl: ether, ifnet, arp, i2cexec, at24cxx_eeprom, i2c_bitbang,
 	    mii, mii_bitbang
 attach	tl at pci
 file	dev/pci/if_tl.c			tl
 # SDL Communications N2 PCI Network Interface
 # device declaration in sys/conf/files
 attach	ntwoc at pci with ntwoc_pci
 file	dev/pci/if_ntwoc_pci.c		ntwoc_pci
 # Essential Communications HIPPI interface
 # device declaration in sys/conf/files
 attach	esh at pci with esh_pci
 file	dev/pci/if_esh_pci.c		esh_pci
 # generic PCI VGA
 defflag	opt_vga.h	VGA_POST:	X86EMU
 attach	vga at pci with vga_pci
 file	dev/pci/vga_pci.c		vga_pci			needs-flag
 # DEC TGA
 device	tga: wsemuldisplaydev, rasops8, rasops32
 attach	tga at pci
 file	dev/pci/tga.c			tga			needs-flag
 file	dev/pci/tga_conf.c		tga
 file	dev/ic/bt485.c			tga
 file	dev/ic/bt463.c			tga
 file	dev/ic/ibm561.c			tga
 # HP Visualize
 attach	sti at pci with sti_pci
 file	dev/pci/sti_pci.c		sti_pci			needs-flag
 # Integraphics Systems IGA168x and CyberPro framebuffers (linear non-VGA mode)
 # device declaration in sys/conf/files
 attach	igsfb at pci with igsfb_pci
 file	dev/pci/igsfb_pci.c		igsfb_pci
 # Brooktree Bt848 video capture
 device	bktr: radiodev
 attach	bktr at pci
 file	dev/pci/bktr/bktr_audio.c	bktr
 file	dev/pci/bktr/bktr_card.c	bktr
 file	dev/pci/bktr/bktr_core.c	bktr
 file	dev/pci/bktr/bktr_os.c		bktr			needs-flag
 file	dev/pci/bktr/bktr_tuner.c	bktr
 # Cirrus Logic CrystalClear PCI Audio CS4280
 device	clcs: audiobus, ac97, midibus
 attach	clcs at pci
 file	dev/pci/cs4280.c		clcs
 # Cirrus Logic CrystalClear PCI Audio CS4281
 device	clct: audiobus, ac97
 attach	clct at pci
 file	dev/pci/cs4281.c		clct
 # Shared code for Cirrus Logic CrystalClear PCI Audio CS4280 and CS4281
 file	dev/pci/cs428x.c		clcs | clct
 # Forte Media FM801
 device	fms { }: audiobus, ac97, midibus
 attach	fms at pci
 file	dev/pci/fms.c			fms
 attach	opl at fms with opl_fms
 file	dev/pci/opl_fms.c		opl_fms
 attach	mpu at fms with mpu_fms
 file	dev/pci/mpu_fms.c		mpu_fms
 # Ensoniq AudioPCI S5016
 device	eap { }: audiobus, ac97, midibus
 attach	eap at pci
 file	dev/pci/eap.c			eap
 attach	joy at eap with joy_eap
 file	dev/pci/joy_eap.c		joy_eap needs-flag
 # Acer Labs M5455
 device	auacer: audiobus, ac97, aurateconv
 attach	auacer at pci
 file	dev/pci/auacer.c		auacer
 # Intel ICH AC'97 audio
 device	auich: audiobus, ac97, aurateconv
 attach	auich at pci
 file	dev/pci/auich.c			auich
 # VIA VT82C686A/VT8233/VT8235 AC'97 Audio
 device	auvia: audiobus, ac97, aurateconv
 attach	auvia at pci
 file	dev/pci/auvia.c			auvia
 # ATI IXP 200/300/400 series AC'97 Audio
 device	auixp: audiobus, ac97, aurateconv
 attach	auixp at pci
 file	dev/pci/auixp.c			auixp
 # High Definition Audio
 device	azalia: audiobus, ac97, aurateconv
 attach	azalia at pci
 file	dev/pci/azalia.c		azalia
 file	dev/pci/azalia_codec.c		azalia
 # AMD Geode CS5536 Companion Audio
 device	gcscaudio: audiobus, ac97, aurateconv
 attach	gcscaudio at pci
 file	dev/pci/gcscaudio.c		gcscaudio
 # NeoMagic 256 AC'97 Audio
 device	neo: audiobus, ac97
 attach	neo at pci
 file	dev/pci/neo.c			neo
 # ESS Allegro-1 / Maestro3
 device	esa: audiobus, ac97
 attach	esa at pci
 file	dev/pci/esa.c			esa
 # ESS Solo-1 PCI AudioDrive
 device	eso { }: audiobus, midibus
 attach	eso at pci
 file	dev/pci/eso.c			eso
 attach	opl at eso with opl_eso
 file	dev/pci/opl_eso.c		opl_eso
 attach	mpu at eso with mpu_eso
 file	dev/pci/mpu_eso.c		mpu_eso
 attach	joy at eso with joy_eso
 file	dev/pci/joy_eso.c		joy_eso
 # ESS Maestro-1/2/2e PCI AC97 Audio Accelerator
 device	esm: audiobus, ac97
 attach	esm at pci
 file	dev/pci/esm.c			esm
 # S3 SonicVibes (S3 617)
 device	sv { }: audiobus, midibus
 attach	sv at pci
 file	dev/pci/sv.c			sv
 attach	opl at sv with opl_sv
 file	dev/pci/opl_sv.c		opl_sv
 # C-Media CMI8x38 Audio Chip
 device	cmpci { }: audiobus
 attach	cmpci at pci
 file	dev/pci/cmpci.c			cmpci
 attach	opl at cmpci with opl_cmpci
 file	dev/pci/opl_cmpci.c		opl_cmpci
 attach	mpu at cmpci with mpu_cmpci
 file	dev/pci/mpu_cmpci.c		mpu_cmpci
 # Yamaha YMF724/740/744/754 PCI audio controller
 device	yds { }: audiobus, ac97
 attach	yds at pci
 file	dev/pci/yds.c			yds
 attach	opl at yds with opl_yds
 file	dev/pci/opl_yds.c		opl_yds
 attach	mpu at yds with mpu_yds
 file	dev/pci/mpu_yds.c		mpu_yds
 # Creative Labs EMU10k1 (SBLive! series and PCI512)
 device	emuxki: audiobus, ac97
 attach	emuxki at pci
 file	dev/pci/emuxki.c		emuxki
 # Trident 4DWAVE AC'97 audio (including SiS 7018,ALi M5451)
 device	autri: audiobus, ac97, midibus
 attach	autri at pci
 file	dev/pci/autri.c			autri
 # SMC EPIC/100 Fast Ethernet on PCI
 attach	epic at pci with epic_pci
 file	dev/pci/if_epic_pci.c		epic_pci
 # PCI "universal" communication device driver, for PCI com, lpt, etc. ports
 # (see documentation in the driver for what, exactly, should be supported)
 device	puc { port = -1 }
 attach	puc at pci
 file	dev/pci/puc.c			puc
 file	dev/pci/pucdata.c		puc
 defflag opt_puc.h	PUC_CNAUTO
 defparam opt_puc.h	PUC_CNBUS
 attach	com at puc with com_puc
 file	dev/pci/com_puc.c		com_puc needs-flag
 file	dev/pci/cyber.c			com_puc
 file	dev/pci/puccn.c			com_puc
 attach	lpt at puc with lpt_puc
 file	dev/pci/lpt_puc.c		lpt_puc & !ppbus
 attach	atppc at puc with atppc_puc
 file	dev/pci/atppc_puc.c		atppc_puc
 # UHCI USB controller
 attach	uhci at pci with uhci_pci
 file	dev/pci/uhci_pci.c		uhci_pci
 # OHCI USB controller
 attach	ohci at pci with ohci_pci
 file	dev/pci/ohci_pci.c		ohci_pci
 # EHCI USB controller
 attach	ehci at pci with ehci_pci
 file	dev/pci/ehci_pci.c		ehci_pci
 file	dev/pci/usb_pci.c		ehci_pci | ehci_cardbus
 # xHCI USB controller
 attach	xhci at pci with xhci_pci
 file	dev/pci/xhci_pci.c		xhci_pci
 defflag	opt_xhci_pci.h			XHCI_DISABLE_MSI
 defflag	opt_xhci_pci.h			XHCI_DISABLE_MSIX
 # OHCI IEEE 1394 controller
 attach	fwohci at pci with fwohci_pci
 file	dev/pci/fwohci_pci.c		fwohci_pci
 # VIA Rhine/Rhine II Fast Ethernet controllers
 device	vr: ether, ifnet, arp, mii, mii_bitbang
 attach	vr at pci
 file	dev/pci/if_vr.c			vr
 # SiS 900 Fast Ethernet controllers
 device	sip: ether, ifnet, arp, mii, mii_bitbang
 attach	sip at pci
 file	dev/pci/if_sip.c		sip | gsip
 # National Semiconductor DP83820 Gigabit Ethernet
 device	gsip: ether, ifnet, arp, mii, mii_bitbang
 attach	gsip at pci
 # Level One LXT-1001 Gigabit Ethernet
 #device	glxt: ether, ifnet, arp, mii
 #attach	glxt at pci
 #file	dev/pci/if_glxt.c		glxt
 # Sundance Tech./Tamarack TC9021 Gigabit Ethernet
 device	stge: ether, ifnet, arp, mii, mii_bitbang
 attach	stge at pci
 file	dev/pci/if_stge.c		stge
 # Intel i82598 & i82599 10-Gigabit Ethernet
 device	ixg: ether, ifnet, arp, mii, mii_phy
 attach	ixg at pci
 file	dev/pci/ixgbe/ixgbe.c		ixg | ixv
 file	dev/pci/ixgbe/ix_txrx.c		ixg | ixv
 file	dev/pci/ixgbe/ixgbe_netbsd.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_82598.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_82599.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_x540.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_x550.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_api.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_common.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_mbx.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_osdep.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_phy.c	ixg | ixv
 file	dev/pci/ixgbe/ixgbe_vf.c	ixg | ixv
 file	dev/pci/ixgbe/if_bypass.c	ixg | ixv
 file	dev/pci/ixgbe/if_fdir.c		ixg | ixv
 defparam opt_ixgbe.h	IXGBE_JCLNUM_MULTI
 # This appears to be the driver for virtual instances of i82599.
 device	ixv: ether, ifnet, arp, mii, mii_phy
 attach	ixv at pci
 file	dev/pci/ixgbe/ixv.c		ixv
 # Intel i8254x Gigabit Ethernet
 device	wm: ether, ifnet, arp, mii, mii_bitbang
 attach	wm at pci
 file	dev/pci/if_wm.c			wm
 defflag	opt_if_wm.h	WM_EVENT_COUNTERS
 defparam opt_if_wm.h	WM_RX_PROCESS_LIMIT_DEFAULT
 			WM_RX_INTR_PROCESS_LIMIT_DEFAULT
 			WM_DISABLE_MSI
 			WM_DISABLE_MSIX
 # Mellanox 5th generation Ethernet devices
 device	mcx: ether, ifnet, arp
 attach	mcx at pci
 file	dev/pci/if_mcx.c		mcx
 # Broadcom 570x Gigabit Ethernet
 device	bge: ether, ifnet, arp, mii, mii_bitbang
 attach	bge at pci
 file	dev/pci/if_bge.c		bge
 # Broadcom NetXtreme II
 device	bnx: ether, ifnet, arp, mii
 attach	bnx at pci
 file	dev/pci/if_bnx.c		bnx
 # Realtek 8129/8139 Ethernet controllers
 attach	rtk at pci with rtk_pci
 file	dev/pci/if_rtk_pci.c		rtk_pci
 # DECchip 21x4x Ethernet controller family, and assorted clones.
 attach	tlp at pci with tlp_pci
 file	dev/pci/if_tlp_pci.c		tlp_pci
 # Bit3 PCI-VME mod. 617
 device	btvmei: vmebus
 attach	btvmei at pci
 file	dev/pci/btvmei.c		btvmei
 #file	dev/pci/btvmei_dma.c		btvmei
 #file	dev/pci/btvmei_cntlrdma.c	btvmei
 # Alteon ACEnic Gigabit Ethernet controller
 device	ti: ether, ifnet, arp
 attach	ti at pci
 file	dev/pci/if_ti.c			ti
 # Adaptec AIC-6915 Ethernet interface
 attach	sf at pci with sf_pci
 file	dev/pci/if_sf_pci.c		sf_pci
 # Sundance Tech. ST-201 10/100 Ethernet
 device	ste: ether, ifnet, arp, mii, mii_bitbang
 attach	ste at pci
 file	dev/pci/if_ste.c		ste
 # YENTA PCI-Cardbus bridge
 #device	cbb: cbbus, pcmciabus
 device	cbb: pcmciaslot
 attach	cbb at pci with cbb_pci
 file	dev/pci/pccbb.c			cbb
 # Tundra Universe PCI-VME adapter
 define	univ_pci
 file	dev/pci/universe_pci.c univ_pci
 # Bit3 PCI-VME mod. 2706
 device	btvmeii: vmebus, univ_pci
 attach	btvmeii at pci
 file	dev/pci/btvmeii.c btvmeii
 # VIA VT82C686A/VT8231 PM Timer and Hardware Monitor
 device	viaenv: acpipmtimer, sysmon_envsys
 attach	viaenv at pci
 file	dev/pci/viaenv.c		viaenv
 # Intel PIIX4 power management controller
 device	piixpm: i2cbus, acpipmtimer
 attach	piixpm at pci
 file	dev/pci/piixpm.c		piixpm
 # AMD 768MPX power management controller
 defflag	opt_amdpm.h			AMDPM_RND_COUNTERS
 device	amdpm: i2cbus, acpipmtimer
 attach	amdpm at pci
 file	dev/pci/amdpm.c			amdpm
 file	dev/pci/amdpm_smbus.c		amdpm
 # Hi/fn 7751
 device	hifn: opencrypto
 attach	hifn at pci
 file	dev/pci/hifn7751.c		hifn
 # Bluesteelnet 5501/5601, Broadcom 580x/582x security processor
 device	ubsec: opencrypto
 attach	ubsec at pci
 file	dev/pci/ubsec.c			ubsec
 # Aironet PC4500/PC4800
 attach	an at pci with an_pci
 file	dev/pci/if_an_pci.c		an_pci
 # ADMtek ADM8211 PCI/Mini-PCI
 attach	atw at pci with atw_pci
 file	dev/pci/if_atw_pci.c		atw_pci
 # Realtek RTL8180 PCI/Mini-PCI
 attach	rtw at pci with rtw_pci
 file	dev/pci/if_rtw_pci.c		rtw_pci
 # Realtek RTL8188CE Mini-PCIe
 device	rtwn: ifnet, arp, wlan, firmload
 attach	rtwn at pci
 file	dev/pci/if_rtwn.c		rtwn
 # Ralink RT2500/RT2600 PCI/Mini-PCI
 attach	ral at pci with ral_pci
 file	dev/pci/if_ral_pci.c		ral_pci
 # Marvel Libertas Open
 attach  malo at pci with malo_pci
 file    dev/pci/if_malo_pci.c       malo_pci
 # Intersil Prism2.5 Mini-PCI
 attach	wi at pci with wi_pci
 file	dev/pci/if_wi_pci.c		wi_pci
 # IrDA devices
 #  Toshiba Fast Infrared Type O IrDA driver
 device	oboe: irbus, irdasir
 attach	oboe at pci
 file	dev/pci/oboe.c			oboe
 # Middle Digital, Inc. PCI-Weasel serial console board control
 # devices (watchdog timer, etc.)
 device	weasel: sysmon_wdog
 attach	weasel at pci with weasel_pci
 file	dev/pci/weasel_pci.c		weasel
 # Game adapter (joystick)
 attach	joy at pci with joy_pci
 file	dev/pci/joy_pci.c		joy_pci
 # ATI Mach64 framebuffer console driver
 defflag	opt_machfb.h	MACHFB_DEBUG
 device	machfb: wsemuldisplaydev, rasops8, fb, vcons, videomode, edid, drm, glyphcache
 attach	machfb at pci
 file	dev/pci/machfb.c		machfb
 # 3Dfx Voodoo3 framebuffer console driver
 device	voodoofb: wsemuldisplaydev, rasops8, vcons, videomode, drm, i2cbus, i2c_bitbang, ddc_read_edid, edid
 attach	voodoofb at pci
 file	dev/pci/voodoofb.c		voodoofb
 # VIA UniChrome framebuffer console driver
 device	unichromefb: wsemuldisplaydev, rasops16, rasops32, vcons, drm
 attach	unichromefb at pci
 file	dev/pci/unichromefb.c		unichromefb needs-flag
 # ATI Radeon framebuffer console driver
 # (Note: to enable the BIOS parser, add options RADEON_BIOS_INIT to the config)
 device	radeonfb: wsemuldisplaydev, videomode, rasops8, rasops32, vcons, splash, i2cbus, i2c_bitbang, ddc_read_edid, edid, drm, glyphcache
 attach	radeonfb at pci
 file	dev/pci/radeonfb.c	radeonfb
 file	dev/pci/radeonfb_i2c.c	radeonfb
 file	dev/pci/radeonfb_bios.c	radeonfb
 defflag opt_radeonfb.h	RADEONFB_DEBUG
 defflag opt_radeonfb.h	RADEONFB_BIOS_INIT
 defflag opt_radeonfb.h	RADEONFB_BIOS_DEBUG
 defflag opt_radeonfb.h	RADEONFB_MMAP_BARS
 defflag opt_radeonfb.h	RADEONFB_DEPTH_32
 defflag opt_radeonfb.h	RADEONFB_ALWAYS_ACCEL_PUTCHAR
 # Chelsio Terminator 3 (T3) 10 gigabit ethernet
 device	cxgbc { }
 attach	cxgbc at pci
 device	cxgb: ether, ifnet, arp
 attach	cxgb at cxgbc
 file	dev/pci/cxgb/cxgb_main.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_mc5.c		cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_vsc8211.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_ael1002.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_mv88e1xxx.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_vsc7323.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_xgmac.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_t3_hw.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_sge.c		cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_lro.c		cxgbc | cxgb
 # file	dev/pci/cxgb/cxgb_offload.c	cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_l2t.c		cxgbc | cxgb
 file	dev/pci/cxgb/cxgb_osdep.c	cxgbc | cxgb
 # Chips & Technologies 65550 framebuffer console driver
 attach	chipsfb at pci with chipsfb_pci
 file	dev/pci/chipsfb.c		chipsfb_pci
 # 3Com 3c990
 device	txp: ether, ifnet, arp
 attach	txp at pci
 file	dev/pci/if_txp.c		txp
 # SysKonnect
 device	skc { }
 attach	skc at pci
 device	sk: ether, ifnet, arp, mii
 attach	sk at skc
 file	dev/pci/if_sk.c			skc | sk
 # Broadcom 4401 10/100 Ethernet
 device	bce: ether, ifnet, arp, mii
 attach	bce at pci
 file	dev/pci/if_bce.c		bce
 # Intel PRO/10GbE
 device	dge: ether, ifnet, arp
 attach	dge at pci
 file	dev/pci/if_dge.c		dge
 # Realtek 8169 Ethernet controllers
 attach	re at pci with re_pci
 file	dev/pci/if_re_pci.c		re_pci
 # Intel PRO/Wireless 2100
 device	ipw: ifnet, arp, wlan, firmload
 attach	ipw at pci
 file	dev/pci/if_ipw.c		ipw
 # Intel PRO/Wireless 2200BG/2915ABG
 device	iwi: ifnet, arp, wlan, firmload
 attach	iwi at pci
 file	dev/pci/if_iwi.c		iwi
 # Intel PRO/Wireless 3945ABG
 device	wpi: ifnet, arp, wlan, firmload
 attach	wpi at pci
 file	dev/pci/if_wpi.c		wpi
 # Intel PRO/Wireless 4965AGN Mini-PCI Adapter
 device	iwn: ifnet, arp, wlan, firmload
 attach	iwn at pci
 file	dev/pci/if_iwn.c		iwn
 # Intel Centrino 7260
 device	iwm: ifnet, arp, wlan, firmload
 attach	iwm at pci
 file	dev/pci/if_iwm.c		iwm
 # Workbit NinjaSCSI-32 controllers
 # device declaration in sys/conf/files
 attach	njs at pci with njs_pci
 file	dev/pci/njs_pci.c		njs_pci
 # S2io Xframe 10 Gigabit ethernet (Xframe driver)
 device  xge: ether, ifnet, arp
 attach  xge  at pci
 file    dev/pci/if_xge.c		xge
 # Via Velocity 612x 10/100/1000 Ethernet
 device	vge: ether, ifnet, arp, mii
 attach	vge at pci
 file	dev/pci/if_vge.c		vge
 # Atheros 5210/5211/5212 PCI/Mini-PCI
 attach	ath at pci with ath_pci
 file	dev/pci/if_ath_pci.c		ath_pci
 # Atheros AR9k (802.11 a/g/n)
 attach	athn at pci with athn_pci
 file	dev/pci/if_athn_pci.c		athn_pci
 # NVIDIA nForce Ethernet
 device  nfe: ether, ifnet, arp, mii, mii_phy
 attach  nfe at pci
 file    dev/pci/if_nfe.c                nfe
 # MICREL Etherent
 device	kse: ether, ifnet, arp
 attach	kse at pci
 file	dev/pci/if_kse.c		kse
 # Yukon 2
 device	mskc { }
 attach	mskc at pci
 device	msk: ether, ifnet, arp, mii
 attach	msk at mskc
 file	dev/pci/if_msk.c		mskc | msk
 # SD Host Controller
 attach	sdhc at pci with sdhc_pci
 file	dev/pci/sdhc_pci.c		sdhc_pci
 # generic framebuffer console driver, PCI frontend
 attach genfb at pci with genfb_pci : splash
 file	dev/pci/genfb_pci.c	genfb_pci
 # NVIDIA nForce2/3/4 SMBus controller
 device	nfsmbc { }
 attach	nfsmbc at pci
 device	nfsmb: i2cbus
 attach	nfsmb at nfsmbc
 file	dev/pci/nfsmb.c			nfsmbc | nfsmb
 # Intel ICH SMBus controller
 device	ichsmb: i2cbus
 attach	ichsmb at pci
 file	dev/pci/ichsmb.c		ichsmb
 # ATI Rage 128 framebuffer console driver
 device	r128fb: wsemuldisplaydev, rasops8, rasops32, vcons, videomode, i2cbus, i2c_bitbang, glyphcache
 attach	r128fb at pci
 file	dev/pci/r128fb.c		r128fb
 defflag	opt_r128fb.h	R128FB_DEBUG
 defflag	opt_r128fb.h	R128FB_WAIT
 # Attansic/Atheros L1 Gigabit-Ethernet
 device	age: ether, ifnet, arp, mii, mii_phy
 attach	age at pci
 file	dev/pci/if_age.c		age
 # Attansic/Atheros L1C/L2C Gigabit Ethernet
 device	alc: ether, ifnet, arp, mii, mii_phy
 attach	alc at pci
 file	dev/pci/if_alc.c		alc
 # Attanisc/Atheros L1E Gigabit Ethernet
 device	ale: ether, ifnet, arp, mii, mii_phy
 attach	ale at pci
 file	dev/pci/if_ale.c		ale
 # Atheros/Attansic L2 Fast-Ethernet
 device	lii: ether, ifnet, arp, mii
 attach	lii at pci
 file	dev/pci/if_lii.c		lii
 # Silicon Image SteelVine SATA-II controllers
 attach	siisata at pci with siisata_pci
 file	dev/pci/siisata_pci.c		siisata_pci
 # Acer Labs M7101 power management controller
 device	alipm: i2cbus
 attach	alipm at pci
 file	dev/pci/alipm.c				alipm
+#
 # Broadcom AirForce / Apple Airport Extreme
+#
 attach	bwi at pci with bwi_pci
 file	dev/pci/if_bwi_pci.c		bwi_pci
 # Broadcom FullMAC USB wireless adapter
 attach	bwfm at pci with bwfm_pci: firmload
 file	dev/pci/if_bwfm_pci.c		bwfm_pci
 # Marvell Serial-ATA Host Controller
 attach	mvsata at pci with mvsata_pci
 file	dev/pci/mvsata_pci.c		mvsata_pci
 include "dev/pci/voyager/files.voyager"
 # Silicon Motion SM502 / Voyager GX
 device	voyager: i2c_bitbang, voyagerbus, i2cbus
 attach	voyager at pci
 file	dev/pci/voyager.c		voyager
 defflag	opt_voyager.h	VOYAGER_DEBUG
 # High Definition Audio
 attach	hdaudio at pci with hdaudio_pci
 file	dev/pci/hdaudio_pci.c		hdaudio_pci
 # Permedia 2 / Sun PGX32 / Raptor
 device	pm2fb: wsemuldisplaydev, rasops8, rasops32, vcons, videomode, i2cbus, i2c_bitbang, ddc_read_edid, edid, glyphcache
 attach	pm2fb at pci
 file	dev/pci/pm2fb.c		pm2fb
 defflag	opt_pm2fb.h	PM2FB_DEBUG
 # Permedia 3 / Oxygen VX1 / Proformance 3
 device  pm3fb: wsemuldisplaydev, rasops8, vcons, videomode, i2cbus, i2c_bitbang, ddc_read_edid, edid
 attach  pm3fb at pci
 file	dev/pci/pm3fb.c		pm3fb
 # 3Dlabs Wildcat / Sun XVR-500, 1200, Expert3D etc.
 device		wcfb: wsemuldisplaydev, rasops8, vcons
 attach		wcfb at pci
 file		dev/pci/wcfb.c	wcfb
 defflag		opt_wcfb.h	WCFB_DEBUG
 # Domex 536, 5380-compatible SCSI HBA
 attach	nca at pci with nca_pci
 file	dev/pci/nca_pci.c	nca_pci
 # Agere ET1310/1301 Ethernet
 device	et: ether, ifnet, arp, mii, mii_phy
 attach	et at pci
 file	dev/pci/if_et.c			et
 # RDC Semiconductor R6040 10/100 Ethernet
 device	vte: ether, ifnet, arp, mii, mii_phy
 attach	vte at pci
 file	dev/pci/if_vte.c		vte
 # Conexant CX23880-series DTV interface
 device	cxdtv: dtvbus, i2c_bitbang, i2cbus, i2cexec, tvpll, nxt2k, lg3303
 attach	cxdtv at pci
 file	dev/pci/cxdtv.c		cxdtv
 file	dev/pci/cxdtv_boards.c	cxdtv
 # Conexant CX23885-series DTV interface
 device	coram: dtvbus, i2cbus, i2cexec, mt2131, cx24227
 attach	coram at pci
 file	dev/pci/coram.c		coram
 # QUANCOM Electronic GmbH PWDOG1
 device	pwdog: sysmon_envsys
 attach	pwdog at pci
 file	dev/pci/pwdog.c		pwdog
 # IBM 4810 BSP cash drawer port
 device	ibmcd: gpiobus
 attach	ibmcd at pci
 file	dev/pci/ibmcd.c		ibmcd
 # SIS 315 Pro frame buffer
 device  sisfb: wsemuldisplaydev, rasops8, rasops15, rasops16, rasops32, vcons
 attach  sisfb at pci
 file    dev/pci/sisfb.c		sisfb	needs-flag
 attach	virtio at pci with virtio_pci
 file	dev/pci/virtio_pci.c	virtio_pci
 # Silicon Motion SM712(LynxEM+) frame buffer
 device	lynxfb: wsemuldisplaydev, rasops16
 attach	lynxfb at pci
 file	dev/pci/lynxfb.c	lynxfb needs-flag
 include "dev/pci/igma/files.igma"
 # Intel GMA
 device	igma: igmabus, i2cbus, i2c_bitbang, ddc_read_edid, edid
 attach	igma at pci
 file	dev/pci/igma.c		igma
 # 3Dfx Voodoo Graphics
 defflag	opt_tdvfb.h		TDVFB_CONSOLE
 device	tdvfb: wsemuldisplaydev, rasops16, rasops32, vcons, videomode
 attach	tdvfb at pci
 file	dev/pci/tdvfb.c		tdvfb
 # nvidia geforce framebuffer console driver
 device	gffb: wsemuldisplaydev, rasops8, vcons, videomode, i2cbus, i2c_bitbang, glyphcache
 attach	gffb at pci
 file	dev/pci/gffb.c		gffb
 defflag	opt_gffb.h	GFFB_DEBUG
 # Realtek RTS5209/RTS5229 Card Reader driver
 attach	rtsx at pci with rtsx_pci
 file	dev/pci/rtsx_pci.c	rtsx_pci
 # NVM Express Controller
 attach	nvme at pci with nvme_pci
 file	dev/pci/nvme_pci.c	nvme_pci
 # PCI graphics devices with DRM/KMS
 include "external/bsd/drm2/pci/files.drmkms_pci"
 # Intel S1200,C2000 (non-pch) SMBus controller
 device	ismt: i2cbus
 attach	ismt at pci
 file	dev/pci/ismt.c		ismt
 # Amazon Elastic Network Adapter (ENA) family
 device	ena: ether, ifnet, arp
 attach	ena at pci
 file	dev/pci/if_ena.c			ena
 file	external/bsd/ena-com/ena_com.c		ena
 file	external/bsd/ena-com/ena_eth_com.c	ena

 @@ -1,2406 +1,2454 @@
-/* $NetBSD: ix_txrx.c,v 1.54.2.4 2020/07/10 11:35:51 martin Exp $ */
+/* $NetBSD: ix_txrx.c,v 1.54.2.5 2021/03/11 16:00:24 martin Exp $ */
 /******************************************************************************
   Copyright (c) 2001-2017, Intel Corporation
   All rights reserved.
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
 . Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
 . Redistributions in binary form must reproduce the above copyright
       notice, this list of conditions and the following disclaimer in the
       documentation and/or other materials provided with the distribution.
 . Neither the name of the Intel Corporation nor the names of its
       contributors may be used to endorse or promote products derived from
       this software without specific prior written permission.
   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   POSSIBILITY OF SUCH DAMAGE.
 ******************************************************************************/
 /*$FreeBSD: head/sys/dev/ixgbe/ix_txrx.c 327031 2017-12-20 18:15:06Z erj $*/
 /*
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Coyote Point Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include "opt_inet.h"
 #include "opt_inet6.h"
 #include "ixgbe.h"
 /*
  * HW RSC control:
  *  this feature only works with
  *  IPv4, and only on 82599 and later.
  *  Also this will cause IP forwarding to
  *  fail and that can't be controlled by
  *  the stack as LRO can. For all these
  *  reasons I've deemed it best to leave
  *  this off and not bother with a tuneable
  *  interface, this would need to be compiled
  *  to enable.
  */
 static bool ixgbe_rsc_enable = FALSE;
 /*
  * For Flow Director: this is the
  * number of TX packets we sample
  * for the filter pool, this means
  * every 20th packet will be probed.
+ *
  * This feature can be disabled by
  * setting this to 0.
  */
 static int atr_sample_rate = 20;
 /************************************************************************
  *  Local Function prototypes
  ************************************************************************/
 static void          ixgbe_setup_transmit_ring(struct tx_ring *);
 static void          ixgbe_free_transmit_buffers(struct tx_ring *);
 static int           ixgbe_setup_receive_ring(struct rx_ring *);
 static void          ixgbe_free_receive_buffers(struct rx_ring *);
 static void          ixgbe_rx_checksum(u32, struct mbuf *, u32,
                                        struct ixgbe_hw_stats *);
 static void          ixgbe_refresh_mbufs(struct rx_ring *, int);
 static void          ixgbe_drain(struct ifnet *, struct tx_ring *);
 static int           ixgbe_xmit(struct tx_ring *, struct mbuf *);
 static int           ixgbe_tx_ctx_setup(struct tx_ring *,
                                         struct mbuf *, u32 *, u32 *);
 static int           ixgbe_tso_setup(struct tx_ring *,
                                      struct mbuf *, u32 *, u32 *);
 static __inline void ixgbe_rx_discard(struct rx_ring *, int);
 static __inline void ixgbe_rx_input(struct rx_ring *, struct ifnet *,
                                     struct mbuf *, u32);
 static int           ixgbe_dma_malloc(struct adapter *, bus_size_t,
                                       struct ixgbe_dma_alloc *, int);
 static void          ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *);
 static void	ixgbe_setup_hw_rsc(struct rx_ring *);
 /************************************************************************
  * ixgbe_legacy_start_locked - Transmit entry point
+ *
  *   Called by the stack to initiate a transmit.
  *   The driver will remain in this routine as long as there are
  *   packets to transmit and transmit resources are available.
  *   In case resources are not available, the stack is notified
  *   and the packet is requeued.
  ************************************************************************/
 int
 ixgbe_legacy_start_locked(struct ifnet *ifp, struct tx_ring *txr)
+{
 	int rc;
 	struct mbuf    *m_head;
 	struct adapter *adapter = txr->adapter;
 	IXGBE_TX_LOCK_ASSERT(txr);
 	if (adapter->link_active != LINK_STATE_UP) {
 		/*
 		 * discard all packets buffered in IFQ to avoid
 		 * sending old packets at next link up timing.
 		 */
 		ixgbe_drain(ifp, txr);
 		return (ENETDOWN);
+	}
 	if ((ifp->if_flags & IFF_RUNNING) == 0)
 		return (ENETDOWN);
 	if (txr->txr_no_space)
 		return (ENETDOWN);
 	while (!IFQ_IS_EMPTY(&ifp->if_snd)) {
 		if (txr->tx_avail <= IXGBE_QUEUE_MIN_FREE)
 			break;
 		IFQ_POLL(&ifp->if_snd, m_head);
 		if (m_head == NULL)
 			break;
 		if ((rc = ixgbe_xmit(txr, m_head)) == EAGAIN) {
 			break;
+		}
 		IFQ_DEQUEUE(&ifp->if_snd, m_head);
 		if (rc != 0) {
 			m_freem(m_head);
 			continue;
+		}
 		/* Send a copy of the frame to the BPF listener */
 		bpf_mtap(ifp, m_head, BPF_D_OUT);
+	}
 	return IXGBE_SUCCESS;
 } /* ixgbe_legacy_start_locked */
 /************************************************************************
  * ixgbe_legacy_start
+ *
  *   Called by the stack, this always uses the first tx ring,
  *   and should not be used with multiqueue tx enabled.
  ************************************************************************/
 void
 ixgbe_legacy_start(struct ifnet *ifp)
+{
 	struct adapter *adapter = ifp->if_softc;
 	struct tx_ring *txr = adapter->tx_rings;
 	if (ifp->if_flags & IFF_RUNNING) {
 		IXGBE_TX_LOCK(txr);
 		ixgbe_legacy_start_locked(ifp, txr);
 		IXGBE_TX_UNLOCK(txr);
+	}
 } /* ixgbe_legacy_start */
 /************************************************************************
  * ixgbe_mq_start - Multiqueue Transmit Entry Point
+ *
  *   (if_transmit function)
  ************************************************************************/
 int
 ixgbe_mq_start(struct ifnet *ifp, struct mbuf *m)
+{
 	struct adapter	*adapter = ifp->if_softc;
 	struct tx_ring	*txr;
 	int 		i;
 #ifdef RSS
 	uint32_t bucket_id;
 #endif
 	/*
 	 * When doing RSS, map it to the same outbound queue
 	 * as the incoming flow would be mapped to.
+	 *
 	 * If everything is setup correctly, it should be the
 	 * same bucket that the current CPU we're on is.
 	 */
 #ifdef RSS
 	if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) {
 		if ((adapter->feat_en & IXGBE_FEATURE_RSS) &&
 		    (rss_hash2bucket(m->m_pkthdr.flowid, M_HASHTYPE_GET(m),
 		    &bucket_id) == 0)) {
 			i = bucket_id % adapter->num_queues;
 #ifdef IXGBE_DEBUG
 			if (bucket_id > adapter->num_queues)
 				if_printf(ifp,
 				    "bucket_id (%d) > num_queues (%d)\n",
 				    bucket_id, adapter->num_queues);
 #endif
 		} else
 			i = m->m_pkthdr.flowid % adapter->num_queues;
 	} else
 #endif /* 0 */
 		i = (cpu_index(curcpu()) % ncpu) % adapter->num_queues;
 	/* Check for a hung queue and pick alternative */
 	if (((1ULL << i) & adapter->active_queues) == 0)
 		i = ffs64(adapter->active_queues);
 	txr = &adapter->tx_rings[i];
 	if (__predict_false(!pcq_put(txr->txr_interq, m))) {
 		m_freem(m);
 		txr->pcq_drops.ev_count++;
 		return ENOBUFS;
+	}
 	if (IXGBE_TX_TRYLOCK(txr)) {
 		ixgbe_mq_start_locked(ifp, txr);
 		IXGBE_TX_UNLOCK(txr);
 	} else {
 		if (adapter->txrx_use_workqueue) {
 			u_int *enqueued;
 			/*
 			 * This function itself is not called in interrupt
 			 * context, however it can be called in fast softint
 			 * context right after receiving forwarding packets.
 			 * So, it is required to protect workqueue from twice
 			 * enqueuing when the machine uses both spontaneous
 			 * packets and forwarding packets.
 			 */
 			enqueued = percpu_getref(adapter->txr_wq_enqueued);
 			if (*enqueued == 0) {
 				*enqueued = 1;
 				percpu_putref(adapter->txr_wq_enqueued);
 				workqueue_enqueue(adapter->txr_wq,
 				    &txr->wq_cookie, curcpu());
 			} else
 				percpu_putref(adapter->txr_wq_enqueued);
 		} else {
 			kpreempt_disable();
 			softint_schedule(txr->txr_si);
 			kpreempt_enable();
+		}
+	}
 	return (0);
 } /* ixgbe_mq_start */
 /************************************************************************
  * ixgbe_mq_start_locked
  ************************************************************************/
 int
 ixgbe_mq_start_locked(struct ifnet *ifp, struct tx_ring *txr)
+{
 	struct mbuf    *next;
 	int            enqueued = 0, err = 0;
 	if (txr->adapter->link_active != LINK_STATE_UP) {
 		/*
 		 * discard all packets buffered in txr_interq to avoid
 		 * sending old packets at next link up timing.
 		 */
 		ixgbe_drain(ifp, txr);
 		return (ENETDOWN);
+	}
 	if ((ifp->if_flags & IFF_RUNNING) == 0)
 		return (ENETDOWN);
 	if (txr->txr_no_space)
 		return (ENETDOWN);
 	/* Process the queue */
 	while ((next = pcq_get(txr->txr_interq)) != NULL) {
 		if ((err = ixgbe_xmit(txr, next)) != 0) {
 			m_freem(next);
 			/* All errors are counted in ixgbe_xmit() */
 			break;
+		}
 		enqueued++;
 #if __FreeBSD_version >= 1100036
 		/*
 		 * Since we're looking at the tx ring, we can check
 		 * to see if we're a VF by examing our tail register
 		 * address.
 		 */
 		if ((txr->adapter->feat_en & IXGBE_FEATURE_VF) &&
 		    (next->m_flags & M_MCAST))
 			if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1);
 #endif
 		/* Send a copy of the frame to the BPF listener */
 		bpf_mtap(ifp, next, BPF_D_OUT);
 		if ((ifp->if_flags & IFF_RUNNING) == 0)
 			break;
+	}
 	if (txr->tx_avail < IXGBE_TX_CLEANUP_THRESHOLD(txr->adapter))
 		ixgbe_txeof(txr);
 	return (err);
 } /* ixgbe_mq_start_locked */
 /************************************************************************
  * ixgbe_deferred_mq_start
+ *
  *   Called from a softint and workqueue (indirectly) to drain queued
  *   transmit packets.
  ************************************************************************/
 void
 ixgbe_deferred_mq_start(void *arg)
+{
 	struct tx_ring *txr = arg;
 	struct adapter *adapter = txr->adapter;
 	struct ifnet   *ifp = adapter->ifp;
 	IXGBE_TX_LOCK(txr);
 	if (pcq_peek(txr->txr_interq) != NULL)
 		ixgbe_mq_start_locked(ifp, txr);
 	IXGBE_TX_UNLOCK(txr);
 } /* ixgbe_deferred_mq_start */
 /************************************************************************
  * ixgbe_deferred_mq_start_work
+ *
  *   Called from a workqueue to drain queued transmit packets.
  ************************************************************************/
 void
 ixgbe_deferred_mq_start_work(struct work *wk, void *arg)
+{
 	struct tx_ring *txr = container_of(wk, struct tx_ring, wq_cookie);
 	struct adapter *adapter = txr->adapter;
 	u_int *enqueued = percpu_getref(adapter->txr_wq_enqueued);
 	*enqueued = 0;
 	percpu_putref(adapter->txr_wq_enqueued);
 	ixgbe_deferred_mq_start(txr);
 } /* ixgbe_deferred_mq_start */
 /************************************************************************
  * ixgbe_drain_all
  ************************************************************************/
 void
 ixgbe_drain_all(struct adapter *adapter)
+{
 	struct ifnet *ifp = adapter->ifp;
 	struct ix_queue *que = adapter->queues;
 	for (int i = 0; i < adapter->num_queues; i++, que++) {
 		struct tx_ring  *txr = que->txr;
 		IXGBE_TX_LOCK(txr);
 		ixgbe_drain(ifp, txr);
 		IXGBE_TX_UNLOCK(txr);
+	}
+}
 /************************************************************************
  * ixgbe_xmit
+ *
  *   Maps the mbufs to tx descriptors, allowing the
  *   TX engine to transmit the packets.
+ *
  *   Return 0 on success, positive on failure
  ************************************************************************/
 static int
 ixgbe_xmit(struct tx_ring *txr, struct mbuf *m_head)
+{
 	struct adapter          *adapter = txr->adapter;
 	struct ixgbe_tx_buf     *txbuf;
 	union ixgbe_adv_tx_desc *txd = NULL;
 	struct ifnet	        *ifp = adapter->ifp;
 	int                     i, j, error;
 	int                     first;
 	u32                     olinfo_status = 0, cmd_type_len;
 	bool                    remap = TRUE;
 	bus_dmamap_t            map;
 	/* Basic descriptor defines */
 	cmd_type_len = (IXGBE_ADVTXD_DTYP_DATA |
 	    IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT);
 	if (vlan_has_tag(m_head))
 		cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
 	/*
 	 * Important to capture the first descriptor
 	 * used because it will contain the index of
 	 * the one we tell the hardware to report back
 	 */
 	first = txr->next_avail_desc;
 	txbuf = &txr->tx_buffers[first];
 	map = txbuf->map;
 	/*
 	 * Map the packet for DMA.
 	 */
 retry:
 	error = bus_dmamap_load_mbuf(txr->txtag->dt_dmat, map, m_head,
 	    BUS_DMA_NOWAIT);
 	if (__predict_false(error)) {
 		struct mbuf *m;
 		switch (error) {
 		case EAGAIN:
 			txr->q_eagain_tx_dma_setup++;
 			return EAGAIN;
 		case ENOMEM:
 			txr->q_enomem_tx_dma_setup++;
 			return EAGAIN;
 		case EFBIG:
 			/* Try it again? - one try */
 			if (remap == TRUE) {
 				remap = FALSE;
 				/*
 				 * XXX: m_defrag will choke on
 				 * non-MCLBYTES-sized clusters
 				 */
 				txr->q_efbig_tx_dma_setup++;
 				m = m_defrag(m_head, M_NOWAIT);
 				if (m == NULL) {
 					txr->q_mbuf_defrag_failed++;
 					return ENOBUFS;
+				}
 				m_head = m;
 				goto retry;
 			} else {
 				txr->q_efbig2_tx_dma_setup++;
 				return error;
+			}
 		case EINVAL:
 			txr->q_einval_tx_dma_setup++;
 			return error;
 		default:
 			txr->q_other_tx_dma_setup++;
 			return error;
+		}
+	}
 	/* Make certain there are enough descriptors */
 	if (txr->tx_avail < (map->dm_nsegs + 2)) {
 		txr->txr_no_space = true;
 		txr->no_desc_avail.ev_count++;
 		ixgbe_dmamap_unload(txr->txtag, txbuf->map);
 		return EAGAIN;
+	}
 	/*
 	 * Set up the appropriate offload context
 	 * this will consume the first descriptor
 	 */
 	error = ixgbe_tx_ctx_setup(txr, m_head, &cmd_type_len, &olinfo_status);
 	if (__predict_false(error)) {
 		return (error);
+	}
 	/* Do the flow director magic */
 	if ((adapter->feat_en & IXGBE_FEATURE_FDIR) &&
 	    (txr->atr_sample) && (!adapter->fdir_reinit)) {
 		++txr->atr_count;
 		if (txr->atr_count >= atr_sample_rate) {
 			ixgbe_atr(txr, m_head);
 			txr->atr_count = 0;
+		}
+	}
 	olinfo_status |= IXGBE_ADVTXD_CC;
 	i = txr->next_avail_desc;
 	for (j = 0; j < map->dm_nsegs; j++) {
 		bus_size_t seglen;
 		bus_addr_t segaddr;
 		txbuf = &txr->tx_buffers[i];
 		txd = &txr->tx_base[i];
 		seglen = map->dm_segs[j].ds_len;
 		segaddr = htole64(map->dm_segs[j].ds_addr);
 		txd->read.buffer_addr = segaddr;
 		txd->read.cmd_type_len = htole32(cmd_type_len | seglen);
 		txd->read.olinfo_status = htole32(olinfo_status);
 		if (++i == txr->num_desc)
 			i = 0;
+	}
 	txd->read.cmd_type_len |= htole32(IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS);
 	txr->tx_avail -= map->dm_nsegs;
 	txr->next_avail_desc = i;
 	txbuf->m_head = m_head;
 	/*
 	 * Here we swap the map so the last descriptor,
 	 * which gets the completion interrupt has the
 	 * real map, and the first descriptor gets the
 	 * unused map from this descriptor.
 	 */
 	txr->tx_buffers[first].map = txbuf->map;
 	txbuf->map = map;
 	bus_dmamap_sync(txr->txtag->dt_dmat, map, 0, m_head->m_pkthdr.len,
 	    BUS_DMASYNC_PREWRITE);
 	/* Set the EOP descriptor that will be marked done */
 	txbuf = &txr->tx_buffers[first];
 	txbuf->eop = txd;
 	ixgbe_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 	/*
 	 * Advance the Transmit Descriptor Tail (Tdt), this tells the
 	 * hardware that this frame is available to transmit.
 	 */
 	++txr->total_packets.ev_count;
 	IXGBE_WRITE_REG(&adapter->hw, txr->tail, i);
 	/*
 	 * XXXX NOMPSAFE: ifp->if_data should be percpu.
 	 */
 	ifp->if_obytes += m_head->m_pkthdr.len;
 	if (m_head->m_flags & M_MCAST)
 		ifp->if_omcasts++;
 	/* Mark queue as having work */
 	if (txr->busy == 0)
 		txr->busy = 1;
 	return (0);
 } /* ixgbe_xmit */
 /************************************************************************
  * ixgbe_drain
  ************************************************************************/
 static void
 ixgbe_drain(struct ifnet *ifp, struct tx_ring *txr)
+{
 	struct mbuf *m;
 	IXGBE_TX_LOCK_ASSERT(txr);
 	if (txr->me == 0) {
 		while (!IFQ_IS_EMPTY(&ifp->if_snd)) {
 			IFQ_DEQUEUE(&ifp->if_snd, m);
 			m_freem(m);
 			IF_DROP(&ifp->if_snd);
+		}
+	}
 	while ((m = pcq_get(txr->txr_interq)) != NULL) {
 		m_freem(m);
 		txr->pcq_drops.ev_count++;
+	}
+}
 /************************************************************************
  * ixgbe_allocate_transmit_buffers
+ *
  *   Allocate memory for tx_buffer structures. The tx_buffer stores all
  *   the information needed to transmit a packet on the wire. This is
  *   called only once at attach, setup is done every reset.
  ************************************************************************/
 static int
 ixgbe_allocate_transmit_buffers(struct tx_ring *txr)
+{
 	struct adapter      *adapter = txr->adapter;
 	device_t            dev = adapter->dev;
 	struct ixgbe_tx_buf *txbuf;
 	int                 error, i;
 	/*
 	 * Setup DMA descriptor areas.
 	 */
 	error = ixgbe_dma_tag_create(
 	         /*      parent */ adapter->osdep.dmat,
 	         /*   alignment */ 1,
 	         /*      bounds */ 0,
 	         /*     maxsize */ IXGBE_TSO_SIZE,
 	         /*   nsegments */ adapter->num_segs,
 	         /*  maxsegsize */ PAGE_SIZE,
 	         /*       flags */ 0,
 	                           &txr->txtag);
 	if (error != 0) {
 		aprint_error_dev(dev,"Unable to allocate TX DMA tag\n");
 		goto fail;
+	}
 	txr->tx_buffers =
 	    (struct ixgbe_tx_buf *) malloc(sizeof(struct ixgbe_tx_buf) *
 	    adapter->num_tx_desc, M_DEVBUF, M_NOWAIT | M_ZERO);
 	if (txr->tx_buffers == NULL) {
 		aprint_error_dev(dev, "Unable to allocate tx_buffer memory\n");
 		error = ENOMEM;
 		goto fail;
+	}
 	/* Create the descriptor buffer dma maps */
 	txbuf = txr->tx_buffers;
 	for (i = 0; i < adapter->num_tx_desc; i++, txbuf++) {
 		error = ixgbe_dmamap_create(txr->txtag, 0, &txbuf->map);
 		if (error != 0) {
 			aprint_error_dev(dev,
 			    "Unable to create TX DMA map (%d)\n", error);
 			goto fail;
+		}
+	}
 	return 0;
 fail:
 	/* We free all, it handles case where we are in the middle */
 #if 0 /* XXX was FreeBSD */
 	ixgbe_free_transmit_structures(adapter);
 #else
 	ixgbe_free_transmit_buffers(txr);
 #endif
 	return (error);
 } /* ixgbe_allocate_transmit_buffers */
 /************************************************************************
  * ixgbe_setup_transmit_ring - Initialize a transmit ring.
  ************************************************************************/
 static void
 ixgbe_setup_transmit_ring(struct tx_ring *txr)
+{
 	struct adapter        *adapter = txr->adapter;
 	struct ixgbe_tx_buf   *txbuf;
 #ifdef DEV_NETMAP
 	struct netmap_adapter *na = NA(adapter->ifp);
 	struct netmap_slot    *slot;
 #endif /* DEV_NETMAP */
 	/* Clear the old ring contents */
 	IXGBE_TX_LOCK(txr);
 #ifdef DEV_NETMAP
 	if (adapter->feat_en & IXGBE_FEATURE_NETMAP) {
 		/*
 		 * (under lock): if in netmap mode, do some consistency
 		 * checks and set slot to entry 0 of the netmap ring.
 		 */
 		slot = netmap_reset(na, NR_TX, txr->me, 0);
+	}
 #endif /* DEV_NETMAP */
 	bzero((void *)txr->tx_base,
 	    (sizeof(union ixgbe_adv_tx_desc)) * adapter->num_tx_desc);
 	/* Reset indices */
 	txr->next_avail_desc = 0;
 	txr->next_to_clean = 0;
 	/* Free any existing tx buffers. */
 	txbuf = txr->tx_buffers;
 	for (int i = 0; i < txr->num_desc; i++, txbuf++) {
 		if (txbuf->m_head != NULL) {
 			bus_dmamap_sync(txr->txtag->dt_dmat, txbuf->map,
 , txbuf->m_head->m_pkthdr.len,
 			    BUS_DMASYNC_POSTWRITE);
 			ixgbe_dmamap_unload(txr->txtag, txbuf->map);
 			m_freem(txbuf->m_head);
 			txbuf->m_head = NULL;
+		}
 #ifdef DEV_NETMAP
 		/*
 		 * In netmap mode, set the map for the packet buffer.
 		 * NOTE: Some drivers (not this one) also need to set
 		 * the physical buffer address in the NIC ring.
 		 * Slots in the netmap ring (indexed by "si") are
 		 * kring->nkr_hwofs positions "ahead" wrt the
 		 * corresponding slot in the NIC ring. In some drivers
 		 * (not here) nkr_hwofs can be negative. Function
 		 * netmap_idx_n2k() handles wraparounds properly.
 		 */
 		if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) && slot) {
 			int si = netmap_idx_n2k(na->tx_rings[txr->me], i);
 			netmap_load_map(na, txr->txtag,
 			    txbuf->map, NMB(na, slot + si));
+		}
 #endif /* DEV_NETMAP */
 		/* Clear the EOP descriptor pointer */
 		txbuf->eop = NULL;
+	}
 	/* Set the rate at which we sample packets */
 	if (adapter->feat_en & IXGBE_FEATURE_FDIR)
 		txr->atr_sample = atr_sample_rate;
 	/* Set number of descriptors available */
 	txr->tx_avail = adapter->num_tx_desc;
 	ixgbe_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 	IXGBE_TX_UNLOCK(txr);
 } /* ixgbe_setup_transmit_ring */
 /************************************************************************
  * ixgbe_setup_transmit_structures - Initialize all transmit rings.
  ************************************************************************/
 int
 ixgbe_setup_transmit_structures(struct adapter *adapter)
+{
 	struct tx_ring *txr = adapter->tx_rings;
 	for (int i = 0; i < adapter->num_queues; i++, txr++)
 		ixgbe_setup_transmit_ring(txr);
 	return (0);
 } /* ixgbe_setup_transmit_structures */
 /************************************************************************
  * ixgbe_free_transmit_structures - Free all transmit rings.
  ************************************************************************/
 void
 ixgbe_free_transmit_structures(struct adapter *adapter)
+{
 	struct tx_ring *txr = adapter->tx_rings;
 	for (int i = 0; i < adapter->num_queues; i++, txr++) {
 		ixgbe_free_transmit_buffers(txr);
 		ixgbe_dma_free(adapter, &txr->txdma);
 		IXGBE_TX_LOCK_DESTROY(txr);
+	}
 	free(adapter->tx_rings, M_DEVBUF);
 } /* ixgbe_free_transmit_structures */
 /************************************************************************
  * ixgbe_free_transmit_buffers
+ *
  *   Free transmit ring related data structures.
  ************************************************************************/
 static void
 ixgbe_free_transmit_buffers(struct tx_ring *txr)
+{
 	struct adapter      *adapter = txr->adapter;
 	struct ixgbe_tx_buf *tx_buffer;
 	int                 i;
 	INIT_DEBUGOUT("ixgbe_free_transmit_buffers: begin");
 	if (txr->tx_buffers == NULL)
 		return;
 	tx_buffer = txr->tx_buffers;
 	for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) {
 		if (tx_buffer->m_head != NULL) {
 			bus_dmamap_sync(txr->txtag->dt_dmat, tx_buffer->map,
 , tx_buffer->m_head->m_pkthdr.len,
 			    BUS_DMASYNC_POSTWRITE);
 			ixgbe_dmamap_unload(txr->txtag, tx_buffer->map);
 			m_freem(tx_buffer->m_head);
 			tx_buffer->m_head = NULL;
 			if (tx_buffer->map != NULL) {
 				ixgbe_dmamap_destroy(txr->txtag,
 				    tx_buffer->map);
 				tx_buffer->map = NULL;
+			}
 		} else if (tx_buffer->map != NULL) {
 			ixgbe_dmamap_unload(txr->txtag, tx_buffer->map);
 			ixgbe_dmamap_destroy(txr->txtag, tx_buffer->map);
 			tx_buffer->map = NULL;
+		}
+	}
 	if (txr->txr_interq != NULL) {
 		struct mbuf *m;
 		while ((m = pcq_get(txr->txr_interq)) != NULL)
 			m_freem(m);
 		pcq_destroy(txr->txr_interq);
+	}
 	if (txr->tx_buffers != NULL) {
 		free(txr->tx_buffers, M_DEVBUF);
 		txr->tx_buffers = NULL;
+	}
 	if (txr->txtag != NULL) {
 		ixgbe_dma_tag_destroy(txr->txtag);
 		txr->txtag = NULL;
+	}
 } /* ixgbe_free_transmit_buffers */
 /************************************************************************
  * ixgbe_tx_ctx_setup
+ *
  *   Advanced Context Descriptor setup for VLAN, CSUM or TSO
  ************************************************************************/
 static int
 ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp,
     u32 *cmd_type_len, u32 *olinfo_status)
+{
 	struct adapter                   *adapter = txr->adapter;
 	struct ixgbe_adv_tx_context_desc *TXD;
 	struct ether_vlan_header         *eh;
 #ifdef INET
 	struct ip                        *ip;
 #endif
 #ifdef INET6
 	struct ip6_hdr                   *ip6;
 #endif
 	int                              ehdrlen, ip_hlen = 0;
 	int                              offload = TRUE;
 	int                              ctxd = txr->next_avail_desc;
 	u32                              vlan_macip_lens = 0;
 	u32                              type_tucmd_mlhl = 0;
 	u16                              vtag = 0;
 	u16                              etype;
 	u8                               ipproto = 0;
 	char                             *l3d;
 	/* First check if TSO is to be used */
 	if (mp->m_pkthdr.csum_flags & (M_CSUM_TSOv4 | M_CSUM_TSOv6)) {
 		int rv = ixgbe_tso_setup(txr, mp, cmd_type_len, olinfo_status);
 		if (rv != 0)
 			++adapter->tso_err.ev_count;
 		return rv;
+	}
 	if ((mp->m_pkthdr.csum_flags & M_CSUM_OFFLOAD) == 0)
 		offload = FALSE;
 	/* Indicate the whole packet as payload when not doing TSO */
 	*olinfo_status |= mp->m_pkthdr.len << IXGBE_ADVTXD_PAYLEN_SHIFT;
 	/* Now ready a context descriptor */
 	TXD = (struct ixgbe_adv_tx_context_desc *)&txr->tx_base[ctxd];
 	/*
 	 * In advanced descriptors the vlan tag must
 	 * be placed into the context descriptor. Hence
 	 * we need to make one even if not doing offloads.
 	 */
 	if (vlan_has_tag(mp)) {
 		vtag = htole16(vlan_get_tag(mp));
 		vlan_macip_lens |= (vtag << IXGBE_ADVTXD_VLAN_SHIFT);
 	} else if (!(txr->adapter->feat_en & IXGBE_FEATURE_NEEDS_CTXD) &&
 	           (offload == FALSE))
 		return (0);
 	/*
 	 * Determine where frame payload starts.
 	 * Jump over vlan headers if already present,
 	 * helpful for QinQ too.
 	 */
 	KASSERT(mp->m_len >= offsetof(struct ether_vlan_header, evl_tag));
 	eh = mtod(mp, struct ether_vlan_header *);
 	if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
 		KASSERT(mp->m_len >= sizeof(struct ether_vlan_header));
 		etype = ntohs(eh->evl_proto);
 		ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
 	} else {
 		etype = ntohs(eh->evl_encap_proto);
 		ehdrlen = ETHER_HDR_LEN;
+	}
 	/* Set the ether header length */
 	vlan_macip_lens |= ehdrlen << IXGBE_ADVTXD_MACLEN_SHIFT;
 	if (offload == FALSE)
 		goto no_offloads;
 	/*
 	 * If the first mbuf only includes the ethernet header,
 	 * jump to the next one
 	 * XXX: This assumes the stack splits mbufs containing headers
 	 *      on header boundaries
 	 * XXX: And assumes the entire IP header is contained in one mbuf
 	 */
 	if (mp->m_len == ehdrlen && mp->m_next)
 		l3d = mtod(mp->m_next, char *);
 	else
 		l3d = mtod(mp, char *) + ehdrlen;
 	switch (etype) {
 #ifdef INET
 	case ETHERTYPE_IP:
 		ip = (struct ip *)(l3d);
 		ip_hlen = ip->ip_hl << 2;
 		ipproto = ip->ip_p;
 		type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
 		KASSERT((mp->m_pkthdr.csum_flags & M_CSUM_IPv4) == 0 ||
 		    ip->ip_sum == 0);
 		break;
 #endif
 #ifdef INET6
 	case ETHERTYPE_IPV6:
 		ip6 = (struct ip6_hdr *)(l3d);
 		ip_hlen = sizeof(struct ip6_hdr);
 		ipproto = ip6->ip6_nxt;
 		type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV6;
 		break;
 #endif
 	default:
 		offload = false;
 		break;
+	}
 	if ((mp->m_pkthdr.csum_flags & M_CSUM_IPv4) != 0)
 		*olinfo_status |= IXGBE_TXD_POPTS_IXSM << 8;
 	vlan_macip_lens |= ip_hlen;
 	/* No support for offloads for non-L4 next headers */
 	switch (ipproto) {
 	case IPPROTO_TCP:
 		if (mp->m_pkthdr.csum_flags &
 		    (M_CSUM_TCPv4 | M_CSUM_TCPv6))
 			type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
 		else
 			offload = false;
 		break;
 	case IPPROTO_UDP:
 		if (mp->m_pkthdr.csum_flags &
 		    (M_CSUM_UDPv4 | M_CSUM_UDPv6))
 			type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_UDP;
 		else
 			offload = false;
 		break;
 	default:
 		offload = false;
 		break;
+	}
 	if (offload) /* Insert L4 checksum into data descriptors */
 		*olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8;
 no_offloads:
 	type_tucmd_mlhl |= IXGBE_ADVTXD_DCMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
 	/* Now copy bits into descriptor */
 	TXD->vlan_macip_lens = htole32(vlan_macip_lens);
 	TXD->type_tucmd_mlhl = htole32(type_tucmd_mlhl);
 	TXD->seqnum_seed = htole32(0);
 	TXD->mss_l4len_idx = htole32(0);
 	/* We've consumed the first desc, adjust counters */
 	if (++ctxd == txr->num_desc)
 		ctxd = 0;
 	txr->next_avail_desc = ctxd;
 	--txr->tx_avail;
 	return (0);
 } /* ixgbe_tx_ctx_setup */
 /************************************************************************
  * ixgbe_tso_setup
+ *
  *   Setup work for hardware segmentation offload (TSO) on
  *   adapters using advanced tx descriptors
  ************************************************************************/
 static int
 ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *cmd_type_len,
     u32 *olinfo_status)
+{
 	struct ixgbe_adv_tx_context_desc *TXD;
 	struct ether_vlan_header         *eh;
 #ifdef INET6
 	struct ip6_hdr                   *ip6;
 #endif
 #ifdef INET
 	struct ip                        *ip;
 #endif
 	struct tcphdr                    *th;
 	int                              ctxd, ehdrlen, ip_hlen, tcp_hlen;
 	u32                              vlan_macip_lens = 0;
 	u32                              type_tucmd_mlhl = 0;
 	u32                              mss_l4len_idx = 0, paylen;
 	u16                              vtag = 0, eh_type;
 	/*
 	 * Determine where frame payload starts.
 	 * Jump over vlan headers if already present
 	 */
 	eh = mtod(mp, struct ether_vlan_header *);
 	if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
 		ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
 		eh_type = eh->evl_proto;
 	} else {
 		ehdrlen = ETHER_HDR_LEN;
 		eh_type = eh->evl_encap_proto;
+	}
 	switch (ntohs(eh_type)) {
 #ifdef INET
 	case ETHERTYPE_IP:
 		ip = (struct ip *)(mp->m_data + ehdrlen);
 		if (ip->ip_p != IPPROTO_TCP)
 			return (ENXIO);
 		ip->ip_sum = 0;
 		ip_hlen = ip->ip_hl << 2;
 		th = (struct tcphdr *)((char *)ip + ip_hlen);
 		th->th_sum = in_cksum_phdr(ip->ip_src.s_addr,
 		    ip->ip_dst.s_addr, htons(IPPROTO_TCP));
 		type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
 		/* Tell transmit desc to also do IPv4 checksum. */
 		*olinfo_status |= IXGBE_TXD_POPTS_IXSM << 8;
 		break;
 #endif
 #ifdef INET6
 	case ETHERTYPE_IPV6:
 		ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen);
 		/* XXX-BZ For now we do not pretend to support ext. hdrs. */
 		if (ip6->ip6_nxt != IPPROTO_TCP)
 			return (ENXIO);
 		ip_hlen = sizeof(struct ip6_hdr);
 		ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen);
 		th = (struct tcphdr *)((char *)ip6 + ip_hlen);
 		th->th_sum = in6_cksum_phdr(&ip6->ip6_src,
 		    &ip6->ip6_dst, 0, htonl(IPPROTO_TCP));
 		type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV6;
 		break;
 #endif
 	default:
 		panic("%s: CSUM_TSO but no supported IP version (0x%04x)",
 		    __func__, ntohs(eh_type));
 		break;
+	}
 	ctxd = txr->next_avail_desc;
 	TXD = (struct ixgbe_adv_tx_context_desc *)&txr->tx_base[ctxd];
 	tcp_hlen = th->th_off << 2;
 	/* This is used in the transmit desc in encap */
 	paylen = mp->m_pkthdr.len - ehdrlen - ip_hlen - tcp_hlen;
 	/* VLAN MACLEN IPLEN */
 	if (vlan_has_tag(mp)) {
 		vtag = htole16(vlan_get_tag(mp));
 		vlan_macip_lens |= (vtag << IXGBE_ADVTXD_VLAN_SHIFT);
+	}
 	vlan_macip_lens |= ehdrlen << IXGBE_ADVTXD_MACLEN_SHIFT;
 	vlan_macip_lens |= ip_hlen;
 	TXD->vlan_macip_lens = htole32(vlan_macip_lens);
 	/* ADV DTYPE TUCMD */
 	type_tucmd_mlhl |= IXGBE_ADVTXD_DCMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
 	type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
 	TXD->type_tucmd_mlhl = htole32(type_tucmd_mlhl);
 	/* MSS L4LEN IDX */
 	mss_l4len_idx |= (mp->m_pkthdr.segsz << IXGBE_ADVTXD_MSS_SHIFT);
 	mss_l4len_idx |= (tcp_hlen << IXGBE_ADVTXD_L4LEN_SHIFT);
 	TXD->mss_l4len_idx = htole32(mss_l4len_idx);
 	TXD->seqnum_seed = htole32(0);
 	if (++ctxd == txr->num_desc)
 		ctxd = 0;
 	txr->tx_avail--;
 	txr->next_avail_desc = ctxd;
 	*cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
 	*olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8;
 	*olinfo_status |= paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
 	++txr->tso_tx.ev_count;
 	return (0);
 } /* ixgbe_tso_setup */
 /************************************************************************
  * ixgbe_txeof
+ *
  *   Examine each tx_buffer in the used queue. If the hardware is done
  *   processing the packet then free associated resources. The
  *   tx_buffer is put back on the free queue.
  ************************************************************************/
 bool
 ixgbe_txeof(struct tx_ring *txr)
+{
 	struct adapter		*adapter = txr->adapter;
 	struct ifnet		*ifp = adapter->ifp;
 	struct ixgbe_tx_buf	*buf;
 	union ixgbe_adv_tx_desc *txd;
 	u32			work, processed = 0;
 	u32			limit = adapter->tx_process_limit;
 	KASSERT(mutex_owned(&txr->tx_mtx));
 #ifdef DEV_NETMAP
 	if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
 	    (adapter->ifp->if_capenable & IFCAP_NETMAP)) {
 		struct netmap_adapter *na = NA(adapter->ifp);
 		struct netmap_kring *kring = na->tx_rings[txr->me];
 		txd = txr->tx_base;
 		bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
 		    BUS_DMASYNC_POSTREAD);
 		/*
 		 * In netmap mode, all the work is done in the context
 		 * of the client thread. Interrupt handlers only wake up
 		 * clients, which may be sleeping on individual rings
 		 * or on a global resource for all rings.
 		 * To implement tx interrupt mitigation, we wake up the client
 		 * thread roughly every half ring, even if the NIC interrupts
 		 * more frequently. This is implemented as follows:
 		 * - ixgbe_txsync() sets kring->nr_kflags with the index of
 		 *   the slot that should wake up the thread (nkr_num_slots
 		 *   means the user thread should not be woken up);
 		 * - the driver ignores tx interrupts unless netmap_mitigate=0
 		 *   or the slot has the DD bit set.
 		 */
 		if (kring->nr_kflags < kring->nkr_num_slots &&
 		    txd[kring->nr_kflags].wb.status & IXGBE_TXD_STAT_DD) {
 			netmap_tx_irq(ifp, txr->me);
+		}
 		return false;
+	}
 #endif /* DEV_NETMAP */
 	if (txr->tx_avail == txr->num_desc) {
 		txr->busy = 0;
 		return false;
+	}
 	/* Get work starting point */
 	work = txr->next_to_clean;
 	buf = &txr->tx_buffers[work];
 	txd = &txr->tx_base[work];
 	work -= txr->num_desc; /* The distance to ring end */
 	ixgbe_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
 	    BUS_DMASYNC_POSTREAD);
 	do {
 		union ixgbe_adv_tx_desc *eop = buf->eop;
 		if (eop == NULL) /* No work */
 			break;
 		if ((eop->wb.status & IXGBE_TXD_STAT_DD) == 0)
 			break;	/* I/O not complete */
 		if (buf->m_head) {
 			txr->bytes += buf->m_head->m_pkthdr.len;
 			bus_dmamap_sync(txr->txtag->dt_dmat, buf->map,
 , buf->m_head->m_pkthdr.len,
 			    BUS_DMASYNC_POSTWRITE);
 			ixgbe_dmamap_unload(txr->txtag, buf->map);
 			m_freem(buf->m_head);
 			buf->m_head = NULL;
+		}
 		buf->eop = NULL;
 		txr->txr_no_space = false;
 		++txr->tx_avail;
 		/* We clean the range if multi segment */
 		while (txd != eop) {
 			++txd;
 			++buf;
 			++work;
 			/* wrap the ring? */
 			if (__predict_false(!work)) {
 				work -= txr->num_desc;
 				buf = txr->tx_buffers;
 				txd = txr->tx_base;
+			}
 			if (buf->m_head) {
 				txr->bytes +=
 				    buf->m_head->m_pkthdr.len;
 				bus_dmamap_sync(txr->txtag->dt_dmat,
 				    buf->map,
 , buf->m_head->m_pkthdr.len,
 				    BUS_DMASYNC_POSTWRITE);
 				ixgbe_dmamap_unload(txr->txtag,
 				    buf->map);
 				m_freem(buf->m_head);
 				buf->m_head = NULL;
+			}
 			++txr->tx_avail;
 			buf->eop = NULL;
+		}
 		++txr->packets;
 		++processed;
 		++ifp->if_opackets;
 		/* Try the next packet */
 		++txd;
 		++buf;
 		++work;
 		/* reset with a wrap */
 		if (__predict_false(!work)) {
 			work -= txr->num_desc;
 			buf = txr->tx_buffers;
 			txd = txr->tx_base;
+		}
 		prefetch(txd);
 	} while (__predict_true(--limit));
 	ixgbe_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 	work += txr->num_desc;
 	txr->next_to_clean = work;
 	/*
 	 * Queue Hang detection, we know there's
 	 * work outstanding or the first return
 	 * would have been taken, so increment busy
 	 * if nothing managed to get cleaned, then
 	 * in local_timer it will be checked and
 	 * marked as HUNG if it exceeds a MAX attempt.
 	 */
 	if ((processed == 0) && (txr->busy != IXGBE_QUEUE_HUNG))
 		++txr->busy;
 	/*
 	 * If anything gets cleaned we reset state to 1,
 	 * note this will turn off HUNG if its set.
 	 */
 	if (processed)
 		txr->busy = 1;
 	if (txr->tx_avail == txr->num_desc)
 		txr->busy = 0;
 	return ((limit > 0) ? false : true);
 } /* ixgbe_txeof */
 /************************************************************************
  * ixgbe_rsc_count
+ *
  *   Used to detect a descriptor that has been merged by Hardware RSC.
  ************************************************************************/
 static inline u32
 ixgbe_rsc_count(union ixgbe_adv_rx_desc *rx)
+{
 	return (le32toh(rx->wb.lower.lo_dword.data) &
 	    IXGBE_RXDADV_RSCCNT_MASK) >> IXGBE_RXDADV_RSCCNT_SHIFT;
 } /* ixgbe_rsc_count */
 /************************************************************************
  * ixgbe_setup_hw_rsc
+ *
  *   Initialize Hardware RSC (LRO) feature on 82599
  *   for an RX ring, this is toggled by the LRO capability
  *   even though it is transparent to the stack.
+ *
  *   NOTE: Since this HW feature only works with IPv4 and
  *         testing has shown soft LRO to be as effective,
  *         this feature will be disabled by default.
  ************************************************************************/
 static void
 ixgbe_setup_hw_rsc(struct rx_ring *rxr)
+{
 	struct	adapter  *adapter = rxr->adapter;
 	struct	ixgbe_hw *hw = &adapter->hw;
 	u32              rscctrl, rdrxctl;
 	/* If turning LRO/RSC off we need to disable it */
 	if ((adapter->ifp->if_capenable & IFCAP_LRO) == 0) {
 		rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(rxr->me));
 		rscctrl &= ~IXGBE_RSCCTL_RSCEN;
 		return;
+	}
 	rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 	rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
 #ifdef DEV_NETMAP
 	/* Always strip CRC unless Netmap disabled it */
 	if (!(adapter->feat_en & IXGBE_FEATURE_NETMAP) ||
 	    !(adapter->ifp->if_capenable & IFCAP_NETMAP) ||
 	    ix_crcstrip)
 #endif /* DEV_NETMAP */
 		rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
 	rdrxctl |= IXGBE_RDRXCTL_RSCACKC;
 	IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
 	rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(rxr->me));
 	rscctrl |= IXGBE_RSCCTL_RSCEN;
 	/*
 	 * Limit the total number of descriptors that
 	 * can be combined, so it does not exceed 64K
 	 */
 	if (rxr->mbuf_sz == MCLBYTES)
 		rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
 	else if (rxr->mbuf_sz == MJUMPAGESIZE)
 		rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
 	else if (rxr->mbuf_sz == MJUM9BYTES)
 		rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
 	else  /* Using 16K cluster */
 		rscctrl |= IXGBE_RSCCTL_MAXDESC_1;
 	IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(rxr->me), rscctrl);
 	/* Enable TCP header recognition */
 	IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0),
 	    (IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)) | IXGBE_PSRTYPE_TCPHDR));
 	/* Disable RSC for ACK packets */
 	IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
 	    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
 	rxr->hw_rsc = TRUE;
 } /* ixgbe_setup_hw_rsc */
 /************************************************************************
  * ixgbe_refresh_mbufs
+ *
  *   Refresh mbuf buffers for RX descriptor rings
  *    - now keeps its own state so discards due to resource
  *      exhaustion are unnecessary, if an mbuf cannot be obtained
  *      it just returns, keeping its placeholder, thus it can simply
  *      be recalled to try again.
+ *
  *   XXX NetBSD TODO:
  *    - The ixgbe_rxeof() function always preallocates mbuf cluster (jcl),
  *      so the ixgbe_refresh_mbufs() function can be simplified.
+ *
  ************************************************************************/
 static void
 ixgbe_refresh_mbufs(struct rx_ring *rxr, int limit)
+{
 	struct adapter      *adapter = rxr->adapter;
 	struct ixgbe_rx_buf *rxbuf;
 	struct mbuf         *mp;
 	int                 i, j, error;
 	bool                refreshed = false;
 	i = j = rxr->next_to_refresh;
 	/* Control the loop with one beyond */
 	if (++j == rxr->num_desc)
 		j = 0;
 	while (j != limit) {
 		rxbuf = &rxr->rx_buffers[i];
 		if (rxbuf->buf == NULL) {
 			mp = ixgbe_getjcl(&rxr->jcl_head, M_NOWAIT,
 			    MT_DATA, M_PKTHDR, rxr->mbuf_sz);
 			if (mp == NULL) {
 				rxr->no_jmbuf.ev_count++;
 				goto update;
+			}
 			if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
 				m_adj(mp, ETHER_ALIGN);
 		} else
 			mp = rxbuf->buf;
 		mp->m_pkthdr.len = mp->m_len = rxr->mbuf_sz;
 		/* If we're dealing with an mbuf that was copied rather
 		 * than replaced, there's no need to go through busdma.
 		 */
 		if ((rxbuf->flags & IXGBE_RX_COPY) == 0) {
 			/* Get the memory mapping */
 			ixgbe_dmamap_unload(rxr->ptag, rxbuf->pmap);
 			error = bus_dmamap_load_mbuf(rxr->ptag->dt_dmat,
 			    rxbuf->pmap, mp, BUS_DMA_NOWAIT);
 			if (error != 0) {
 				device_printf(adapter->dev, "Refresh mbufs: "
 				    "payload dmamap load failure - %d\n",
 				    error);
 				m_free(mp);
 				rxbuf->buf = NULL;
 				goto update;
+			}
 			rxbuf->buf = mp;
 			bus_dmamap_sync(rxr->ptag->dt_dmat, rxbuf->pmap,
 , mp->m_pkthdr.len, BUS_DMASYNC_PREREAD);
 			rxbuf->addr = rxr->rx_base[i].read.pkt_addr =
 			    htole64(rxbuf->pmap->dm_segs[0].ds_addr);
 		} else {
 			rxr->rx_base[i].read.pkt_addr = rxbuf->addr;
 			rxbuf->flags &= ~IXGBE_RX_COPY;
+		}
 		refreshed = true;
 		/* Next is precalculated */
 		i = j;
 		rxr->next_to_refresh = i;
 		if (++j == rxr->num_desc)
 			j = 0;
+	}
 update:
 	if (refreshed) /* Update hardware tail index */
 		IXGBE_WRITE_REG(&adapter->hw, rxr->tail, rxr->next_to_refresh);
 	return;
 } /* ixgbe_refresh_mbufs */
 /************************************************************************
  * ixgbe_allocate_receive_buffers
+ *
  *   Allocate memory for rx_buffer structures. Since we use one
  *   rx_buffer per received packet, the maximum number of rx_buffer's
  *   that we'll need is equal to the number of receive descriptors
  *   that we've allocated.
  ************************************************************************/
 static int
 ixgbe_allocate_receive_buffers(struct rx_ring *rxr)
+{
 	struct adapter      *adapter = rxr->adapter;
 	device_t            dev = adapter->dev;
 	struct ixgbe_rx_buf *rxbuf;
 	int                 bsize, error;
 	bsize = sizeof(struct ixgbe_rx_buf) * rxr->num_desc;
 	rxr->rx_buffers = (struct ixgbe_rx_buf *)malloc(bsize, M_DEVBUF,
 	    M_NOWAIT | M_ZERO);
 	if (rxr->rx_buffers == NULL) {
 		aprint_error_dev(dev, "Unable to allocate rx_buffer memory\n");
 		error = ENOMEM;
 		goto fail;
+	}
 	error = ixgbe_dma_tag_create(
 	         /*      parent */ adapter->osdep.dmat,
 	         /*   alignment */ 1,
 	         /*      bounds */ 0,
 	         /*     maxsize */ MJUM16BYTES,
 	         /*   nsegments */ 1,
 	         /*  maxsegsize */ MJUM16BYTES,
 	         /*       flags */ 0,
 	                           &rxr->ptag);
 	if (error != 0) {
 		aprint_error_dev(dev, "Unable to create RX DMA tag\n");
 		goto fail;
+	}
 	for (int i = 0; i < rxr->num_desc; i++, rxbuf++) {
 		rxbuf = &rxr->rx_buffers[i];
 		error = ixgbe_dmamap_create(rxr->ptag, 0, &rxbuf->pmap);
 		if (error) {
 			aprint_error_dev(dev, "Unable to create RX dma map\n");
 			goto fail;
+		}
+	}
 	return (0);
 fail:
 	/* Frees all, but can handle partial completion */
 	ixgbe_free_receive_structures(adapter);
 	return (error);
 } /* ixgbe_allocate_receive_buffers */
 /************************************************************************
  * ixgbe_free_receive_ring
  ************************************************************************/
 static void
 ixgbe_free_receive_ring(struct rx_ring *rxr)
+{
 	for (int i = 0; i < rxr->num_desc; i++) {
 		ixgbe_rx_discard(rxr, i);
+	}
 } /* ixgbe_free_receive_ring */
 /************************************************************************
  * ixgbe_setup_receive_ring
+ *
  *   Initialize a receive ring and its buffers.
  ************************************************************************/
 static int
 ixgbe_setup_receive_ring(struct rx_ring *rxr)
+{
 	struct adapter        *adapter;
 	struct ixgbe_rx_buf   *rxbuf;
 #ifdef LRO
 	struct ifnet          *ifp;
 	struct lro_ctrl       *lro = &rxr->lro;
 #endif /* LRO */
 #ifdef DEV_NETMAP
 	struct netmap_adapter *na = NA(rxr->adapter->ifp);
 	struct netmap_slot    *slot;
 #endif /* DEV_NETMAP */
 	int                   rsize, error = 0;
 	adapter = rxr->adapter;
 #ifdef LRO
 	ifp = adapter->ifp;
 #endif /* LRO */
 	/* Clear the ring contents */
 	IXGBE_RX_LOCK(rxr);
 #ifdef DEV_NETMAP
 	if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
 		slot = netmap_reset(na, NR_RX, rxr->me, 0);
 #endif /* DEV_NETMAP */
 	rsize = roundup2(adapter->num_rx_desc *
 	    sizeof(union ixgbe_adv_rx_desc), DBA_ALIGN);
 	bzero((void *)rxr->rx_base, rsize);
 	/* Cache the size */
 	rxr->mbuf_sz = adapter->rx_mbuf_sz;
 	/* Free current RX buffer structs and their mbufs */
 	ixgbe_free_receive_ring(rxr);
 	IXGBE_RX_UNLOCK(rxr);
 	/*
 	 * Now reinitialize our supply of jumbo mbufs.  The number
 	 * or size of jumbo mbufs may have changed.
 	 * Assume all of rxr->ptag are the same.
 	 */
 	ixgbe_jcl_reinit(adapter, rxr->ptag->dt_dmat, rxr,
-	    (2 * adapter->num_rx_desc), adapter->rx_mbuf_sz);
+	    adapter->num_jcl, adapter->rx_mbuf_sz);
 	IXGBE_RX_LOCK(rxr);
 	/* Now replenish the mbufs */
 	for (int j = 0; j != rxr->num_desc; ++j) {
 		struct mbuf *mp;
 		rxbuf = &rxr->rx_buffers[j];
 #ifdef DEV_NETMAP
 		/*
 		 * In netmap mode, fill the map and set the buffer
 		 * address in the NIC ring, considering the offset
 		 * between the netmap and NIC rings (see comment in
 		 * ixgbe_setup_transmit_ring() ). No need to allocate
 		 * an mbuf, so end the block with a continue;
 		 */
 		if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) && slot) {
 			int sj = netmap_idx_n2k(na->rx_rings[rxr->me], j);
 			uint64_t paddr;
 			void *addr;
 			addr = PNMB(na, slot + sj, &paddr);
 			netmap_load_map(na, rxr->ptag, rxbuf->pmap, addr);
 			/* Update descriptor and the cached value */
 			rxr->rx_base[j].read.pkt_addr = htole64(paddr);
 			rxbuf->addr = htole64(paddr);
 			continue;
+		}
 #endif /* DEV_NETMAP */
 		rxbuf->flags = 0;
 		rxbuf->buf = ixgbe_getjcl(&rxr->jcl_head, M_NOWAIT,
 		    MT_DATA, M_PKTHDR, adapter->rx_mbuf_sz);
 		if (rxbuf->buf == NULL) {
 			error = ENOBUFS;
 			goto fail;
+		}
 		mp = rxbuf->buf;
 		mp->m_pkthdr.len = mp->m_len = rxr->mbuf_sz;
 		/* Get the memory mapping */
 		error = bus_dmamap_load_mbuf(rxr->ptag->dt_dmat, rxbuf->pmap,
 		    mp, BUS_DMA_NOWAIT);
 		if (error != 0)
                         goto fail;
 		bus_dmamap_sync(rxr->ptag->dt_dmat, rxbuf->pmap,
 , adapter->rx_mbuf_sz, BUS_DMASYNC_PREREAD);
 		/* Update the descriptor and the cached value */
 		rxr->rx_base[j].read.pkt_addr =
 		    htole64(rxbuf->pmap->dm_segs[0].ds_addr);
 		rxbuf->addr = htole64(rxbuf->pmap->dm_segs[0].ds_addr);
+	}
 	/* Setup our descriptor indices */
 	rxr->next_to_check = 0;
 	rxr->next_to_refresh = 0;
 	rxr->lro_enabled = FALSE;
 	rxr->rx_copies.ev_count = 0;
 #if 0 /* NetBSD */
 	rxr->rx_bytes.ev_count = 0;
 #if 1	/* Fix inconsistency */
 	rxr->rx_packets.ev_count = 0;
 #endif
 #endif
 	rxr->vtag_strip = FALSE;
 	ixgbe_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 	/*
 	 * Now set up the LRO interface
 	 */
 	if (ixgbe_rsc_enable)
 		ixgbe_setup_hw_rsc(rxr);
 #ifdef LRO
 	else if (ifp->if_capenable & IFCAP_LRO) {
 		device_t dev = adapter->dev;
 		int err = tcp_lro_init(lro);
 		if (err) {
 			device_printf(dev, "LRO Initialization failed!\n");
 			goto fail;
+		}
 		INIT_DEBUGOUT("RX Soft LRO Initialized\n");
 		rxr->lro_enabled = TRUE;
 		lro->ifp = adapter->ifp;
+	}
 #endif /* LRO */
 	IXGBE_RX_UNLOCK(rxr);
 	return (0);
 fail:
 	ixgbe_free_receive_ring(rxr);
 	IXGBE_RX_UNLOCK(rxr);
 	return (error);
 } /* ixgbe_setup_receive_ring */
 /************************************************************************
  * ixgbe_setup_receive_structures - Initialize all receive rings.
  ************************************************************************/
 int
 ixgbe_setup_receive_structures(struct adapter *adapter)
+{
 	struct rx_ring *rxr = adapter->rx_rings;
 	int            j;
 	INIT_DEBUGOUT("ixgbe_setup_receive_structures");
 	for (j = 0; j < adapter->num_queues; j++, rxr++)
 		if (ixgbe_setup_receive_ring(rxr))
 			goto fail;
 	return (0);
 fail:
 	/*
 	 * Free RX buffers allocated so far, we will only handle
 	 * the rings that completed, the failing case will have
 	 * cleaned up for itself. 'j' failed, so its the terminus.
 	 */
 	for (int i = 0; i < j; ++i) {
 		rxr = &adapter->rx_rings[i];
 		IXGBE_RX_LOCK(rxr);
 		ixgbe_free_receive_ring(rxr);
 		IXGBE_RX_UNLOCK(rxr);
+	}
 	return (ENOBUFS);
 } /* ixgbe_setup_receive_structures */
 /************************************************************************
  * ixgbe_free_receive_structures - Free all receive rings.
  ************************************************************************/
 void
 ixgbe_free_receive_structures(struct adapter *adapter)
+{
 	struct rx_ring *rxr = adapter->rx_rings;
 	INIT_DEBUGOUT("ixgbe_free_receive_structures: begin");
 	for (int i = 0; i < adapter->num_queues; i++, rxr++) {
 		ixgbe_free_receive_buffers(rxr);
 #ifdef LRO
 		/* Free LRO memory */
 		tcp_lro_free(&rxr->lro);
 #endif /* LRO */
 		/* Free the ring memory as well */
 		ixgbe_dma_free(adapter, &rxr->rxdma);
 		IXGBE_RX_LOCK_DESTROY(rxr);
+	}
 	free(adapter->rx_rings, M_DEVBUF);
 } /* ixgbe_free_receive_structures */
 /************************************************************************
  * ixgbe_free_receive_buffers - Free receive ring data structures
  ************************************************************************/
 static void
 ixgbe_free_receive_buffers(struct rx_ring *rxr)
+{
 	struct adapter      *adapter = rxr->adapter;
 	struct ixgbe_rx_buf *rxbuf;
 	INIT_DEBUGOUT("ixgbe_free_receive_buffers: begin");
 	/* Cleanup any existing buffers */
 	if (rxr->rx_buffers != NULL) {
 		for (int i = 0; i < adapter->num_rx_desc; i++) {
 			rxbuf = &rxr->rx_buffers[i];
 			ixgbe_rx_discard(rxr, i);
 			if (rxbuf->pmap != NULL) {
 				ixgbe_dmamap_destroy(rxr->ptag, rxbuf->pmap);
 				rxbuf->pmap = NULL;
+			}
+		}
 		/* NetBSD specific. See ixgbe_netbsd.c */
 		ixgbe_jcl_destroy(adapter, rxr);
 		if (rxr->rx_buffers != NULL) {
 			free(rxr->rx_buffers, M_DEVBUF);
 			rxr->rx_buffers = NULL;
+		}
+	}
 	if (rxr->ptag != NULL) {
 		ixgbe_dma_tag_destroy(rxr->ptag);
 		rxr->ptag = NULL;
+	}
 	return;
 } /* ixgbe_free_receive_buffers */
 /************************************************************************
  * ixgbe_rx_input
  ************************************************************************/
 static __inline void
 ixgbe_rx_input(struct rx_ring *rxr, struct ifnet *ifp, struct mbuf *m,
     u32 ptype)
+{
 	struct adapter	*adapter = ifp->if_softc;
 #ifdef LRO
 	struct ethercom *ec = &adapter->osdep.ec;
 	/*
 	 * ATM LRO is only for IP/TCP packets and TCP checksum of the packet
 	 * should be computed by hardware. Also it should not have VLAN tag in
 	 * ethernet header.  In case of IPv6 we do not yet support ext. hdrs.
 	 */
         if (rxr->lro_enabled &&
             (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING) != 0 &&
             (ptype & IXGBE_RXDADV_PKTTYPE_ETQF) == 0 &&
             ((ptype & (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP)) ==
             (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP) ||
             (ptype & (IXGBE_RXDADV_PKTTYPE_IPV6 | IXGBE_RXDADV_PKTTYPE_TCP)) ==
             (IXGBE_RXDADV_PKTTYPE_IPV6 | IXGBE_RXDADV_PKTTYPE_TCP)) &&
             (m->m_pkthdr.csum_flags & (CSUM_DATA_VALID | CSUM_PSEUDO_HDR)) ==
             (CSUM_DATA_VALID | CSUM_PSEUDO_HDR)) {
                 /*
                  * Send to the stack if:
                  **  - LRO not enabled, or
                  **  - no LRO resources, or
                  **  - lro enqueue fails
                  */
                 if (rxr->lro.lro_cnt != 0)
                         if (tcp_lro_rx(&rxr->lro, m, 0) == 0)
                                 return;
+        }
 #endif /* LRO */
 	if_percpuq_enqueue(adapter->ipq, m);
 } /* ixgbe_rx_input */
 /************************************************************************
  * ixgbe_rx_discard
  ************************************************************************/
 static __inline void
 ixgbe_rx_discard(struct rx_ring *rxr, int i)
+{
 	struct ixgbe_rx_buf *rbuf;
 	rbuf = &rxr->rx_buffers[i];
 	/*
 	 * With advanced descriptors the writeback
 	 * clobbers the buffer addrs, so its easier
 	 * to just free the existing mbufs and take
 	 * the normal refresh path to get new buffers
 	 * and mapping.
 	 */
 	if (rbuf->fmp != NULL) {/* Partial chain ? */
 		bus_dmamap_sync(rxr->ptag->dt_dmat, rbuf->pmap, 0,
 		    rbuf->buf->m_pkthdr.len, BUS_DMASYNC_POSTREAD);
 		m_freem(rbuf->fmp);
 		rbuf->fmp = NULL;
 		rbuf->buf = NULL; /* rbuf->buf is part of fmp's chain */
 	} else if (rbuf->buf) {
 		bus_dmamap_sync(rxr->ptag->dt_dmat, rbuf->pmap, 0,
 		    rbuf->buf->m_pkthdr.len, BUS_DMASYNC_POSTREAD);
 		m_free(rbuf->buf);
 		rbuf->buf = NULL;
+	}
 	ixgbe_dmamap_unload(rxr->ptag, rbuf->pmap);
 	rbuf->flags = 0;
 	return;
 } /* ixgbe_rx_discard */
 /************************************************************************
  * ixgbe_rxeof
+ *
  *   Executes in interrupt context. It replenishes the
  *   mbufs in the descriptor and sends data which has
  *   been dma'ed into host memory to upper layer.
+ *
  *   Return TRUE for more work, FALSE for all clean.
  ************************************************************************/
 bool
 ixgbe_rxeof(struct ix_queue *que)
+{
 	struct adapter		*adapter = que->adapter;
 	struct rx_ring		*rxr = que->rxr;
 	struct ifnet		*ifp = adapter->ifp;
 #ifdef LRO
 	struct lro_ctrl		*lro = &rxr->lro;
 #endif /* LRO */
 	union ixgbe_adv_rx_desc	*cur;
 	struct ixgbe_rx_buf	*rbuf, *nbuf;
 	int			i, nextp, processed = 0;
 	u32			staterr = 0;
-	u32			count = adapter->rx_process_limit;
+	u32			count = 0;
 	u32			limit = adapter->rx_process_limit;
 	bool			discard_multidesc = false;
 #ifdef RSS
 	u16			pkt_info;
 #endif
 	IXGBE_RX_LOCK(rxr);
 #ifdef DEV_NETMAP
 	if (adapter->feat_en & IXGBE_FEATURE_NETMAP) {
 		/* Same as the txeof routine: wakeup clients on intr. */
 		if (netmap_rx_irq(ifp, rxr->me, &processed)) {
 			IXGBE_RX_UNLOCK(rxr);
 			return (FALSE);
+		}
+	}
 #endif /* DEV_NETMAP */
-	for (i = rxr->next_to_check; count != 0;) {
+	/*
 	 * The max number of loop is rx_process_limit. If discard_multidesc is
 	 * true, continue processing to not to send broken packet to the upper
 	 * layer.
 	 */
 	for (i = rxr->next_to_check;
 	     (count < limit) || (discard_multidesc == true);) {
 		struct mbuf *sendmp, *mp;
 		struct mbuf *newmp;
 		u32         rsc, ptype;
 		u16         len;
 		u16         vtag = 0;
 		bool        eop;
 		/* Sync the ring. */
 		ixgbe_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
 		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
 		cur = &rxr->rx_base[i];
 		staterr = le32toh(cur->wb.upper.status_error);
 #ifdef RSS
 		pkt_info = le16toh(cur->wb.lower.lo_dword.hs_rss.pkt_info);
 #endif
 		if ((staterr & IXGBE_RXD_STAT_DD) == 0)
 			break;
-		count--;
+		count++;
 		sendmp = NULL;
 		nbuf = NULL;
 		rsc = 0;
 		cur->wb.upper.status_error = 0;
 		rbuf = &rxr->rx_buffers[i];
 		mp = rbuf->buf;
 		len = le16toh(cur->wb.upper.length);
 		ptype = le32toh(cur->wb.lower.lo_dword.data) &
 		    IXGBE_RXDADV_PKTTYPE_MASK;
 		eop = ((staterr & IXGBE_RXD_STAT_EOP) != 0);
 		/* Make sure bad packets are discarded */
 		if (eop && (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) != 0) {
 #if __FreeBSD_version >= 1100036
 			if (adapter->feat_en & IXGBE_FEATURE_VF)
 				if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
 #endif
 			rxr->rx_discarded.ev_count++;
 			ixgbe_rx_discard(rxr, i);
 			discard_multidesc = false;
 			goto next_desc;
+		}
 		/* pre-alloc new mbuf */
 		if (!discard_multidesc)
 			newmp = ixgbe_getjcl(&rxr->jcl_head, M_NOWAIT, MT_DATA,
 			    M_PKTHDR, rxr->mbuf_sz);
 		else
 			newmp = NULL;
 		if (newmp == NULL) {
 			rxr->no_jmbuf.ev_count++;
 			/*
 			 * Descriptor initialization is already done by the
 			 * above code (cur->wb.upper.status_error = 0).
 			 * So, we can reuse current rbuf->buf for new packet.
+			 *
 			 * Rewrite the buffer addr, see comment in
 			 * ixgbe_rx_discard().
 			 */
 			cur->read.pkt_addr = rbuf->addr;
 			m_freem(rbuf->fmp);
 			rbuf->fmp = NULL;
 			if (!eop) {
 				/* Discard the entire packet. */
 				discard_multidesc = true;
 			} else
 				discard_multidesc = false;
 			goto next_desc;
+		}
 		discard_multidesc = false;
 		bus_dmamap_sync(rxr->ptag->dt_dmat, rbuf->pmap, 0,
 		    rbuf->buf->m_pkthdr.len, BUS_DMASYNC_POSTREAD);
 		/*
 		 * On 82599 which supports a hardware
 		 * LRO (called HW RSC), packets need
 		 * not be fragmented across sequential
 		 * descriptors, rather the next descriptor
 		 * is indicated in bits of the descriptor.
 		 * This also means that we might proceses
 		 * more than one packet at a time, something
 		 * that has never been true before, it
 		 * required eliminating global chain pointers
 		 * in favor of what we are doing here.  -jfv
 		 */
 		if (!eop) {
 			/*
 			 * Figure out the next descriptor
 			 * of this frame.
 			 */
 			if (rxr->hw_rsc == TRUE) {
 				rsc = ixgbe_rsc_count(cur);
 				rxr->rsc_num += (rsc - 1);
+			}
 			if (rsc) { /* Get hardware index */
 				nextp = ((staterr & IXGBE_RXDADV_NEXTP_MASK) >>
 				    IXGBE_RXDADV_NEXTP_SHIFT);
 			} else { /* Just sequential */
 				nextp = i + 1;
 				if (nextp == adapter->num_rx_desc)
 					nextp = 0;
+			}
 			nbuf = &rxr->rx_buffers[nextp];
 			prefetch(nbuf);
+		}
 		/*
 		 * Rather than using the fmp/lmp global pointers
 		 * we now keep the head of a packet chain in the
 		 * buffer struct and pass this along from one
 		 * descriptor to the next, until we get EOP.
 		 */
 		mp->m_len = len;
 		/*
 		 * See if there is a stored head
 		 * that determines what we are
 		 */
 		sendmp = rbuf->fmp;
 		if (sendmp != NULL) {  /* secondary frag */
-			rbuf->buf = rbuf->fmp = NULL;
+			rbuf->buf = newmp;
 			rbuf->fmp = NULL;
 			mp->m_flags &= ~M_PKTHDR;
 			sendmp->m_pkthdr.len += mp->m_len;
 		} else {
 			/*
 			 * Optimize.  This might be a small packet,
 			 * maybe just a TCP ACK.  Do a fast copy that
 			 * is cache aligned into a new mbuf, and
 			 * leave the old mbuf+cluster for re-use.
 			 */
 			if (eop && len <= IXGBE_RX_COPY_LEN) {
 				sendmp = m_gethdr(M_NOWAIT, MT_DATA);
 				if (sendmp != NULL) {
 					sendmp->m_data += IXGBE_RX_COPY_ALIGN;
 					ixgbe_bcopy(mp->m_data, sendmp->m_data,
 					    len);
 					sendmp->m_len = len;
 					rxr->rx_copies.ev_count++;
 					rbuf->flags |= IXGBE_RX_COPY;
 					m_freem(newmp);
+				}
+			}
 			if (sendmp == NULL) {
-				rbuf->buf = rbuf->fmp = NULL;
+				rbuf->buf = newmp;
 				rbuf->fmp = NULL;
 				sendmp = mp;
+			}
 			/* first desc of a non-ps chain */
 			sendmp->m_flags |= M_PKTHDR;
 			sendmp->m_pkthdr.len = mp->m_len;
+		}
 		++processed;
 		/* Pass the head pointer on */
 		if (eop == 0) {
 			nbuf->fmp = sendmp;
 			sendmp = NULL;
 			mp->m_next = nbuf->buf;
 		} else { /* Sending this frame */
 			m_set_rcvif(sendmp, ifp);
 			++rxr->packets;
 			rxr->rx_packets.ev_count++;
 			/* capture data for AIM */
 			rxr->bytes += sendmp->m_pkthdr.len;
 			rxr->rx_bytes.ev_count += sendmp->m_pkthdr.len;
 			/* Process vlan info */
 			if ((rxr->vtag_strip) && (staterr & IXGBE_RXD_STAT_VP))
 				vtag = le16toh(cur->wb.upper.vlan);
 			if (vtag) {
 				vlan_set_tag(sendmp, vtag);
+			}
 			if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
 				ixgbe_rx_checksum(staterr, sendmp, ptype,
 				   &adapter->stats.pf);
+			}
 #if 0 /* FreeBSD */
 			/*
 			 * In case of multiqueue, we have RXCSUM.PCSD bit set
 			 * and never cleared. This means we have RSS hash
 			 * available to be used.
 			 */
 			if (adapter->num_queues > 1) {
 				sendmp->m_pkthdr.flowid =
 				    le32toh(cur->wb.lower.hi_dword.rss);
 				switch (pkt_info & IXGBE_RXDADV_RSSTYPE_MASK) {
 				case IXGBE_RXDADV_RSSTYPE_IPV4:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_IPV4);
 					break;
 				case IXGBE_RXDADV_RSSTYPE_IPV4_TCP:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_TCP_IPV4);
 					break;
 				case IXGBE_RXDADV_RSSTYPE_IPV6:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_IPV6);
 					break;
 				case IXGBE_RXDADV_RSSTYPE_IPV6_TCP:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_TCP_IPV6);
 					break;
 				case IXGBE_RXDADV_RSSTYPE_IPV6_EX:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_IPV6_EX);
 					break;
 				case IXGBE_RXDADV_RSSTYPE_IPV6_TCP_EX:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_TCP_IPV6_EX);
 					break;
 #if __FreeBSD_version > 1100000
 				case IXGBE_RXDADV_RSSTYPE_IPV4_UDP:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_UDP_IPV4);
 					break;
 				case IXGBE_RXDADV_RSSTYPE_IPV6_UDP:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_UDP_IPV6);
 					break;
 				case IXGBE_RXDADV_RSSTYPE_IPV6_UDP_EX:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_RSS_UDP_IPV6_EX);
 					break;
 #endif
 				default:
 					M_HASHTYPE_SET(sendmp,
 					    M_HASHTYPE_OPAQUE_HASH);
+				}
 			} else {
 				sendmp->m_pkthdr.flowid = que->msix;
 				M_HASHTYPE_SET(sendmp, M_HASHTYPE_OPAQUE);
+			}
 #endif
+		}
 next_desc:
 		ixgbe_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
 		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 		/* Advance our pointers to the next descriptor. */
 		if (++i == rxr->num_desc)
 			i = 0;
 		/* Now send to the stack or do LRO */
 		if (sendmp != NULL) {
 			rxr->next_to_check = i;
 			IXGBE_RX_UNLOCK(rxr);
 			ixgbe_rx_input(rxr, ifp, sendmp, ptype);
 			IXGBE_RX_LOCK(rxr);
 			i = rxr->next_to_check;
+		}
 		/* Every 8 descriptors we go to refresh mbufs */
 		if (processed == 8) {
 			ixgbe_refresh_mbufs(rxr, i);
 			processed = 0;
+		}
+	}
 	/* Refresh any remaining buf structs */
 	if (ixgbe_rx_unrefreshed(rxr))
 		ixgbe_refresh_mbufs(rxr, i);
 	rxr->next_to_check = i;
 	IXGBE_RX_UNLOCK(rxr);
 #ifdef LRO
 	/*
 	 * Flush any outstanding LRO work
 	 */
 	tcp_lro_flush_all(lro);
 #endif /* LRO */
 	/*
 	 * Still have cleaning to do?
 	 */
 	if ((staterr & IXGBE_RXD_STAT_DD) != 0)
 		return (TRUE);
 	return (FALSE);
 } /* ixgbe_rxeof */
 /************************************************************************
  * ixgbe_rx_checksum
+ *
  *   Verify that the hardware indicated that the checksum is valid.
  *   Inform the stack about the status of checksum so that stack
  *   doesn't spend time verifying the checksum.
  ************************************************************************/
 static void
 ixgbe_rx_checksum(u32 staterr, struct mbuf * mp, u32 ptype,
     struct ixgbe_hw_stats *stats)
+{
 	u16  status = (u16)staterr;
 	u8   errors = (u8)(staterr >> 24);
 #if 0
 	bool sctp = false;
 	if ((ptype & IXGBE_RXDADV_PKTTYPE_ETQF) == 0 &&
 	    (ptype & IXGBE_RXDADV_PKTTYPE_SCTP) != 0)
 		sctp = true;
 #endif
 	/* IPv4 checksum */
 	if (status & IXGBE_RXD_STAT_IPCS) {
 		stats->ipcs.ev_count++;
 		if (!(errors & IXGBE_RXD_ERR_IPE)) {
 			/* IP Checksum Good */
 			mp->m_pkthdr.csum_flags = M_CSUM_IPv4;
 		} else {
 			stats->ipcs_bad.ev_count++;
 			mp->m_pkthdr.csum_flags = M_CSUM_IPv4|M_CSUM_IPv4_BAD;
+		}
+	}
 	/* TCP/UDP/SCTP checksum */
 	if (status & IXGBE_RXD_STAT_L4CS) {
 		stats->l4cs.ev_count++;
 		int type = M_CSUM_TCPv4|M_CSUM_TCPv6|M_CSUM_UDPv4|M_CSUM_UDPv6;
 		if (!(errors & IXGBE_RXD_ERR_TCPE)) {
 			mp->m_pkthdr.csum_flags |= type;
 		} else {
 			stats->l4cs_bad.ev_count++;
 			mp->m_pkthdr.csum_flags |= type | M_CSUM_TCP_UDP_BAD;
+		}
+	}
 } /* ixgbe_rx_checksum */
 /************************************************************************
  * ixgbe_dma_malloc
  ************************************************************************/
 int
 ixgbe_dma_malloc(struct adapter *adapter, const bus_size_t size,
 		struct ixgbe_dma_alloc *dma, const int mapflags)
+{
 	device_t dev = adapter->dev;
 	int      r, rsegs;
 	r = ixgbe_dma_tag_create(
 	     /*      parent */ adapter->osdep.dmat,
 	     /*   alignment */ DBA_ALIGN,
 	     /*      bounds */ 0,
 	     /*     maxsize */ size,
 	     /*   nsegments */ 1,
 	     /*  maxsegsize */ size,
 	     /*       flags */ BUS_DMA_ALLOCNOW,
 			       &dma->dma_tag);
 	if (r != 0) {
 		aprint_error_dev(dev,
 		    "%s: ixgbe_dma_tag_create failed; error %d\n", __func__,
 		    r);
 		goto fail_0;
+	}
 	r = bus_dmamem_alloc(dma->dma_tag->dt_dmat, size,
 	    dma->dma_tag->dt_alignment, dma->dma_tag->dt_boundary,
 	    &dma->dma_seg, 1, &rsegs, BUS_DMA_NOWAIT);
 	if (r != 0) {
 		aprint_error_dev(dev,
 		    "%s: bus_dmamem_alloc failed; error %d\n", __func__, r);
 		goto fail_1;
+	}
 	r = bus_dmamem_map(dma->dma_tag->dt_dmat, &dma->dma_seg, rsegs,
 	    size, &dma->dma_vaddr, BUS_DMA_NOWAIT);
 	if (r != 0) {
 		aprint_error_dev(dev, "%s: bus_dmamem_map failed; error %d\n",
 		    __func__, r);
 		goto fail_2;
+	}
 	r = ixgbe_dmamap_create(dma->dma_tag, 0, &dma->dma_map);
 	if (r != 0) {
 		aprint_error_dev(dev, "%s: bus_dmamem_map failed; error %d\n",
 		    __func__, r);
 		goto fail_3;
+	}
 	r = bus_dmamap_load(dma->dma_tag->dt_dmat, dma->dma_map,
 	    dma->dma_vaddr, size, NULL, mapflags | BUS_DMA_NOWAIT);
 	if (r != 0) {
 		aprint_error_dev(dev, "%s: bus_dmamap_load failed; error %d\n",
 		    __func__, r);
 		goto fail_4;
+	}
 	dma->dma_paddr = dma->dma_map->dm_segs[0].ds_addr;
 	dma->dma_size = size;
 	return 0;
 fail_4:
 	ixgbe_dmamap_destroy(dma->dma_tag, dma->dma_map);
 fail_3:
 	bus_dmamem_unmap(dma->dma_tag->dt_dmat, dma->dma_vaddr, size);
 fail_2:
 	bus_dmamem_free(dma->dma_tag->dt_dmat, &dma->dma_seg, rsegs);
 fail_1:
 	ixgbe_dma_tag_destroy(dma->dma_tag);
 fail_0:
 	return (r);
 } /* ixgbe_dma_malloc */
 /************************************************************************
  * ixgbe_dma_free
  ************************************************************************/
 void
 ixgbe_dma_free(struct adapter *adapter, struct ixgbe_dma_alloc *dma)
+{
 	bus_dmamap_sync(dma->dma_tag->dt_dmat, dma->dma_map, 0, dma->dma_size,
 	    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
 	ixgbe_dmamap_unload(dma->dma_tag, dma->dma_map);
 	bus_dmamem_free(dma->dma_tag->dt_dmat, &dma->dma_seg, 1);
 	ixgbe_dma_tag_destroy(dma->dma_tag);
 } /* ixgbe_dma_free */
 /************************************************************************
  * ixgbe_allocate_queues
+ *
  *   Allocate memory for the transmit and receive rings, and then
  *   the descriptors associated with each, called only once at attach.
  ************************************************************************/
 int
 ixgbe_allocate_queues(struct adapter *adapter)
+{
 	device_t	dev = adapter->dev;
 	struct ix_queue	*que;
 	struct tx_ring	*txr;
 	struct rx_ring	*rxr;
 	int             rsize, tsize, error = IXGBE_SUCCESS;
 	int             txconf = 0, rxconf = 0;
 	/* First, allocate the top level queue structs */
 	adapter->queues = (struct ix_queue *)malloc(sizeof(struct ix_queue) *
 	    adapter->num_queues, M_DEVBUF, M_NOWAIT | M_ZERO);
         if (adapter->queues == NULL) {
 		aprint_error_dev(dev, "Unable to allocate queue memory\n");
                 error = ENOMEM;
                 goto fail;
+        }
 	/* Second, allocate the TX ring struct memory */
 	adapter->tx_rings = (struct tx_ring *)malloc(sizeof(struct tx_ring) *
 	    adapter->num_queues, M_DEVBUF, M_NOWAIT | M_ZERO);
 	if (adapter->tx_rings == NULL) {
 		aprint_error_dev(dev, "Unable to allocate TX ring memory\n");
 		error = ENOMEM;
 		goto tx_fail;
+	}
 	/* Third, allocate the RX ring */
 	adapter->rx_rings = (struct rx_ring *)malloc(sizeof(struct rx_ring) *
 	    adapter->num_queues, M_DEVBUF, M_NOWAIT | M_ZERO);
 	if (adapter->rx_rings == NULL) {
 		aprint_error_dev(dev, "Unable to allocate RX ring memory\n");
 		error = ENOMEM;
 		goto rx_fail;
+	}
 	/* For the ring itself */
 	tsize = roundup2(adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc),
 	    DBA_ALIGN);
 	/*
 	 * Now set up the TX queues, txconf is needed to handle the
 	 * possibility that things fail midcourse and we need to
 	 * undo memory gracefully
 	 */
 	for (int i = 0; i < adapter->num_queues; i++, txconf++) {
 		/* Set up some basics */
 		txr = &adapter->tx_rings[i];
 		txr->adapter = adapter;
 		txr->txr_interq = NULL;
 		/* In case SR-IOV is enabled, align the index properly */
 #ifdef PCI_IOV
 		txr->me = ixgbe_vf_que_index(adapter->iov_mode, adapter->pool,
 		    i);
 #else
 		txr->me = i;
 #endif
 		txr->num_desc = adapter->num_tx_desc;
 		/* Initialize the TX side lock */
 		mutex_init(&txr->tx_mtx, MUTEX_DEFAULT, IPL_NET);
 		if (ixgbe_dma_malloc(adapter, tsize, &txr->txdma,
 		    BUS_DMA_NOWAIT)) {
 			aprint_error_dev(dev,
 			    "Unable to allocate TX Descriptor memory\n");
 			error = ENOMEM;
 			goto err_tx_desc;
+		}
 		txr->tx_base = (union ixgbe_adv_tx_desc *)txr->txdma.dma_vaddr;
 		bzero((void *)txr->tx_base, tsize);
 		/* Now allocate transmit buffers for the ring */
 		if (ixgbe_allocate_transmit_buffers(txr)) {
 			aprint_error_dev(dev,
 			    "Critical Failure setting up transmit buffers\n");
 			error = ENOMEM;
 			goto err_tx_desc;
+		}
 		if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
 			/* Allocate a buf ring */
 			txr->txr_interq = pcq_create(IXGBE_BR_SIZE, KM_SLEEP);
 			if (txr->txr_interq == NULL) {
 				aprint_error_dev(dev,
 				    "Critical Failure setting up buf ring\n");
 				error = ENOMEM;
 				goto err_tx_desc;
+			}
+		}
+	}
 	/*
 	 * Next the RX queues...
 	 */
 	rsize = roundup2(adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc),
 	    DBA_ALIGN);
 	for (int i = 0; i < adapter->num_queues; i++, rxconf++) {
 		rxr = &adapter->rx_rings[i];
 		/* Set up some basics */
 		rxr->adapter = adapter;
 #ifdef PCI_IOV
 		/* In case SR-IOV is enabled, align the index properly */
 		rxr->me = ixgbe_vf_que_index(adapter->iov_mode, adapter->pool,
 		    i);
 #else
 		rxr->me = i;
 #endif
 		rxr->num_desc = adapter->num_rx_desc;
 		/* Initialize the RX side lock */
 		mutex_init(&rxr->rx_mtx, MUTEX_DEFAULT, IPL_NET);
 		if (ixgbe_dma_malloc(adapter, rsize, &rxr->rxdma,
 		    BUS_DMA_NOWAIT)) {
 			aprint_error_dev(dev,
 			    "Unable to allocate RxDescriptor memory\n");
 			error = ENOMEM;
 			goto err_rx_desc;
+		}
 		rxr->rx_base = (union ixgbe_adv_rx_desc *)rxr->rxdma.dma_vaddr;
 		bzero((void *)rxr->rx_base, rsize);
 		/* Allocate receive buffers for the ring */
 		if (ixgbe_allocate_receive_buffers(rxr)) {
 			aprint_error_dev(dev,
 			    "Critical Failure setting up receive buffers\n");
 			error = ENOMEM;
 			goto err_rx_desc;
+		}
+	}
 	/*
 	 * Finally set up the queue holding structs
 	 */
 	for (int i = 0; i < adapter->num_queues; i++) {
 		que = &adapter->queues[i];
 		que->adapter = adapter;
 		que->me = i;
 		que->txr = &adapter->tx_rings[i];
 		que->rxr = &adapter->rx_rings[i];
 		mutex_init(&que->dc_mtx, MUTEX_DEFAULT, IPL_NET);
 		que->disabled_count = 0;
+	}
 	return (0);
 err_rx_desc:
 	for (rxr = adapter->rx_rings; rxconf > 0; rxr++, rxconf--)
 		ixgbe_dma_free(adapter, &rxr->rxdma);
 err_tx_desc:
 	for (txr = adapter->tx_rings; txconf > 0; txr++, txconf--)
 		ixgbe_dma_free(adapter, &txr->txdma);
 	free(adapter->rx_rings, M_DEVBUF);
 rx_fail:
 	free(adapter->tx_rings, M_DEVBUF);
 tx_fail:
 	free(adapter->queues, M_DEVBUF);
 fail:
 	return (error);
 } /* ixgbe_allocate_queues */
 /************************************************************************
  * ixgbe_free_queues
+ *
  *   Free descriptors for the transmit and receive rings, and then
  *   the memory associated with each.
  ************************************************************************/
 void
 ixgbe_free_queues(struct adapter *adapter)
+{
 	struct ix_queue *que;
 	int i;
 	ixgbe_free_transmit_structures(adapter);
 	ixgbe_free_receive_structures(adapter);
 	for (i = 0; i < adapter->num_queues; i++) {
 		que = &adapter->queues[i];
 		mutex_destroy(&que->dc_mtx);
+	}
 	free(adapter->queues, M_DEVBUF);
 } /* ixgbe_free_queues */

 @@ -1,4299 +1,4309 @@
-/* $NetBSD: ixgbe.c,v 1.199.2.12 2020/09/02 12:34:55 martin Exp $ */
+/* $NetBSD: ixgbe.c,v 1.199.2.13 2021/03/11 16:00:24 martin Exp $ */
 /******************************************************************************
   Copyright (c) 2001-2017, Intel Corporation
   All rights reserved.
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
 . Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
 . Redistributions in binary form must reproduce the above copyright
       notice, this list of conditions and the following disclaimer in the
       documentation and/or other materials provided with the distribution.
 . Neither the name of the Intel Corporation nor the names of its
       contributors may be used to endorse or promote products derived from
       this software without specific prior written permission.
   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   POSSIBILITY OF SUCH DAMAGE.
 ******************************************************************************/
 /*$FreeBSD: head/sys/dev/ixgbe/if_ix.c 331224 2018-03-19 20:55:05Z erj $*/
 /*
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Coyote Point Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #ifdef _KERNEL_OPT
 #include "opt_inet.h"
 #include "opt_inet6.h"
 #include "opt_net_mpsafe.h"
 #include "opt_ixgbe.h"
 #endif
 #include "ixgbe.h"
 #include "ixgbe_sriov.h"
 #include "vlan.h"
 #include <sys/cprng.h>
 #include <dev/mii/mii.h>
 #include <dev/mii/miivar.h>
 /************************************************************************
  * Driver version
  ************************************************************************/
 static const char ixgbe_driver_version[] = "4.0.1-k";
 /* XXX NetBSD: + 3.3.10 */
 /************************************************************************
  * PCI Device ID Table
+ *
  *   Used by probe to select devices to load on
  *   Last field stores an index into ixgbe_strings
  *   Last entry must be all 0s
+ *
  *   { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
  ************************************************************************/
 static const ixgbe_vendor_info_t ixgbe_vendor_info_array[] =
+{
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS, 0, 0, 0},
 	/* required last entry */
 	{0, 0, 0, 0, 0}
 };
 /************************************************************************
  * Table of branding strings
  ************************************************************************/
 static const char    *ixgbe_strings[] = {
 	"Intel(R) PRO/10GbE PCI-Express Network Driver"
 };
 /************************************************************************
  * Function prototypes
  ************************************************************************/
 static int	ixgbe_probe(device_t, cfdata_t, void *);
 static void	ixgbe_attach(device_t, device_t, void *);
 static int	ixgbe_detach(device_t, int);
 #if 0
 static int	ixgbe_shutdown(device_t);
 #endif
 static bool	ixgbe_suspend(device_t, const pmf_qual_t *);
 static bool	ixgbe_resume(device_t, const pmf_qual_t *);
 static int	ixgbe_ifflags_cb(struct ethercom *);
 static int	ixgbe_ioctl(struct ifnet *, u_long, void *);
 static int	ixgbe_init(struct ifnet *);
 static void	ixgbe_init_locked(struct adapter *);
 static void	ixgbe_ifstop(struct ifnet *, int);
 static void	ixgbe_stop(void *);
 static void	ixgbe_init_device_features(struct adapter *);
 static void	ixgbe_check_fan_failure(struct adapter *, u32, bool);
 static void	ixgbe_add_media_types(struct adapter *);
 static void	ixgbe_media_status(struct ifnet *, struct ifmediareq *);
 static int	ixgbe_media_change(struct ifnet *);
 static int	ixgbe_allocate_pci_resources(struct adapter *,
 		    const struct pci_attach_args *);
 static void	ixgbe_free_softint(struct adapter *);
 static void	ixgbe_get_slot_info(struct adapter *);
 static int	ixgbe_allocate_msix(struct adapter *,
 		    const struct pci_attach_args *);
 static int	ixgbe_allocate_legacy(struct adapter *,
 		    const struct pci_attach_args *);
 static int	ixgbe_configure_interrupts(struct adapter *);
 static void	ixgbe_free_pciintr_resources(struct adapter *);
 static void	ixgbe_free_pci_resources(struct adapter *);
 static void	ixgbe_local_timer(void *);
 static void	ixgbe_local_timer1(void *);
 static void	ixgbe_recovery_mode_timer(void *);
 static int	ixgbe_setup_interface(device_t, struct adapter *);
 static void	ixgbe_config_gpie(struct adapter *);
 static void	ixgbe_config_dmac(struct adapter *);
 static void	ixgbe_config_delay_values(struct adapter *);
 static void	ixgbe_config_link(struct adapter *);
 static void	ixgbe_check_wol_support(struct adapter *);
 static int	ixgbe_setup_low_power_mode(struct adapter *);
 #if 0
 static void	ixgbe_rearm_queues(struct adapter *, u64);
 #endif
 static void	ixgbe_initialize_transmit_units(struct adapter *);
 static void	ixgbe_initialize_receive_units(struct adapter *);
 static void	ixgbe_enable_rx_drop(struct adapter *);
 static void	ixgbe_disable_rx_drop(struct adapter *);
 static void	ixgbe_initialize_rss_mapping(struct adapter *);
 static void	ixgbe_enable_intr(struct adapter *);
 static void	ixgbe_disable_intr(struct adapter *);
 static void	ixgbe_update_stats_counters(struct adapter *);
 static void	ixgbe_set_rxfilter(struct adapter *);
 static void	ixgbe_update_link_status(struct adapter *);
 static void	ixgbe_set_ivar(struct adapter *, u8, u8, s8);
 static void	ixgbe_configure_ivars(struct adapter *);
 static u8 *	ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
 static void	ixgbe_eitr_write(struct adapter *, uint32_t, uint32_t);
 static void	ixgbe_setup_vlan_hw_tagging(struct adapter *);
 static void	ixgbe_setup_vlan_hw_support(struct adapter *);
 static int	ixgbe_vlan_cb(struct ethercom *, uint16_t, bool);
 static int	ixgbe_register_vlan(struct adapter *, u16);
 static int	ixgbe_unregister_vlan(struct adapter *, u16);
 static void	ixgbe_add_device_sysctls(struct adapter *);
 static void	ixgbe_add_hw_stats(struct adapter *);
 static void	ixgbe_clear_evcnt(struct adapter *);
 static int	ixgbe_set_flowcntl(struct adapter *, int);
 static int	ixgbe_set_advertise(struct adapter *, int);
 static int	ixgbe_get_advertise(struct adapter *);
 /* Sysctl handlers */
 static void	ixgbe_set_sysctl_value(struct adapter *, const char *,
 		     const char *, int *, int);
 static int	ixgbe_sysctl_flowcntl(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_advertise(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_dmac(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_phy_temp(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_PROTO);
 #ifdef IXGBE_DEBUG
 static int	ixgbe_sysctl_power_state(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_print_rss_config(SYSCTLFN_PROTO);
 #endif
 static int	ixgbe_sysctl_next_to_check_handler(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_rdh_handler(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_rdt_handler(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_tdt_handler(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_tdh_handler(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_eee_state(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_debug(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_wol_enable(SYSCTLFN_PROTO);
 static int	ixgbe_sysctl_wufc(SYSCTLFN_PROTO);
 /* Support for pluggable optic modules */
 static bool	ixgbe_sfp_probe(struct adapter *);
 /* Legacy (single vector) interrupt handler */
 static int	ixgbe_legacy_irq(void *);
 /* The MSI/MSI-X Interrupt handlers */
 static int	ixgbe_msix_que(void *);
 static int	ixgbe_msix_link(void *);
 /* Software interrupts for deferred work */
 static void	ixgbe_handle_que(void *);
 static void	ixgbe_handle_link(void *);
 static void	ixgbe_handle_msf(void *);
 static void	ixgbe_handle_mod(void *);
 static void	ixgbe_handle_phy(void *);
 /* Workqueue handler for deferred work */
 static void	ixgbe_handle_que_work(struct work *, void *);
 static const ixgbe_vendor_info_t *ixgbe_lookup(const struct pci_attach_args *);
 /************************************************************************
  *  NetBSD Device Interface Entry Points
  ************************************************************************/
 CFATTACH_DECL3_NEW(ixg, sizeof(struct adapter),
     ixgbe_probe, ixgbe_attach, ixgbe_detach, NULL, NULL, NULL,
     DVF_DETACH_SHUTDOWN);
 #if 0
 devclass_t ix_devclass;
 DRIVER_MODULE(ix, pci, ix_driver, ix_devclass, 0, 0);
 MODULE_DEPEND(ix, pci, 1, 1, 1);
 MODULE_DEPEND(ix, ether, 1, 1, 1);
 #ifdef DEV_NETMAP
 MODULE_DEPEND(ix, netmap, 1, 1, 1);
 #endif
 #endif
 /*
  * TUNEABLE PARAMETERS:
  */
 /*
  * AIM: Adaptive Interrupt Moderation
  * which means that the interrupt rate
  * is varied over time based on the
  * traffic for that interrupt vector
  */
 static bool ixgbe_enable_aim = true;
 #define SYSCTL_INT(_a1, _a2, _a3, _a4, _a5, _a6, _a7)
 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RDTUN, &ixgbe_enable_aim, 0,
     "Enable adaptive interrupt moderation");
 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN,
     &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second");
 /* How many packets rxeof tries to clean at a time */
 static int ixgbe_rx_process_limit = 256;
 SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN,
     &ixgbe_rx_process_limit, 0, "Maximum number of received packets to process at a time, -1 means unlimited");
 /* How many packets txeof tries to clean at a time */
 static int ixgbe_tx_process_limit = 256;
 SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN,
     &ixgbe_tx_process_limit, 0,
     "Maximum number of sent packets to process at a time, -1 means unlimited");
 /* Flow control setting, default to full */
 static int ixgbe_flow_control = ixgbe_fc_full;
 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN,
     &ixgbe_flow_control, 0, "Default flow control used for all adapters");
 /* Which packet processing uses workqueue or softint */
 static bool ixgbe_txrx_workqueue = false;
 /*
  * Smart speed setting, default to on
  * this only works as a compile option
  * right now as its during attach, set
  * this to 'ixgbe_smart_speed_off' to
  * disable.
  */
 static int ixgbe_smart_speed = ixgbe_smart_speed_on;
 /*
  * MSI-X should be the default for best performance,
  * but this allows it to be forced off for testing.
  */
 static int ixgbe_enable_msix = 1;
 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0,
     "Enable MSI-X interrupts");
 /*
  * Number of Queues, can be set to 0,
  * it then autoconfigures based on the
  * number of cpus with a max of 8. This
  * can be overridden manually here.
  */
 static int ixgbe_num_queues = 0;
 SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0,
     "Number of queues to configure, 0 indicates autoconfigure");
 /*
  * Number of TX descriptors per ring,
  * setting higher than RX as this seems
  * the better performing choice.
  */
 static int ixgbe_txd = PERFORM_TXD;
 SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0,
     "Number of transmit descriptors per queue");
 /* Number of RX descriptors per ring */
 static int ixgbe_rxd = PERFORM_RXD;
 SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0,
     "Number of receive descriptors per queue");
 /*
  * Defining this on will allow the use
  * of unsupported SFP+ modules, note that
  * doing so you are on your own :)
  */
 static int allow_unsupported_sfp = false;
 #define TUNABLE_INT(__x, __y)
 TUNABLE_INT("hw.ix.unsupported_sfp", &allow_unsupported_sfp);
 /*
  * Not sure if Flow Director is fully baked,
  * so we'll default to turning it off.
  */
 static int ixgbe_enable_fdir = 0;
 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir, 0,
     "Enable Flow Director");
 /* Legacy Transmit (single queue) */
 static int ixgbe_enable_legacy_tx = 0;
 SYSCTL_INT(_hw_ix, OID_AUTO, enable_legacy_tx, CTLFLAG_RDTUN,
     &ixgbe_enable_legacy_tx, 0, "Enable Legacy TX flow");
 /* Receive-Side Scaling */
 static int ixgbe_enable_rss = 1;
 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss, 0,
     "Enable Receive-Side Scaling (RSS)");
 #if 0
 static int (*ixgbe_start_locked)(struct ifnet *, struct tx_ring *);
 static int (*ixgbe_ring_empty)(struct ifnet *, pcq_t *);
 #endif
 #ifdef NET_MPSAFE
 #define IXGBE_MPSAFE		1
 #define IXGBE_CALLOUT_FLAGS	CALLOUT_MPSAFE
 #define IXGBE_SOFTINT_FLAGS	SOFTINT_MPSAFE
 #define IXGBE_WORKQUEUE_FLAGS	WQ_PERCPU | WQ_MPSAFE
 #else
 #define IXGBE_CALLOUT_FLAGS	0
 #define IXGBE_SOFTINT_FLAGS	0
 #define IXGBE_WORKQUEUE_FLAGS	WQ_PERCPU
 #endif
 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET
 /************************************************************************
  * ixgbe_initialize_rss_mapping
  ************************************************************************/
 static void
 ixgbe_initialize_rss_mapping(struct adapter *adapter)
+{
 	struct ixgbe_hw	*hw = &adapter->hw;
 	u32		reta = 0, mrqc, rss_key[10];
 	int		queue_id, table_size, index_mult;
 	int		i, j;
 	u32		rss_hash_config;
 	/* force use default RSS key. */
 #ifdef __NetBSD__
 	rss_getkey((uint8_t *) &rss_key);
 #else
 	if (adapter->feat_en & IXGBE_FEATURE_RSS) {
 		/* Fetch the configured RSS key */
 		rss_getkey((uint8_t *) &rss_key);
 	} else {
 		/* set up random bits */
 		cprng_fast(&rss_key, sizeof(rss_key));
+	}
 #endif
 	/* Set multiplier for RETA setup and table size based on MAC */
 	index_mult = 0x1;
 	table_size = 128;
 	switch (adapter->hw.mac.type) {
 	case ixgbe_mac_82598EB:
 		index_mult = 0x11;
 		break;
 	case ixgbe_mac_X550:
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		table_size = 512;
 		break;
 	default:
 		break;
+	}
 	/* Set up the redirection table */
 	for (i = 0, j = 0; i < table_size; i++, j++) {
 		if (j == adapter->num_queues)
 			j = 0;
 		if (adapter->feat_en & IXGBE_FEATURE_RSS) {
 			/*
 			 * Fetch the RSS bucket id for the given indirection
 			 * entry. Cap it at the number of configured buckets
 			 * (which is num_queues.)
 			 */
 			queue_id = rss_get_indirection_to_bucket(i);
 			queue_id = queue_id % adapter->num_queues;
 		} else
 			queue_id = (j * index_mult);
 		/*
 		 * The low 8 bits are for hash value (n+0);
 		 * The next 8 bits are for hash value (n+1), etc.
 		 */
 		reta = reta >> 8;
 		reta = reta | (((uint32_t) queue_id) << 24);
 		if ((i & 3) == 3) {
 			if (i < 128)
 				IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
 			else
 				IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
 				    reta);
 			reta = 0;
+		}
+	}
 	/* Now fill our hash function seeds */
 	for (i = 0; i < 10; i++)
 		IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]);
 	/* Perform hash on these packet types */
 	if (adapter->feat_en & IXGBE_FEATURE_RSS)
 		rss_hash_config = rss_gethashconfig();
 	else {
 		/*
 		 * Disable UDP - IP fragments aren't currently being handled
 		 * and so we end up with a mix of 2-tuple and 4-tuple
 		 * traffic.
 		 */
 		rss_hash_config = RSS_HASHTYPE_RSS_IPV4
 				| RSS_HASHTYPE_RSS_TCP_IPV4
 				| RSS_HASHTYPE_RSS_IPV6
 				| RSS_HASHTYPE_RSS_TCP_IPV6
 				| RSS_HASHTYPE_RSS_IPV6_EX
 				| RSS_HASHTYPE_RSS_TCP_IPV6_EX;
+	}
 	mrqc = IXGBE_MRQC_RSSEN;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
 	mrqc |= ixgbe_get_mrqc(adapter->iov_mode);
 	IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
 } /* ixgbe_initialize_rss_mapping */
 /************************************************************************
  * ixgbe_initialize_receive_units - Setup receive registers and features.
  ************************************************************************/
 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1)
 static void
 ixgbe_initialize_receive_units(struct adapter *adapter)
+{
 	struct	rx_ring	*rxr = adapter->rx_rings;
 	struct ixgbe_hw	*hw = &adapter->hw;
 	struct ifnet	*ifp = adapter->ifp;
 	int		i, j;
 	u32		bufsz, fctrl, srrctl, rxcsum;
 	u32		hlreg;
 	/*
 	 * Make sure receives are disabled while
 	 * setting up the descriptor ring
 	 */
 	ixgbe_disable_rx(hw);
 	/* Enable broadcasts */
 	fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 	fctrl |= IXGBE_FCTRL_BAM;
 	if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
 		fctrl |= IXGBE_FCTRL_DPF;
 		fctrl |= IXGBE_FCTRL_PMCF;
+	}
 	IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
 	/* Set for Jumbo Frames? */
 	hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 	if (ifp->if_mtu > ETHERMTU)
 		hlreg |= IXGBE_HLREG0_JUMBOEN;
 	else
 		hlreg &= ~IXGBE_HLREG0_JUMBOEN;
 #ifdef DEV_NETMAP
 	/* CRC stripping is conditional in Netmap */
 	if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
 	    (ifp->if_capenable & IFCAP_NETMAP) &&
 	    !ix_crcstrip)
 		hlreg &= ~IXGBE_HLREG0_RXCRCSTRP;
 	else
 #endif /* DEV_NETMAP */
 		hlreg |= IXGBE_HLREG0_RXCRCSTRP;
 	IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg);
 	bufsz = (adapter->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >>
 	    IXGBE_SRRCTL_BSIZEPKT_SHIFT;
 	for (i = 0; i < adapter->num_queues; i++, rxr++) {
 		u64 rdba = rxr->rxdma.dma_paddr;
 		u32 reg;
 		int regnum = i / 4;	/* 1 register per 4 queues */
 		int regshift = i % 4;	/* 4 bits per 1 queue */
 		j = rxr->me;
 		/* Setup the Base and Length of the Rx Descriptor Ring */
 		IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j),
 		    (rdba & 0x00000000ffffffffULL));
 		IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
 		IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j),
 		    adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc));
 		/* Set up the SRRCTL register */
 		srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j));
 		srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
 		srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
 		srrctl |= bufsz;
 		srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
 		/* Set RQSMR (Receive Queue Statistic Mapping) register */
 		reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(regnum));
 		reg &= ~(0x000000ffUL << (regshift * 8));
 		reg |= i << (regshift * 8);
 		IXGBE_WRITE_REG(hw, IXGBE_RQSMR(regnum), reg);
 		/*
 		 * Set DROP_EN iff we have no flow control and >1 queue.
 		 * Note that srrctl was cleared shortly before during reset,
 		 * so we do not need to clear the bit, but do it just in case
 		 * this code is moved elsewhere.
 		 */
 		if (adapter->num_queues > 1 &&
 		    adapter->hw.fc.requested_mode == ixgbe_fc_none) {
 			srrctl |= IXGBE_SRRCTL_DROP_EN;
 		} else {
 			srrctl &= ~IXGBE_SRRCTL_DROP_EN;
+		}
 		IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl);
 		/* Setup the HW Rx Head and Tail Descriptor Pointers */
 		IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
 		/* Set the driver rx tail address */
 		rxr->tail =  IXGBE_RDT(rxr->me);
+	}
 	if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
 		u32 psrtype = IXGBE_PSRTYPE_TCPHDR
 			    | IXGBE_PSRTYPE_UDPHDR
 			    | IXGBE_PSRTYPE_IPV4HDR
 			    | IXGBE_PSRTYPE_IPV6HDR;
 		IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
+	}
 	rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 	ixgbe_initialize_rss_mapping(adapter);
 	if (adapter->num_queues > 1) {
 		/* RSS and RX IPP Checksum are mutually exclusive */
 		rxcsum |= IXGBE_RXCSUM_PCSD;
+	}
 	if (ifp->if_capenable & IFCAP_RXCSUM)
 		rxcsum |= IXGBE_RXCSUM_PCSD;
 	/* This is useful for calculating UDP/IP fragment checksums */
 	if (!(rxcsum & IXGBE_RXCSUM_PCSD))
 		rxcsum |= IXGBE_RXCSUM_IPPCSE;
 	IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
 } /* ixgbe_initialize_receive_units */
 /************************************************************************
  * ixgbe_initialize_transmit_units - Enable transmit units.
  ************************************************************************/
 static void
 ixgbe_initialize_transmit_units(struct adapter *adapter)
+{
 	struct tx_ring	*txr = adapter->tx_rings;
 	struct ixgbe_hw	*hw = &adapter->hw;
 	int i;
 	INIT_DEBUGOUT("ixgbe_initialize_transmit_units");
 	/* Setup the Base and Length of the Tx Descriptor Ring */
 	for (i = 0; i < adapter->num_queues; i++, txr++) {
 		u64 tdba = txr->txdma.dma_paddr;
 		u32 txctrl = 0;
 		u32 tqsmreg, reg;
 		int regnum = i / 4;	/* 1 register per 4 queues */
 		int regshift = i % 4;	/* 4 bits per 1 queue */
 		int j = txr->me;
 		IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
 		    (tdba & 0x00000000ffffffffULL));
 		IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
 		IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j),
 		    adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc));
 		/*
 		 * Set TQSMR (Transmit Queue Statistic Mapping) register.
 		 * Register location is different between 82598 and others.
 		 */
 		if (adapter->hw.mac.type == ixgbe_mac_82598EB)
 			tqsmreg = IXGBE_TQSMR(regnum);
 		else
 			tqsmreg = IXGBE_TQSM(regnum);
 		reg = IXGBE_READ_REG(hw, tqsmreg);
 		reg &= ~(0x000000ffUL << (regshift * 8));
 		reg |= i << (regshift * 8);
 		IXGBE_WRITE_REG(hw, tqsmreg, reg);
 		/* Setup the HW Tx Head and Tail descriptor pointers */
 		IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
 		/* Cache the tail address */
 		txr->tail = IXGBE_TDT(j);
 		txr->txr_no_space = false;
 		/* Disable Head Writeback */
 		/*
 		 * Note: for X550 series devices, these registers are actually
 		 * prefixed with TPH_ isntead of DCA_, but the addresses and
 		 * fields remain the same.
 		 */
 		switch (hw->mac.type) {
 		case ixgbe_mac_82598EB:
 			txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
 			break;
 		default:
 			txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));
 			break;
+		}
 		txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
 		switch (hw->mac.type) {
 		case ixgbe_mac_82598EB:
 			IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
 			break;
 		default:
 			IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl);
 			break;
+		}
+	}
 	if (hw->mac.type != ixgbe_mac_82598EB) {
 		u32 dmatxctl, rttdcs;
 		dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
 		dmatxctl |= IXGBE_DMATXCTL_TE;
 		IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
 		/* Disable arbiter to set MTQC */
 		rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
 		rttdcs |= IXGBE_RTTDCS_ARBDIS;
 		IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
 		IXGBE_WRITE_REG(hw, IXGBE_MTQC,
 		    ixgbe_get_mtqc(adapter->iov_mode));
 		rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
 		IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
+	}
 	return;
 } /* ixgbe_initialize_transmit_units */
 /************************************************************************
  * ixgbe_attach - Device initialization routine
+ *
  *   Called when the driver is being loaded.
  *   Identifies the type of hardware, allocates all resources
  *   and initializes the hardware.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static void
 ixgbe_attach(device_t parent, device_t dev, void *aux)
+{
 	struct adapter	*adapter;
 	struct ixgbe_hw *hw;
 	int		error = -1;
 	u32		ctrl_ext;
 	u16		high, low, nvmreg;
 	pcireg_t	id, subid;
 	const ixgbe_vendor_info_t *ent;
 	struct pci_attach_args *pa = aux;
 	bool unsupported_sfp = false;
 	const char *str;
 	char buf[256];
 	INIT_DEBUGOUT("ixgbe_attach: begin");
 	/* Allocate, clear, and link in our adapter structure */
 	adapter = device_private(dev);
 	adapter->hw.back = adapter;
 	adapter->dev = dev;
 	hw = &adapter->hw;
 	adapter->osdep.pc = pa->pa_pc;
 	adapter->osdep.tag = pa->pa_tag;
 	if (pci_dma64_available(pa))
 		adapter->osdep.dmat = pa->pa_dmat64;
 	else
 		adapter->osdep.dmat = pa->pa_dmat;
 	adapter->osdep.attached = false;
 	ent = ixgbe_lookup(pa);
 	KASSERT(ent != NULL);
 	aprint_normal(": %s, Version - %s\n",
 	    ixgbe_strings[ent->index], ixgbe_driver_version);
 	/* Core Lock Init*/
 	IXGBE_CORE_LOCK_INIT(adapter, device_xname(dev));
 	/* Set up the timer callout */
 	callout_init(&adapter->timer, IXGBE_CALLOUT_FLAGS);
 	/* Determine hardware revision */
 	id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG);
 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
 	hw->vendor_id = PCI_VENDOR(id);
 	hw->device_id = PCI_PRODUCT(id);
 	hw->revision_id =
 	    PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG));
 	hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid);
 	hw->subsystem_device_id = PCI_SUBSYS_ID(subid);
 	/*
 	 * Make sure BUSMASTER is set
 	 */
 	ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag);
 	/* Do base PCI setup - map BAR0 */
 	if (ixgbe_allocate_pci_resources(adapter, pa)) {
 		aprint_error_dev(dev, "Allocation of PCI resources failed\n");
 		error = ENXIO;
 		goto err_out;
+	}
 	/* let hardware know driver is loaded */
 	ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 	ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD;
 	IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
 	/*
 	 * Initialize the shared code
 	 */
 	if (ixgbe_init_shared_code(hw) != 0) {
 		aprint_error_dev(dev, "Unable to initialize the shared code\n");
 		error = ENXIO;
 		goto err_out;
+	}
 	switch (hw->mac.type) {
 	case ixgbe_mac_82598EB:
 		str = "82598EB";
 		break;
 	case ixgbe_mac_82599EB:
 		str = "82599EB";
 		break;
 	case ixgbe_mac_X540:
 		str = "X540";
 		break;
 	case ixgbe_mac_X550:
 		str = "X550";
 		break;
 	case ixgbe_mac_X550EM_x:
 		str = "X550EM X";
 		break;
 	case ixgbe_mac_X550EM_a:
 		str = "X550EM A";
 		break;
 	default:
 		str = "Unknown";
 		break;
+	}
 	aprint_normal_dev(dev, "device %s\n", str);
 	if (hw->mbx.ops.init_params)
 		hw->mbx.ops.init_params(hw);
 	hw->allow_unsupported_sfp = allow_unsupported_sfp;
 	/* Pick up the 82599 settings */
 	if (hw->mac.type != ixgbe_mac_82598EB) {
 		hw->phy.smart_speed = ixgbe_smart_speed;
 		adapter->num_segs = IXGBE_82599_SCATTER;
 	} else
 		adapter->num_segs = IXGBE_82598_SCATTER;
 	/* Ensure SW/FW semaphore is free */
 	ixgbe_init_swfw_semaphore(hw);
 	hw->mac.ops.set_lan_id(hw);
 	ixgbe_init_device_features(adapter);
 	if (ixgbe_configure_interrupts(adapter)) {
 		error = ENXIO;
 		goto err_out;
+	}
 	/* Allocate multicast array memory. */
 	adapter->mta = malloc(sizeof(*adapter->mta) *
 	    MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT);
 	if (adapter->mta == NULL) {
 		aprint_error_dev(dev, "Cannot allocate multicast setup array\n");
 		error = ENOMEM;
 		goto err_out;
+	}
 	/* Enable WoL (if supported) */
 	ixgbe_check_wol_support(adapter);
 	/* Register for VLAN events */
 	ether_set_vlan_cb(&adapter->osdep.ec, ixgbe_vlan_cb);
 	/* Verify adapter fan is still functional (if applicable) */
 	if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
 		u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
 		ixgbe_check_fan_failure(adapter, esdp, FALSE);
+	}
 	/* Set an initial default flow control value */
 	hw->fc.requested_mode = ixgbe_flow_control;
 	/* Sysctls for limiting the amount of work done in the taskqueues */
 	ixgbe_set_sysctl_value(adapter, "rx_processing_limit",
 	    "max number of rx packets to process",
 	    &adapter->rx_process_limit, ixgbe_rx_process_limit);
 	ixgbe_set_sysctl_value(adapter, "tx_processing_limit",
 	    "max number of tx packets to process",
 	    &adapter->tx_process_limit, ixgbe_tx_process_limit);
 	/* Do descriptor calc and sanity checks */
 	if (((ixgbe_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 ||
 	    ixgbe_txd < MIN_TXD || ixgbe_txd > MAX_TXD) {
 		aprint_error_dev(dev, "TXD config issue, using default!\n");
 		adapter->num_tx_desc = DEFAULT_TXD;
 	} else
 		adapter->num_tx_desc = ixgbe_txd;
 	if (((ixgbe_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 ||
 	    ixgbe_rxd < MIN_RXD || ixgbe_rxd > MAX_RXD) {
 		aprint_error_dev(dev, "RXD config issue, using default!\n");
 		adapter->num_rx_desc = DEFAULT_RXD;
 	} else
 		adapter->num_rx_desc = ixgbe_rxd;
 	adapter->num_jcl = adapter->num_rx_desc * IXGBE_JCLNUM_MULTI;
 	/* Allocate our TX/RX Queues */
 	if (ixgbe_allocate_queues(adapter)) {
 		error = ENOMEM;
 		goto err_out;
+	}
 	hw->phy.reset_if_overtemp = TRUE;
 	error = ixgbe_reset_hw(hw);
 	hw->phy.reset_if_overtemp = FALSE;
 	if (error == IXGBE_ERR_SFP_NOT_PRESENT) {
 		/*
 		 * No optics in this port, set up
 		 * so the timer routine will probe
 		 * for later insertion.
 		 */
 		adapter->sfp_probe = TRUE;
 		error = IXGBE_SUCCESS;
 	} else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) {
 		aprint_error_dev(dev, "Unsupported SFP+ module detected!\n");
 		unsupported_sfp = true;
 		error = IXGBE_SUCCESS;
 	} else if (error) {
 		aprint_error_dev(dev, "Hardware initialization failed\n");
 		error = EIO;
 		goto err_late;
+	}
 	/* Make sure we have a good EEPROM before we read from it */
 	if (ixgbe_validate_eeprom_checksum(&adapter->hw, NULL) < 0) {
 		aprint_error_dev(dev, "The EEPROM Checksum Is Not Valid\n");
 		error = EIO;
 		goto err_late;
+	}
 	aprint_normal("%s:", device_xname(dev));
 	/* NVM Image Version */
 	high = low = 0;
 	switch (hw->mac.type) {
 	case ixgbe_mac_X540:
 	case ixgbe_mac_X550EM_a:
 		hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
 		if (nvmreg == 0xffff)
 			break;
 		high = (nvmreg >> 12) & 0x0f;
 		low = (nvmreg >> 4) & 0xff;
 		id = nvmreg & 0x0f;
 		aprint_normal(" NVM Image Version %u.", high);
 		if (hw->mac.type == ixgbe_mac_X540)
 			str = "%x";
 		else
 			str = "%02x";
 		aprint_normal(str, low);
 		aprint_normal(" ID 0x%x,", id);
 		break;
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550:
 		hw->eeprom.ops.read(hw, IXGBE_NVM_IMAGE_VER, &nvmreg);
 		if (nvmreg == 0xffff)
 			break;
 		high = (nvmreg >> 12) & 0x0f;
 		low = nvmreg & 0xff;
 		aprint_normal(" NVM Image Version %u.%02x,", high, low);
 		break;
 	default:
 		break;
+	}
 	hw->eeprom.nvm_image_ver_high = high;
 	hw->eeprom.nvm_image_ver_low = low;
 	/* PHY firmware revision */
 	switch (hw->mac.type) {
 	case ixgbe_mac_X540:
 	case ixgbe_mac_X550:
 		hw->eeprom.ops.read(hw, IXGBE_PHYFW_REV, &nvmreg);
 		if (nvmreg == 0xffff)
 			break;
 		high = (nvmreg >> 12) & 0x0f;
 		low = (nvmreg >> 4) & 0xff;
 		id = nvmreg & 0x000f;
 		aprint_normal(" PHY FW Revision %u.", high);
 		if (hw->mac.type == ixgbe_mac_X540)
 			str = "%x";
 		else
 			str = "%02x";
 		aprint_normal(str, low);
 		aprint_normal(" ID 0x%x,", id);
 		break;
 	default:
 		break;
+	}
 	/* NVM Map version & OEM NVM Image version */
 	switch (hw->mac.type) {
 	case ixgbe_mac_X550:
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		hw->eeprom.ops.read(hw, IXGBE_NVM_MAP_VER, &nvmreg);
 		if (nvmreg != 0xffff) {
 			high = (nvmreg >> 12) & 0x0f;
 			low = nvmreg & 0x00ff;
 			aprint_normal(" NVM Map version %u.%02x,", high, low);
+		}
 		hw->eeprom.ops.read(hw, IXGBE_OEM_NVM_IMAGE_VER, &nvmreg);
 		if (nvmreg != 0xffff) {
 			high = (nvmreg >> 12) & 0x0f;
 			low = nvmreg & 0x00ff;
 			aprint_verbose(" OEM NVM Image version %u.%02x,", high,
 			    low);
+		}
 		break;
 	default:
 		break;
+	}
 	/* Print the ETrackID */
 	hw->eeprom.ops.read(hw, IXGBE_ETRACKID_H, &high);
 	hw->eeprom.ops.read(hw, IXGBE_ETRACKID_L, &low);
 	aprint_normal(" ETrackID %08x\n", ((uint32_t)high << 16) | low);
 	if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
 		error = ixgbe_allocate_msix(adapter, pa);
 		if (error) {
 			/* Free allocated queue structures first */
 			ixgbe_free_queues(adapter);
 			/* Fallback to legacy interrupt */
 			adapter->feat_en &= ~IXGBE_FEATURE_MSIX;
 			if (adapter->feat_cap & IXGBE_FEATURE_MSI)
 				adapter->feat_en |= IXGBE_FEATURE_MSI;
 			adapter->num_queues = 1;
 			/* Allocate our TX/RX Queues again */
 			if (ixgbe_allocate_queues(adapter)) {
 				error = ENOMEM;
 				goto err_out;
+			}
+		}
+	}
 	/* Recovery mode */
 	switch (adapter->hw.mac.type) {
 	case ixgbe_mac_X550:
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		/* >= 2.00 */
 		if (hw->eeprom.nvm_image_ver_high >= 2) {
 			adapter->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
 			adapter->feat_en |= IXGBE_FEATURE_RECOVERY_MODE;
+		}
 		break;
 	default:
 		break;
+	}
 	if ((adapter->feat_en & IXGBE_FEATURE_MSIX) == 0)
 		error = ixgbe_allocate_legacy(adapter, pa);
 	if (error)
 		goto err_late;
 	/* Tasklets for Link, SFP, Multispeed Fiber and Flow Director */
 	adapter->link_si = softint_establish(SOFTINT_NET |IXGBE_SOFTINT_FLAGS,
 	    ixgbe_handle_link, adapter);
 	adapter->mod_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS,
 	    ixgbe_handle_mod, adapter);
 	adapter->msf_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS,
 	    ixgbe_handle_msf, adapter);
 	adapter->phy_si = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS,
 	    ixgbe_handle_phy, adapter);
 	if (adapter->feat_en & IXGBE_FEATURE_FDIR)
 		adapter->fdir_si =
 		    softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS,
 			ixgbe_reinit_fdir, adapter);
 	if ((adapter->link_si == NULL) || (adapter->mod_si == NULL)
 	    || (adapter->msf_si == NULL) || (adapter->phy_si == NULL)
 	    || ((adapter->feat_en & IXGBE_FEATURE_FDIR)
 		&& (adapter->fdir_si == NULL))) {
 		aprint_error_dev(dev,
 		    "could not establish software interrupts ()\n");
 		goto err_out;
+	}
 	error = ixgbe_start_hw(hw);
 	switch (error) {
 	case IXGBE_ERR_EEPROM_VERSION:
 		aprint_error_dev(dev, "This device is a pre-production adapter/"
 		    "LOM.  Please be aware there may be issues associated "
 		    "with your hardware.\nIf you are experiencing problems "
 		    "please contact your Intel or hardware representative "
 		    "who provided you with this hardware.\n");
 		break;
 	default:
 		break;
+	}
 	/* Setup OS specific network interface */
 	if (ixgbe_setup_interface(dev, adapter) != 0)
 		goto err_late;
 	/*
 	 *  Print PHY ID only for copper PHY. On device which has SFP(+) cage
 	 * and a module is inserted, phy.id is not MII PHY id but SFF 8024 ID.
 	 */
 	if (hw->phy.media_type == ixgbe_media_type_copper) {
 		uint16_t id1, id2;
 		int oui, model, rev;
 		const char *descr;
 		id1 = hw->phy.id >> 16;
 		id2 = hw->phy.id & 0xffff;
 		oui = MII_OUI(id1, id2);
 		model = MII_MODEL(id2);
 		rev = MII_REV(id2);
 		if ((descr = mii_get_descr(oui, model)) != NULL)
 			aprint_normal_dev(dev,
 			    "PHY: %s (OUI 0x%06x, model 0x%04x), rev. %d\n",
 			    descr, oui, model, rev);
 		else
 			aprint_normal_dev(dev,
 			    "PHY OUI 0x%06x, model 0x%04x, rev. %d\n",
 			    oui, model, rev);
+	}
 	/* Enable EEE power saving */
 	if (adapter->feat_cap & IXGBE_FEATURE_EEE)
 		hw->mac.ops.setup_eee(hw,
 		    adapter->feat_en & IXGBE_FEATURE_EEE);
 	/* Enable power to the phy. */
 	if (!unsupported_sfp) {
 		/* Enable the optics for 82599 SFP+ fiber */
 		ixgbe_enable_tx_laser(hw);
 		/*
 		 * XXX Currently, ixgbe_set_phy_power() supports only copper
 		 * PHY, so it's not required to test with !unsupported_sfp.
 		 */
 		ixgbe_set_phy_power(hw, TRUE);
+	}
 	/* Initialize statistics */
 	ixgbe_update_stats_counters(adapter);
 	/* Check PCIE slot type/speed/width */
 	ixgbe_get_slot_info(adapter);
 	/*
 	 * Do time init and sysctl init here, but
 	 * only on the first port of a bypass adapter.
 	 */
 	ixgbe_bypass_init(adapter);
 	/* Set an initial dmac value */
 	adapter->dmac = 0;
 	/* Set initial advertised speeds (if applicable) */
 	adapter->advertise = ixgbe_get_advertise(adapter);
 	if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
 		ixgbe_define_iov_schemas(dev, &error);
 	/* Add sysctls */
 	ixgbe_add_device_sysctls(adapter);
 	ixgbe_add_hw_stats(adapter);
 	/* For Netmap */
 	adapter->init_locked = ixgbe_init_locked;
 	adapter->stop_locked = ixgbe_stop;
 	if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
 		ixgbe_netmap_attach(adapter);
 	snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_cap);
 	aprint_verbose_dev(dev, "feature cap %s\n", buf);
 	snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_en);
 	aprint_verbose_dev(dev, "feature ena %s\n", buf);
 	if (pmf_device_register(dev, ixgbe_suspend, ixgbe_resume))
 		pmf_class_network_register(dev, adapter->ifp);
 	else
 		aprint_error_dev(dev, "couldn't establish power handler\n");
 	/* Init recovery mode timer and state variable */
 	if (adapter->feat_en & IXGBE_FEATURE_RECOVERY_MODE) {
 		adapter->recovery_mode = 0;
 		/* Set up the timer callout */
 		callout_init(&adapter->recovery_mode_timer,
 		    IXGBE_CALLOUT_FLAGS);
 		/* Start the task */
 		callout_reset(&adapter->recovery_mode_timer, hz,
 		    ixgbe_recovery_mode_timer, adapter);
+	}
 	INIT_DEBUGOUT("ixgbe_attach: end");
 	adapter->osdep.attached = true;
 	return;
 err_late:
 	ixgbe_free_queues(adapter);
 err_out:
 	ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 	ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
 	ixgbe_free_softint(adapter);
 	ixgbe_free_pci_resources(adapter);
 	if (adapter->mta != NULL)
 		free(adapter->mta, M_DEVBUF);
 	IXGBE_CORE_LOCK_DESTROY(adapter);
 	return;
 } /* ixgbe_attach */
 /************************************************************************
  * ixgbe_check_wol_support
+ *
  *   Checks whether the adapter's ports are capable of
  *   Wake On LAN by reading the adapter's NVM.
+ *
  *   Sets each port's hw->wol_enabled value depending
  *   on the value read here.
  ************************************************************************/
 static void
 ixgbe_check_wol_support(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u16		dev_caps = 0;
 	/* Find out WoL support for port */
 	adapter->wol_support = hw->wol_enabled = 0;
 	ixgbe_get_device_caps(hw, &dev_caps);
 	if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
 	    ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) &&
 	     hw->bus.func == 0))
 		adapter->wol_support = hw->wol_enabled = 1;
 	/* Save initial wake up filter configuration */
 	adapter->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC);
 	return;
 } /* ixgbe_check_wol_support */
 /************************************************************************
  * ixgbe_setup_interface
+ *
  *   Setup networking device structure and register an interface.
  ************************************************************************/
 static int
 ixgbe_setup_interface(device_t dev, struct adapter *adapter)
+{
 	struct ethercom *ec = &adapter->osdep.ec;
 	struct ifnet   *ifp;
 	int rv;
 	INIT_DEBUGOUT("ixgbe_setup_interface: begin");
 	ifp = adapter->ifp = &ec->ec_if;
 	strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ);
 	ifp->if_baudrate = IF_Gbps(10);
 	ifp->if_init = ixgbe_init;
 	ifp->if_stop = ixgbe_ifstop;
 	ifp->if_softc = adapter;
 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 #ifdef IXGBE_MPSAFE
 	ifp->if_extflags = IFEF_MPSAFE;
 #endif
 	ifp->if_ioctl = ixgbe_ioctl;
 #if __FreeBSD_version >= 1100045
 	/* TSO parameters */
 	ifp->if_hw_tsomax = 65518;
 	ifp->if_hw_tsomaxsegcount = IXGBE_82599_SCATTER;
 	ifp->if_hw_tsomaxsegsize = 2048;
 #endif
 	if (adapter->feat_en & IXGBE_FEATURE_LEGACY_TX) {
 #if 0
 		ixgbe_start_locked = ixgbe_legacy_start_locked;
 #endif
 	} else {
 		ifp->if_transmit = ixgbe_mq_start;
 #if 0
 		ixgbe_start_locked = ixgbe_mq_start_locked;
 #endif
+	}
 	ifp->if_start = ixgbe_legacy_start;
 	IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2);
 	IFQ_SET_READY(&ifp->if_snd);
 	rv = if_initialize(ifp);
 	if (rv != 0) {
 		aprint_error_dev(dev, "if_initialize failed(%d)\n", rv);
 		return rv;
+	}
 	adapter->ipq = if_percpuq_create(&adapter->osdep.ec.ec_if);
 	ether_ifattach(ifp, adapter->hw.mac.addr);
 	aprint_normal_dev(dev, "Ethernet address %s\n",
 	    ether_sprintf(adapter->hw.mac.addr));
 	/*
 	 * We use per TX queue softint, so if_deferred_start_init() isn't
 	 * used.
 	 */
 	ether_set_ifflags_cb(ec, ixgbe_ifflags_cb);
 	adapter->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
 	/*
 	 * Tell the upper layer(s) we support long frames.
 	 */
 	ifp->if_hdrlen = sizeof(struct ether_vlan_header);
 	/* Set capability flags */
 	ifp->if_capabilities |= IFCAP_RXCSUM
 			     |	IFCAP_TXCSUM
 			     |	IFCAP_TSOv4
 			     |	IFCAP_TSOv6;
 	ifp->if_capenable = 0;
 	ec->ec_capabilities |= ETHERCAP_VLAN_HWTAGGING
 			    |  ETHERCAP_VLAN_HWCSUM
 			    |  ETHERCAP_JUMBO_MTU
 			    |  ETHERCAP_VLAN_MTU;
 	/* Enable the above capabilities by default */
 	ec->ec_capenable = ec->ec_capabilities;
 	/*
 	 * Don't turn this on by default, if vlans are
 	 * created on another pseudo device (eg. lagg)
 	 * then vlan events are not passed thru, breaking
 	 * operation, but with HW FILTER off it works. If
 	 * using vlans directly on the ixgbe driver you can
 	 * enable this and get full hardware tag filtering.
 	 */
 	ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER;
 	/*
 	 * Specify the media types supported by this adapter and register
 	 * callbacks to update media and link information
 	 */
 	ec->ec_ifmedia = &adapter->media;
 	ifmedia_init(&adapter->media, IFM_IMASK, ixgbe_media_change,
 	    ixgbe_media_status);
 	adapter->phy_layer = ixgbe_get_supported_physical_layer(&adapter->hw);
 	ixgbe_add_media_types(adapter);
 	/* Set autoselect media by default */
 	ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
 	if_register(ifp);
 	return (0);
 } /* ixgbe_setup_interface */
 /************************************************************************
  * ixgbe_add_media_types
  ************************************************************************/
 static void
 ixgbe_add_media_types(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u64		layer;
 	layer = adapter->phy_layer;
 #define	ADD(mm, dd)							\
 	ifmedia_add(&adapter->media, IFM_ETHER | (mm), (dd), NULL);
 	ADD(IFM_NONE, 0);
 	/* Media types with matching NetBSD media defines */
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) {
 		ADD(IFM_10G_T | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T) {
 		ADD(IFM_1000_T | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX) {
 		ADD(IFM_100_TX | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T) {
 		ADD(IFM_10_T | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
 	    layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) {
 		ADD(IFM_10G_TWINAX | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) {
 		ADD(IFM_10G_LR | IFM_FDX, 0);
 		if (hw->phy.multispeed_fiber) {
 			ADD(IFM_1000_LX | IFM_FDX, 0);
+		}
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) {
 		ADD(IFM_10G_SR | IFM_FDX, 0);
 		if (hw->phy.multispeed_fiber) {
 			ADD(IFM_1000_SX | IFM_FDX, 0);
+		}
 	} else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX) {
 		ADD(IFM_1000_SX | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4) {
 		ADD(IFM_10G_CX4 | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
 		ADD(IFM_10G_KR | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
 		ADD(IFM_10G_KX4 | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) {
 		ADD(IFM_1000_KX | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) {
 		ADD(IFM_2500_KX | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T) {
 		ADD(IFM_2500_T | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_5GBASE_T) {
 		ADD(IFM_5000_T | IFM_FDX, 0);
+	}
 	if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX)
 		ADD(IFM_1000_BX10 | IFM_FDX, 0);
 	/* XXX no ifmedia_set? */
 	ADD(IFM_AUTO, 0);
 #undef ADD
 } /* ixgbe_add_media_types */
 /************************************************************************
  * ixgbe_is_sfp
  ************************************************************************/
 static inline bool
 ixgbe_is_sfp(struct ixgbe_hw *hw)
+{
 	switch (hw->mac.type) {
 	case ixgbe_mac_82598EB:
 		if (hw->phy.type == ixgbe_phy_nl)
 			return (TRUE);
 		return (FALSE);
 	case ixgbe_mac_82599EB:
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		switch (hw->mac.ops.get_media_type(hw)) {
 		case ixgbe_media_type_fiber:
 		case ixgbe_media_type_fiber_qsfp:
 			return (TRUE);
 		default:
 			return (FALSE);
+		}
 	default:
 		return (FALSE);
+	}
 } /* ixgbe_is_sfp */
 /************************************************************************
  * ixgbe_config_link
  ************************************************************************/
 static void
 ixgbe_config_link(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		autoneg, err = 0;
 	bool		sfp, negotiate = false;
 	sfp = ixgbe_is_sfp(hw);
 	if (sfp) {
 		if (hw->phy.multispeed_fiber) {
 			ixgbe_enable_tx_laser(hw);
 			kpreempt_disable();
 			softint_schedule(adapter->msf_si);
 			kpreempt_enable();
+		}
 		kpreempt_disable();
 		softint_schedule(adapter->mod_si);
 		kpreempt_enable();
 	} else {
 		struct ifmedia	*ifm = &adapter->media;
 		if (hw->mac.ops.check_link)
 			err = ixgbe_check_link(hw, &adapter->link_speed,
 			    &adapter->link_up, FALSE);
 		if (err)
 			return;
 		/*
 		 * Check if it's the first call. If it's the first call,
 		 * get value for auto negotiation.
 		 */
 		autoneg = hw->phy.autoneg_advertised;
 		if ((IFM_SUBTYPE(ifm->ifm_cur->ifm_media) != IFM_NONE)
 		    && ((!autoneg) && (hw->mac.ops.get_link_capabilities)))
 			err = hw->mac.ops.get_link_capabilities(hw, &autoneg,
 			    &negotiate);
 		if (err)
 			return;
 		if (hw->mac.ops.setup_link)
 			err = hw->mac.ops.setup_link(hw, autoneg,
 			    adapter->link_up);
+	}
 } /* ixgbe_config_link */
 /************************************************************************
  * ixgbe_update_stats_counters - Update board statistics counters.
  ************************************************************************/
 static void
 ixgbe_update_stats_counters(struct adapter *adapter)
+{
 	struct ifnet	      *ifp = adapter->ifp;
 	struct ixgbe_hw	      *hw = &adapter->hw;
 	struct ixgbe_hw_stats *stats = &adapter->stats.pf;
 	u32		      missed_rx = 0, bprc, lxon, lxoff, total;
 	u64		      total_missed_rx = 0;
 	uint64_t	      crcerrs, rlec;
 	unsigned int	      queue_counters;
 	int		      i;
 	crcerrs = IXGBE_READ_REG(hw, IXGBE_CRCERRS);
 	stats->crcerrs.ev_count += crcerrs;
 	stats->illerrc.ev_count += IXGBE_READ_REG(hw, IXGBE_ILLERRC);
 	stats->errbc.ev_count += IXGBE_READ_REG(hw, IXGBE_ERRBC);
 	stats->mspdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MSPDC);
 	if (hw->mac.type >= ixgbe_mac_X550)
 		stats->mbsdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MBSDC);
 	/* 16 registers exist */
 	queue_counters = uimin(__arraycount(stats->qprc), adapter->num_queues);
 	for (i = 0; i < queue_counters; i++) {
 		stats->qprc[i].ev_count += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
 		stats->qptc[i].ev_count += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
 		if (hw->mac.type >= ixgbe_mac_82599EB) {
 			stats->qprdc[i].ev_count
 			    += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
+		}
+	}
 	/* 8 registers exist */
 	for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) {
 		uint32_t mp;
 		/* MPC */
 		mp = IXGBE_READ_REG(hw, IXGBE_MPC(i));
 		/* global total per queue */
 		stats->mpc[i].ev_count += mp;
 		/* running comprehensive total for stats display */
 		total_missed_rx += mp;
 		if (hw->mac.type == ixgbe_mac_82598EB)
 			stats->rnbc[i].ev_count
 			    += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
 		stats->pxontxc[i].ev_count
 		    += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
 		stats->pxofftxc[i].ev_count
 		    += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
 		if (hw->mac.type >= ixgbe_mac_82599EB) {
 			stats->pxonrxc[i].ev_count
 			    += IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
 			stats->pxoffrxc[i].ev_count
 			    += IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 			stats->pxon2offc[i].ev_count
 			    += IXGBE_READ_REG(hw, IXGBE_PXON2OFFCNT(i));
 		} else {
 			stats->pxonrxc[i].ev_count
 			    += IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
 			stats->pxoffrxc[i].ev_count
 			    += IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
+		}
+	}
 	stats->mpctotal.ev_count += total_missed_rx;
 	/* Document says M[LR]FC are valid when link is up and 10Gbps */
 	if ((adapter->link_active == LINK_STATE_UP)
 	    && (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL)) {
 		stats->mlfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MLFC);
 		stats->mrfc.ev_count += IXGBE_READ_REG(hw, IXGBE_MRFC);
+	}
 	rlec = IXGBE_READ_REG(hw, IXGBE_RLEC);
 	stats->rlec.ev_count += rlec;
 	/* Hardware workaround, gprc counts missed packets */
 	stats->gprc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPRC) - missed_rx;
 	lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
 	stats->lxontxc.ev_count += lxon;
 	lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
 	stats->lxofftxc.ev_count += lxoff;
 	total = lxon + lxoff;
 	if (hw->mac.type != ixgbe_mac_82598EB) {
 		stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCL) +
 		    ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32);
 		stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCL) +
 		    ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32) - total * ETHER_MIN_LEN;
 		stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORL) +
 		    ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32);
 		stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
 		stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 	} else {
 		stats->lxonrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
 		stats->lxoffrxc.ev_count += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 		/* 82598 only has a counter in the high register */
 		stats->gorc.ev_count += IXGBE_READ_REG(hw, IXGBE_GORCH);
 		stats->gotc.ev_count += IXGBE_READ_REG(hw, IXGBE_GOTCH) - total * ETHER_MIN_LEN;
 		stats->tor.ev_count += IXGBE_READ_REG(hw, IXGBE_TORH);
+	}
 	/*
 	 * Workaround: mprc hardware is incorrectly counting
 	 * broadcasts, so for now we subtract those.
 	 */
 	bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
 	stats->bprc.ev_count += bprc;
 	stats->mprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPRC)
 	    - ((hw->mac.type == ixgbe_mac_82598EB) ? bprc : 0);
 	stats->prc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC64);
 	stats->prc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC127);
 	stats->prc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC255);
 	stats->prc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC511);
 	stats->prc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1023);
 	stats->prc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PRC1522);
 	stats->gptc.ev_count += IXGBE_READ_REG(hw, IXGBE_GPTC) - total;
 	stats->mptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MPTC) - total;
 	stats->ptc64.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC64) - total;
 	stats->ruc.ev_count += IXGBE_READ_REG(hw, IXGBE_RUC);
 	stats->rfc.ev_count += IXGBE_READ_REG(hw, IXGBE_RFC);
 	stats->roc.ev_count += IXGBE_READ_REG(hw, IXGBE_ROC);
 	stats->rjc.ev_count += IXGBE_READ_REG(hw, IXGBE_RJC);
 	stats->mngprc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPRC);
 	stats->mngpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPDC);
 	stats->mngptc.ev_count += IXGBE_READ_REG(hw, IXGBE_MNGPTC);
 	stats->tpr.ev_count += IXGBE_READ_REG(hw, IXGBE_TPR);
 	stats->tpt.ev_count += IXGBE_READ_REG(hw, IXGBE_TPT);
 	stats->ptc127.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC127);
 	stats->ptc255.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC255);
 	stats->ptc511.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC511);
 	stats->ptc1023.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1023);
 	stats->ptc1522.ev_count += IXGBE_READ_REG(hw, IXGBE_PTC1522);
 	stats->bptc.ev_count += IXGBE_READ_REG(hw, IXGBE_BPTC);
 	stats->xec.ev_count += IXGBE_READ_REG(hw, IXGBE_XEC);
 	stats->fccrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCCRC);
 	stats->fclast.ev_count += IXGBE_READ_REG(hw, IXGBE_FCLAST);
 	/* Only read FCOE on 82599 */
 	if (hw->mac.type != ixgbe_mac_82598EB) {
 		stats->fcoerpdc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
 		stats->fcoeprc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
 		stats->fcoeptc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
 		stats->fcoedwrc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
 		stats->fcoedwtc.ev_count += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
+	}
 	/* Fill out the OS statistics structure */
 	/*
 	 * NetBSD: Don't override if_{i|o}{packets|bytes|mcasts} with
 	 * adapter->stats counters. It's required to make ifconfig -z
 	 * (SOICZIFDATA) work.
 	 */
 	ifp->if_collisions = 0;
 	/* Rx Errors */
 	ifp->if_iqdrops += total_missed_rx;
 	ifp->if_ierrors += crcerrs + rlec;
 } /* ixgbe_update_stats_counters */
 /************************************************************************
  * ixgbe_add_hw_stats
+ *
  *   Add sysctl variables, one per statistic, to the system.
  ************************************************************************/
 static void
 ixgbe_add_hw_stats(struct adapter *adapter)
+{
 	device_t dev = adapter->dev;
 	const struct sysctlnode *rnode, *cnode;
 	struct sysctllog **log = &adapter->sysctllog;
 	struct tx_ring *txr = adapter->tx_rings;
 	struct rx_ring *rxr = adapter->rx_rings;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ixgbe_hw_stats *stats = &adapter->stats.pf;
 	const char *xname = device_xname(dev);
 	int i;
 	/* Driver Statistics */
 	evcnt_attach_dynamic(&adapter->efbig_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma soft fail EFBIG");
 	evcnt_attach_dynamic(&adapter->mbuf_defrag_failed, EVCNT_TYPE_MISC,
 	    NULL, xname, "m_defrag() failed");
 	evcnt_attach_dynamic(&adapter->efbig2_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma hard fail EFBIG");
 	evcnt_attach_dynamic(&adapter->einval_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma hard fail EINVAL");
 	evcnt_attach_dynamic(&adapter->other_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma hard fail other");
 	evcnt_attach_dynamic(&adapter->eagain_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma soft fail EAGAIN");
 	evcnt_attach_dynamic(&adapter->enomem_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma soft fail ENOMEM");
 	evcnt_attach_dynamic(&adapter->watchdog_events, EVCNT_TYPE_MISC,
 	    NULL, xname, "Watchdog timeouts");
 	evcnt_attach_dynamic(&adapter->tso_err, EVCNT_TYPE_MISC,
 	    NULL, xname, "TSO errors");
 	evcnt_attach_dynamic(&adapter->link_irq, EVCNT_TYPE_INTR,
 	    NULL, xname, "Link MSI-X IRQ Handled");
 	evcnt_attach_dynamic(&adapter->link_sicount, EVCNT_TYPE_INTR,
 	    NULL, xname, "Link softint");
 	evcnt_attach_dynamic(&adapter->mod_sicount, EVCNT_TYPE_INTR,
 	    NULL, xname, "module softint");
 	evcnt_attach_dynamic(&adapter->msf_sicount, EVCNT_TYPE_INTR,
 	    NULL, xname, "multimode softint");
 	evcnt_attach_dynamic(&adapter->phy_sicount, EVCNT_TYPE_INTR,
 	    NULL, xname, "external PHY softint");
 	/* Max number of traffic class is 8 */
 	KASSERT(IXGBE_DCB_MAX_TRAFFIC_CLASS == 8);
 	for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) {
 		snprintf(adapter->tcs[i].evnamebuf,
 		    sizeof(adapter->tcs[i].evnamebuf), "%s tc%d",
 		    xname, i);
 		if (i < __arraycount(stats->mpc)) {
 			evcnt_attach_dynamic(&stats->mpc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->tcs[i].evnamebuf,
 			    "RX Missed Packet Count");
 			if (hw->mac.type == ixgbe_mac_82598EB)
 				evcnt_attach_dynamic(&stats->rnbc[i],
 				    EVCNT_TYPE_MISC, NULL,
 				    adapter->tcs[i].evnamebuf,
 				    "Receive No Buffers");
+		}
 		if (i < __arraycount(stats->pxontxc)) {
 			evcnt_attach_dynamic(&stats->pxontxc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->tcs[i].evnamebuf,
 			    "pxontxc");
 			evcnt_attach_dynamic(&stats->pxonrxc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->tcs[i].evnamebuf,
 			    "pxonrxc");
 			evcnt_attach_dynamic(&stats->pxofftxc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->tcs[i].evnamebuf,
 			    "pxofftxc");
 			evcnt_attach_dynamic(&stats->pxoffrxc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->tcs[i].evnamebuf,
 			    "pxoffrxc");
 			if (hw->mac.type >= ixgbe_mac_82599EB)
 				evcnt_attach_dynamic(&stats->pxon2offc[i],
 				    EVCNT_TYPE_MISC, NULL,
 				    adapter->tcs[i].evnamebuf,
 			    "pxon2offc");
+		}
+	}
 	for (i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
 #ifdef LRO
 		struct lro_ctrl *lro = &rxr->lro;
 #endif /* LRO */
 		snprintf(adapter->queues[i].evnamebuf,
 		    sizeof(adapter->queues[i].evnamebuf), "%s q%d",
 		    xname, i);
 		snprintf(adapter->queues[i].namebuf,
 		    sizeof(adapter->queues[i].namebuf), "q%d", i);
 		if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
 			aprint_error_dev(dev, "could not create sysctl root\n");
 			break;
+		}
 		if (sysctl_createv(log, 0, &rnode, &rnode,
 , CTLTYPE_NODE,
 		    adapter->queues[i].namebuf, SYSCTL_DESCR("Queue Name"),
 		    NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READWRITE, CTLTYPE_INT,
 		    "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"),
 		    ixgbe_sysctl_interrupt_rate_handler, 0,
 		    (void *)&adapter->queues[i], 0, CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY, CTLTYPE_INT,
 		    "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"),
 		    ixgbe_sysctl_tdh_handler, 0, (void *)txr,
 , CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY, CTLTYPE_INT,
 		    "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"),
 		    ixgbe_sysctl_tdt_handler, 0, (void *)txr,
 , CTL_CREATE, CTL_EOL) != 0)
 			break;
 		evcnt_attach_dynamic(&adapter->queues[i].irqs, EVCNT_TYPE_INTR,
 		    NULL, adapter->queues[i].evnamebuf, "IRQs on queue");
 		evcnt_attach_dynamic(&adapter->queues[i].handleq,
 		    EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
 		    "Handled queue in softint");
 		evcnt_attach_dynamic(&adapter->queues[i].req, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Requeued in softint");
 		evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "TSO");
 		evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf,
-		    "Queue No Descriptor Available");
+		    "TX Queue No Descriptor Available");
 		evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf,
 		    "Queue Packets Transmitted");
 #ifndef IXGBE_LEGACY_TX
 		evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf,
 		    "Packets dropped in pcq");
 #endif
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY,
 		    CTLTYPE_INT,
 		    "rxd_nxck", SYSCTL_DESCR("Receive Descriptor next to check"),
 			ixgbe_sysctl_next_to_check_handler, 0, (void *)rxr, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY,
 		    CTLTYPE_INT,
 		    "rxd_head", SYSCTL_DESCR("Receive Descriptor Head"),
 		    ixgbe_sysctl_rdh_handler, 0, (void *)rxr, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY,
 		    CTLTYPE_INT,
 		    "rxd_tail", SYSCTL_DESCR("Receive Descriptor Tail"),
 		    ixgbe_sysctl_rdt_handler, 0, (void *)rxr, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (i < __arraycount(stats->qprc)) {
 			evcnt_attach_dynamic(&stats->qprc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
 			    "qprc");
 			evcnt_attach_dynamic(&stats->qptc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
 			    "qptc");
 			evcnt_attach_dynamic(&stats->qbrc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
 			    "qbrc");
 			evcnt_attach_dynamic(&stats->qbtc[i],
 			    EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
 			    "qbtc");
 			if (hw->mac.type >= ixgbe_mac_82599EB)
 				evcnt_attach_dynamic(&stats->qprdc[i],
 				    EVCNT_TYPE_MISC, NULL,
 				    adapter->queues[i].evnamebuf, "qprdc");
+		}
 		evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Queue Packets Received");
 		evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Queue Bytes Received");
 		evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Copied RX Frames");
 		evcnt_attach_dynamic(&rxr->no_jmbuf, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Rx no jumbo mbuf");
 		evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Rx discarded");
 #ifdef LRO
 		SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued",
 				CTLFLAG_RD, &lro->lro_queued, 0,
 				"LRO Queued");
 		SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed",
 				CTLFLAG_RD, &lro->lro_flushed, 0,
 				"LRO Flushed");
 #endif /* LRO */
+	}
 	/* MAC stats get their own sub node */
 	snprintf(stats->namebuf,
 	    sizeof(stats->namebuf), "%s MAC Statistics", xname);
 	evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - IP");
 	evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - L4");
 	evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - IP bad");
 	evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - L4 bad");
 	evcnt_attach_dynamic(&stats->intzero, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Interrupt conditions zero");
 	evcnt_attach_dynamic(&stats->legint, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Legacy interrupts");
 	evcnt_attach_dynamic(&stats->crcerrs, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "CRC Errors");
 	evcnt_attach_dynamic(&stats->illerrc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Illegal Byte Errors");
 	evcnt_attach_dynamic(&stats->errbc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Byte Errors");
 	evcnt_attach_dynamic(&stats->mspdc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "MAC Short Packets Discarded");
 	if (hw->mac.type >= ixgbe_mac_X550)
 		evcnt_attach_dynamic(&stats->mbsdc, EVCNT_TYPE_MISC, NULL,
 		    stats->namebuf, "Bad SFD");
 	evcnt_attach_dynamic(&stats->mpctotal, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Total Packets Missed");
 	evcnt_attach_dynamic(&stats->mlfc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "MAC Local Faults");
 	evcnt_attach_dynamic(&stats->mrfc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "MAC Remote Faults");
 	evcnt_attach_dynamic(&stats->rlec, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Receive Length Errors");
 	evcnt_attach_dynamic(&stats->lxontxc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Link XON Transmitted");
 	evcnt_attach_dynamic(&stats->lxonrxc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Link XON Received");
 	evcnt_attach_dynamic(&stats->lxofftxc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Link XOFF Transmitted");
 	evcnt_attach_dynamic(&stats->lxoffrxc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Link XOFF Received");
 	/* Packet Reception Stats */
 	evcnt_attach_dynamic(&stats->tor, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Total Octets Received");
 	evcnt_attach_dynamic(&stats->gorc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Good Octets Received");
 	evcnt_attach_dynamic(&stats->tpr, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Total Packets Received");
 	evcnt_attach_dynamic(&stats->gprc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Good Packets Received");
 	evcnt_attach_dynamic(&stats->mprc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Multicast Packets Received");
 	evcnt_attach_dynamic(&stats->bprc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Broadcast Packets Received");
 	evcnt_attach_dynamic(&stats->prc64, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "64 byte frames received ");
 	evcnt_attach_dynamic(&stats->prc127, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "65-127 byte frames received");
 	evcnt_attach_dynamic(&stats->prc255, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "128-255 byte frames received");
 	evcnt_attach_dynamic(&stats->prc511, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "256-511 byte frames received");
 	evcnt_attach_dynamic(&stats->prc1023, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "512-1023 byte frames received");
 	evcnt_attach_dynamic(&stats->prc1522, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "1023-1522 byte frames received");
 	evcnt_attach_dynamic(&stats->ruc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Receive Undersized");
 	evcnt_attach_dynamic(&stats->rfc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Fragmented Packets Received ");
 	evcnt_attach_dynamic(&stats->roc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Oversized Packets Received");
 	evcnt_attach_dynamic(&stats->rjc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Received Jabber");
 	evcnt_attach_dynamic(&stats->mngprc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Management Packets Received");
 	evcnt_attach_dynamic(&stats->mngpdc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Management Packets Dropped");
 	evcnt_attach_dynamic(&stats->xec, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Checksum Errors");
 	/* Packet Transmission Stats */
 	evcnt_attach_dynamic(&stats->gotc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Good Octets Transmitted");
 	evcnt_attach_dynamic(&stats->tpt, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Total Packets Transmitted");
 	evcnt_attach_dynamic(&stats->gptc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Good Packets Transmitted");
 	evcnt_attach_dynamic(&stats->bptc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Broadcast Packets Transmitted");
 	evcnt_attach_dynamic(&stats->mptc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Multicast Packets Transmitted");
 	evcnt_attach_dynamic(&stats->mngptc, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "Management Packets Transmitted");
 	evcnt_attach_dynamic(&stats->ptc64, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "64 byte frames transmitted ");
 	evcnt_attach_dynamic(&stats->ptc127, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "65-127 byte frames transmitted");
 	evcnt_attach_dynamic(&stats->ptc255, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "128-255 byte frames transmitted");
 	evcnt_attach_dynamic(&stats->ptc511, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "256-511 byte frames transmitted");
 	evcnt_attach_dynamic(&stats->ptc1023, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "512-1023 byte frames transmitted");
 	evcnt_attach_dynamic(&stats->ptc1522, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "1024-1522 byte frames transmitted");
 } /* ixgbe_add_hw_stats */
 static void
 ixgbe_clear_evcnt(struct adapter *adapter)
+{
 	struct tx_ring *txr = adapter->tx_rings;
 	struct rx_ring *rxr = adapter->rx_rings;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ixgbe_hw_stats *stats = &adapter->stats.pf;
 	int i;
 	adapter->efbig_tx_dma_setup.ev_count = 0;
 	adapter->mbuf_defrag_failed.ev_count = 0;
 	adapter->efbig2_tx_dma_setup.ev_count = 0;
 	adapter->einval_tx_dma_setup.ev_count = 0;
 	adapter->other_tx_dma_setup.ev_count = 0;
 	adapter->eagain_tx_dma_setup.ev_count = 0;
 	adapter->enomem_tx_dma_setup.ev_count = 0;
 	adapter->tso_err.ev_count = 0;
 	adapter->watchdog_events.ev_count = 0;
 	adapter->link_irq.ev_count = 0;
 	adapter->link_sicount.ev_count = 0;
 	adapter->mod_sicount.ev_count = 0;
 	adapter->msf_sicount.ev_count = 0;
 	adapter->phy_sicount.ev_count = 0;
 	for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) {
 		if (i < __arraycount(stats->mpc)) {
 			stats->mpc[i].ev_count = 0;
 			if (hw->mac.type == ixgbe_mac_82598EB)
 				stats->rnbc[i].ev_count = 0;
+		}
 		if (i < __arraycount(stats->pxontxc)) {
 			stats->pxontxc[i].ev_count = 0;
 			stats->pxonrxc[i].ev_count = 0;
 			stats->pxofftxc[i].ev_count = 0;
 			stats->pxoffrxc[i].ev_count = 0;
 			if (hw->mac.type >= ixgbe_mac_82599EB)
 				stats->pxon2offc[i].ev_count = 0;
+		}
+	}
 	txr = adapter->tx_rings;
 	for (i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
 		adapter->queues[i].irqs.ev_count = 0;
 		adapter->queues[i].handleq.ev_count = 0;
 		adapter->queues[i].req.ev_count = 0;
 		txr->no_desc_avail.ev_count = 0;
 		txr->total_packets.ev_count = 0;
 		txr->tso_tx.ev_count = 0;
 #ifndef IXGBE_LEGACY_TX
 		txr->pcq_drops.ev_count = 0;
 #endif
 		txr->q_efbig_tx_dma_setup = 0;
 		txr->q_mbuf_defrag_failed = 0;
 		txr->q_efbig2_tx_dma_setup = 0;
 		txr->q_einval_tx_dma_setup = 0;
 		txr->q_other_tx_dma_setup = 0;
 		txr->q_eagain_tx_dma_setup = 0;
 		txr->q_enomem_tx_dma_setup = 0;
 		txr->q_tso_err = 0;
 		if (i < __arraycount(stats->qprc)) {
 			stats->qprc[i].ev_count = 0;
 			stats->qptc[i].ev_count = 0;
 			stats->qbrc[i].ev_count = 0;
 			stats->qbtc[i].ev_count = 0;
 			if (hw->mac.type >= ixgbe_mac_82599EB)
 				stats->qprdc[i].ev_count = 0;
+		}
 		rxr->rx_packets.ev_count = 0;
 		rxr->rx_bytes.ev_count = 0;
 		rxr->rx_copies.ev_count = 0;
 		rxr->no_jmbuf.ev_count = 0;
 		rxr->rx_discarded.ev_count = 0;
+	}
 	stats->ipcs.ev_count = 0;
 	stats->l4cs.ev_count = 0;
 	stats->ipcs_bad.ev_count = 0;
 	stats->l4cs_bad.ev_count = 0;
 	stats->intzero.ev_count = 0;
 	stats->legint.ev_count = 0;
 	stats->crcerrs.ev_count = 0;
 	stats->illerrc.ev_count = 0;
 	stats->errbc.ev_count = 0;
 	stats->mspdc.ev_count = 0;
 	if (hw->mac.type >= ixgbe_mac_X550)
 		stats->mbsdc.ev_count = 0;
 	stats->mpctotal.ev_count = 0;
 	stats->mlfc.ev_count = 0;
 	stats->mrfc.ev_count = 0;
 	stats->rlec.ev_count = 0;
 	stats->lxontxc.ev_count = 0;
 	stats->lxonrxc.ev_count = 0;
 	stats->lxofftxc.ev_count = 0;
 	stats->lxoffrxc.ev_count = 0;
 	/* Packet Reception Stats */
 	stats->tor.ev_count = 0;
 	stats->gorc.ev_count = 0;
 	stats->tpr.ev_count = 0;
 	stats->gprc.ev_count = 0;
 	stats->mprc.ev_count = 0;
 	stats->bprc.ev_count = 0;
 	stats->prc64.ev_count = 0;
 	stats->prc127.ev_count = 0;
 	stats->prc255.ev_count = 0;
 	stats->prc511.ev_count = 0;
 	stats->prc1023.ev_count = 0;
 	stats->prc1522.ev_count = 0;
 	stats->ruc.ev_count = 0;
 	stats->rfc.ev_count = 0;
 	stats->roc.ev_count = 0;
 	stats->rjc.ev_count = 0;
 	stats->mngprc.ev_count = 0;
 	stats->mngpdc.ev_count = 0;
 	stats->xec.ev_count = 0;
 	/* Packet Transmission Stats */
 	stats->gotc.ev_count = 0;
 	stats->tpt.ev_count = 0;
 	stats->gptc.ev_count = 0;
 	stats->bptc.ev_count = 0;
 	stats->mptc.ev_count = 0;
 	stats->mngptc.ev_count = 0;
 	stats->ptc64.ev_count = 0;
 	stats->ptc127.ev_count = 0;
 	stats->ptc255.ev_count = 0;
 	stats->ptc511.ev_count = 0;
 	stats->ptc1023.ev_count = 0;
 	stats->ptc1522.ev_count = 0;
+}
 /************************************************************************
  * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function
+ *
  *   Retrieves the TDH value from the hardware
  ************************************************************************/
 static int
 ixgbe_sysctl_tdh_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
 	struct adapter *adapter;
 	uint32_t val;
 	if (!txr)
 		return (0);
 	adapter = txr->adapter;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	val = IXGBE_READ_REG(&adapter->hw, IXGBE_TDH(txr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixgbe_sysctl_tdh_handler */
 /************************************************************************
  * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function
+ *
  *   Retrieves the TDT value from the hardware
  ************************************************************************/
 static int
 ixgbe_sysctl_tdt_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
 	struct adapter *adapter;
 	uint32_t val;
 	if (!txr)
 		return (0);
 	adapter = txr->adapter;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	val = IXGBE_READ_REG(&adapter->hw, IXGBE_TDT(txr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixgbe_sysctl_tdt_handler */
 /************************************************************************
  * ixgbe_sysctl_next_to_check_handler - Receive Descriptor next to check
  * handler function
+ *
  *   Retrieves the next_to_check value
  ************************************************************************/
 static int
 ixgbe_sysctl_next_to_check_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
 	struct adapter *adapter;
 	uint32_t val;
 	if (!rxr)
 		return (0);
 	adapter = rxr->adapter;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	val = rxr->next_to_check;
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixgbe_sysctl_next_to_check_handler */
 /************************************************************************
  * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function
+ *
  *   Retrieves the RDH value from the hardware
  ************************************************************************/
 static int
 ixgbe_sysctl_rdh_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
 	struct adapter *adapter;
 	uint32_t val;
 	if (!rxr)
 		return (0);
 	adapter = rxr->adapter;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	val = IXGBE_READ_REG(&adapter->hw, IXGBE_RDH(rxr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixgbe_sysctl_rdh_handler */
 /************************************************************************
  * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function
+ *
  *   Retrieves the RDT value from the hardware
  ************************************************************************/
 static int
 ixgbe_sysctl_rdt_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
 	struct adapter *adapter;
 	uint32_t val;
 	if (!rxr)
 		return (0);
 	adapter = rxr->adapter;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	val = IXGBE_READ_REG(&adapter->hw, IXGBE_RDT(rxr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixgbe_sysctl_rdt_handler */
 static int
 ixgbe_vlan_cb(struct ethercom *ec, uint16_t vid, bool set)
+{
 	struct ifnet *ifp = &ec->ec_if;
 	struct adapter *adapter = ifp->if_softc;
 	int rv;
 	if (set)
 		rv = ixgbe_register_vlan(adapter, vid);
 	else
 		rv = ixgbe_unregister_vlan(adapter, vid);
 	if (rv != 0)
 		return rv;
 	/*
 	 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0
 	 * or 0 to 1.
 	 */
 	if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0)))
 		ixgbe_setup_vlan_hw_tagging(adapter);
 	return rv;
+}
 /************************************************************************
  * ixgbe_register_vlan
+ *
  *   Run via vlan config EVENT, it enables us to use the
  *   HW Filter table since we can get the vlan id. This
  *   just creates the entry in the soft version of the
  *   VFTA, init will repopulate the real table.
  ************************************************************************/
 static int
 ixgbe_register_vlan(struct adapter *adapter, u16 vtag)
+{
 	u16		index, bit;
 	int		error;
 	if ((vtag == 0) || (vtag > 4095))	/* Invalid */
 		return EINVAL;
 	IXGBE_CORE_LOCK(adapter);
 	index = (vtag >> 5) & 0x7F;
 	bit = vtag & 0x1F;
 	adapter->shadow_vfta[index] |= ((u32)1 << bit);
 	error = adapter->hw.mac.ops.set_vfta(&adapter->hw, vtag, 0, true,
 	    true);
 	IXGBE_CORE_UNLOCK(adapter);
 	if (error != 0)
 		error = EACCES;
 	return error;
 } /* ixgbe_register_vlan */
 /************************************************************************
  * ixgbe_unregister_vlan
+ *
  *   Run via vlan unconfig EVENT, remove our entry in the soft vfta.
  ************************************************************************/
 static int
 ixgbe_unregister_vlan(struct adapter *adapter, u16 vtag)
+{
 	u16		index, bit;
 	int		error;
 	if ((vtag == 0) || (vtag > 4095))	/* Invalid */
 		return EINVAL;
 	IXGBE_CORE_LOCK(adapter);
 	index = (vtag >> 5) & 0x7F;
 	bit = vtag & 0x1F;
 	adapter->shadow_vfta[index] &= ~((u32)1 << bit);
 	error = adapter->hw.mac.ops.set_vfta(&adapter->hw, vtag, 0, false,
 	    true);
 	IXGBE_CORE_UNLOCK(adapter);
 	if (error != 0)
 		error = EACCES;
 	return error;
 } /* ixgbe_unregister_vlan */
 static void
 ixgbe_setup_vlan_hw_tagging(struct adapter *adapter)
+{
 	struct ethercom *ec = &adapter->osdep.ec;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct rx_ring	*rxr;
 	u32		ctrl;
 	int		i;
 	bool		hwtagging;
 	/* Enable HW tagging only if any vlan is attached */
 	hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING)
 	    && VLAN_ATTACHED(ec);
 	/* Setup the queues for vlans */
 	for (i = 0; i < adapter->num_queues; i++) {
 		rxr = &adapter->rx_rings[i];
 		/*
 		 * On 82599 and later, the VLAN enable is per/queue in RXDCTL.
 		 */
 		if (hw->mac.type != ixgbe_mac_82598EB) {
 			ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
 			if (hwtagging)
 				ctrl |= IXGBE_RXDCTL_VME;
 			else
 				ctrl &= ~IXGBE_RXDCTL_VME;
 			IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl);
+		}
 		rxr->vtag_strip = hwtagging ? TRUE : FALSE;
+	}
 	/* VLAN hw tagging for 82598 */
 	if (hw->mac.type == ixgbe_mac_82598EB) {
 		ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 		if (hwtagging)
 			ctrl |= IXGBE_VLNCTRL_VME;
 		else
 			ctrl &= ~IXGBE_VLNCTRL_VME;
 		IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
+	}
 } /* ixgbe_setup_vlan_hw_tagging */
 static void
 ixgbe_setup_vlan_hw_support(struct adapter *adapter)
+{
 	struct ethercom *ec = &adapter->osdep.ec;
 	struct ixgbe_hw *hw = &adapter->hw;
 	int		i;
 	u32		ctrl;
 	struct vlanid_list *vlanidp;
 	/*
 	 *  This function is called from both if_init and ifflags_cb()
 	 * on NetBSD.
 	 */
 	/*
 	 * Part 1:
 	 * Setup VLAN HW tagging
 	 */
 	ixgbe_setup_vlan_hw_tagging(adapter);
 	/*
 	 * Part 2:
 	 * Setup VLAN HW filter
 	 */
 	/* Cleanup shadow_vfta */
 	for (i = 0; i < IXGBE_VFTA_SIZE; i++)
 		adapter->shadow_vfta[i] = 0;
 	/* Generate shadow_vfta from ec_vids */
 	ETHER_LOCK(ec);
 	SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) {
 		uint32_t idx;
 		idx = vlanidp->vid / 32;
 		KASSERT(idx < IXGBE_VFTA_SIZE);
 		adapter->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32);
+	}
 	ETHER_UNLOCK(ec);
 	for (i = 0; i < IXGBE_VFTA_SIZE; i++)
 		IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), adapter->shadow_vfta[i]);
 	ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 	/* Enable the Filter Table if enabled */
 	if (ec->ec_capenable & ETHERCAP_VLAN_HWFILTER)
 		ctrl |= IXGBE_VLNCTRL_VFE;
 	else
 		ctrl &= ~IXGBE_VLNCTRL_VFE;
 	IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
 } /* ixgbe_setup_vlan_hw_support */
 /************************************************************************
  * ixgbe_get_slot_info
+ *
  *   Get the width and transaction speed of
  *   the slot this adapter is plugged into.
  ************************************************************************/
 static void
 ixgbe_get_slot_info(struct adapter *adapter)
+{
 	device_t		dev = adapter->dev;
 	struct ixgbe_hw		*hw = &adapter->hw;
 	u32		      offset;
 	u16			link;
 	int		      bus_info_valid = TRUE;
 	/* Some devices are behind an internal bridge */
 	switch (hw->device_id) {
 	case IXGBE_DEV_ID_82599_SFP_SF_QP:
 	case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 		goto get_parent_info;
 	default:
 		break;
+	}
 	ixgbe_get_bus_info(hw);
 	/*
 	 * Some devices don't use PCI-E, but there is no need
 	 * to display "Unknown" for bus speed and width.
 	 */
 	switch (hw->mac.type) {
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		return;
 	default:
 		goto display;
+	}
 get_parent_info:
 	/*
 	 * For the Quad port adapter we need to parse back
 	 * up the PCI tree to find the speed of the expansion
 	 * slot into which this adapter is plugged. A bit more work.
 	 */
 	dev = device_parent(device_parent(dev));
 #if 0
 #ifdef IXGBE_DEBUG
 	device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev),
 	    pci_get_slot(dev), pci_get_function(dev));
 #endif
 	dev = device_parent(device_parent(dev));
 #ifdef IXGBE_DEBUG
 	device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev),
 	    pci_get_slot(dev), pci_get_function(dev));
 #endif
 #endif
 	/* Now get the PCI Express Capabilities offset */
 	if (pci_get_capability(adapter->osdep.pc, adapter->osdep.tag,
 	    PCI_CAP_PCIEXPRESS, &offset, NULL)) {
 		/*
 		 * Hmm...can't get PCI-Express capabilities.
 		 * Falling back to default method.
 		 */
 		bus_info_valid = FALSE;
 		ixgbe_get_bus_info(hw);
 		goto display;
+	}
 	/* ...and read the Link Status Register */
 	link = pci_conf_read(adapter->osdep.pc, adapter->osdep.tag,
 	    offset + PCIE_LCSR) >> 16;
 	ixgbe_set_pci_config_data_generic(hw, link);
 display:
 	device_printf(dev, "PCI Express Bus: Speed %s Width %s\n",
 	    ((hw->bus.speed == ixgbe_bus_speed_8000)	? "8.0GT/s" :
 	     (hw->bus.speed == ixgbe_bus_speed_5000)	? "5.0GT/s" :
 	     (hw->bus.speed == ixgbe_bus_speed_2500)	? "2.5GT/s" :
 	     "Unknown"),
 	    ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" :
 	     (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" :
 	     (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" :
 	     "Unknown"));
 	if (bus_info_valid) {
 		if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) &&
 		    ((hw->bus.width <= ixgbe_bus_width_pcie_x4) &&
 			(hw->bus.speed == ixgbe_bus_speed_2500))) {
 			device_printf(dev, "PCI-Express bandwidth available"
 			    " for this card\n     is not sufficient for"
 			    " optimal performance.\n");
 			device_printf(dev, "For optimal performance a x8 "
 			    "PCIE, or x4 PCIE Gen2 slot is required.\n");
+		}
 		if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) &&
 		    ((hw->bus.width <= ixgbe_bus_width_pcie_x8) &&
 			(hw->bus.speed < ixgbe_bus_speed_8000))) {
 			device_printf(dev, "PCI-Express bandwidth available"
 			    " for this card\n     is not sufficient for"
 			    " optimal performance.\n");
 			device_printf(dev, "For optimal performance a x8 "
 			    "PCIE Gen3 slot is required.\n");
+		}
 	} else
 		device_printf(dev, "Unable to determine slot speed/width. The speed/width reported are that of the internal switch.\n");
 	return;
 } /* ixgbe_get_slot_info */
 /************************************************************************
  * ixgbe_enable_queue - MSI-X Interrupt Handlers and Tasklets
  ************************************************************************/
 static inline void
 ixgbe_enable_queue(struct adapter *adapter, u32 vector)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue *que = &adapter->queues[vector];
 	u64		queue = 1ULL << vector;
 	u32		mask;
 	mutex_enter(&que->dc_mtx);
 	if (que->disabled_count > 0 && --que->disabled_count > 0)
 		goto out;
 	if (hw->mac.type == ixgbe_mac_82598EB) {
 		mask = (IXGBE_EIMS_RTX_QUEUE & queue);
 		IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
 	} else {
 		mask = (queue & 0xFFFFFFFF);
 		if (mask)
 			IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
 		mask = (queue >> 32);
 		if (mask)
 			IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
+	}
 out:
 	mutex_exit(&que->dc_mtx);
 } /* ixgbe_enable_queue */
 /************************************************************************
  * ixgbe_disable_queue_internal
  ************************************************************************/
 static inline void
 ixgbe_disable_queue_internal(struct adapter *adapter, u32 vector, bool nestok)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue *que = &adapter->queues[vector];
 	u64		queue = 1ULL << vector;
 	u32		mask;
 	mutex_enter(&que->dc_mtx);
 	if (que->disabled_count > 0) {
 		if (nestok)
 			que->disabled_count++;
 		goto out;
+	}
 	que->disabled_count++;
 	if (hw->mac.type == ixgbe_mac_82598EB) {
 		mask = (IXGBE_EIMS_RTX_QUEUE & queue);
 		IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
 	} else {
 		mask = (queue & 0xFFFFFFFF);
 		if (mask)
 			IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
 		mask = (queue >> 32);
 		if (mask)
 			IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
+	}
 out:
 	mutex_exit(&que->dc_mtx);
 } /* ixgbe_disable_queue_internal */
 /************************************************************************
  * ixgbe_disable_queue
  ************************************************************************/
 static inline void
 ixgbe_disable_queue(struct adapter *adapter, u32 vector)
+{
 	ixgbe_disable_queue_internal(adapter, vector, true);
 } /* ixgbe_disable_queue */
 /************************************************************************
  * ixgbe_sched_handle_que - schedule deferred packet processing
  ************************************************************************/
 static inline void
 ixgbe_sched_handle_que(struct adapter *adapter, struct ix_queue *que)
+{
 	if (que->txrx_use_workqueue) {
 		/*
 		 * adapter->que_wq is bound to each CPU instead of
 		 * each NIC queue to reduce workqueue kthread. As we
 		 * should consider about interrupt affinity in this
 		 * function, the workqueue kthread must be WQ_PERCPU.
 		 * If create WQ_PERCPU workqueue kthread for each NIC
 		 * queue, that number of created workqueue kthread is
 		 * (number of used NIC queue) * (number of CPUs) =
 		 * (number of CPUs) ^ 2 most often.
+		 *
 		 * The same NIC queue's interrupts are avoided by
 		 * masking the queue's interrupt. And different
 		 * NIC queue's interrupts use different struct work
 		 * (que->wq_cookie). So, "enqueued flag" to avoid
 		 * twice workqueue_enqueue() is not required .
 		 */
 		workqueue_enqueue(adapter->que_wq, &que->wq_cookie, curcpu());
 	} else {
 		softint_schedule(que->que_si);
+	}
+}
 /************************************************************************
  * ixgbe_msix_que - MSI-X Queue Interrupt Service routine
  ************************************************************************/
 static int
 ixgbe_msix_que(void *arg)
+{
 	struct ix_queue	*que = arg;
 	struct adapter	*adapter = que->adapter;
 	struct ifnet	*ifp = adapter->ifp;
 	struct tx_ring	*txr = que->txr;
 	struct rx_ring	*rxr = que->rxr;
 	bool		more;
 	u32		newitr = 0;
 	/* Protect against spurious interrupts */
 	if ((ifp->if_flags & IFF_RUNNING) == 0)
 		return 0;
 	ixgbe_disable_queue(adapter, que->msix);
 	++que->irqs.ev_count;
 	/*
 	 * Don't change "que->txrx_use_workqueue" from this point to avoid
 	 * flip-flopping softint/workqueue mode in one deferred processing.
 	 */
 	que->txrx_use_workqueue = adapter->txrx_use_workqueue;
 #ifdef __NetBSD__
 	/* Don't run ixgbe_rxeof in interrupt context */
 	more = true;
 #else
 	more = ixgbe_rxeof(que);
 #endif
 	IXGBE_TX_LOCK(txr);
 	ixgbe_txeof(txr);
 	IXGBE_TX_UNLOCK(txr);
 	/* Do AIM now? */
 	if (adapter->enable_aim == false)
 		goto no_calc;
 	/*
 	 * Do Adaptive Interrupt Moderation:
 	 *  - Write out last calculated setting
 	 *  - Calculate based on average size over
 	 *    the last interval.
 	 */
 	if (que->eitr_setting)
 		ixgbe_eitr_write(adapter, que->msix, que->eitr_setting);
 	que->eitr_setting = 0;
 	/* Idle, do nothing */
 	if ((txr->bytes == 0) && (rxr->bytes == 0))
 		goto no_calc;
 	if ((txr->bytes) && (txr->packets))
 		newitr = txr->bytes/txr->packets;
 	if ((rxr->bytes) && (rxr->packets))
 		newitr = uimax(newitr, (rxr->bytes / rxr->packets));
 	newitr += 24; /* account for hardware frame, crc */
 	/* set an upper boundary */
 	newitr = uimin(newitr, 3000);
 	/* Be nice to the mid range */
 	if ((newitr > 300) && (newitr < 1200))
 		newitr = (newitr / 3);
 	else
 		newitr = (newitr / 2);
 	/*
 	 * When RSC is used, ITR interval must be larger than RSC_DELAY.
 	 * Currently, we use 2us for RSC_DELAY. The minimum value is always
 	 * greater than 2us on 100M (and 10M?(not documented)), but it's not
 	 * on 1G and higher.
 	 */
 	if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
 	    && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
 		if (newitr < IXGBE_MIN_RSC_EITR_10G1G)
 			newitr = IXGBE_MIN_RSC_EITR_10G1G;
+	}
 	/* save for next interrupt */
 	que->eitr_setting = newitr;
 	/* Reset state */
 	txr->bytes = 0;
 	txr->packets = 0;
 	rxr->bytes = 0;
 	rxr->packets = 0;
 no_calc:
 	if (more)
 		ixgbe_sched_handle_que(adapter, que);
 	else
 		ixgbe_enable_queue(adapter, que->msix);
 	return 1;
 } /* ixgbe_msix_que */
 /************************************************************************
  * ixgbe_media_status - Media Ioctl callback
+ *
  *   Called whenever the user queries the status of
  *   the interface using ifconfig.
  ************************************************************************/
 static void
 ixgbe_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
+{
 	struct adapter *adapter = ifp->if_softc;
 	struct ixgbe_hw *hw = &adapter->hw;
 	int layer;
 	INIT_DEBUGOUT("ixgbe_media_status: begin");
 	IXGBE_CORE_LOCK(adapter);
 	ixgbe_update_link_status(adapter);
 	ifmr->ifm_status = IFM_AVALID;
 	ifmr->ifm_active = IFM_ETHER;
 	if (adapter->link_active != LINK_STATE_UP) {
 		ifmr->ifm_active |= IFM_NONE;
 		IXGBE_CORE_UNLOCK(adapter);
 		return;
+	}
 	ifmr->ifm_status |= IFM_ACTIVE;
 	layer = adapter->phy_layer;
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T ||
 	    layer & IXGBE_PHYSICAL_LAYER_5GBASE_T ||
 	    layer & IXGBE_PHYSICAL_LAYER_2500BASE_T ||
 	    layer & IXGBE_PHYSICAL_LAYER_1000BASE_T ||
 	    layer & IXGBE_PHYSICAL_LAYER_100BASE_TX ||
 	    layer & IXGBE_PHYSICAL_LAYER_10BASE_T)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_5GB_FULL:
 			ifmr->ifm_active |= IFM_5000_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_2_5GB_FULL:
 			ifmr->ifm_active |= IFM_2500_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_1GB_FULL:
 			ifmr->ifm_active |= IFM_1000_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_100_FULL:
 			ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_10_FULL:
 			ifmr->ifm_active |= IFM_10_T | IFM_FDX;
 			break;
+		}
 	if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
 	    layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX;
 			break;
+		}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_LR | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_1GB_FULL:
 			ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
 			break;
+		}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_1GB_FULL:
 			ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
 			break;
+		}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR ||
 	    layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_1GB_FULL:
 			ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
 			break;
+		}
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
 			break;
+		}
 	/*
 	 * XXX: These need to use the proper media types once
 	 * they're added.
 	 */
 	if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_KR | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_2_5GB_FULL:
 			ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_1GB_FULL:
 			ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
 			break;
+		}
 	else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 ||
 	    layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX ||
 	    layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX)
 		switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_2_5GB_FULL:
 			ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_1GB_FULL:
 			ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
 			break;
+		}
 	/* If nothing is recognized... */
 #if 0
 	if (IFM_SUBTYPE(ifmr->ifm_active) == 0)
 		ifmr->ifm_active |= IFM_UNKNOWN;
 #endif
 	ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active);
 	/* Display current flow control setting used on link */
 	if (hw->fc.current_mode == ixgbe_fc_rx_pause ||
 	    hw->fc.current_mode == ixgbe_fc_full)
 		ifmr->ifm_active |= IFM_ETH_RXPAUSE;
 	if (hw->fc.current_mode == ixgbe_fc_tx_pause ||
 	    hw->fc.current_mode == ixgbe_fc_full)
 		ifmr->ifm_active |= IFM_ETH_TXPAUSE;
 	IXGBE_CORE_UNLOCK(adapter);
 	return;
 } /* ixgbe_media_status */
 /************************************************************************
  * ixgbe_media_change - Media Ioctl callback
+ *
  *   Called when the user changes speed/duplex using
  *   media/mediopt option with ifconfig.
  ************************************************************************/
 static int
 ixgbe_media_change(struct ifnet *ifp)
+{
 	struct adapter	 *adapter = ifp->if_softc;
 	struct ifmedia	 *ifm = &adapter->media;
 	struct ixgbe_hw	 *hw = &adapter->hw;
 	ixgbe_link_speed speed = 0;
 	ixgbe_link_speed link_caps = 0;
 	bool negotiate = false;
 	s32 err = IXGBE_NOT_IMPLEMENTED;
 	INIT_DEBUGOUT("ixgbe_media_change: begin");
 	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
 		return (EINVAL);
 	if (hw->phy.media_type == ixgbe_media_type_backplane)
 		return (EPERM);
 	IXGBE_CORE_LOCK(adapter);
 	/*
 	 * We don't actually need to check against the supported
 	 * media types of the adapter; ifmedia will take care of
 	 * that for us.
 	 */
 	switch (IFM_SUBTYPE(ifm->ifm_media)) {
 	case IFM_AUTO:
 		err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
 		    &negotiate);
 		if (err != IXGBE_SUCCESS) {
 			device_printf(adapter->dev, "Unable to determine "
 			    "supported advertise speeds\n");
 			IXGBE_CORE_UNLOCK(adapter);
 			return (ENODEV);
+		}
 		speed |= link_caps;
 		break;
 	case IFM_10G_T:
 	case IFM_10G_LRM:
 	case IFM_10G_LR:
 	case IFM_10G_TWINAX:
 	case IFM_10G_SR:
 	case IFM_10G_CX4:
 	case IFM_10G_KR:
 	case IFM_10G_KX4:
 		speed |= IXGBE_LINK_SPEED_10GB_FULL;
 		break;
 	case IFM_5000_T:
 		speed |= IXGBE_LINK_SPEED_5GB_FULL;
 		break;
 	case IFM_2500_T:
 	case IFM_2500_KX:
 		speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
 		break;
 	case IFM_1000_T:
 	case IFM_1000_LX:
 	case IFM_1000_SX:
 	case IFM_1000_KX:
 		speed |= IXGBE_LINK_SPEED_1GB_FULL;
 		break;
 	case IFM_100_TX:
 		speed |= IXGBE_LINK_SPEED_100_FULL;
 		break;
 	case IFM_10_T:
 		speed |= IXGBE_LINK_SPEED_10_FULL;
 		break;
 	case IFM_NONE:
 		break;
 	default:
 		goto invalid;
+	}
 	hw->mac.autotry_restart = TRUE;
 	hw->mac.ops.setup_link(hw, speed, TRUE);
 	adapter->advertise = 0;
 	if (IFM_SUBTYPE(ifm->ifm_media) != IFM_AUTO) {
 		if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0)
 			adapter->advertise |= 1 << 2;
 		if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0)
 			adapter->advertise |= 1 << 1;
 		if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0)
 			adapter->advertise |= 1 << 0;
 		if ((speed & IXGBE_LINK_SPEED_10_FULL) != 0)
 			adapter->advertise |= 1 << 3;
 		if ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) != 0)
 			adapter->advertise |= 1 << 4;
 		if ((speed & IXGBE_LINK_SPEED_5GB_FULL) != 0)
 			adapter->advertise |= 1 << 5;
+	}
 	IXGBE_CORE_UNLOCK(adapter);
 	return (0);
 invalid:
 	device_printf(adapter->dev, "Invalid media type!\n");
 	IXGBE_CORE_UNLOCK(adapter);
 	return (EINVAL);
 } /* ixgbe_media_change */
 /************************************************************************
  * ixgbe_msix_link - Link status change ISR (MSI/MSI-X)
  ************************************************************************/
 static int
 ixgbe_msix_link(void *arg)
+{
 	struct adapter	*adapter = arg;
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		eicr, eicr_mask;
 	s32		retval;
 	++adapter->link_irq.ev_count;
 	/* Pause other interrupts */
 	IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER);
 	/* First get the cause */
 	/*
 	 * The specifications of 82598, 82599, X540 and X550 say EICS register
 	 * is write only. However, Linux says it is a workaround for silicon
 	 * errata to read EICS instead of EICR to get interrupt cause. It seems
 	 * there is a problem about read clear mechanism for EICR register.
 	 */
 	eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
 	/* Be sure the queue bits are not cleared */
 	eicr &= ~IXGBE_EICR_RTX_QUEUE;
 	/* Clear interrupt with write */
 	IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
 	if (ixgbe_is_sfp(hw)) {
 		/* Pluggable optics-related interrupt */
 		if (hw->mac.type >= ixgbe_mac_X540)
 			eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
 		else
 			eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
 		/*
 		 *  An interrupt might not arrive when a module is inserted.
 		 * When an link status change interrupt occurred and the driver
 		 * still regard SFP as unplugged, issue the module softint
 		 * and then issue LSC interrupt.
 		 */
 		if ((eicr & eicr_mask)
 		    || ((hw->phy.sfp_type == ixgbe_sfp_type_not_present)
 			&& (eicr & IXGBE_EICR_LSC))) {
 			IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
 			softint_schedule(adapter->mod_si);
+		}
 		if ((hw->mac.type == ixgbe_mac_82599EB) &&
 		    (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
 			IXGBE_WRITE_REG(hw, IXGBE_EICR,
 			    IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
 			softint_schedule(adapter->msf_si);
+		}
+	}
 	/* Link status change */
 	if (eicr & IXGBE_EICR_LSC) {
 		IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 		softint_schedule(adapter->link_si);
+	}
 	if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
 		if ((adapter->feat_en & IXGBE_FEATURE_FDIR) &&
 		    (eicr & IXGBE_EICR_FLOW_DIR)) {
 			/* This is probably overkill :) */
 			if (!atomic_cas_uint(&adapter->fdir_reinit, 0, 1))
 				return 1;
 			/* Disable the interrupt */
 			IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
 			softint_schedule(adapter->fdir_si);
+		}
 		if (eicr & IXGBE_EICR_ECC) {
 			device_printf(adapter->dev,
 			    "CRITICAL: ECC ERROR!! Please Reboot!!\n");
 			IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
+		}
 		/* Check for over temp condition */
 		if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR) {
 			switch (adapter->hw.mac.type) {
 			case ixgbe_mac_X550EM_a:
 				if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a))
 					break;
 				IXGBE_WRITE_REG(hw, IXGBE_EIMC,
 				    IXGBE_EICR_GPI_SDP0_X550EM_a);
 				IXGBE_WRITE_REG(hw, IXGBE_EICR,
 				    IXGBE_EICR_GPI_SDP0_X550EM_a);
 				retval = hw->phy.ops.check_overtemp(hw);
 				if (retval != IXGBE_ERR_OVERTEMP)
 					break;
 				device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
 				device_printf(adapter->dev, "System shutdown required!\n");
 				break;
 			default:
 				if (!(eicr & IXGBE_EICR_TS))
 					break;
 				retval = hw->phy.ops.check_overtemp(hw);
 				if (retval != IXGBE_ERR_OVERTEMP)
 					break;
 				device_printf(adapter->dev, "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
 				device_printf(adapter->dev, "System shutdown required!\n");
 				IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS);
 				break;
+			}
+		}
 		/* Check for VF message */
 		if ((adapter->feat_en & IXGBE_FEATURE_SRIOV) &&
 		    (eicr & IXGBE_EICR_MAILBOX))
 			softint_schedule(adapter->mbx_si);
+	}
 	/* Check for fan failure */
 	if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
 		ixgbe_check_fan_failure(adapter, eicr, TRUE);
 		IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
+	}
 	/* External PHY interrupt */
 	if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
 	    (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
 		IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540);
 		softint_schedule(adapter->phy_si);
+	}
 	/* Re-enable other interrupts */
 	IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 	return 1;
 } /* ixgbe_msix_link */
 static void
 ixgbe_eitr_write(struct adapter *adapter, uint32_t index, uint32_t itr)
+{
 	if (adapter->hw.mac.type == ixgbe_mac_82598EB)
 		itr |= itr << 16;
 	else
 		itr |= IXGBE_EITR_CNT_WDIS;
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(index), itr);
+}
 /************************************************************************
  * ixgbe_sysctl_interrupt_rate_handler
  ************************************************************************/
 static int
 ixgbe_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct ix_queue *que = (struct ix_queue *)node.sysctl_data;
 	struct adapter	*adapter;
 	uint32_t reg, usec, rate;
 	int error;
 	if (que == NULL)
 		return 0;
 	adapter = que->adapter;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	reg = IXGBE_READ_REG(&adapter->hw, IXGBE_EITR(que->msix));
 	usec = ((reg & 0x0FF8) >> 3);
 	if (usec > 0)
 		rate = 500000 / usec;
 	else
 		rate = 0;
 	node.sysctl_data = &rate;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if (error || newp == NULL)
 		return error;
 	reg &= ~0xfff; /* default, no limitation */
 	if (rate > 0 && rate < 500000) {
 		if (rate < 1000)
 			rate = 1000;
 		reg |= ((4000000 / rate) & 0xff8);
 		/*
 		 * When RSC is used, ITR interval must be larger than
 		 * RSC_DELAY. Currently, we use 2us for RSC_DELAY.
 		 * The minimum value is always greater than 2us on 100M
 		 * (and 10M?(not documented)), but it's not on 1G and higher.
 		 */
 		if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
 		    && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
 			if ((adapter->num_queues > 1)
 			    && (reg < IXGBE_MIN_RSC_EITR_10G1G))
 				return EINVAL;
+		}
 		ixgbe_max_interrupt_rate = rate;
 	} else
 		ixgbe_max_interrupt_rate = 0;
 	ixgbe_eitr_write(adapter, que->msix, reg);
 	return (0);
 } /* ixgbe_sysctl_interrupt_rate_handler */
 const struct sysctlnode *
 ixgbe_sysctl_instance(struct adapter *adapter)
+{
 	const char *dvname;
 	struct sysctllog **log;
 	int rc;
 	const struct sysctlnode *rnode;
 	if (adapter->sysctltop != NULL)
 		return adapter->sysctltop;
 	log = &adapter->sysctllog;
 	dvname = device_xname(adapter->dev);
 	if ((rc = sysctl_createv(log, 0, NULL, &rnode,
 , CTLTYPE_NODE, dvname,
 	    SYSCTL_DESCR("ixgbe information and settings"),
 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
 		goto err;
 	return rnode;
 err:
 	device_printf(adapter->dev,
 	    "%s: sysctl_createv failed, rc = %d\n", __func__, rc);
 	return NULL;
+}
 /************************************************************************
  * ixgbe_add_device_sysctls
  ************************************************************************/
 static void
 ixgbe_add_device_sysctls(struct adapter *adapter)
+{
 	device_t	       dev = adapter->dev;
 	struct ixgbe_hw	       *hw = &adapter->hw;
 	struct sysctllog **log;
 	const struct sysctlnode *rnode, *cnode;
 	log = &adapter->sysctllog;
 	if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
 		aprint_error_dev(dev, "could not create sysctl root\n");
 		return;
+	}
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READWRITE, CTLTYPE_INT,
 	    "debug", SYSCTL_DESCR("Debug Info"),
 	    ixgbe_sysctl_debug, 0, (void *)adapter, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READONLY, CTLTYPE_INT,
 	    "num_rx_desc", SYSCTL_DESCR("Number of rx descriptors"),
 	    NULL, 0, &adapter->num_rx_desc, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READONLY, CTLTYPE_INT, "num_jcl_per_queue",
 	    SYSCTL_DESCR("Number of jumbo buffers per queue"),
 	    NULL, 0, &adapter->num_jcl, 0, CTL_CREATE,
 	    CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READONLY, CTLTYPE_INT,
 	    "num_queues", SYSCTL_DESCR("Number of queues"),
 	    NULL, 0, &adapter->num_queues, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	/* Sysctls for all devices */
 	if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 	    CTLTYPE_INT, "fc", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_SET_FC),
 	    ixgbe_sysctl_flowcntl, 0, (void *)adapter, 0, CTL_CREATE,
 	    CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	adapter->enable_aim = ixgbe_enable_aim;
 	if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 	    CTLTYPE_BOOL, "enable_aim", SYSCTL_DESCR("Interrupt Moderation"),
 	    NULL, 0, &adapter->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READWRITE, CTLTYPE_INT,
 	    "advertise_speed", SYSCTL_DESCR(IXGBE_SYSCTL_DESC_ADV_SPEED),
 	    ixgbe_sysctl_advertise, 0, (void *)adapter, 0, CTL_CREATE,
 	    CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	/*
 	 * If each "que->txrx_use_workqueue" is changed in sysctl handler,
 	 * it causesflip-flopping softint/workqueue mode in one deferred
 	 * processing. Therefore, preempt_disable()/preempt_enable() are
 	 * required in ixgbe_sched_handle_que() to avoid
 	 * KASSERT(ixgbe_sched_handle_que()) in softint_schedule().
 	 * I think changing "que->txrx_use_workqueue" in interrupt handler
 	 * is lighter than doing preempt_disable()/preempt_enable() in every
 	 * ixgbe_sched_handle_que().
 	 */
 	adapter->txrx_use_workqueue = ixgbe_txrx_workqueue;
 	if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 	    CTLTYPE_BOOL, "txrx_workqueue", SYSCTL_DESCR("Use workqueue for packet processing"),
 	    NULL, 0, &adapter->txrx_use_workqueue, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 #ifdef IXGBE_DEBUG
 	/* testing sysctls (for all devices) */
 	if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 	    CTLTYPE_INT, "power_state", SYSCTL_DESCR("PCI Power State"),
 	    ixgbe_sysctl_power_state, 0, (void *)adapter, 0, CTL_CREATE,
 	    CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READONLY,
 	    CTLTYPE_STRING, "print_rss_config",
 	    SYSCTL_DESCR("Prints RSS Configuration"),
 	    ixgbe_sysctl_print_rss_config, 0, (void *)adapter, 0, CTL_CREATE,
 	    CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 #endif
 	/* for X550 series devices */
 	if (hw->mac.type >= ixgbe_mac_X550)
 		if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 		    CTLTYPE_INT, "dmac", SYSCTL_DESCR("DMA Coalesce"),
 		    ixgbe_sysctl_dmac, 0, (void *)adapter, 0, CTL_CREATE,
 		    CTL_EOL) != 0)
 			aprint_error_dev(dev, "could not create sysctl\n");
 	/* for WoL-capable devices */
 	if (adapter->wol_support) {
 		if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 		    CTLTYPE_BOOL, "wol_enable",
 		    SYSCTL_DESCR("Enable/Disable Wake on LAN"),
 		    ixgbe_sysctl_wol_enable, 0, (void *)adapter, 0, CTL_CREATE,
 		    CTL_EOL) != 0)
 			aprint_error_dev(dev, "could not create sysctl\n");
 		if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 		    CTLTYPE_INT, "wufc",
 		    SYSCTL_DESCR("Enable/Disable Wake Up Filters"),
 		    ixgbe_sysctl_wufc, 0, (void *)adapter, 0, CTL_CREATE,
 		    CTL_EOL) != 0)
 			aprint_error_dev(dev, "could not create sysctl\n");
+	}
 	/* for X552/X557-AT devices */
 	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
 		const struct sysctlnode *phy_node;
 		if (sysctl_createv(log, 0, &rnode, &phy_node, 0, CTLTYPE_NODE,
 		    "phy", SYSCTL_DESCR("External PHY sysctls"),
 		    NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0) {
 			aprint_error_dev(dev, "could not create sysctl\n");
 			return;
+		}
 		if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
 		    CTLTYPE_INT, "temp",
 		    SYSCTL_DESCR("Current External PHY Temperature (Celsius)"),
 		    ixgbe_sysctl_phy_temp, 0, (void *)adapter, 0, CTL_CREATE,
 		    CTL_EOL) != 0)
 			aprint_error_dev(dev, "could not create sysctl\n");
 		if (sysctl_createv(log, 0, &phy_node, &cnode, CTLFLAG_READONLY,
 		    CTLTYPE_INT, "overtemp_occurred",
 		    SYSCTL_DESCR("External PHY High Temperature Event Occurred"),
 		    ixgbe_sysctl_phy_overtemp_occurred, 0, (void *)adapter, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			aprint_error_dev(dev, "could not create sysctl\n");
+	}
 	if ((hw->mac.type == ixgbe_mac_X550EM_a)
 	    && (hw->phy.type == ixgbe_phy_fw))
 		if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 		    CTLTYPE_BOOL, "force_10_100_autonego",
 		    SYSCTL_DESCR("Force autonego on 10M and 100M"),
 		    NULL, 0, &hw->phy.force_10_100_autonego, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			aprint_error_dev(dev, "could not create sysctl\n");
 	if (adapter->feat_cap & IXGBE_FEATURE_EEE) {
 		if (sysctl_createv(log, 0, &rnode, &cnode, CTLFLAG_READWRITE,
 		    CTLTYPE_INT, "eee_state",
 		    SYSCTL_DESCR("EEE Power Save State"),
 		    ixgbe_sysctl_eee_state, 0, (void *)adapter, 0, CTL_CREATE,
 		    CTL_EOL) != 0)
 			aprint_error_dev(dev, "could not create sysctl\n");
+	}
 } /* ixgbe_add_device_sysctls */
 /************************************************************************
  * ixgbe_allocate_pci_resources
  ************************************************************************/
 static int
 ixgbe_allocate_pci_resources(struct adapter *adapter,
     const struct pci_attach_args *pa)
+{
 	pcireg_t	memtype, csr;
 	device_t dev = adapter->dev;
 	bus_addr_t addr;
 	int flags;
 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0));
 	switch (memtype) {
 	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
 	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
 		adapter->osdep.mem_bus_space_tag = pa->pa_memt;
 		if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0),
 		      memtype, &addr, &adapter->osdep.mem_size, &flags) != 0)
 			goto map_err;
 		if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) {
 			aprint_normal_dev(dev, "clearing prefetchable bit\n");
 			flags &= ~BUS_SPACE_MAP_PREFETCHABLE;
+		}
 		if (bus_space_map(adapter->osdep.mem_bus_space_tag, addr,
 		     adapter->osdep.mem_size, flags,
 		     &adapter->osdep.mem_bus_space_handle) != 0) {
 map_err:
 			adapter->osdep.mem_size = 0;
 			aprint_error_dev(dev, "unable to map BAR0\n");
 			return ENXIO;
+		}
 		/*
 		 * Enable address decoding for memory range in case BIOS or
 		 * UEFI don't set it.
 		 */
 		csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
 		    PCI_COMMAND_STATUS_REG);
 		csr |= PCI_COMMAND_MEM_ENABLE;
 		pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
 		    csr);
 		break;
 	default:
 		aprint_error_dev(dev, "unexpected type on BAR0\n");
 		return ENXIO;
+	}
 	return (0);
 } /* ixgbe_allocate_pci_resources */
 static void
 ixgbe_free_softint(struct adapter *adapter)
+{
 	struct ix_queue *que = adapter->queues;
 	struct tx_ring *txr = adapter->tx_rings;
 	int i;
 	for (i = 0; i < adapter->num_queues; i++, que++, txr++) {
 		if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX)) {
 			if (txr->txr_si != NULL)
 				softint_disestablish(txr->txr_si);
+		}
 		if (que->que_si != NULL)
 			softint_disestablish(que->que_si);
+	}
 	if (adapter->txr_wq != NULL)
 		workqueue_destroy(adapter->txr_wq);
 	if (adapter->txr_wq_enqueued != NULL)
 		percpu_free(adapter->txr_wq_enqueued, sizeof(u_int));
 	if (adapter->que_wq != NULL)
 		workqueue_destroy(adapter->que_wq);
 	/* Drain the Link queue */
 	if (adapter->link_si != NULL) {
 		softint_disestablish(adapter->link_si);
 		adapter->link_si = NULL;
+	}
 	if (adapter->mod_si != NULL) {
 		softint_disestablish(adapter->mod_si);
 		adapter->mod_si = NULL;
+	}
 	if (adapter->msf_si != NULL) {
 		softint_disestablish(adapter->msf_si);
 		adapter->msf_si = NULL;
+	}
 	if (adapter->phy_si != NULL) {
 		softint_disestablish(adapter->phy_si);
 		adapter->phy_si = NULL;
+	}
 	if (adapter->feat_en & IXGBE_FEATURE_FDIR) {
 		if (adapter->fdir_si != NULL) {
 			softint_disestablish(adapter->fdir_si);
 			adapter->fdir_si = NULL;
+		}
+	}
 	if (adapter->feat_cap & IXGBE_FEATURE_SRIOV) {
 		if (adapter->mbx_si != NULL) {
 			softint_disestablish(adapter->mbx_si);
 			adapter->mbx_si = NULL;
+		}
+	}
 } /* ixgbe_free_softint */
 /************************************************************************
  * ixgbe_detach - Device removal routine
+ *
  *   Called when the driver is being removed.
  *   Stops the adapter and deallocates all the resources
  *   that were allocated for driver operation.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static int
 ixgbe_detach(device_t dev, int flags)
+{
 	struct adapter *adapter = device_private(dev);
 	struct rx_ring *rxr = adapter->rx_rings;
 	struct tx_ring *txr = adapter->tx_rings;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ixgbe_hw_stats *stats = &adapter->stats.pf;
 	u32	ctrl_ext;
 	int i;
 	INIT_DEBUGOUT("ixgbe_detach: begin");
 	if (adapter->osdep.attached == false)
 		return 0;
 	if (ixgbe_pci_iov_detach(dev) != 0) {
 		device_printf(dev, "SR-IOV in use; detach first.\n");
 		return (EBUSY);
+	}
 	/*
 	 * Stop the interface. ixgbe_setup_low_power_mode() calls ixgbe_stop(),
 	 * so it's not required to call ixgbe_stop() directly.
 	 */
 	IXGBE_CORE_LOCK(adapter);
 	ixgbe_setup_low_power_mode(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 #if NVLAN > 0
 	/* Make sure VLANs are not using driver */
 	if (!VLAN_ATTACHED(&adapter->osdep.ec))
 		;	/* nothing to do: no VLANs */
 	else if ((flags & (DETACH_SHUTDOWN | DETACH_FORCE)) != 0)
 		vlan_ifdetach(adapter->ifp);
 	else {
 		aprint_error_dev(dev, "VLANs in use, detach first\n");
 		return (EBUSY);
+	}
 #endif
 	pmf_device_deregister(dev);
 	ether_ifdetach(adapter->ifp);
 	ixgbe_free_softint(adapter);
 	/* let hardware know driver is unloading */
 	ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 	ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, ctrl_ext);
 	callout_halt(&adapter->timer, NULL);
 	if (adapter->feat_en & IXGBE_FEATURE_RECOVERY_MODE)
 		callout_halt(&adapter->recovery_mode_timer, NULL);
 	if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
 		netmap_detach(adapter->ifp);
 	ixgbe_free_pci_resources(adapter);
 #if 0	/* XXX the NetBSD port is probably missing something here */
 	bus_generic_detach(dev);
 #endif
 	if_detach(adapter->ifp);
 	if_percpuq_destroy(adapter->ipq);
 	sysctl_teardown(&adapter->sysctllog);
 	evcnt_detach(&adapter->efbig_tx_dma_setup);
 	evcnt_detach(&adapter->mbuf_defrag_failed);
 	evcnt_detach(&adapter->efbig2_tx_dma_setup);
 	evcnt_detach(&adapter->einval_tx_dma_setup);
 	evcnt_detach(&adapter->other_tx_dma_setup);
 	evcnt_detach(&adapter->eagain_tx_dma_setup);
 	evcnt_detach(&adapter->enomem_tx_dma_setup);
 	evcnt_detach(&adapter->watchdog_events);
 	evcnt_detach(&adapter->tso_err);
 	evcnt_detach(&adapter->link_irq);
 	evcnt_detach(&adapter->link_sicount);
 	evcnt_detach(&adapter->mod_sicount);
 	evcnt_detach(&adapter->msf_sicount);
 	evcnt_detach(&adapter->phy_sicount);
 	for (i = 0; i < IXGBE_TC_COUNTER_NUM; i++) {
 		if (i < __arraycount(stats->mpc)) {
 			evcnt_detach(&stats->mpc[i]);
 			if (hw->mac.type == ixgbe_mac_82598EB)
 				evcnt_detach(&stats->rnbc[i]);
+		}
 		if (i < __arraycount(stats->pxontxc)) {
 			evcnt_detach(&stats->pxontxc[i]);
 			evcnt_detach(&stats->pxonrxc[i]);
 			evcnt_detach(&stats->pxofftxc[i]);
 			evcnt_detach(&stats->pxoffrxc[i]);
 			if (hw->mac.type >= ixgbe_mac_82599EB)
 				evcnt_detach(&stats->pxon2offc[i]);
+		}
+	}
 	txr = adapter->tx_rings;
 	for (i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
 		evcnt_detach(&adapter->queues[i].irqs);
 		evcnt_detach(&adapter->queues[i].handleq);
 		evcnt_detach(&adapter->queues[i].req);
 		evcnt_detach(&txr->no_desc_avail);
 		evcnt_detach(&txr->total_packets);
 		evcnt_detach(&txr->tso_tx);
 #ifndef IXGBE_LEGACY_TX
 		evcnt_detach(&txr->pcq_drops);
 #endif
 		if (i < __arraycount(stats->qprc)) {
 			evcnt_detach(&stats->qprc[i]);
 			evcnt_detach(&stats->qptc[i]);
 			evcnt_detach(&stats->qbrc[i]);
 			evcnt_detach(&stats->qbtc[i]);
 			if (hw->mac.type >= ixgbe_mac_82599EB)
 				evcnt_detach(&stats->qprdc[i]);
+		}
 		evcnt_detach(&rxr->rx_packets);
 		evcnt_detach(&rxr->rx_bytes);
 		evcnt_detach(&rxr->rx_copies);
 		evcnt_detach(&rxr->no_jmbuf);
 		evcnt_detach(&rxr->rx_discarded);
+	}
 	evcnt_detach(&stats->ipcs);
 	evcnt_detach(&stats->l4cs);
 	evcnt_detach(&stats->ipcs_bad);
 	evcnt_detach(&stats->l4cs_bad);
 	evcnt_detach(&stats->intzero);
 	evcnt_detach(&stats->legint);
 	evcnt_detach(&stats->crcerrs);
 	evcnt_detach(&stats->illerrc);
 	evcnt_detach(&stats->errbc);
 	evcnt_detach(&stats->mspdc);
 	if (hw->mac.type >= ixgbe_mac_X550)
 		evcnt_detach(&stats->mbsdc);
 	evcnt_detach(&stats->mpctotal);
 	evcnt_detach(&stats->mlfc);
 	evcnt_detach(&stats->mrfc);
 	evcnt_detach(&stats->rlec);
 	evcnt_detach(&stats->lxontxc);
 	evcnt_detach(&stats->lxonrxc);
 	evcnt_detach(&stats->lxofftxc);
 	evcnt_detach(&stats->lxoffrxc);
 	/* Packet Reception Stats */
 	evcnt_detach(&stats->tor);
 	evcnt_detach(&stats->gorc);
 	evcnt_detach(&stats->tpr);
 	evcnt_detach(&stats->gprc);
 	evcnt_detach(&stats->mprc);
 	evcnt_detach(&stats->bprc);
 	evcnt_detach(&stats->prc64);
 	evcnt_detach(&stats->prc127);
 	evcnt_detach(&stats->prc255);
 	evcnt_detach(&stats->prc511);
 	evcnt_detach(&stats->prc1023);
 	evcnt_detach(&stats->prc1522);
 	evcnt_detach(&stats->ruc);
 	evcnt_detach(&stats->rfc);
 	evcnt_detach(&stats->roc);
 	evcnt_detach(&stats->rjc);
 	evcnt_detach(&stats->mngprc);
 	evcnt_detach(&stats->mngpdc);
 	evcnt_detach(&stats->xec);
 	/* Packet Transmission Stats */
 	evcnt_detach(&stats->gotc);
 	evcnt_detach(&stats->tpt);
 	evcnt_detach(&stats->gptc);
 	evcnt_detach(&stats->bptc);
 	evcnt_detach(&stats->mptc);
 	evcnt_detach(&stats->mngptc);
 	evcnt_detach(&stats->ptc64);
 	evcnt_detach(&stats->ptc127);
 	evcnt_detach(&stats->ptc255);
 	evcnt_detach(&stats->ptc511);
 	evcnt_detach(&stats->ptc1023);
 	evcnt_detach(&stats->ptc1522);
 	ixgbe_free_queues(adapter);
 	free(adapter->mta, M_DEVBUF);
 	IXGBE_CORE_LOCK_DESTROY(adapter);
 	return (0);
 } /* ixgbe_detach */
 /************************************************************************
  * ixgbe_setup_low_power_mode - LPLU/WoL preparation
+ *
  *   Prepare the adapter/port for LPLU and/or WoL
  ************************************************************************/
 static int
 ixgbe_setup_low_power_mode(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	device_t	dev = adapter->dev;
 	s32		error = 0;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	/* Limit power management flow to X550EM baseT */
 	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T &&
 	    hw->phy.ops.enter_lplu) {
 		/* X550EM baseT adapters need a special LPLU flow */
 		hw->phy.reset_disable = true;
 		ixgbe_stop(adapter);
 		error = hw->phy.ops.enter_lplu(hw);
 		if (error)
 			device_printf(dev,
 			    "Error entering LPLU: %d\n", error);
 		hw->phy.reset_disable = false;
 	} else {
 		/* Just stop for other adapters */
 		ixgbe_stop(adapter);
+	}
 	if (!hw->wol_enabled) {
 		ixgbe_set_phy_power(hw, FALSE);
 		IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
 		IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
 	} else {
 		/* Turn off support for APM wakeup. (Using ACPI instead) */
 		IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw),
 		    IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2);
 		/*
 		 * Clear Wake Up Status register to prevent any previous wakeup
 		 * events from waking us up immediately after we suspend.
 		 */
 		IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
 		/*
 		 * Program the Wakeup Filter Control register with user filter
 		 * settings
 		 */
 		IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wufc);
 		/* Enable wakeups and power management in Wakeup Control */
 		IXGBE_WRITE_REG(hw, IXGBE_WUC,
 		    IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN);
+	}
 	return error;
 } /* ixgbe_setup_low_power_mode */
 /************************************************************************
  * ixgbe_shutdown - Shutdown entry point
  ************************************************************************/
 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */
 static int
 ixgbe_shutdown(device_t dev)
+{
 	struct adapter *adapter = device_private(dev);
 	int error = 0;
 	INIT_DEBUGOUT("ixgbe_shutdown: begin");
 	IXGBE_CORE_LOCK(adapter);
 	error = ixgbe_setup_low_power_mode(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 	return (error);
 } /* ixgbe_shutdown */
 #endif
 /************************************************************************
  * ixgbe_suspend
+ *
  *   From D0 to D3
  ************************************************************************/
 static bool
 ixgbe_suspend(device_t dev, const pmf_qual_t *qual)
+{
 	struct adapter *adapter = device_private(dev);
 	int	       error = 0;
 	INIT_DEBUGOUT("ixgbe_suspend: begin");
 	IXGBE_CORE_LOCK(adapter);
 	error = ixgbe_setup_low_power_mode(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 	return (error);
 } /* ixgbe_suspend */
 /************************************************************************
  * ixgbe_resume
+ *
  *   From D3 to D0
  ************************************************************************/
 static bool
 ixgbe_resume(device_t dev, const pmf_qual_t *qual)
+{
 	struct adapter	*adapter = device_private(dev);
 	struct ifnet	*ifp = adapter->ifp;
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		wus;
 	INIT_DEBUGOUT("ixgbe_resume: begin");
 	IXGBE_CORE_LOCK(adapter);
 	/* Read & clear WUS register */
 	wus = IXGBE_READ_REG(hw, IXGBE_WUS);
 	if (wus)
 		device_printf(dev, "Woken up by (WUS): %#010x\n",
 		    IXGBE_READ_REG(hw, IXGBE_WUS));
 	IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
 	/* And clear WUFC until next low-power transition */
 	IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
 	/*
 	 * Required after D3->D0 transition;
 	 * will re-advertise all previous advertised speeds
 	 */
 	if (ifp->if_flags & IFF_UP)
 		ixgbe_init_locked(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 	return true;
 } /* ixgbe_resume */
 /*
  * Set the various hardware offload abilities.
+ *
  * This takes the ifnet's if_capenable flags (e.g. set by the user using
  * ifconfig) and indicates to the OS via the ifnet's if_hwassist field what
  * mbuf offload flags the driver will understand.
  */
 static void
 ixgbe_set_if_hwassist(struct adapter *adapter)
+{
 	/* XXX */
+}
 /************************************************************************
  * ixgbe_init_locked - Init entry point
+ *
  *   Used in two ways: It is used by the stack as an init
  *   entry point in network interface structure. It is also
  *   used by the driver as a hw/sw initialization routine to
  *   get to a consistent state.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static void
 ixgbe_init_locked(struct adapter *adapter)
+{
 	struct ifnet   *ifp = adapter->ifp;
 	device_t	dev = adapter->dev;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue *que;
 	struct tx_ring	*txr;
 	struct rx_ring	*rxr;
 	u32		txdctl, mhadd;
 	u32		rxdctl, rxctrl;
 	u32		ctrl_ext;
 	bool		unsupported_sfp = false;
 	int		i, j, err;
 	/* XXX check IFF_UP and IFF_RUNNING, power-saving state! */
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	INIT_DEBUGOUT("ixgbe_init_locked: begin");
 	hw->need_unsupported_sfp_recovery = false;
 	hw->adapter_stopped = FALSE;
 	ixgbe_stop_adapter(hw);
 	callout_stop(&adapter->timer);
 	for (i = 0, que = adapter->queues; i < adapter->num_queues; i++, que++)
 		que->disabled_count = 0;
 	/* XXX I moved this here from the SIOCSIFMTU case in ixgbe_ioctl(). */
 	adapter->max_frame_size =
 		ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
 	/* Queue indices may change with IOV mode */
 	ixgbe_align_all_queue_indices(adapter);
 	/* reprogram the RAR[0] in case user changed it. */
 	ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV);
 	/* Get the latest mac address, User can use a LAA */
 	memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl),
 	    IXGBE_ETH_LENGTH_OF_ADDRESS);
 	ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1);
 	hw->addr_ctrl.rar_used_count = 1;
 	/* Set hardware offload abilities from ifnet flags */
 	ixgbe_set_if_hwassist(adapter);
 	/* Prepare transmit descriptors and buffers */
 	if (ixgbe_setup_transmit_structures(adapter)) {
 		device_printf(dev, "Could not setup transmit structures\n");
 		ixgbe_stop(adapter);
 		return;
+	}
 	ixgbe_init_hw(hw);
 	ixgbe_initialize_iov(adapter);
 	ixgbe_initialize_transmit_units(adapter);
 	/* Setup Multicast table */
 	ixgbe_set_rxfilter(adapter);
 	/* Determine the correct mbuf pool, based on frame size */
 	if (adapter->max_frame_size <= MCLBYTES)
 		adapter->rx_mbuf_sz = MCLBYTES;
 	else
 		adapter->rx_mbuf_sz = MJUMPAGESIZE;
 	/* Prepare receive descriptors and buffers */
 	if (ixgbe_setup_receive_structures(adapter)) {
 		device_printf(dev, "Could not setup receive structures\n");
 		ixgbe_stop(adapter);
 		return;
+	}
 	/* Configure RX settings */
 	ixgbe_initialize_receive_units(adapter);
 	/* Enable SDP & MSI-X interrupts based on adapter */
 	ixgbe_config_gpie(adapter);
 	/* Set MTU size */
 	if (ifp->if_mtu > ETHERMTU) {
 		/* aka IXGBE_MAXFRS on 82599 and newer */
 		mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
 		mhadd &= ~IXGBE_MHADD_MFS_MASK;
 		mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT;
 		IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
+	}
 	/* Now enable all the queues */
 	for (i = 0; i < adapter->num_queues; i++) {
 		txr = &adapter->tx_rings[i];
 		txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));
 		txdctl |= IXGBE_TXDCTL_ENABLE;
 		/* Set WTHRESH to 8, burst writeback */
 		txdctl |= (8 << 16);
 		/*
 		 * When the internal queue falls below PTHRESH (32),
 		 * start prefetching as long as there are at least
 		 * HTHRESH (1) buffers ready. The values are taken
 		 * from the Intel linux driver 3.8.21.
 		 * Prefetching enables tx line rate even with 1 queue.
 		 */
 		txdctl |= (32 << 0) | (1 << 8);
 		IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl);
+	}
 	for (i = 0; i < adapter->num_queues; i++) {
 		rxr = &adapter->rx_rings[i];
 		rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
 		if (hw->mac.type == ixgbe_mac_82598EB) {
 			/*
 			 * PTHRESH = 21
 			 * HTHRESH = 4
 			 * WTHRESH = 8
 			 */
 			rxdctl &= ~0x3FFFFF;
 			rxdctl |= 0x080420;
+		}
 		rxdctl |= IXGBE_RXDCTL_ENABLE;
 		IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl);
 		for (j = 0; j < 10; j++) {
 			if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) &
 			    IXGBE_RXDCTL_ENABLE)
 				break;
 			else
 				msec_delay(1);
+		}
 		IXGBE_WRITE_BARRIER(hw);
 		/*
 		 * In netmap mode, we must preserve the buffers made
 		 * available to userspace before the if_init()
 		 * (this is true by default on the TX side, because
 		 * init makes all buffers available to userspace).
+		 *
 		 * netmap_reset() and the device specific routines
 		 * (e.g. ixgbe_setup_receive_rings()) map these
 		 * buffers at the end of the NIC ring, so here we
 		 * must set the RDT (tail) register to make sure
 		 * they are not overwritten.
+		 *
 		 * In this driver the NIC ring starts at RDH = 0,
 		 * RDT points to the last slot available for reception (?),
 		 * so RDT = num_rx_desc - 1 means the whole ring is available.
 		 */
 #ifdef DEV_NETMAP
 		if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
 		    (ifp->if_capenable & IFCAP_NETMAP)) {
 			struct netmap_adapter *na = NA(adapter->ifp);
 			struct netmap_kring *kring = na->rx_rings[i];
 			int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring);
 			IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t);
 		} else
 #endif /* DEV_NETMAP */
 			IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me),
 			    adapter->num_rx_desc - 1);
+	}
 	/* Enable Receive engine */
 	rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 	if (hw->mac.type == ixgbe_mac_82598EB)
 		rxctrl |= IXGBE_RXCTRL_DMBYPS;
 	rxctrl |= IXGBE_RXCTRL_RXEN;
 	ixgbe_enable_rx_dma(hw, rxctrl);
 	callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
 	/* Set up MSI/MSI-X routing */
 	if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
 		ixgbe_configure_ivars(adapter);
 		/* Set up auto-mask */
 		if (hw->mac.type == ixgbe_mac_82598EB)
 			IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
 		else {
 			IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
 			IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
+		}
 	} else {  /* Simple settings for Legacy/MSI */
 		ixgbe_set_ivar(adapter, 0, 0, 0);
 		ixgbe_set_ivar(adapter, 0, 0, 1);
 		IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
+	}
 	ixgbe_init_fdir(adapter);
 	/*
 	 * Check on any SFP devices that
 	 * need to be kick-started
 	 */
 	if (hw->phy.type == ixgbe_phy_none) {
 		err = hw->phy.ops.identify(hw);
 		if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
 			unsupported_sfp = true;
 	} else if (hw->phy.type == ixgbe_phy_sfp_unsupported)
 		unsupported_sfp = true;
 	if (unsupported_sfp)
 		device_printf(dev,
 		    "Unsupported SFP+ module type was detected.\n");
 	/* Set moderation on the Link interrupt */
 	ixgbe_eitr_write(adapter, adapter->vector, IXGBE_LINK_ITR);
 	/* Enable EEE power saving */
 	if (adapter->feat_cap & IXGBE_FEATURE_EEE)
 		hw->mac.ops.setup_eee(hw,
 		    adapter->feat_en & IXGBE_FEATURE_EEE);
 	/* Enable power to the phy. */
 	if (!unsupported_sfp) {
 		ixgbe_set_phy_power(hw, TRUE);
 		/* Config/Enable Link */
 		ixgbe_config_link(adapter);
+	}
 	/* Hardware Packet Buffer & Flow Control setup */
 	ixgbe_config_delay_values(adapter);
 	/* Initialize the FC settings */
 	ixgbe_start_hw(hw);
 	/* Set up VLAN support and filter */
 	ixgbe_setup_vlan_hw_support(adapter);
 	/* Setup DMA Coalescing */
 	ixgbe_config_dmac(adapter);
 	/* And now turn on interrupts */
 	ixgbe_enable_intr(adapter);
 	/* Enable the use of the MBX by the VF's */
 	if (adapter->feat_en & IXGBE_FEATURE_SRIOV) {
 		ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 		ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
 		IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
+	}
 	/* Update saved flags. See ixgbe_ifflags_cb() */
 	adapter->if_flags = ifp->if_flags;
 	adapter->ec_capenable = adapter->osdep.ec.ec_capenable;
 	/* Now inform the stack we're ready */
 	ifp->if_flags |= IFF_RUNNING;
 	return;
 } /* ixgbe_init_locked */
 /************************************************************************
  * ixgbe_init
  ************************************************************************/
 static int
 ixgbe_init(struct ifnet *ifp)
+{
 	struct adapter *adapter = ifp->if_softc;
 	IXGBE_CORE_LOCK(adapter);
 	ixgbe_init_locked(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 	return 0;	/* XXX ixgbe_init_locked cannot fail?  really? */
 } /* ixgbe_init */
 /************************************************************************
  * ixgbe_set_ivar
+ *
  *   Setup the correct IVAR register for a particular MSI-X interrupt
  *     (yes this is all very magic and confusing :)
  *    - entry is the register array entry
  *    - vector is the MSI-X vector for this queue
  *    - type is RX/TX/MISC
  ************************************************************************/
 static void
 ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32 ivar, index;
 	vector |= IXGBE_IVAR_ALLOC_VAL;
 	switch (hw->mac.type) {
 	case ixgbe_mac_82598EB:
 		if (type == -1)
 			entry = IXGBE_IVAR_OTHER_CAUSES_INDEX;
 		else
 			entry += (type * 64);
 		index = (entry >> 2) & 0x1F;
 		ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 		ivar &= ~(0xffUL << (8 * (entry & 0x3)));
 		ivar |= ((u32)vector << (8 * (entry & 0x3)));
 		IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 		break;
 	case ixgbe_mac_82599EB:
 	case ixgbe_mac_X540:
 	case ixgbe_mac_X550:
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		if (type == -1) { /* MISC IVAR */
 			index = (entry & 1) * 8;
 			ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
 			ivar &= ~(0xffUL << index);
 			ivar |= ((u32)vector << index);
 			IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
 		} else {	/* RX/TX IVARS */
 			index = (16 * (entry & 1)) + (8 * type);
 			ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
 			ivar &= ~(0xffUL << index);
 			ivar |= ((u32)vector << index);
 			IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
+		}
 		break;
 	default:
 		break;
+	}
 } /* ixgbe_set_ivar */
 /************************************************************************
  * ixgbe_configure_ivars
  ************************************************************************/
 static void
 ixgbe_configure_ivars(struct adapter *adapter)
+{
 	struct ix_queue *que = adapter->queues;
 	u32		newitr;
 	if (ixgbe_max_interrupt_rate > 0)
 		newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8;
 	else {
 		/*
 		 * Disable DMA coalescing if interrupt moderation is
 		 * disabled.
 		 */
 		adapter->dmac = 0;
 		newitr = 0;
+	}
 	for (int i = 0; i < adapter->num_queues; i++, que++) {
 		struct rx_ring *rxr = &adapter->rx_rings[i];
 		struct tx_ring *txr = &adapter->tx_rings[i];
 		/* First the RX queue entry */
 		ixgbe_set_ivar(adapter, rxr->me, que->msix, 0);
 		/* ... and the TX */
 		ixgbe_set_ivar(adapter, txr->me, que->msix, 1);
 		/* Set an Initial EITR value */
 		ixgbe_eitr_write(adapter, que->msix, newitr);
 		/*
 		 * To eliminate influence of the previous state.
 		 * At this point, Tx/Rx interrupt handler
 		 * (ixgbe_msix_que()) cannot be called, so  both
 		 * IXGBE_TX_LOCK and IXGBE_RX_LOCK are not required.
 		 */
 		que->eitr_setting = 0;
+	}
 	/* For the Link interrupt */
 	ixgbe_set_ivar(adapter, 1, adapter->vector, -1);
 } /* ixgbe_configure_ivars */
 /************************************************************************
  * ixgbe_config_gpie
  ************************************************************************/
 static void
 ixgbe_config_gpie(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		gpie;
 	gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
 	if (adapter->feat_en & IXGBE_FEATURE_MSIX) {
 		/* Enable Enhanced MSI-X mode */
 		gpie |= IXGBE_GPIE_MSIX_MODE
 		     |	IXGBE_GPIE_EIAME
 		     |	IXGBE_GPIE_PBA_SUPPORT
 		     |	IXGBE_GPIE_OCD;
+	}
 	/* Fan Failure Interrupt */
 	if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
 		gpie |= IXGBE_SDP1_GPIEN;
 	/* Thermal Sensor Interrupt */
 	if (adapter->feat_en & IXGBE_FEATURE_TEMP_SENSOR)
 		gpie |= IXGBE_SDP0_GPIEN_X540;
 	/* Link detection */
 	switch (hw->mac.type) {
 	case ixgbe_mac_82599EB:
 		gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN;
 		break;
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		gpie |= IXGBE_SDP0_GPIEN_X540;
 		break;
 	default:
 		break;
+	}
 	IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
 } /* ixgbe_config_gpie */
 /************************************************************************
  * ixgbe_config_delay_values
+ *
  *   Requires adapter->max_frame_size to be set.
  ************************************************************************/
 static void
 @@ -4386,2001 +4396,2001 @@ ixgbe_set_rxfilter(struct adapter *adapt
 		fctrl &= ~IXGBE_FCTRL_UPE;
 	} else
 		fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
 	/* Update multicast filter entries only when it's not ALLMULTI */
 	if ((ec->ec_flags & ETHER_F_ALLMULTI) == 0) {
 		ETHER_UNLOCK(ec);
 		update_ptr = (u8 *)mta;
 		ixgbe_update_mc_addr_list(&adapter->hw, update_ptr, mcnt,
 		    ixgbe_mc_array_itr, TRUE);
 	} else
 		ETHER_UNLOCK(ec);
 } /* ixgbe_set_rxfilter */
 /************************************************************************
  * ixgbe_mc_array_itr
+ *
  *   An iterator function needed by the multicast shared code.
  *   It feeds the shared code routine the addresses in the
  *   array of ixgbe_set_rxfilter() one by one.
  ************************************************************************/
 static u8 *
 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
+{
 	struct ixgbe_mc_addr *mta;
 	mta = (struct ixgbe_mc_addr *)*update_ptr;
 	*vmdq = mta->vmdq;
 	*update_ptr = (u8*)(mta + 1);
 	return (mta->addr);
 } /* ixgbe_mc_array_itr */
 /************************************************************************
  * ixgbe_local_timer - Timer routine
+ *
  *   Checks for link status, updates statistics,
  *   and runs the watchdog check.
  ************************************************************************/
 static void
 ixgbe_local_timer(void *arg)
+{
 	struct adapter *adapter = arg;
 	IXGBE_CORE_LOCK(adapter);
 	ixgbe_local_timer1(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
+}
 static void
 ixgbe_local_timer1(void *arg)
+{
 	struct adapter	*adapter = arg;
 	device_t	dev = adapter->dev;
 	struct ix_queue	*que = adapter->queues;
 	u64		queues = 0;
 	u64		v0, v1, v2, v3, v4, v5, v6, v7;
 	int		hung = 0;
 	int		i;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	/* Check for pluggable optics */
 	if (adapter->sfp_probe)
 		if (!ixgbe_sfp_probe(adapter))
 			goto out; /* Nothing to do */
 	ixgbe_update_link_status(adapter);
 	ixgbe_update_stats_counters(adapter);
 	/* Update some event counters */
 	v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0;
 	que = adapter->queues;
 	for (i = 0; i < adapter->num_queues; i++, que++) {
 		struct tx_ring	*txr = que->txr;
 		v0 += txr->q_efbig_tx_dma_setup;
 		v1 += txr->q_mbuf_defrag_failed;
 		v2 += txr->q_efbig2_tx_dma_setup;
 		v3 += txr->q_einval_tx_dma_setup;
 		v4 += txr->q_other_tx_dma_setup;
 		v5 += txr->q_eagain_tx_dma_setup;
 		v6 += txr->q_enomem_tx_dma_setup;
 		v7 += txr->q_tso_err;
+	}
 	adapter->efbig_tx_dma_setup.ev_count = v0;
 	adapter->mbuf_defrag_failed.ev_count = v1;
 	adapter->efbig2_tx_dma_setup.ev_count = v2;
 	adapter->einval_tx_dma_setup.ev_count = v3;
 	adapter->other_tx_dma_setup.ev_count = v4;
 	adapter->eagain_tx_dma_setup.ev_count = v5;
 	adapter->enomem_tx_dma_setup.ev_count = v6;
 	adapter->tso_err.ev_count = v7;
 	/*
 	 * Check the TX queues status
 	 *	- mark hung queues so we don't schedule on them
 	 *	- watchdog only if all queues show hung
 	 */
 	que = adapter->queues;
 	for (i = 0; i < adapter->num_queues; i++, que++) {
 		/* Keep track of queues with work for soft irq */
 		if (que->txr->busy)
 			queues |= 1ULL << que->me;
 		/*
 		 * Each time txeof runs without cleaning, but there
 		 * are uncleaned descriptors it increments busy. If
 		 * we get to the MAX we declare it hung.
 		 */
 		if (que->busy == IXGBE_QUEUE_HUNG) {
 			++hung;
 			/* Mark the queue as inactive */
 			adapter->active_queues &= ~(1ULL << que->me);
 			continue;
 		} else {
 			/* Check if we've come back from hung */
 			if ((adapter->active_queues & (1ULL << que->me)) == 0)
 				adapter->active_queues |= 1ULL << que->me;
+		}
 		if (que->busy >= IXGBE_MAX_TX_BUSY) {
 			device_printf(dev,
 			    "Warning queue %d appears to be hung!\n", i);
 			que->txr->busy = IXGBE_QUEUE_HUNG;
 			++hung;
+		}
+	}
 	/* Only truly watchdog if all queues show hung */
 	if (hung == adapter->num_queues)
 		goto watchdog;
 #if 0 /* XXX Avoid unexpectedly disabling interrupt forever (PR#53294) */
 	else if (queues != 0) { /* Force an IRQ on queues with work */
 		que = adapter->queues;
 		for (i = 0; i < adapter->num_queues; i++, que++) {
 			mutex_enter(&que->dc_mtx);
 			if (que->disabled_count == 0)
 				ixgbe_rearm_queues(adapter,
 				    queues & ((u64)1 << i));
 			mutex_exit(&que->dc_mtx);
+		}
+	}
 #endif
 out:
 	callout_reset(&adapter->timer, hz, ixgbe_local_timer, adapter);
 	return;
 watchdog:
 	device_printf(adapter->dev, "Watchdog timeout -- resetting\n");
 	adapter->ifp->if_flags &= ~IFF_RUNNING;
 	adapter->watchdog_events.ev_count++;
 	ixgbe_init_locked(adapter);
 } /* ixgbe_local_timer */
 /************************************************************************
  * ixgbe_recovery_mode_timer - Recovery mode timer routine
  ************************************************************************/
 static void
 ixgbe_recovery_mode_timer(void *arg)
+{
 	struct adapter *adapter = arg;
 	struct ixgbe_hw *hw = &adapter->hw;
 	IXGBE_CORE_LOCK(adapter);
 	if (ixgbe_fw_recovery_mode(hw)) {
 		if (atomic_cas_uint(&adapter->recovery_mode, 0, 1)) {
 			/* Firmware error detected, entering recovery mode */
 			device_printf(adapter->dev, "Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
 			if (hw->adapter_stopped == FALSE)
 				ixgbe_stop(adapter);
+		}
 	} else
 		atomic_cas_uint(&adapter->recovery_mode, 1, 0);
 	callout_reset(&adapter->recovery_mode_timer, hz,
 	    ixgbe_recovery_mode_timer, adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 } /* ixgbe_recovery_mode_timer */
 /************************************************************************
  * ixgbe_sfp_probe
+ *
  *   Determine if a port had optics inserted.
  ************************************************************************/
 static bool
 ixgbe_sfp_probe(struct adapter *adapter)
+{
 	struct ixgbe_hw	*hw = &adapter->hw;
 	device_t	dev = adapter->dev;
 	bool		result = FALSE;
 	if ((hw->phy.type == ixgbe_phy_nl) &&
 	    (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
 		s32 ret = hw->phy.ops.identify_sfp(hw);
 		if (ret)
 			goto out;
 		ret = hw->phy.ops.reset(hw);
 		adapter->sfp_probe = FALSE;
 		if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
 			device_printf(dev,"Unsupported SFP+ module detected!");
 			device_printf(dev,
 			    "Reload driver with supported module.\n");
 			goto out;
 		} else
 			device_printf(dev, "SFP+ module detected!\n");
 		/* We now have supported optics */
 		result = TRUE;
+	}
 out:
 	return (result);
 } /* ixgbe_sfp_probe */
 /************************************************************************
  * ixgbe_handle_mod - Tasklet for SFP module interrupts
  ************************************************************************/
 static void
 ixgbe_handle_mod(void *context)
+{
 	struct adapter	*adapter = context;
 	struct ixgbe_hw *hw = &adapter->hw;
 	device_t	dev = adapter->dev;
 	u32		err, cage_full = 0;
 	IXGBE_CORE_LOCK(adapter);
 	++adapter->mod_sicount.ev_count;
 	if (adapter->hw.need_crosstalk_fix) {
 		switch (hw->mac.type) {
 		case ixgbe_mac_82599EB:
 			cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
 			    IXGBE_ESDP_SDP2;
 			break;
 		case ixgbe_mac_X550EM_x:
 		case ixgbe_mac_X550EM_a:
 			cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
 			    IXGBE_ESDP_SDP0;
 			break;
 		default:
 			break;
+		}
 		if (!cage_full)
 			goto out;
+	}
 	err = hw->phy.ops.identify_sfp(hw);
 	if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
 		device_printf(dev,
 		    "Unsupported SFP+ module type was detected.\n");
 		goto out;
+	}
 	if (hw->need_unsupported_sfp_recovery) {
 		device_printf(dev, "Recovering from unsupported SFP\n");
 		/*
 		 *  We could recover the status by calling setup_sfp(),
 		 * setup_link() and some others. It's complex and might not
 		 * work correctly on some unknown cases. To avoid such type of
 		 * problem, call ixgbe_init_locked(). It's simple and safe
 		 * approach.
 		 */
 		ixgbe_init_locked(adapter);
 	} else {
 		if (hw->mac.type == ixgbe_mac_82598EB)
 			err = hw->phy.ops.reset(hw);
 		else {
 			err = hw->mac.ops.setup_sfp(hw);
 			hw->phy.sfp_setup_needed = FALSE;
+		}
 		if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
 			device_printf(dev,
 			    "Setup failure - unsupported SFP+ module type.\n");
 			goto out;
+		}
+	}
 	softint_schedule(adapter->msf_si);
 out:
 	IXGBE_CORE_UNLOCK(adapter);
 } /* ixgbe_handle_mod */
 /************************************************************************
  * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts
  ************************************************************************/
 static void
 ixgbe_handle_msf(void *context)
+{
 	struct adapter	*adapter = context;
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		autoneg;
 	bool		negotiate;
 	IXGBE_CORE_LOCK(adapter);
 	++adapter->msf_sicount.ev_count;
 	/* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */
 	adapter->phy_layer = ixgbe_get_supported_physical_layer(hw);
 	autoneg = hw->phy.autoneg_advertised;
 	if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
 		hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate);
 	else
 		negotiate = 0;
 	if (hw->mac.ops.setup_link)
 		hw->mac.ops.setup_link(hw, autoneg, TRUE);
 	/* Adjust media types shown in ifconfig */
 	ifmedia_removeall(&adapter->media);
 	ixgbe_add_media_types(adapter);
 	ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
 	IXGBE_CORE_UNLOCK(adapter);
 } /* ixgbe_handle_msf */
 /************************************************************************
  * ixgbe_handle_phy - Tasklet for external PHY interrupts
  ************************************************************************/
 static void
 ixgbe_handle_phy(void *context)
+{
 	struct adapter	*adapter = context;
 	struct ixgbe_hw *hw = &adapter->hw;
 	int error;
 	++adapter->phy_sicount.ev_count;
 	error = hw->phy.ops.handle_lasi(hw);
 	if (error == IXGBE_ERR_OVERTEMP)
 		device_printf(adapter->dev,
 		    "CRITICAL: EXTERNAL PHY OVER TEMP!! "
 		    " PHY will downshift to lower power state!\n");
 	else if (error)
 		device_printf(adapter->dev,
 		    "Error handling LASI interrupt: %d\n", error);
 } /* ixgbe_handle_phy */
 static void
 ixgbe_ifstop(struct ifnet *ifp, int disable)
+{
 	struct adapter *adapter = ifp->if_softc;
 	IXGBE_CORE_LOCK(adapter);
 	ixgbe_stop(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
+}
 /************************************************************************
  * ixgbe_stop - Stop the hardware
+ *
  *   Disables all traffic on the adapter by issuing a
  *   global reset on the MAC and deallocates TX/RX buffers.
  ************************************************************************/
 static void
 ixgbe_stop(void *arg)
+{
 	struct ifnet	*ifp;
 	struct adapter	*adapter = arg;
 	struct ixgbe_hw *hw = &adapter->hw;
 	ifp = adapter->ifp;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	INIT_DEBUGOUT("ixgbe_stop: begin\n");
 	ixgbe_disable_intr(adapter);
 	callout_stop(&adapter->timer);
 	/* Let the stack know...*/
 	ifp->if_flags &= ~IFF_RUNNING;
 	ixgbe_reset_hw(hw);
 	hw->adapter_stopped = FALSE;
 	ixgbe_stop_adapter(hw);
 	if (hw->mac.type == ixgbe_mac_82599EB)
 		ixgbe_stop_mac_link_on_d3_82599(hw);
 	/* Turn off the laser - noop with no optics */
 	ixgbe_disable_tx_laser(hw);
 	/* Update the stack */
 	adapter->link_up = FALSE;
 	ixgbe_update_link_status(adapter);
 	/* reprogram the RAR[0] in case user changed it. */
 	ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
 	return;
 } /* ixgbe_stop */
 /************************************************************************
  * ixgbe_update_link_status - Update OS on link state
+ *
  * Note: Only updates the OS on the cached link state.
  *	 The real check of the hardware only happens with
  *	 a link interrupt.
  ************************************************************************/
 static void
 ixgbe_update_link_status(struct adapter *adapter)
+{
 	struct ifnet	*ifp = adapter->ifp;
 	device_t	dev = adapter->dev;
 	struct ixgbe_hw *hw = &adapter->hw;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	if (adapter->link_up) {
 		if (adapter->link_active != LINK_STATE_UP) {
 			/*
 			 * To eliminate influence of the previous state
 			 * in the same way as ixgbe_init_locked().
 			 */
 			struct ix_queue	*que = adapter->queues;
 			for (int i = 0; i < adapter->num_queues; i++, que++)
 				que->eitr_setting = 0;
 			if (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL){
 				/*
 				 *  Discard count for both MAC Local Fault and
 				 * Remote Fault because those registers are
 				 * valid only when the link speed is up and
 				 * 10Gbps.
 				 */
 				IXGBE_READ_REG(hw, IXGBE_MLFC);
 				IXGBE_READ_REG(hw, IXGBE_MRFC);
+			}
 			if (bootverbose) {
 				const char *bpsmsg;
 				switch (adapter->link_speed) {
 				case IXGBE_LINK_SPEED_10GB_FULL:
 					bpsmsg = "10 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_5GB_FULL:
 					bpsmsg = "5 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_2_5GB_FULL:
 					bpsmsg = "2.5 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_1GB_FULL:
 					bpsmsg = "1 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_100_FULL:
 					bpsmsg = "100 Mbps";
 					break;
 				case IXGBE_LINK_SPEED_10_FULL:
 					bpsmsg = "10 Mbps";
 					break;
 				default:
 					bpsmsg = "unknown speed";
 					break;
+				}
 				device_printf(dev, "Link is up %s %s \n",
 				    bpsmsg, "Full Duplex");
+			}
 			adapter->link_active = LINK_STATE_UP;
 			/* Update any Flow Control changes */
 			ixgbe_fc_enable(&adapter->hw);
 			/* Update DMA coalescing config */
 			ixgbe_config_dmac(adapter);
 			if_link_state_change(ifp, LINK_STATE_UP);
 			if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
 				ixgbe_ping_all_vfs(adapter);
+		}
 	} else {
 		/*
 		 * Do it when link active changes to DOWN. i.e.
 		 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN
 		 * b) LINK_STATE_UP	 -> LINK_STATE_DOWN
 		 */
 		if (adapter->link_active != LINK_STATE_DOWN) {
 			if (bootverbose)
 				device_printf(dev, "Link is Down\n");
 			if_link_state_change(ifp, LINK_STATE_DOWN);
 			adapter->link_active = LINK_STATE_DOWN;
 			if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
 				ixgbe_ping_all_vfs(adapter);
 			ixgbe_drain_all(adapter);
+		}
+	}
 } /* ixgbe_update_link_status */
 /************************************************************************
  * ixgbe_config_dmac - Configure DMA Coalescing
  ************************************************************************/
 static void
 ixgbe_config_dmac(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config;
 	if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config)
 		return;
 	if (dcfg->watchdog_timer ^ adapter->dmac ||
 	    dcfg->link_speed ^ adapter->link_speed) {
 		dcfg->watchdog_timer = adapter->dmac;
 		dcfg->fcoe_en = false;
 		dcfg->link_speed = adapter->link_speed;
 		dcfg->num_tcs = 1;
 		INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n",
 		    dcfg->watchdog_timer, dcfg->link_speed);
 		hw->mac.ops.dmac_config(hw);
+	}
 } /* ixgbe_config_dmac */
 /************************************************************************
  * ixgbe_enable_intr
  ************************************************************************/
 static void
 ixgbe_enable_intr(struct adapter *adapter)
+{
 	struct ixgbe_hw	*hw = &adapter->hw;
 	struct ix_queue	*que = adapter->queues;
 	u32		mask, fwsm;
 	mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
 	switch (adapter->hw.mac.type) {
 	case ixgbe_mac_82599EB:
 		mask |= IXGBE_EIMS_ECC;
 		/* Temperature sensor on some adapters */
 		mask |= IXGBE_EIMS_GPI_SDP0;
 		/* SFP+ (RX_LOS_N & MOD_ABS_N) */
 		mask |= IXGBE_EIMS_GPI_SDP1;
 		mask |= IXGBE_EIMS_GPI_SDP2;
 		break;
 	case ixgbe_mac_X540:
 		/* Detect if Thermal Sensor is enabled */
 		fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
 		if (fwsm & IXGBE_FWSM_TS_ENABLED)
 			mask |= IXGBE_EIMS_TS;
 		mask |= IXGBE_EIMS_ECC;
 		break;
 	case ixgbe_mac_X550:
 		/* MAC thermal sensor is automatically enabled */
 		mask |= IXGBE_EIMS_TS;
 		mask |= IXGBE_EIMS_ECC;
 		break;
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		/* Some devices use SDP0 for important information */
 		if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
 		    hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
 		    hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N ||
 		    hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T)
 			mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw);
 		if (hw->phy.type == ixgbe_phy_x550em_ext_t)
 			mask |= IXGBE_EICR_GPI_SDP0_X540;
 		mask |= IXGBE_EIMS_ECC;
 		break;
 	default:
 		break;
+	}
 	/* Enable Fan Failure detection */
 	if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL)
 		mask |= IXGBE_EIMS_GPI_SDP1;
 	/* Enable SR-IOV */
 	if (adapter->feat_en & IXGBE_FEATURE_SRIOV)
 		mask |= IXGBE_EIMS_MAILBOX;
 	/* Enable Flow Director */
 	if (adapter->feat_en & IXGBE_FEATURE_FDIR)
 		mask |= IXGBE_EIMS_FLOW_DIR;
 	IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
 	/* With MSI-X we use auto clear */
 	if (adapter->msix_mem) {
 		mask = IXGBE_EIMS_ENABLE_MASK;
 		/* Don't autoclear Link */
 		mask &= ~IXGBE_EIMS_OTHER;
 		mask &= ~IXGBE_EIMS_LSC;
 		if (adapter->feat_cap & IXGBE_FEATURE_SRIOV)
 			mask &= ~IXGBE_EIMS_MAILBOX;
 		IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);
+	}
 	/*
 	 * Now enable all queues, this is done separately to
 	 * allow for handling the extended (beyond 32) MSI-X
 	 * vectors that can be used by 82599
 	 */
 	for (int i = 0; i < adapter->num_queues; i++, que++)
 		ixgbe_enable_queue(adapter, que->msix);
 	IXGBE_WRITE_FLUSH(hw);
 } /* ixgbe_enable_intr */
 /************************************************************************
  * ixgbe_disable_intr_internal
  ************************************************************************/
 static void
 ixgbe_disable_intr_internal(struct adapter *adapter, bool nestok)
+{
 	struct ix_queue	*que = adapter->queues;
 	/* disable interrupts other than queues */
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~IXGBE_EIMC_RTX_QUEUE);
 	if (adapter->msix_mem)
 		IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, 0);
 	for (int i = 0; i < adapter->num_queues; i++, que++)
 		ixgbe_disable_queue_internal(adapter, que->msix, nestok);
 	IXGBE_WRITE_FLUSH(&adapter->hw);
 } /* ixgbe_do_disable_intr_internal */
 /************************************************************************
  * ixgbe_disable_intr
  ************************************************************************/
 static void
 ixgbe_disable_intr(struct adapter *adapter)
+{
 	ixgbe_disable_intr_internal(adapter, true);
 } /* ixgbe_disable_intr */
 /************************************************************************
  * ixgbe_ensure_disabled_intr
  ************************************************************************/
 void
 ixgbe_ensure_disabled_intr(struct adapter *adapter)
+{
 	ixgbe_disable_intr_internal(adapter, false);
 } /* ixgbe_ensure_disabled_intr */
 /************************************************************************
  * ixgbe_legacy_irq - Legacy Interrupt Service routine
  ************************************************************************/
 static int
 ixgbe_legacy_irq(void *arg)
+{
 	struct ix_queue *que = arg;
 	struct adapter	*adapter = que->adapter;
 	struct ixgbe_hw	*hw = &adapter->hw;
 	struct ifnet	*ifp = adapter->ifp;
 	struct		tx_ring *txr = adapter->tx_rings;
 	bool		more = false;
 	u32		eicr, eicr_mask;
 	/* Silicon errata #26 on 82598 */
 	IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
 	eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 	adapter->stats.pf.legint.ev_count++;
 	++que->irqs.ev_count;
 	if (eicr == 0) {
 		adapter->stats.pf.intzero.ev_count++;
 		if ((ifp->if_flags & IFF_UP) != 0)
 			ixgbe_enable_intr(adapter);
 		return 0;
+	}
 	if ((ifp->if_flags & IFF_RUNNING) != 0) {
 		/*
 		 * The same as ixgbe_msix_que() about "que->txrx_use_workqueue".
 		 */
 		que->txrx_use_workqueue = adapter->txrx_use_workqueue;
 #ifdef __NetBSD__
 		/* Don't run ixgbe_rxeof in interrupt context */
 		more = true;
 #else
 		more = ixgbe_rxeof(que);
 #endif
 		IXGBE_TX_LOCK(txr);
 		ixgbe_txeof(txr);
 #ifdef notyet
 		if (!ixgbe_ring_empty(ifp, txr->br))
 			ixgbe_start_locked(ifp, txr);
 #endif
 		IXGBE_TX_UNLOCK(txr);
+	}
 	/* Check for fan failure */
 	if (adapter->feat_en & IXGBE_FEATURE_FAN_FAIL) {
 		ixgbe_check_fan_failure(adapter, eicr, true);
 		IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
+	}
 	/* Link status change */
 	if (eicr & IXGBE_EICR_LSC)
 		softint_schedule(adapter->link_si);
 	if (ixgbe_is_sfp(hw)) {
 		/* Pluggable optics-related interrupt */
 		if (hw->mac.type >= ixgbe_mac_X540)
 			eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
 		else
 			eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
 		if (eicr & eicr_mask) {
 			IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
 			softint_schedule(adapter->mod_si);
+		}
 		if ((hw->mac.type == ixgbe_mac_82599EB) &&
 		    (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
 			IXGBE_WRITE_REG(hw, IXGBE_EICR,
 			    IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
 			softint_schedule(adapter->msf_si);
+		}
+	}
 	/* External PHY interrupt */
 	if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
 	    (eicr & IXGBE_EICR_GPI_SDP0_X540))
 		softint_schedule(adapter->phy_si);
 	if (more) {
 		que->req.ev_count++;
 		ixgbe_sched_handle_que(adapter, que);
 	} else
 		ixgbe_enable_intr(adapter);
 	return 1;
 } /* ixgbe_legacy_irq */
 /************************************************************************
  * ixgbe_free_pciintr_resources
  ************************************************************************/
 static void
 ixgbe_free_pciintr_resources(struct adapter *adapter)
+{
 	struct ix_queue *que = adapter->queues;
 	int		rid;
 	/*
 	 * Release all msix queue resources:
 	 */
 	for (int i = 0; i < adapter->num_queues; i++, que++) {
 		if (que->res != NULL) {
 			pci_intr_disestablish(adapter->osdep.pc,
 			    adapter->osdep.ihs[i]);
 			adapter->osdep.ihs[i] = NULL;
+		}
+	}
 	/* Clean the Legacy or Link interrupt last */
 	if (adapter->vector) /* we are doing MSIX */
 		rid = adapter->vector;
 	else
 		rid = 0;
 	if (adapter->osdep.ihs[rid] != NULL) {
 		pci_intr_disestablish(adapter->osdep.pc,
 		    adapter->osdep.ihs[rid]);
 		adapter->osdep.ihs[rid] = NULL;
+	}
 	if (adapter->osdep.intrs != NULL) {
 		pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs,
 		    adapter->osdep.nintrs);
 		adapter->osdep.intrs = NULL;
+	}
 } /* ixgbe_free_pciintr_resources */
 /************************************************************************
  * ixgbe_free_pci_resources
  ************************************************************************/
 static void
 ixgbe_free_pci_resources(struct adapter *adapter)
+{
 	ixgbe_free_pciintr_resources(adapter);
 	if (adapter->osdep.mem_size != 0) {
 		bus_space_unmap(adapter->osdep.mem_bus_space_tag,
 		    adapter->osdep.mem_bus_space_handle,
 		    adapter->osdep.mem_size);
+	}
 } /* ixgbe_free_pci_resources */
 /************************************************************************
  * ixgbe_set_sysctl_value
  ************************************************************************/
 static void
 ixgbe_set_sysctl_value(struct adapter *adapter, const char *name,
     const char *description, int *limit, int value)
+{
 	device_t dev =	adapter->dev;
 	struct sysctllog **log;
 	const struct sysctlnode *rnode, *cnode;
 	/*
 	 * It's not required to check recovery mode because this function never
 	 * touches hardware.
 	 */
 	log = &adapter->sysctllog;
 	if ((rnode = ixgbe_sysctl_instance(adapter)) == NULL) {
 		aprint_error_dev(dev, "could not create sysctl root\n");
 		return;
+	}
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READWRITE, CTLTYPE_INT,
 	    name, SYSCTL_DESCR(description),
 		NULL, 0, limit, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	*limit = value;
 } /* ixgbe_set_sysctl_value */
 /************************************************************************
  * ixgbe_sysctl_flowcntl
+ *
  *   SYSCTL wrapper around setting Flow Control
  ************************************************************************/
 static int
 ixgbe_sysctl_flowcntl(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	int error, fc;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	fc = adapter->hw.fc.current_mode;
 	node.sysctl_data = &fc;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if (error != 0 || newp == NULL)
 		return error;
 	/* Don't bother if it's not changed */
 	if (fc == adapter->hw.fc.current_mode)
 		return (0);
 	return ixgbe_set_flowcntl(adapter, fc);
 } /* ixgbe_sysctl_flowcntl */
 /************************************************************************
  * ixgbe_set_flowcntl - Set flow control
+ *
  *   Flow control values:
  *     0 - off
  *     1 - rx pause
  *     2 - tx pause
  *     3 - full
  ************************************************************************/
 static int
 ixgbe_set_flowcntl(struct adapter *adapter, int fc)
+{
 	switch (fc) {
 		case ixgbe_fc_rx_pause:
 		case ixgbe_fc_tx_pause:
 		case ixgbe_fc_full:
 			adapter->hw.fc.requested_mode = fc;
 			if (adapter->num_queues > 1)
 				ixgbe_disable_rx_drop(adapter);
 			break;
 		case ixgbe_fc_none:
 			adapter->hw.fc.requested_mode = ixgbe_fc_none;
 			if (adapter->num_queues > 1)
 				ixgbe_enable_rx_drop(adapter);
 			break;
 		default:
 			return (EINVAL);
+	}
 #if 0 /* XXX NetBSD */
 	/* Don't autoneg if forcing a value */
 	adapter->hw.fc.disable_fc_autoneg = TRUE;
 #endif
 	ixgbe_fc_enable(&adapter->hw);
 	return (0);
 } /* ixgbe_set_flowcntl */
 /************************************************************************
  * ixgbe_enable_rx_drop
+ *
  *   Enable the hardware to drop packets when the buffer is
  *   full. This is useful with multiqueue, so that no single
  *   queue being full stalls the entire RX engine. We only
  *   enable this when Multiqueue is enabled AND Flow Control
  *   is disabled.
  ************************************************************************/
 static void
 ixgbe_enable_rx_drop(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct rx_ring	*rxr;
 	u32		srrctl;
 	for (int i = 0; i < adapter->num_queues; i++) {
 		rxr = &adapter->rx_rings[i];
 		srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
 		srrctl |= IXGBE_SRRCTL_DROP_EN;
 		IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
+	}
 	/* enable drop for each vf */
 	for (int i = 0; i < adapter->num_vfs; i++) {
 		IXGBE_WRITE_REG(hw, IXGBE_QDE,
 		    (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) |
 		    IXGBE_QDE_ENABLE));
+	}
 } /* ixgbe_enable_rx_drop */
 /************************************************************************
  * ixgbe_disable_rx_drop
  ************************************************************************/
 static void
 ixgbe_disable_rx_drop(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct rx_ring	*rxr;
 	u32		srrctl;
 	for (int i = 0; i < adapter->num_queues; i++) {
 		rxr = &adapter->rx_rings[i];
 		srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
 		srrctl &= ~IXGBE_SRRCTL_DROP_EN;
 		IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
+	}
 	/* disable drop for each vf */
 	for (int i = 0; i < adapter->num_vfs; i++) {
 		IXGBE_WRITE_REG(hw, IXGBE_QDE,
 		    (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT)));
+	}
 } /* ixgbe_disable_rx_drop */
 /************************************************************************
  * ixgbe_sysctl_advertise
+ *
  *   SYSCTL wrapper around setting advertised speed
  ************************************************************************/
 static int
 ixgbe_sysctl_advertise(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	int	       error = 0, advertise;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	advertise = adapter->advertise;
 	node.sysctl_data = &advertise;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if (error != 0 || newp == NULL)
 		return error;
 	return ixgbe_set_advertise(adapter, advertise);
 } /* ixgbe_sysctl_advertise */
 /************************************************************************
  * ixgbe_set_advertise - Control advertised link speed
+ *
  *   Flags:
  *     0x00 - Default (all capable link speed)
  *     0x01 - advertise 100 Mb
  *     0x02 - advertise 1G
  *     0x04 - advertise 10G
  *     0x08 - advertise 10 Mb
  *     0x10 - advertise 2.5G
  *     0x20 - advertise 5G
  ************************************************************************/
 static int
 ixgbe_set_advertise(struct adapter *adapter, int advertise)
+{
 	device_t	 dev;
 	struct ixgbe_hw	 *hw;
 	ixgbe_link_speed speed = 0;
 	ixgbe_link_speed link_caps = 0;
 	s32		 err = IXGBE_NOT_IMPLEMENTED;
 	bool		 negotiate = FALSE;
 	/* Checks to validate new value */
 	if (adapter->advertise == advertise) /* no change */
 		return (0);
 	dev = adapter->dev;
 	hw = &adapter->hw;
 	/* No speed changes for backplane media */
 	if (hw->phy.media_type == ixgbe_media_type_backplane)
 		return (ENODEV);
 	if (!((hw->phy.media_type == ixgbe_media_type_copper) ||
 	    (hw->phy.multispeed_fiber))) {
 		device_printf(dev,
 		    "Advertised speed can only be set on copper or "
 		    "multispeed fiber media types.\n");
 		return (EINVAL);
+	}
-	if (advertise < 0x0 || advertise > 0x2f) {
+	if (advertise < 0x0 || advertise > 0x3f) {
 		device_printf(dev,
-		    "Invalid advertised speed; valid modes are 0x0 through 0x7\n");
+		    "Invalid advertised speed; valid modes are 0x0 through 0x3f\n");
 		return (EINVAL);
+	}
 	if (hw->mac.ops.get_link_capabilities) {
 		err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
 		    &negotiate);
 		if (err != IXGBE_SUCCESS) {
 			device_printf(dev, "Unable to determine supported advertise speeds\n");
 			return (ENODEV);
+		}
+	}
 	/* Set new value and report new advertised mode */
 	if (advertise & 0x1) {
 		if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) {
 			device_printf(dev, "Interface does not support 100Mb advertised speed\n");
 			return (EINVAL);
+		}
 		speed |= IXGBE_LINK_SPEED_100_FULL;
+	}
 	if (advertise & 0x2) {
 		if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) {
 			device_printf(dev, "Interface does not support 1Gb advertised speed\n");
 			return (EINVAL);
+		}
 		speed |= IXGBE_LINK_SPEED_1GB_FULL;
+	}
 	if (advertise & 0x4) {
 		if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) {
 			device_printf(dev, "Interface does not support 10Gb advertised speed\n");
 			return (EINVAL);
+		}
 		speed |= IXGBE_LINK_SPEED_10GB_FULL;
+	}
 	if (advertise & 0x8) {
 		if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) {
 			device_printf(dev, "Interface does not support 10Mb advertised speed\n");
 			return (EINVAL);
+		}
 		speed |= IXGBE_LINK_SPEED_10_FULL;
+	}
 	if (advertise & 0x10) {
 		if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) {
 			device_printf(dev, "Interface does not support 2.5Gb advertised speed\n");
 			return (EINVAL);
+		}
 		speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
+	}
 	if (advertise & 0x20) {
 		if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) {
 			device_printf(dev, "Interface does not support 5Gb advertised speed\n");
 			return (EINVAL);
+		}
 		speed |= IXGBE_LINK_SPEED_5GB_FULL;
+	}
 	if (advertise == 0)
 		speed = link_caps; /* All capable link speed */
 	hw->mac.autotry_restart = TRUE;
 	hw->mac.ops.setup_link(hw, speed, TRUE);
 	adapter->advertise = advertise;
 	return (0);
 } /* ixgbe_set_advertise */
 /************************************************************************
  * ixgbe_get_advertise - Get current advertised speed settings
+ *
  *   Formatted for sysctl usage.
  *   Flags:
  *     0x01 - advertise 100 Mb
  *     0x02 - advertise 1G
  *     0x04 - advertise 10G
  *     0x08 - advertise 10 Mb (yes, Mb)
  *     0x10 - advertise 2.5G
  *     0x20 - advertise 5G
  ************************************************************************/
 static int
 ixgbe_get_advertise(struct adapter *adapter)
+{
 	struct ixgbe_hw	 *hw = &adapter->hw;
 	int		 speed;
 	ixgbe_link_speed link_caps = 0;
 	s32		 err;
 	bool		 negotiate = FALSE;
 	/*
 	 * Advertised speed means nothing unless it's copper or
 	 * multi-speed fiber
 	 */
 	if (!(hw->phy.media_type == ixgbe_media_type_copper) &&
 	    !(hw->phy.multispeed_fiber))
 		return (0);
 	err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate);
 	if (err != IXGBE_SUCCESS)
 		return (0);
 	speed =
 	    ((link_caps & IXGBE_LINK_SPEED_10GB_FULL)  ? 0x04 : 0) |
 	    ((link_caps & IXGBE_LINK_SPEED_1GB_FULL)   ? 0x02 : 0) |
 	    ((link_caps & IXGBE_LINK_SPEED_100_FULL)   ? 0x01 : 0) |
 	    ((link_caps & IXGBE_LINK_SPEED_10_FULL)    ? 0x08 : 0) |
 	    ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) |
 	    ((link_caps & IXGBE_LINK_SPEED_5GB_FULL)   ? 0x20 : 0);
 	return speed;
 } /* ixgbe_get_advertise */
 /************************************************************************
  * ixgbe_sysctl_dmac - Manage DMA Coalescing
+ *
  *   Control values:
  *     0/1 - off / on (use default value of 1000)
+ *
  *     Legal timer values are:
  *     50,100,250,500,1000,2000,5000,10000
+ *
  *     Turning off interrupt moderation will also turn this off.
  ************************************************************************/
 static int
 ixgbe_sysctl_dmac(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	struct ifnet   *ifp = adapter->ifp;
 	int	       error;
 	int	       newval;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	newval = adapter->dmac;
 	node.sysctl_data = &newval;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if ((error) || (newp == NULL))
 		return (error);
 	switch (newval) {
 	case 0:
 		/* Disabled */
 		adapter->dmac = 0;
 		break;
 	case 1:
 		/* Enable and use default */
 		adapter->dmac = 1000;
 		break;
 	case 50:
 	case 100:
 	case 250:
 	case 500:
 	case 1000:
 	case 2000:
 	case 5000:
 	case 10000:
 		/* Legal values - allow */
 		adapter->dmac = newval;
 		break;
 	default:
 		/* Do nothing, illegal value */
 		return (EINVAL);
+	}
 	/* Re-initialize hardware if it's already running */
 	if (ifp->if_flags & IFF_RUNNING)
 		ifp->if_init(ifp);
 	return (0);
+}
 #ifdef IXGBE_DEBUG
 /************************************************************************
  * ixgbe_sysctl_power_state
+ *
  *   Sysctl to test power states
  *   Values:
  *     0      - set device to D0
  *     3      - set device to D3
  *     (none) - get current device power state
  ************************************************************************/
 static int
 ixgbe_sysctl_power_state(SYSCTLFN_ARGS)
+{
 #ifdef notyet
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	device_t       dev =  adapter->dev;
 	int	       curr_ps, new_ps, error = 0;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	curr_ps = new_ps = pci_get_powerstate(dev);
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if ((error) || (req->newp == NULL))
 		return (error);
 	if (new_ps == curr_ps)
 		return (0);
 	if (new_ps == 3 && curr_ps == 0)
 		error = DEVICE_SUSPEND(dev);
 	else if (new_ps == 0 && curr_ps == 3)
 		error = DEVICE_RESUME(dev);
 	else
 		return (EINVAL);
 	device_printf(dev, "New state: %d\n", pci_get_powerstate(dev));
 	return (error);
 #else
 	return 0;
 #endif
 } /* ixgbe_sysctl_power_state */
 #endif
 /************************************************************************
  * ixgbe_sysctl_wol_enable
+ *
  *   Sysctl to enable/disable the WoL capability,
  *   if supported by the adapter.
+ *
  *   Values:
  *     0 - disabled
  *     1 - enabled
  ************************************************************************/
 static int
 ixgbe_sysctl_wol_enable(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter	*adapter = (struct adapter *)node.sysctl_data;
 	struct ixgbe_hw *hw = &adapter->hw;
 	bool		new_wol_enabled;
 	int		error = 0;
 	/*
 	 * It's not required to check recovery mode because this function never
 	 * touches hardware.
 	 */
 	new_wol_enabled = hw->wol_enabled;
 	node.sysctl_data = &new_wol_enabled;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if ((error) || (newp == NULL))
 		return (error);
 	if (new_wol_enabled == hw->wol_enabled)
 		return (0);
 	if (new_wol_enabled && !adapter->wol_support)
 		return (ENODEV);
 	else
 		hw->wol_enabled = new_wol_enabled;
 	return (0);
 } /* ixgbe_sysctl_wol_enable */
 /************************************************************************
  * ixgbe_sysctl_wufc - Wake Up Filter Control
+ *
  *   Sysctl to enable/disable the types of packets that the
  *   adapter will wake up on upon receipt.
  *   Flags:
  *     0x1  - Link Status Change
  *     0x2  - Magic Packet
  *     0x4  - Direct Exact
  *     0x8  - Directed Multicast
  *     0x10 - Broadcast
  *     0x20 - ARP/IPv4 Request Packet
  *     0x40 - Direct IPv4 Packet
  *     0x80 - Direct IPv6 Packet
+ *
  *   Settings not listed above will cause the sysctl to return an error.
  ************************************************************************/
 static int
 ixgbe_sysctl_wufc(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	int error = 0;
 	u32 new_wufc;
 	/*
 	 * It's not required to check recovery mode because this function never
 	 * touches hardware.
 	 */
 	new_wufc = adapter->wufc;
 	node.sysctl_data = &new_wufc;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if ((error) || (newp == NULL))
 		return (error);
 	if (new_wufc == adapter->wufc)
 		return (0);
 	if (new_wufc & 0xffffff00)
 		return (EINVAL);
 	new_wufc &= 0xff;
 	new_wufc |= (0xffffff & adapter->wufc);
 	adapter->wufc = new_wufc;
 	return (0);
 } /* ixgbe_sysctl_wufc */
 #ifdef IXGBE_DEBUG
 /************************************************************************
  * ixgbe_sysctl_print_rss_config
  ************************************************************************/
 static int
 ixgbe_sysctl_print_rss_config(SYSCTLFN_ARGS)
+{
 #ifdef notyet
 	struct sysctlnode node = *rnode;
 	struct adapter	*adapter = (struct adapter *)node.sysctl_data;
 	struct ixgbe_hw *hw = &adapter->hw;
 	device_t	dev = adapter->dev;
 	struct sbuf	*buf;
 	int		error = 0, reta_size;
 	u32		reg;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	buf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
 	if (!buf) {
 		device_printf(dev, "Could not allocate sbuf for output.\n");
 		return (ENOMEM);
+	}
 	// TODO: use sbufs to make a string to print out
 	/* Set multiplier for RETA setup and table size based on MAC */
 	switch (adapter->hw.mac.type) {
 	case ixgbe_mac_X550:
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		reta_size = 128;
 		break;
 	default:
 		reta_size = 32;
 		break;
+	}
 	/* Print out the redirection table */
 	sbuf_cat(buf, "\n");
 	for (int i = 0; i < reta_size; i++) {
 		if (i < 32) {
 			reg = IXGBE_READ_REG(hw, IXGBE_RETA(i));
 			sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg);
 		} else {
 			reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32));
 			sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg);
+		}
+	}
 	// TODO: print more config
 	error = sbuf_finish(buf);
 	if (error)
 		device_printf(dev, "Error finishing sbuf: %d\n", error);
 	sbuf_delete(buf);
 #endif
 	return (0);
 } /* ixgbe_sysctl_print_rss_config */
 #endif /* IXGBE_DEBUG */
 /************************************************************************
  * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY
+ *
  *   For X552/X557-AT devices using an external PHY
  ************************************************************************/
 static int
 ixgbe_sysctl_phy_temp(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter	*adapter = (struct adapter *)node.sysctl_data;
 	struct ixgbe_hw *hw = &adapter->hw;
 	int val;
 	u16 reg;
 	int		error;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
 		device_printf(adapter->dev,
 		    "Device has no supported external thermal sensor.\n");
 		return (ENODEV);
+	}
 	if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP,
 		IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &reg)) {
 		device_printf(adapter->dev,
 		    "Error reading from PHY's current temperature register\n");
 		return (EAGAIN);
+	}
 	node.sysctl_data = &val;
 	/* Shift temp for output */
 	val = reg >> 8;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if ((error) || (newp == NULL))
 		return (error);
 	return (0);
 } /* ixgbe_sysctl_phy_temp */
 /************************************************************************
  * ixgbe_sysctl_phy_overtemp_occurred
+ *
  *   Reports (directly from the PHY) whether the current PHY
  *   temperature is over the overtemp threshold.
  ************************************************************************/
 static int
 ixgbe_sysctl_phy_overtemp_occurred(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter	*adapter = (struct adapter *)node.sysctl_data;
 	struct ixgbe_hw *hw = &adapter->hw;
 	int val, error;
 	u16 reg;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
 		device_printf(adapter->dev,
 		    "Device has no supported external thermal sensor.\n");
 		return (ENODEV);
+	}
 	if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS,
 		IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &reg)) {
 		device_printf(adapter->dev,
 		    "Error reading from PHY's temperature status register\n");
 		return (EAGAIN);
+	}
 	node.sysctl_data = &val;
 	/* Get occurrence bit */
 	val = !!(reg & 0x4000);
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if ((error) || (newp == NULL))
 		return (error);
 	return (0);
 } /* ixgbe_sysctl_phy_overtemp_occurred */
 /************************************************************************
  * ixgbe_sysctl_eee_state
+ *
  *   Sysctl to set EEE power saving feature
  *   Values:
  *     0      - disable EEE
  *     1      - enable EEE
  *     (none) - get current device EEE state
  ************************************************************************/
 static int
 ixgbe_sysctl_eee_state(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	struct ifnet   *ifp = adapter->ifp;
 	device_t       dev = adapter->dev;
 	int	       curr_eee, new_eee, error = 0;
 	s32	       retval;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	curr_eee = new_eee = !!(adapter->feat_en & IXGBE_FEATURE_EEE);
 	node.sysctl_data = &new_eee;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if ((error) || (newp == NULL))
 		return (error);
 	/* Nothing to do */
 	if (new_eee == curr_eee)
 		return (0);
 	/* Not supported */
 	if (!(adapter->feat_cap & IXGBE_FEATURE_EEE))
 		return (EINVAL);
 	/* Bounds checking */
 	if ((new_eee < 0) || (new_eee > 1))
 		return (EINVAL);
 	retval = ixgbe_setup_eee(&adapter->hw, new_eee);
 	if (retval) {
 		device_printf(dev, "Error in EEE setup: 0x%08X\n", retval);
 		return (EINVAL);
+	}
 	/* Restart auto-neg */
 	ifp->if_init(ifp);
 	device_printf(dev, "New EEE state: %d\n", new_eee);
 	/* Cache new value */
 	if (new_eee)
 		adapter->feat_en |= IXGBE_FEATURE_EEE;
 	else
 		adapter->feat_en &= ~IXGBE_FEATURE_EEE;
 	return (error);
 } /* ixgbe_sysctl_eee_state */
 #define PRINTQS(adapter, regname)					\
 	do {								\
 		struct ixgbe_hw	*_hw = &(adapter)->hw;			\
 		int _i;							\
+									\
 		printf("%s: %s", device_xname((adapter)->dev), #regname); \
 		for (_i = 0; _i < (adapter)->num_queues; _i++) {	\
 			printf((_i == 0) ? "\t" : " ");			\
 			printf("%08x", IXGBE_READ_REG(_hw,		\
 				IXGBE_##regname(_i)));			\
 		}							\
 		printf("\n");						\
 	} while (0)
 /************************************************************************
  * ixgbe_print_debug_info
+ *
  *   Called only when em_display_debug_stats is enabled.
  *   Provides a way to take a look at important statistics
  *   maintained by the driver and hardware.
  ************************************************************************/
 static void
 ixgbe_print_debug_info(struct adapter *adapter)
+{
 	device_t	dev = adapter->dev;
 	struct ixgbe_hw *hw = &adapter->hw;
 	int table_size;
 	int i;
 	switch (adapter->hw.mac.type) {
 	case ixgbe_mac_X550:
 	case ixgbe_mac_X550EM_x:
 	case ixgbe_mac_X550EM_a:
 		table_size = 128;
 		break;
 	default:
 		table_size = 32;
 		break;
+	}
 	device_printf(dev, "[E]RETA:\n");
 	for (i = 0; i < table_size; i++) {
 		if (i < 32)
 			printf("%02x: %08x\n", i, IXGBE_READ_REG(hw,
 				IXGBE_RETA(i)));
 		else
 			printf("%02x: %08x\n", i, IXGBE_READ_REG(hw,
 				IXGBE_ERETA(i - 32)));
+	}
 	device_printf(dev, "queue:");
 	for (i = 0; i < adapter->num_queues; i++) {
 		printf((i == 0) ? "\t" : " ");
 		printf("%8d", i);
+	}
 	printf("\n");
 	PRINTQS(adapter, RDBAL);
 	PRINTQS(adapter, RDBAH);
 	PRINTQS(adapter, RDLEN);
 	PRINTQS(adapter, SRRCTL);
 	PRINTQS(adapter, RDH);
 	PRINTQS(adapter, RDT);
 	PRINTQS(adapter, RXDCTL);
 	device_printf(dev, "RQSMR:");
 	for (i = 0; i < adapter->num_queues / 4; i++) {
 		printf((i == 0) ? "\t" : " ");
 		printf("%08x", IXGBE_READ_REG(hw, IXGBE_RQSMR(i)));
+	}
 	printf("\n");
 	device_printf(dev, "disabled_count:");
 	for (i = 0; i < adapter->num_queues; i++) {
 		printf((i == 0) ? "\t" : " ");
 		printf("%8d", adapter->queues[i].disabled_count);
+	}
 	printf("\n");
 	device_printf(dev, "EIMS:\t%08x\n", IXGBE_READ_REG(hw, IXGBE_EIMS));
 	if (hw->mac.type != ixgbe_mac_82598EB) {
 		device_printf(dev, "EIMS_EX(0):\t%08x\n",
 			      IXGBE_READ_REG(hw, IXGBE_EIMS_EX(0)));
 		device_printf(dev, "EIMS_EX(1):\t%08x\n",
 			      IXGBE_READ_REG(hw, IXGBE_EIMS_EX(1)));
+	}
 } /* ixgbe_print_debug_info */
 /************************************************************************
  * ixgbe_sysctl_debug
  ************************************************************************/
 static int
 ixgbe_sysctl_debug(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	int	       error, result = 0;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	node.sysctl_data = &result;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if (error || newp == NULL)
 		return error;
 	if (result == 1)
 		ixgbe_print_debug_info(adapter);
 	return 0;
 } /* ixgbe_sysctl_debug */
 /************************************************************************
  * ixgbe_init_device_features
  ************************************************************************/
 static void
 ixgbe_init_device_features(struct adapter *adapter)
+{
 	adapter->feat_cap = IXGBE_FEATURE_NETMAP
 			  | IXGBE_FEATURE_RSS
 			  | IXGBE_FEATURE_MSI
 			  | IXGBE_FEATURE_MSIX
 			  | IXGBE_FEATURE_LEGACY_IRQ
 			  | IXGBE_FEATURE_LEGACY_TX;
 	/* Set capabilities first... */
 	switch (adapter->hw.mac.type) {
 	case ixgbe_mac_82598EB:
 		if (adapter->hw.device_id == IXGBE_DEV_ID_82598AT)
 			adapter->feat_cap |= IXGBE_FEATURE_FAN_FAIL;
 		break;
 	case ixgbe_mac_X540:
 		adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
 		adapter->feat_cap |= IXGBE_FEATURE_FDIR;
 		if ((adapter->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) &&
 		    (adapter->hw.bus.func == 0))
 			adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
 		break;
 	case ixgbe_mac_X550:
 		/*
 		 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading
 		 * NVM Image version.
 		 */
 		adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
 		adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
 		adapter->feat_cap |= IXGBE_FEATURE_FDIR;
 		break;
 	case ixgbe_mac_X550EM_x:
 		/*
 		 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading
 		 * NVM Image version.
 		 */
 		adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
 		adapter->feat_cap |= IXGBE_FEATURE_FDIR;
 		break;
 	case ixgbe_mac_X550EM_a:
 		/*
 		 * IXGBE_FEATURE_RECOVERY_MODE will be set after reading
 		 * NVM Image version.
 		 */
 		adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
 		adapter->feat_cap |= IXGBE_FEATURE_FDIR;
 		adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
 		if ((adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) ||
 		    (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) {
 			adapter->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
 			adapter->feat_cap |= IXGBE_FEATURE_EEE;
+		}
 		break;
 	case ixgbe_mac_82599EB:
 		adapter->feat_cap |= IXGBE_FEATURE_SRIOV;
 		adapter->feat_cap |= IXGBE_FEATURE_FDIR;
 		if ((adapter->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) &&
 		    (adapter->hw.bus.func == 0))
 			adapter->feat_cap |= IXGBE_FEATURE_BYPASS;
 		if (adapter->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP)
 			adapter->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
 		break;
 	default:
 		break;
+	}
 	/* Enabled by default... */
 	/* Fan failure detection */
 	if (adapter->feat_cap & IXGBE_FEATURE_FAN_FAIL)
 		adapter->feat_en |= IXGBE_FEATURE_FAN_FAIL;
 	/* Netmap */
 	if (adapter->feat_cap & IXGBE_FEATURE_NETMAP)
 		adapter->feat_en |= IXGBE_FEATURE_NETMAP;
 	/* EEE */
 	if (adapter->feat_cap & IXGBE_FEATURE_EEE)
 		adapter->feat_en |= IXGBE_FEATURE_EEE;
 	/* Thermal Sensor */
 	if (adapter->feat_cap & IXGBE_FEATURE_TEMP_SENSOR)
 		adapter->feat_en |= IXGBE_FEATURE_TEMP_SENSOR;
 	/*
 	 * Recovery mode:
 	 * NetBSD: IXGBE_FEATURE_RECOVERY_MODE will be controlled after reading
 	 * NVM Image version.
 	 */
 	/* Enabled via global sysctl... */
 	/* Flow Director */
 	if (ixgbe_enable_fdir) {
 		if (adapter->feat_cap & IXGBE_FEATURE_FDIR)
 			adapter->feat_en |= IXGBE_FEATURE_FDIR;
 		else
 			device_printf(adapter->dev, "Device does not support Flow Director. Leaving disabled.");
+	}
 	/* Legacy (single queue) transmit */
 	if ((adapter->feat_cap & IXGBE_FEATURE_LEGACY_TX) &&
 	    ixgbe_enable_legacy_tx)
 		adapter->feat_en |= IXGBE_FEATURE_LEGACY_TX;
 	/*
 	 * Message Signal Interrupts - Extended (MSI-X)
 	 * Normal MSI is only enabled if MSI-X calls fail.
 	 */
 	if (!ixgbe_enable_msix)
 		adapter->feat_cap &= ~IXGBE_FEATURE_MSIX;
 	/* Receive-Side Scaling (RSS) */
 	if ((adapter->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss)
 		adapter->feat_en |= IXGBE_FEATURE_RSS;
 	/* Disable features with unmet dependencies... */
 	/* No MSI-X */
 	if (!(adapter->feat_cap & IXGBE_FEATURE_MSIX)) {
 		adapter->feat_cap &= ~IXGBE_FEATURE_RSS;
 		adapter->feat_cap &= ~IXGBE_FEATURE_SRIOV;
 		adapter->feat_en &= ~IXGBE_FEATURE_RSS;
 		adapter->feat_en &= ~IXGBE_FEATURE_SRIOV;
+	}
 } /* ixgbe_init_device_features */
 /************************************************************************
  * ixgbe_probe - Device identification routine
+ *
  *   Determines if the driver should be loaded on
  *   adapter based on its PCI vendor/device ID.
+ *
  *   return BUS_PROBE_DEFAULT on success, positive on failure
  ************************************************************************/
 static int
 ixgbe_probe(device_t dev, cfdata_t cf, void *aux)
+{
 	const struct pci_attach_args *pa = aux;
 	return (ixgbe_lookup(pa) != NULL) ? 1 : 0;
+}
 static const ixgbe_vendor_info_t *
 ixgbe_lookup(const struct pci_attach_args *pa)
+{
 	const ixgbe_vendor_info_t *ent;
 	pcireg_t subid;
 	INIT_DEBUGOUT("ixgbe_lookup: begin");
 	if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID)
 		return NULL;
 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
 	for (ent = ixgbe_vendor_info_array; ent->vendor_id != 0; ent++) {
 		if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) &&
 		    (PCI_PRODUCT(pa->pa_id) == ent->device_id) &&
 		    ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) ||
 			(ent->subvendor_id == 0)) &&
 		    ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) ||
 			(ent->subdevice_id == 0))) {
 			return ent;
+		}
+	}
 	return NULL;
+}
 static int
 ixgbe_ifflags_cb(struct ethercom *ec)
+{
 	struct ifnet *ifp = &ec->ec_if;
 	struct adapter *adapter = ifp->if_softc;
 	u_short change;
 	int rv = 0;
 	IXGBE_CORE_LOCK(adapter);
 	change = ifp->if_flags ^ adapter->if_flags;
 	if (change != 0)
 		adapter->if_flags = ifp->if_flags;
 	if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) {
 		rv = ENETRESET;
 		goto out;
 	} else if ((change & IFF_PROMISC) != 0)
 		ixgbe_set_rxfilter(adapter);
 	/* Check for ec_capenable. */
 	change = ec->ec_capenable ^ adapter->ec_capenable;
 	adapter->ec_capenable = ec->ec_capenable;
 	if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING
 	    | ETHERCAP_VLAN_HWFILTER)) != 0) {
 		rv = ENETRESET;
 		goto out;
+	}
 	/*
 	 * Special handling is not required for ETHERCAP_VLAN_MTU.
 	 * MAXFRS(MHADD) does not include the 4bytes of the VLAN header.
 	 */
 	/* Set up VLAN support and filter */
 	if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0)
 		ixgbe_setup_vlan_hw_support(adapter);
 out:
 	IXGBE_CORE_UNLOCK(adapter);
 	return rv;
+}
 /************************************************************************
  * ixgbe_ioctl - Ioctl entry point
+ *
  *   Called when the user wants to configure the interface.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static int
 ixgbe_ioctl(struct ifnet *ifp, u_long command, void *data)
+{
 	struct adapter	*adapter = ifp->if_softc;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ifcapreq *ifcr = data;
 	struct ifreq	*ifr = data;
 	int		error = 0;
 	int l4csum_en;
 	const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
 	     IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx;
 	if (ixgbe_fw_recovery_mode_swflag(adapter))
 		return (EPERM);
 	switch (command) {
 	case SIOCSIFFLAGS:
 		IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)");
 		break;
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI");
 		break;
 	case SIOCSIFMEDIA:
 	case SIOCGIFMEDIA:
 		IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)");
 		break;
 	case SIOCSIFCAP:
 		IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)");
 		break;
 	case SIOCSIFMTU:
 		IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)");
 		break;
 #ifdef __NetBSD__
 	case SIOCINITIFADDR:
 		IOCTL_DEBUGOUT("ioctl: SIOCINITIFADDR");
 		break;
 	case SIOCGIFFLAGS:
 		IOCTL_DEBUGOUT("ioctl: SIOCGIFFLAGS");
 		break;
 	case SIOCGIFAFLAG_IN:
 		IOCTL_DEBUGOUT("ioctl: SIOCGIFAFLAG_IN");
 		break;
 	case SIOCGIFADDR:
 		IOCTL_DEBUGOUT("ioctl: SIOCGIFADDR");
 		break;
 	case SIOCGIFMTU:
 		IOCTL_DEBUGOUT("ioctl: SIOCGIFMTU (Get Interface MTU)");
 		break;
 	case SIOCGIFCAP:
 		IOCTL_DEBUGOUT("ioctl: SIOCGIFCAP (Get IF cap)");
 		break;
 	case SIOCGETHERCAP:
 		IOCTL_DEBUGOUT("ioctl: SIOCGETHERCAP (Get ethercap)");
 		break;
 	case SIOCGLIFADDR:
 		IOCTL_DEBUGOUT("ioctl: SIOCGLIFADDR (Get Interface addr)");
 		break;
 	case SIOCZIFDATA:
 		IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)");
 		hw->mac.ops.clear_hw_cntrs(hw);
 		ixgbe_clear_evcnt(adapter);
 		break;
 	case SIOCAIFADDR:
 		IOCTL_DEBUGOUT("ioctl: SIOCAIFADDR (add/chg IF alias)");
 		break;
 #endif
 	default:
 		IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command);
 		break;
+	}
 	switch (command) {
 	case SIOCGI2C:
+	{
 		struct ixgbe_i2c_req	i2c;
 		IOCTL_DEBUGOUT("ioctl: SIOCGI2C (Get I2C Data)");
 		error = copyin(ifr->ifr_data, &i2c, sizeof(i2c));
 		if (error != 0)
 			break;
 		if (i2c.dev_addr != 0xA0 && i2c.dev_addr != 0xA2) {
 			error = EINVAL;
 			break;
+		}
 		if (i2c.len > sizeof(i2c.data)) {
 			error = EINVAL;
 			break;
+		}
 		hw->phy.ops.read_i2c_byte(hw, i2c.offset,
 		    i2c.dev_addr, i2c.data);
 		error = copyout(&i2c, ifr->ifr_data, sizeof(i2c));
 		break;
+	}
 	case SIOCSIFCAP:
 		/* Layer-4 Rx checksum offload has to be turned on and
 		 * off as a unit.
 		 */
 		l4csum_en = ifcr->ifcr_capenable & l4csum;
 		if (l4csum_en != l4csum && l4csum_en != 0)
 			return EINVAL;
 		/*FALLTHROUGH*/
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 	case SIOCSIFFLAGS:
 	case SIOCSIFMTU:
 	default:
 		if ((error = ether_ioctl(ifp, command, data)) != ENETRESET)
 			return error;
 		if ((ifp->if_flags & IFF_RUNNING) == 0)
+			;
 		else if (command == SIOCSIFCAP || command == SIOCSIFMTU) {
 			IXGBE_CORE_LOCK(adapter);
 			if ((ifp->if_flags & IFF_RUNNING) != 0)
 				ixgbe_init_locked(adapter);
 			ixgbe_recalculate_max_frame(adapter);
 			IXGBE_CORE_UNLOCK(adapter);
 		} else if (command == SIOCADDMULTI || command == SIOCDELMULTI) {
 			/*
 			 * Multicast list has changed; set the hardware filter
 			 * accordingly.
 			 */
 			IXGBE_CORE_LOCK(adapter);
 			ixgbe_disable_intr(adapter);
 			ixgbe_set_rxfilter(adapter);
 			ixgbe_enable_intr(adapter);
 			IXGBE_CORE_UNLOCK(adapter);
+		}
 		return 0;
+	}
 	return error;
 } /* ixgbe_ioctl */
 /************************************************************************
  * ixgbe_check_fan_failure
  ************************************************************************/
 static void
 ixgbe_check_fan_failure(struct adapter *adapter, u32 reg, bool in_interrupt)
+{
 	u32 mask;
 	mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&adapter->hw) :
 	    IXGBE_ESDP_SDP1;
 	if (reg & mask)
 		device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n");
 } /* ixgbe_check_fan_failure */
 /************************************************************************
  * ixgbe_handle_que
  ************************************************************************/
 static void
 ixgbe_handle_que(void *context)
+{
 	struct ix_queue *que = context;
 	struct adapter	*adapter = que->adapter;
 	struct tx_ring	*txr = que->txr;
 	struct ifnet	*ifp = adapter->ifp;
 	bool		more = false;

 @@ -1,772 +1,773 @@
-/* $NetBSD: ixgbe.h,v 1.56.2.3 2020/07/10 11:35:51 martin Exp $ */
+/* $NetBSD: ixgbe.h,v 1.56.2.4 2021/03/11 16:00:24 martin Exp $ */
 /******************************************************************************
   SPDX-License-Identifier: BSD-3-Clause
   Copyright (c) 2001-2017, Intel Corporation
   All rights reserved.
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
 . Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
 . Redistributions in binary form must reproduce the above copyright
       notice, this list of conditions and the following disclaimer in the
       documentation and/or other materials provided with the distribution.
 . Neither the name of the Intel Corporation nor the names of its
       contributors may be used to endorse or promote products derived from
       this software without specific prior written permission.
   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   POSSIBILITY OF SUCH DAMAGE.
 ******************************************************************************/
 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 327031 2017-12-20 18:15:06Z erj $*/
 /*
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Coyote Point Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #ifndef _IXGBE_H_
 #define _IXGBE_H_
 #include <sys/param.h>
 #include <sys/reboot.h>
 #include <sys/systm.h>
 #include <sys/pcq.h>
 #include <sys/mbuf.h>
 #include <sys/protosw.h>
 #include <sys/socket.h>
 #include <sys/malloc.h>
 #include <sys/kernel.h>
 #include <sys/module.h>
 #include <sys/sockio.h>
 #include <sys/percpu.h>
 #include <net/if.h>
 #include <net/if_arp.h>
 #include <net/bpf.h>
 #include <net/if_ether.h>
 #include <net/if_dl.h>
 #include <net/if_media.h>
 #include <net/if_types.h>
 #include <net/if_vlanvar.h>
 #include <netinet/in_systm.h>
 #include <netinet/in.h>
 #include <netinet/ip.h>
 #include <netinet/ip6.h>
 #include <netinet/tcp.h>
 #include <netinet/udp.h>
 #include <sys/bus.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
 #include <sys/proc.h>
 #include <sys/sysctl.h>
 #include <sys/endian.h>
 #include <sys/workqueue.h>
 #include <sys/cpu.h>
 #include <sys/interrupt.h>
 #include <sys/bitops.h>
 #include "ixgbe_netbsd.h"
 #include "ixgbe_api.h"
 #include "ixgbe_common.h"
 #include "ixgbe_vf.h"
 #include "ixgbe_features.h"
 /* Tunables */
 /*
  * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
  * number of transmit descriptors allocated by the driver. Increasing this
  * value allows the driver to queue more transmits. Each descriptor is 16
  * bytes. Performance tests have show the 2K value to be optimal for top
  * performance.
  */
 #define DEFAULT_TXD	1024
 #define PERFORM_TXD	2048
 #define MAX_TXD		4096
 #define MIN_TXD		64
 /*
  * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
  * number of receive descriptors allocated for each RX queue. Increasing this
  * value allows the driver to buffer more incoming packets. Each descriptor
  * is 16 bytes.  A receive buffer is also allocated for each descriptor.
+ *
  * Note: with 8 rings and a dual port card, it is possible to bump up
  *	against the system mbuf pool limit, you can tune nmbclusters
  *	to adjust for this.
  */
 #define DEFAULT_RXD	1024
 #define PERFORM_RXD	2048
 #define MAX_RXD		4096
 #define MIN_RXD		64
 /* Alignment for rings */
 #define DBA_ALIGN	128
 /*
  * This is the max watchdog interval, ie. the time that can
  * pass between any two TX clean operations, such only happening
  * when the TX hardware is functioning.
  */
 #define IXGBE_WATCHDOG  (10 * hz)
 /*
  * This parameters control when the driver calls the routine to reclaim
  * transmit descriptors.
  */
 #define IXGBE_TX_CLEANUP_THRESHOLD(_a)  ((_a)->num_tx_desc / 8)
 #define IXGBE_TX_OP_THRESHOLD(_a)       ((_a)->num_tx_desc / 32)
 /* These defines are used in MTU calculations */
 #define IXGBE_MAX_FRAME_SIZE  9728
 #define IXGBE_MTU_HDR         (ETHER_HDR_LEN + ETHER_CRC_LEN)
 #define IXGBE_MTU_HDR_VLAN    (ETHER_HDR_LEN + ETHER_CRC_LEN + \
                                ETHER_VLAN_ENCAP_LEN)
 #define IXGBE_MAX_MTU         (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
 #define IXGBE_MAX_MTU_VLAN    (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN)
 /* Flow control constants */
 #define IXGBE_FC_PAUSE        0xFFFF
 /*
  * Used for optimizing small rx mbufs.  Effort is made to keep the copy
  * small and aligned for the CPU L1 cache.
+ *
  * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
  * 32 byte alignment needed for the fast bcopy results in 8 bytes being
  * wasted.  Getting 64 byte alignment, which _should_ be ideal for
  * modern Intel CPUs, results in 40 bytes wasted and a significant drop
  * in observed efficiency of the optimization, 97.9% -> 81.8%.
  */
 #define	MPKTHSIZE		(offsetof(struct _mbuf_dummy, m_pktdat))
 #define IXGBE_RX_COPY_HDR_PADDED  ((((MPKTHSIZE - 1) / 32) + 1) * 32)
 #define IXGBE_RX_COPY_LEN         (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
 #define IXGBE_RX_COPY_ALIGN       (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
 /* Keep older OS drivers building... */
 #if !defined(SYSCTL_ADD_UQUAD)
 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
 #endif
 /* Defines for printing debug information */
 #define DEBUG_INIT  0
 #define DEBUG_IOCTL 0
 #define DEBUG_HW    0
 #define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
 #define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
 #define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
 #define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
 #define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
 #define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
 #define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
 #define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
 #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
 #define MAX_NUM_MULTICAST_ADDRESSES     128
 #define IXGBE_82598_SCATTER             100
 #define IXGBE_82599_SCATTER             32
 #define MSIX_82598_BAR                  3
 #define MSIX_82599_BAR                  4
 #define IXGBE_TSO_SIZE                  262140
 #define IXGBE_RX_HDR                    128
 #define IXGBE_VFTA_SIZE                 128
-#define IXGBE_BR_SIZE                   4096
+#define IXGBE_BR_SIZE                   2048
 #define IXGBE_QUEUE_MIN_FREE            32
 #define IXGBE_MAX_TX_BUSY               10
 #define IXGBE_QUEUE_HUNG                0x80000000
 #define IXGBE_EITR_DEFAULT		128
 /* IOCTL define to gather SFP+ Diagnostic data */
 #define SIOCGI2C	SIOCGIFGENERIC
 /* Offload bits in mbuf flag */
 #define	M_CSUM_OFFLOAD	\
     (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6)
 /* Backward compatibility items for very old versions */
 #ifndef pci_find_cap
 #define pci_find_cap pci_find_extcap
 #endif
 #ifndef DEVMETHOD_END
 #define DEVMETHOD_END { NULL, NULL }
 #endif
 /*
  * Interrupt Moderation parameters
  */
 #define IXGBE_LOW_LATENCY	128
 #define IXGBE_AVE_LATENCY	400
 #define IXGBE_BULK_LATENCY	1200
 /* Using 1FF (the max value), the interval is ~1.05ms */
 #define IXGBE_LINK_ITR_QUANTA  0x1FF
 #define IXGBE_LINK_ITR         ((IXGBE_LINK_ITR_QUANTA << 3) & \
                                 IXGBE_EITR_ITR_INT_MASK)
 /************************************************************************
  * vendor_info_array
+ *
  *   Contains the list of Subvendor/Subdevice IDs on
  *   which the driver should load.
  ************************************************************************/
 typedef struct _ixgbe_vendor_info_t {
 	unsigned int vendor_id;
 	unsigned int device_id;
 	unsigned int subvendor_id;
 	unsigned int subdevice_id;
 	unsigned int index;
 } ixgbe_vendor_info_t;
 /* This is used to get SFP+ module data */
 struct ixgbe_i2c_req {
 	u8 dev_addr;
 	u8 offset;
 	u8 len;
 	u8 data[8];
 };
 struct ixgbe_bp_data {
 	u32 low;
 	u32 high;
 	u32 log;
 };
 struct ixgbe_tx_buf {
 	union ixgbe_adv_tx_desc	*eop;
 	struct mbuf             *m_head;
 	bus_dmamap_t            map;
 };
 struct ixgbe_rx_buf {
 	struct mbuf    *buf;
 	struct mbuf    *fmp;
 	bus_dmamap_t   pmap;
 	u_int          flags;
 #define IXGBE_RX_COPY  0x01
 	uint64_t       addr;
 };
 /*
  * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free
  */
 struct ixgbe_dma_alloc {
 	bus_addr_t        dma_paddr;
 	void              *dma_vaddr;
 	ixgbe_dma_tag_t   *dma_tag;
 	bus_dmamap_t      dma_map;
 	bus_dma_segment_t dma_seg;
 	bus_size_t        dma_size;
 };
 struct ixgbe_mc_addr {
 	u8  addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
 	u32 vmdq;
 };
 /*
  * Driver queue struct: this is the interrupt container
  *                      for the associated tx and rx ring.
  */
 struct ix_queue {
 	struct adapter   *adapter;
 	u32              msix;           /* This queue's MSI-X vector */
 	u32              eitr_setting;
 	u32              me;
 	struct resource  *res;
 	int              busy;
 	struct tx_ring   *txr;
 	struct rx_ring   *rxr;
 	struct work      wq_cookie;
 	void             *que_si;
 	/* Per queue event conters */
 	struct evcnt     irqs;		/* Hardware interrupt */
 	struct evcnt     handleq;	/* software_interrupt */
 	struct evcnt     req;		/* deferred */
 	char             namebuf[32];
 	char             evnamebuf[32];
 	/* Lock for disabled_count and this queue's EIMS/EIMC bit */
 	kmutex_t         dc_mtx;
 	/*
 	 * disabled_count means:
 	 *     0   : this queue is enabled
 	 *     > 0 : this queue is disabled
 	 *           the value is ixgbe_disable_queue() called count
 	 */
 	int              disabled_count;
 	bool             txrx_use_workqueue;
 };
 /*
  * The transmit ring, one per queue
  */
 struct tx_ring {
 	struct adapter		*adapter;
 	kmutex_t		tx_mtx;
 	u32			me;
 	u32			tail;
 	int			busy;
 	union ixgbe_adv_tx_desc	*tx_base;
 	struct ixgbe_tx_buf	*tx_buffers;
 	struct ixgbe_dma_alloc	txdma;
 	volatile u16		tx_avail;
 	u16			next_avail_desc;
 	u16			next_to_clean;
 	u16			num_desc;
 	ixgbe_dma_tag_t		*txtag;
 #if 0
 	char			mtx_name[16]; /* NetBSD has no mutex name */
 #endif
 	pcq_t			*txr_interq;
 	struct work		wq_cookie;
 	void			*txr_si;
 	bool			txr_no_space; /* Like IFF_OACTIVE */
 	/* Flow Director */
 	u16			atr_sample;
 	u16			atr_count;
 	u64			bytes;  /* Used for AIM */
 	u64			packets;
 	/* Soft Stats */
 	struct evcnt		tso_tx;
 	struct evcnt		no_desc_avail;
 	struct evcnt		total_packets;
 	struct evcnt		pcq_drops;
 	/* Per queue conters.  The adapter total is in struct adapter */
 	u64              q_efbig_tx_dma_setup;
 	u64              q_mbuf_defrag_failed;
 	u64              q_efbig2_tx_dma_setup;
 	u64              q_einval_tx_dma_setup;
 	u64              q_other_tx_dma_setup;
 	u64              q_eagain_tx_dma_setup;
 	u64              q_enomem_tx_dma_setup;
 	u64              q_tso_err;
 };
 /*
  * The Receive ring, one per rx queue
  */
 struct rx_ring {
 	struct adapter		*adapter;
 	kmutex_t		rx_mtx;
 	u32			me;
 	u32			tail;
 	union ixgbe_adv_rx_desc	*rx_base;
 	struct ixgbe_dma_alloc	rxdma;
 #ifdef LRO
 	struct lro_ctrl		lro;
 #endif /* LRO */
 	bool			lro_enabled;
 	bool			hw_rsc;
 	bool			vtag_strip;
 	u16			next_to_refresh;
 	u16			next_to_check;
 	u16			num_desc;
 	u16			mbuf_sz;
 #if 0
 	char			mtx_name[16]; /* NetBSD has no mutex name */
 #endif
 	struct ixgbe_rx_buf	*rx_buffers;
 	ixgbe_dma_tag_t		*ptag;
 	u16			last_rx_mbuf_sz;
 	u32			last_num_rx_desc;
 	ixgbe_extmem_head_t	jcl_head;
 	u64			bytes; /* Used for AIM calc */
 	u64			packets;
 	/* Soft stats */
 	struct evcnt		rx_copies;
 	struct evcnt		rx_packets;
 	struct evcnt		rx_bytes;
 	struct evcnt		rx_discarded;
 	struct evcnt		no_jmbuf;
 	u64			rsc_num;
 	/* Flow Director */
 	u64			flm;
 };
 struct ixgbe_vf {
 	u_int    pool;
 	u_int    rar_index;
 	u_int    max_frame_size;
 	uint32_t flags;
 	uint8_t  ether_addr[ETHER_ADDR_LEN];
 	uint16_t mc_hash[IXGBE_MAX_VF_MC];
 	uint16_t num_mc_hashes;
 	uint16_t default_vlan;
 	uint16_t vlan_tag;
 	uint16_t api_ver;
 };
 /*
  * NetBSD: For trafic class
  * Crrently, the following structure is only for statistics.
  */
 struct ixgbe_tc {
 	char             evnamebuf[32];
 };
 /* Our adapter structure */
 struct adapter {
 	struct ixgbe_hw		hw;
 	struct ixgbe_osdep	osdep;
 	device_t		dev;
 	struct ifnet		*ifp;
 	struct if_percpuq	*ipq;	/* softint-based input queues */
 	struct resource		*pci_mem;
 	struct resource		*msix_mem;
 	/* NetBSD: Interrupt resources are in osdep */
 	struct ifmedia		media;
 	callout_t		timer;
 	u_short			if_flags;	/* saved ifp->if_flags */
 	int			ec_capenable;	/* saved ec->ec_capenable */
 	kmutex_t		core_mtx;
 	unsigned int		num_queues;
 	/*
 	 * Shadow VFTA table, this is needed because
 	 * the real vlan filter table gets cleared during
 	 * a soft reset and the driver needs to be able
 	 * to repopulate it.
 	 */
 	u32			shadow_vfta[IXGBE_VFTA_SIZE];
 	/* Info about the interface */
 	int			advertise;  /* link speeds */
 	bool			enable_aim; /* adaptive interrupt moderation */
 	int			link_active; /* Use LINK_STATE_* value */
 	u16			max_frame_size;
 	u16			num_segs;
 	u32			link_speed;
 	bool			link_up;
 	u32			vector;
 	u16			dmac;
 	u32			phy_layer;
 	/* Power management-related */
 	bool			wol_support;
 	u32			wufc;
 	/* Mbuf cluster size */
 	u32			rx_mbuf_sz;
 	/* Support for pluggable optics */
 	bool			sfp_probe;
 	void			*link_si;  /* Link tasklet */
 	void			*mod_si;   /* SFP tasklet */
 	void			*msf_si;   /* Multispeed Fiber */
 	void			*mbx_si;   /* VF -> PF mailbox interrupt */
 	/* Flow Director */
 	int			fdir_reinit;
 	void			*fdir_si;
 	void			*phy_si;   /* PHY intr tasklet */
 	bool			txrx_use_workqueue;
 	/*
 	 * Workqueue for ixgbe_handle_que_work().
+	 *
 	 * que_wq's "enqueued flag" is not required, because twice
 	 * workqueue_enqueue() for ixgbe_handle_que_work() is avoided by
 	 * masking the queue's interrupt by EIMC. See also ixgbe_msix_que().
 	 */
 	struct workqueue	*que_wq;
 	/* Workqueue for ixgbe_deferred_mq_start_work() */
 	struct workqueue	*txr_wq;
 	percpu_t		*txr_wq_enqueued;
 	/*
 	 * Queues:
 	 *   This is the irq holder, it has
 	 *   and RX/TX pair or rings associated
 	 *   with it.
 	 */
 	struct ix_queue		*queues;
 	/*
 	 * Transmit rings
 	 *      Allocated at run time, an array of rings
 	 */
 	struct tx_ring		*tx_rings;
 	u32			num_tx_desc;
 	u32			tx_process_limit;
 	/*
 	 * Receive rings
 	 *      Allocated at run time, an array of rings
 	 */
 	struct rx_ring		*rx_rings;
 	u64			active_queues;
 	u32			num_rx_desc;
 	u32			rx_process_limit;
 	int			num_jcl;
 	/* Multicast array memory */
 	struct ixgbe_mc_addr	*mta;
 	/* SR-IOV */
 	int                     iov_mode;
 	int			num_vfs;
 	int			pool;
 	struct ixgbe_vf		*vfs;
 	/* Bypass */
 	struct ixgbe_bp_data    bypass;
 	/* Netmap */
 	void			(*init_locked)(struct adapter *);
 	void			(*stop_locked)(void *);
 	/* Firmware error check */
 	u_int                   recovery_mode;
 	struct callout          recovery_mode_timer;
 	/* Misc stats maintained by the driver */
 	struct evcnt		efbig_tx_dma_setup;
 	struct evcnt		mbuf_defrag_failed;
 	struct evcnt		efbig2_tx_dma_setup;
 	struct evcnt		einval_tx_dma_setup;
 	struct evcnt		other_tx_dma_setup;
 	struct evcnt		eagain_tx_dma_setup;
 	struct evcnt		enomem_tx_dma_setup;
 	struct evcnt		tso_err;
 	struct evcnt		watchdog_events;
 	struct evcnt		link_irq;
 	struct evcnt		link_sicount;
 	struct evcnt		mod_sicount;
 	struct evcnt		msf_sicount;
 	struct evcnt		phy_sicount;
 	union {
 		struct ixgbe_hw_stats pf;
 		struct ixgbevf_hw_stats	vf;
 	} stats;
 #if __FreeBSD_version >= 1100036
 	/* counter(9) stats */
 	u64			ipackets;
 	u64			ierrors;
 	u64			opackets;
 	u64			oerrors;
 	u64			ibytes;
 	u64			obytes;
 	u64			imcasts;
 	u64			omcasts;
 	u64			iqdrops;
 	u64			noproto;
 #endif
 	/* Feature capable/enabled flags.  See ixgbe_features.h */
 	u32                     feat_cap;
 	u32                     feat_en;
 	/* Traffic classes */
 	struct ixgbe_tc tcs[IXGBE_DCB_MAX_TRAFFIC_CLASS];
 	struct sysctllog	*sysctllog;
 	const struct sysctlnode *sysctltop;
 };
 /* Precision Time Sync (IEEE 1588) defines */
 #define ETHERTYPE_IEEE1588      0x88F7
 #define PICOSECS_PER_TICK       20833
 #define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
 #define IXGBE_ADVTXD_TSTAMP     0x00080000
 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
 	mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET)
 #define IXGBE_CORE_LOCK_DESTROY(_sc)      mutex_destroy(&(_sc)->core_mtx)
 #define IXGBE_TX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->tx_mtx)
 #define IXGBE_RX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->rx_mtx)
 #define IXGBE_CORE_LOCK(_sc)              mutex_enter(&(_sc)->core_mtx)
 #define IXGBE_TX_LOCK(_sc)                mutex_enter(&(_sc)->tx_mtx)
 #define IXGBE_TX_TRYLOCK(_sc)             mutex_tryenter(&(_sc)->tx_mtx)
 #define IXGBE_RX_LOCK(_sc)                mutex_enter(&(_sc)->rx_mtx)
 #define IXGBE_CORE_UNLOCK(_sc)            mutex_exit(&(_sc)->core_mtx)
 #define IXGBE_TX_UNLOCK(_sc)              mutex_exit(&(_sc)->tx_mtx)
 #define IXGBE_RX_UNLOCK(_sc)              mutex_exit(&(_sc)->rx_mtx)
 #define IXGBE_CORE_LOCK_ASSERT(_sc)       KASSERT(mutex_owned(&(_sc)->core_mtx))
 #define IXGBE_TX_LOCK_ASSERT(_sc)         KASSERT(mutex_owned(&(_sc)->tx_mtx))
 /* External PHY register addresses */
 #define IXGBE_PHY_CURRENT_TEMP		0xC820
 #define IXGBE_PHY_OVERTEMP_STATUS	0xC830
 /* Sysctl help messages; displayed with sysctl -d */
 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
 	"\nControl advertised link speed using these flags:\n" \
 	"\t0x01 - advertise 100M\n" \
 	"\t0x02 - advertise 1G\n" \
 	"\t0x04 - advertise 10G\n" \
 	"\t0x08 - advertise 10M\n" \
 	"\t0x10 - advertise 2.5G\n" \
 	"\t0x20 - advertise 5G\n\n" \
 	"\t5G, 2.5G, 100M and 10M are only supported on certain adapters."
 #define IXGBE_SYSCTL_DESC_SET_FC \
 	"\nSet flow control mode using these values:\n" \
 	"\t0 - off\n" \
 	"\t1 - rx pause\n" \
 	"\t2 - tx pause\n" \
 	"\t3 - tx and rx pause"
 /* Workaround to make 8.0 buildable */
 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
 static __inline int
 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
+{
 #ifdef ALTQ
 	if (ALTQ_IS_ENABLED(&ifp->if_snd))
 		return (1);
 #endif
 	return (!buf_ring_empty(br));
+}
 #endif
 /*
  * Find the number of unrefreshed RX descriptors
  */
 static __inline u16
 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
+{
 	if (rxr->next_to_check > rxr->next_to_refresh)
 		return (rxr->next_to_check - rxr->next_to_refresh - 1);
 	else
 		return ((rxr->num_desc + rxr->next_to_check) -
 		    rxr->next_to_refresh - 1);
+}
 static __inline int
 ixgbe_legacy_ring_empty(struct ifnet *ifp, pcq_t *dummy)
+{
 	UNREFERENCED_1PARAMETER(dummy);
 	return IFQ_IS_EMPTY(&ifp->if_snd);
+}
 static __inline int
 ixgbe_mq_ring_empty(struct ifnet *dummy, pcq_t *interq)
+{
 	UNREFERENCED_1PARAMETER(dummy);
 	return (pcq_peek(interq) == NULL);
+}
 /*
  * This checks for a zero mac addr, something that will be likely
  * unless the Admin on the Host has created one.
  */
 static __inline bool
 ixv_check_ether_addr(u8 *addr)
+{
 	bool status = TRUE;
 	if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
 	    addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
 		status = FALSE;
 	return (status);
+}
 /*
  * This checks the adapter->recovery_mode software flag which is
  * set by ixgbe_fw_recovery_mode().
+ *
  */
 static inline bool
 ixgbe_fw_recovery_mode_swflag(struct adapter *adapter)
+{
 	return (adapter->feat_en & IXGBE_FEATURE_RECOVERY_MODE) &&
 	    atomic_load_acq_uint(&adapter->recovery_mode);
+}
 /* Shared Prototypes */
 void ixgbe_legacy_start(struct ifnet *);
 int  ixgbe_legacy_start_locked(struct ifnet *, struct tx_ring *);
 int  ixgbe_mq_start(struct ifnet *, struct mbuf *);
 int  ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *);
 void ixgbe_deferred_mq_start(void *);
 void ixgbe_deferred_mq_start_work(struct work *, void *);
 void ixgbe_drain_all(struct adapter *);
 int  ixgbe_allocate_queues(struct adapter *);
 void ixgbe_free_queues(struct adapter *);
 int  ixgbe_setup_transmit_structures(struct adapter *);
 void ixgbe_free_transmit_structures(struct adapter *);
 int  ixgbe_setup_receive_structures(struct adapter *);
 void ixgbe_free_receive_structures(struct adapter *);
 bool ixgbe_txeof(struct tx_ring *);
 bool ixgbe_rxeof(struct ix_queue *);
 const struct sysctlnode *ixgbe_sysctl_instance(struct adapter *);
 /* For NetBSD */
 void ixgbe_jcl_reinit(struct adapter *, bus_dma_tag_t, struct rx_ring *,
     int, size_t);
 void ixgbe_jcl_destroy(struct adapter *,  struct rx_ring *);
 #include "ixgbe_bypass.h"
 #include "ixgbe_fdir.h"
 #include "ixgbe_rss.h"
 #include "ixgbe_netmap.h"
 #endif /* _IXGBE_H_ */

 @@ -1,98 +1,112 @@
-/*$NetBSD: ixgbe_netbsd.h,v 1.11 2019/03/05 08:25:02 msaitoh Exp $*/
+/*$NetBSD: ixgbe_netbsd.h,v 1.11.4.1 2021/03/11 16:00:24 martin Exp $*/
 /*
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Coyote Point Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #ifndef _IXGBE_NETBSD_H
 #define _IXGBE_NETBSD_H
 #if 0 /* Enable this if you don't want to use TX multiqueue function */
 #define	IXGBE_LEGACY_TX	1
 #endif
 #define	ETHERCAP_VLAN_HWCSUM	0
 #define	MJUM9BYTES	(9 * 1024)
 #define	MJUM16BYTES	(16 * 1024)
 #define	MJUMPAGESIZE	PAGE_SIZE
 /*
  * Number of jcl per queue is calculated by
  * adapter->num_rx_desc * IXGBE_JCLNUM_MULTI. The lower limit is 2.
  */
 #define	IXGBE_JCLNUM_MULTI_LOWLIM	2
 #define	IXGBE_JCLNUM_MULTI_DEFAULT	3
 #if !defined(IXGBE_JCLNUM_MULTI)
 # define IXGBE_JCLNUM_MULTI IXGBE_JCLNUM_MULTI_DEFAULT
 #else
 # if (IXGBE_JCLNUM_MULTI < IXGBE_JCLNUM_MULTI_LOWLIM)
 #  error IXGBE_JCLNUM_MULTI is too low.
 # endif
 #endif
 #define IFCAP_RXCSUM	\
 	(IFCAP_CSUM_IPv4_Rx|IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx|\
 	IFCAP_CSUM_TCPv6_Rx|IFCAP_CSUM_UDPv6_Rx)
 #define IFCAP_TXCSUM	\
 	(IFCAP_CSUM_IPv4_Tx|IFCAP_CSUM_TCPv4_Tx|IFCAP_CSUM_UDPv4_Tx|\
 	IFCAP_CSUM_TCPv6_Tx|IFCAP_CSUM_UDPv6_Tx)
 #define IFCAP_HWCSUM	(IFCAP_RXCSUM|IFCAP_TXCSUM)
 struct ixgbe_dma_tag {
 	bus_dma_tag_t	dt_dmat;
 	bus_size_t	dt_alignment;
 	bus_size_t	dt_boundary;
 	bus_size_t	dt_maxsize;
 	int		dt_nsegments;
 	bus_size_t	dt_maxsegsize;
 	int		dt_flags;
 };
 typedef struct ixgbe_dma_tag ixgbe_dma_tag_t;
 struct ixgbe_extmem_head;
 typedef struct ixgbe_extmem_head ixgbe_extmem_head_t;
 struct ixgbe_extmem {
 	ixgbe_extmem_head_t		*em_head;
 	bus_dma_tag_t			em_dmat;
 	bus_size_t			em_size;
 	bus_dma_segment_t		em_seg;
 	void				*em_vaddr;
 	TAILQ_ENTRY(ixgbe_extmem)	em_link;
 };
 typedef struct ixgbe_extmem ixgbe_extmem_t;
 struct ixgbe_extmem_head {
 	TAILQ_HEAD(, ixgbe_extmem)	eh_freelist;
 	kmutex_t			eh_mtx;
 	bool				eh_initialized;
 };
 int ixgbe_dma_tag_create(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, int,
     bus_size_t, int, ixgbe_dma_tag_t **);
 void ixgbe_dma_tag_destroy(ixgbe_dma_tag_t *);
 int ixgbe_dmamap_create(ixgbe_dma_tag_t *, int, bus_dmamap_t *);
 void ixgbe_dmamap_destroy(ixgbe_dma_tag_t *, bus_dmamap_t);
 void ixgbe_dmamap_sync(ixgbe_dma_tag_t *, bus_dmamap_t, int);
 void ixgbe_dmamap_unload(ixgbe_dma_tag_t *, bus_dmamap_t);
 struct mbuf *ixgbe_getjcl(ixgbe_extmem_head_t *, int, int, int, size_t);
 void ixgbe_pci_enable_busmaster(pci_chipset_tag_t, pcitag_t);
 u_int atomic_load_acq_uint(volatile u_int *);
 #endif /* _IXGBE_NETBSD_H */

 @@ -1,817 +1,818 @@
-/* $NetBSD: ixgbe_vf.c,v 1.18.2.2 2020/07/10 11:35:51 martin Exp $ */
+/* $NetBSD: ixgbe_vf.c,v 1.18.2.3 2021/03/11 16:00:24 martin Exp $ */
 /******************************************************************************
   SPDX-License-Identifier: BSD-3-Clause
   Copyright (c) 2001-2017, Intel Corporation
   All rights reserved.
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
 . Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
 . Redistributions in binary form must reproduce the above copyright
       notice, this list of conditions and the following disclaimer in the
       documentation and/or other materials provided with the distribution.
 . Neither the name of the Intel Corporation nor the names of its
       contributors may be used to endorse or promote products derived from
       this software without specific prior written permission.
   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   POSSIBILITY OF SUCH DAMAGE.
 ******************************************************************************/
 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 331224 2018-03-19 20:55:05Z erj $*/
 #include "ixgbe_api.h"
 #include "ixgbe_type.h"
 #include "ixgbe_vf.h"
 #ifndef IXGBE_VFWRITE_REG
 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
 #endif
 #ifndef IXGBE_VFREAD_REG
 #define IXGBE_VFREAD_REG IXGBE_READ_REG
 #endif
 /**
  *  ixgbe_init_ops_vf - Initialize the pointers for vf
  *  @hw: pointer to hardware structure
+ *
  *  This will assign function pointers, adapter-specific functions can
  *  override the assignment of generic function pointers by assigning
  *  their own adapter-specific function pointers.
  *  Does not touch the hardware.
  **/
 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
+{
 	/* MAC */
 	hw->mac.ops.init_hw = ixgbe_init_hw_vf;
 	hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
 	hw->mac.ops.start_hw = ixgbe_start_hw_vf;
 	/* Cannot clear stats on VF */
 	hw->mac.ops.clear_hw_cntrs = NULL;
 	hw->mac.ops.get_media_type = NULL;
 	hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
 	hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
 	hw->mac.ops.get_bus_info = NULL;
 	hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
 	/* Link */
 	hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
 	hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
 	hw->mac.ops.get_link_capabilities = NULL;
 	/* RAR, Multicast, VLAN */
 	hw->mac.ops.set_rar = ixgbe_set_rar_vf;
 	hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
 	hw->mac.ops.init_rx_addrs = NULL;
 	hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
 	hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
 	hw->mac.ops.enable_mc = NULL;
 	hw->mac.ops.disable_mc = NULL;
 	hw->mac.ops.clear_vfta = NULL;
 	hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
 	hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
 	hw->mac.max_tx_queues = 1;
 	hw->mac.max_rx_queues = 1;
 	hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
 	return IXGBE_SUCCESS;
+}
 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
  *  @hw: pointer to hardware structure
  */
 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
+{
 	int i;
 	u32 vfsrrctl;
 	u32 vfdca_rxctrl;
 	u32 vfdca_txctrl;
 	/* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
 	vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
 	vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
 	/* DCA_RXCTRL default value */
 	vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
 		       IXGBE_DCA_RXCTRL_DATA_WRO_EN |
 		       IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
 	/* DCA_TXCTRL default value */
 	vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
 		       IXGBE_DCA_TXCTRL_DESC_WRO_EN |
 		       IXGBE_DCA_TXCTRL_DATA_RRO_EN;
 	IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
-	for (i = 0; i < 7; i++) {
+	KASSERT(IXGBE_VF_MAX_TX_QUEUES == IXGBE_VF_MAX_RX_QUEUES);
 	for (i = 0; i < IXGBE_VF_MAX_TX_QUEUES; i++) {
 		IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
 		IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
 		IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
+	}
 	IXGBE_WRITE_FLUSH(hw);
+}
 /**
  *  ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
  *  @hw: pointer to hardware structure
+ *
  *  Starts the hardware by filling the bus info structure and media type, clears
  *  all on chip counters, initializes receive address registers, multicast
  *  table, VLAN filter table, calls routine to set up link and flow control
  *  settings, and leaves transmit and receive units disabled and uninitialized
  **/
 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
+{
 	/* Clear adapter stopped flag */
 	hw->adapter_stopped = FALSE;
 	return IXGBE_SUCCESS;
+}
 /**
  *  ixgbe_init_hw_vf - virtual function hardware initialization
  *  @hw: pointer to hardware structure
+ *
  *  Initialize the hardware by resetting the hardware and then starting
  *  the hardware
  **/
 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
+{
 	s32 status = hw->mac.ops.start_hw(hw);
 	hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
 	return status;
+}
 /**
  *  ixgbe_reset_hw_vf - Performs hardware reset
  *  @hw: pointer to hardware structure
+ *
- *  Resets the hardware by reseting the transmit and receive units, masks and
+ *  Resets the hardware by resetting the transmit and receive units, masks and
  *  clears all interrupts.
  **/
 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
+{
 	struct ixgbe_mbx_info *mbx = &hw->mbx;
 	u32 timeout = IXGBE_VF_INIT_TIMEOUT;
 	s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
 	u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
 	u8 *addr = (u8 *)(&msgbuf[1]);
 	DEBUGFUNC("ixgbevf_reset_hw_vf");
 	/* Call adapter stop to disable tx/rx and clear interrupts */
 	hw->mac.ops.stop_adapter(hw);
 	/* reset the api version */
 	hw->api_version = ixgbe_mbox_api_10;
 	DEBUGOUT("Issuing a function level reset to MAC\n");
 	IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
 	IXGBE_WRITE_FLUSH(hw);
 	msec_delay(50);
 	/* we cannot reset while the RSTI / RSTD bits are asserted */
 	while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
 		timeout--;
 		usec_delay(5);
+	}
 	if (!timeout)
 		return IXGBE_ERR_RESET_FAILED;
 	/* Reset VF registers to initial values */
 	ixgbe_virt_clr_reg(hw);
 	/* mailbox timeout can now become active */
 	mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
 	msgbuf[0] = IXGBE_VF_RESET;
 	mbx->ops.write_posted(hw, msgbuf, 1, 0);
 	msec_delay(10);
 	/*
 	 * set our "perm_addr" based on info provided by PF
 	 * also set up the mc_filter_type which is piggy backed
 	 * on the mac address in word 3
 	 */
 	ret_val = mbx->ops.read_posted(hw, msgbuf,
 			IXGBE_VF_PERMADDR_MSG_LEN, 0);
 	if (ret_val)
 		return ret_val;
 	if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
 	    msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
 		return IXGBE_ERR_INVALID_MAC_ADDR;
 	if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
 		memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
 	hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
 	return ret_val;
+}
 /**
  *  ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
  *  @hw: pointer to hardware structure
+ *
  *  Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
  *  disables transmit and receive units. The adapter_stopped flag is used by
  *  the shared code and drivers to determine if the adapter is in a stopped
  *  state and should not touch the hardware.
  **/
 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
+{
 	u32 reg_val;
 	u16 i;
 	/*
 	 * Set the adapter_stopped flag so other driver functions stop touching
 	 * the hardware
 	 */
 	hw->adapter_stopped = TRUE;
 	/* Clear interrupt mask to stop from interrupts being generated */
 	IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
 	/* Clear any pending interrupts, flush previous writes */
 	IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
 	/* Disable the transmit unit.  Each queue must be disabled. */
 	for (i = 0; i < hw->mac.max_tx_queues; i++)
 		IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
 	/* Disable the receive unit by stopping each queue */
 	for (i = 0; i < hw->mac.max_rx_queues; i++) {
 		reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
 		reg_val &= ~IXGBE_RXDCTL_ENABLE;
 		IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
+	}
 	/* Clear packet split and pool config */
 	IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
 	/* flush all queues disables */
 	IXGBE_WRITE_FLUSH(hw);
 	msec_delay(2);
 	return IXGBE_SUCCESS;
+}
 /**
  *  ixgbe_mta_vector - Determines bit-vector in multicast table to set
  *  @hw: pointer to hardware structure
  *  @mc_addr: the multicast address
+ *
  *  Extracts the 12 bits, from a multicast address, to determine which
  *  bit-vector to set in the multicast table. The hardware uses 12 bits, from
  *  incoming rx multicast addresses, to determine the bit-vector to check in
  *  the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
  *  by the MO field of the MCSTCTRL. The MO field is set during initialization
  *  to mc_filter_type.
  **/
 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
+{
 	u32 vector = 0;
 	switch (hw->mac.mc_filter_type) {
 	case 0:   /* use bits [47:36] of the address */
 		vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
 		break;
 	case 1:   /* use bits [46:35] of the address */
 		vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
 		break;
 	case 2:   /* use bits [45:34] of the address */
 		vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
 		break;
 	case 3:   /* use bits [43:32] of the address */
 		vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
 		break;
 	default:  /* Invalid mc_filter_type */
 		DEBUGOUT("MC filter type param set incorrectly\n");
 		ASSERT(0);
 		break;
+	}
 	/* vector can only be 12-bits or boundary will be exceeded */
 	vector &= 0xFFF;
 	return vector;
+}
 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
 				      u32 *retmsg, u16 size)
+{
 	struct ixgbe_mbx_info *mbx = &hw->mbx;
 	s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
 	if (retval)
 		return retval;
 	return mbx->ops.read_posted(hw, retmsg, size, 0);
+}
 /**
  *  ixgbe_set_rar_vf - set device MAC address
  *  @hw: pointer to hardware structure
  *  @index: Receive address register to write
  *  @addr: Address to put into receive address register
  *  @vmdq: VMDq "set" or "pool" index
  *  @enable_addr: set flag that address is active
  **/
 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
 		     u32 enable_addr)
+{
 	u32 msgbuf[3];
 	u8 *msg_addr = (u8 *)(&msgbuf[1]);
 	s32 ret_val;
 	UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
 	memset(msgbuf, 0, 12);
 	msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
 	memcpy(msg_addr, addr, 6);
 	ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
 	msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
 	/* if nacked the address was rejected, use "perm_addr" */
 	if (!ret_val &&
 	    (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) {
 		ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
 		return IXGBE_ERR_MBX;
+	}
 	return ret_val;
+}
 /**
  *  ixgbe_update_mc_addr_list_vf - Update Multicast addresses
  *  @hw: pointer to the HW structure
  *  @mc_addr_list: array of multicast addresses to program
  *  @mc_addr_count: number of multicast addresses to program
  *  @next: caller supplied function to return next address in list
  *  @clear: unused
+ *
  *  Updates the Multicast Table Array.
  **/
 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
 				 u32 mc_addr_count, ixgbe_mc_addr_itr next,
 				 bool clear)
+{
 	u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
 	u16 *vector_list = (u16 *)&msgbuf[1];
 	u32 vector;
 	u32 cnt, i;
 	u32 vmdq;
 	UNREFERENCED_1PARAMETER(clear);
 	DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
 	/* Each entry in the list uses 1 16 bit word.  We have 30
 	 * 16 bit words available in our HW msg buffer (minus 1 for the
 	 * msg type).  That's 30 hash values if we pack 'em right.  If
 	 * there are more than 30 MC addresses to add then punt the
 	 * extras for now and then add code to handle more than 30 later.
 	 * It would be unusual for a server to request that many multi-cast
 	 * addresses except for in large enterprise network environments.
 	 */
 	DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
 	if (mc_addr_count > IXGBE_MAX_VF_MC) {
 		device_printf(ixgbe_dev_from_hw(hw),
 		    "number of Ethernet multicast addresses exceeded "
 		    "the limit (%u > %d)\n", mc_addr_count, IXGBE_MAX_VF_MC);
 		cnt = IXGBE_MAX_VF_MC;
 	} else
 		cnt = mc_addr_count;
 	msgbuf[0] = IXGBE_VF_SET_MULTICAST;
 	msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
 	for (i = 0; i < cnt; i++) {
 		vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
 		DEBUGOUT1("Hash value = 0x%03X\n", vector);
 		vector_list[i] = (u16)vector;
+	}
 	return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
 	    IXGBE_VFMAILBOX_SIZE);
+}
 /**
  *  ixgbevf_update_xcast_mode - Update Multicast mode
  *  @hw: pointer to the HW structure
  *  @xcast_mode: new multicast mode
+ *
  *  Updates the Multicast Mode of VF.
  **/
 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
+{
 	u32 msgbuf[2];
 	s32 err;
 	switch (hw->api_version) {
 	case ixgbe_mbox_api_12:
 		/* New modes were introduced in 1.3 version */
 		if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI)
 			return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
 		/* Fall through */
 	case ixgbe_mbox_api_13:
 		break;
 	default:
 		return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
+	}
 	msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
 	msgbuf[1] = xcast_mode;
 	err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
 	if (err)
 		return err;
 	msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
 	if (msgbuf[0] ==
 	    (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) {
 		if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC) {
 			/*
 			 * If the API version matched and the reply was NACK,
 			 * assume the PF was not in PROMISC mode.
 			 */
 			return IXGBE_ERR_NOT_IN_PROMISC;
 		} else
 			return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
+	}
 	/*
 	 *  On linux's PF driver implementation, the PF replies VF's
 	 * XCAST_MODE_ALLMULTI message not with NACK but with ACK even if the
 	 * virtual function is NOT marked "trust" and act as
 	 * XCAST_MODE_"MULTI". If ixv(4) simply check the return value of
 	 * update_xcast_mode(XCAST_MODE_ALLMULTI), SIOCSADDMULTI success and
 	 * the user may have trouble with some addresses. Fortunately, the
 	 * Linux's PF driver's "ACK" message has not XCAST_MODE_"ALL"MULTI but
 	 * XCAST_MODE_MULTI, so we can check this state by checking if the
 	 * send message's argument and the reply message's argument are
 	 * different.
 	 */
 	if ((xcast_mode > IXGBEVF_XCAST_MODE_MULTI)
 	    && (xcast_mode != msgbuf[1]))
 		return IXGBE_ERR_NOT_TRUSTED;
 	return IXGBE_SUCCESS;
+}
 /**
  *  ixgbe_set_vfta_vf - Set/Unset vlan filter table address
  *  @hw: pointer to the HW structure
  *  @vlan: 12 bit VLAN ID
  *  @vind: unused by VF drivers
  *  @vlan_on: if TRUE then set bit, else clear bit
  *  @vlvf_bypass: boolean flag indicating updating default pool is okay
+ *
  *  Turn on/off specified VLAN in the VLAN filter table.
  **/
 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
 		      bool vlan_on, bool vlvf_bypass)
+{
 	u32 msgbuf[2];
 	s32 ret_val;
 	UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
 	msgbuf[0] = IXGBE_VF_SET_VLAN;
 	msgbuf[1] = vlan;
 	/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
 	msgbuf[0] |= (u32)vlan_on << IXGBE_VT_MSGINFO_SHIFT;
 	ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
 	if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
 		return IXGBE_SUCCESS;
 	return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
+}
 /**
  *  ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
  *  @hw: pointer to hardware structure
+ *
  *  Returns the number of transmit queues for the given adapter.
  **/
 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
+{
 	UNREFERENCED_1PARAMETER(hw);
 	return IXGBE_VF_MAX_TX_QUEUES;
+}
 /**
  *  ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
  *  @hw: pointer to hardware structure
+ *
  *  Returns the number of receive queues for the given adapter.
  **/
 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
+{
 	UNREFERENCED_1PARAMETER(hw);
 	return IXGBE_VF_MAX_RX_QUEUES;
+}
 /**
  * ixgbe_get_mac_addr_vf - Read device MAC address
  * @hw: pointer to the HW structure
  * @mac_addr: the MAC address
  **/
 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
+{
 	int i;
 	for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
 		mac_addr[i] = hw->mac.perm_addr[i];
 	return IXGBE_SUCCESS;
+}
 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
+{
 	u32 msgbuf[3], msgbuf_chk;
 	u8 *msg_addr = (u8 *)(&msgbuf[1]);
 	s32 ret_val;
 	memset(msgbuf, 0, sizeof(msgbuf));
 	/*
 	 * If index is one then this is the start of a new list and needs
 	 * indication to the PF so it can do it's own list management.
 	 * If it is zero then that tells the PF to just clear all of
 	 * this VF's macvlans and there is no new list.
 	 */
 	msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
 	msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
 	msgbuf_chk = msgbuf[0];
 	if (addr)
 		memcpy(msg_addr, addr, 6);
 	ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
 	if (!ret_val) {
 		msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
 		if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK))
 			return IXGBE_ERR_OUT_OF_MEM;
+	}
 	return ret_val;
+}
 /**
  *  ixgbe_setup_mac_link_vf - Setup MAC link settings
  *  @hw: pointer to hardware structure
  *  @speed: new link speed
  *  @autoneg_wait_to_complete: TRUE when waiting for completion is needed
+ *
  *  Set the link speed in the AUTOC register and restarts link.
  **/
 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
 			    bool autoneg_wait_to_complete)
+{
 	UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
 	return IXGBE_SUCCESS;
+}
 /**
  *  ixgbe_check_mac_link_vf - Get link/speed status
  *  @hw: pointer to hardware structure
  *  @speed: pointer to link speed
  *  @link_up: TRUE is link is up, FALSE otherwise
  *  @autoneg_wait_to_complete: TRUE when waiting for completion is needed
+ *
  *  Reads the links register to determine if link is up and the current speed
  **/
 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
 			    bool *link_up, bool autoneg_wait_to_complete)
+{
 	struct ixgbe_mbx_info *mbx = &hw->mbx;
 	struct ixgbe_mac_info *mac = &hw->mac;
 	s32 ret_val = IXGBE_SUCCESS;
 	u32 links_reg;
 	u32 in_msg = 0;
 	UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
 	/* If we were hit with a reset drop the link */
 	if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
 		mac->get_link_status = TRUE;
 	if (!mac->get_link_status)
 		goto out;
 	/* if link status is down no point in checking to see if pf is up */
 	links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
 	if (!(links_reg & IXGBE_LINKS_UP))
 		goto out;
 	/* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
 	 * before the link status is correct
 	 */
 	if (mac->type == ixgbe_mac_82599_vf) {
 		int i;
 		for (i = 0; i < 5; i++) {
 			usec_delay(100);
 			links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
 			if (!(links_reg & IXGBE_LINKS_UP))
 				goto out;
+		}
+	}
 	switch (links_reg & IXGBE_LINKS_SPEED_82599) {
 	case IXGBE_LINKS_SPEED_10G_82599:
 		*speed = IXGBE_LINK_SPEED_10GB_FULL;
 		if (hw->mac.type >= ixgbe_mac_X550) {
 			if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
 				*speed = IXGBE_LINK_SPEED_2_5GB_FULL;
+		}
 		break;
 	case IXGBE_LINKS_SPEED_1G_82599:
 		*speed = IXGBE_LINK_SPEED_1GB_FULL;
 		break;
 	case IXGBE_LINKS_SPEED_100_82599:
 		*speed = IXGBE_LINK_SPEED_100_FULL;
 		if (hw->mac.type >= ixgbe_mac_X550) {
 			if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
 				*speed = IXGBE_LINK_SPEED_5GB_FULL;
+		}
 		break;
 	case IXGBE_LINKS_SPEED_10_X550EM_A:
 		*speed = IXGBE_LINK_SPEED_UNKNOWN;
 		/* Since Reserved in older MAC's */
 		if (hw->mac.type >= ixgbe_mac_X550)
 			*speed = IXGBE_LINK_SPEED_10_FULL;
 		break;
 	default:
 		*speed = IXGBE_LINK_SPEED_UNKNOWN;
+	}
 	/* if the read failed it could just be a mailbox collision, best wait
 	 * until we are called again and don't report an error
 	 */
 	if (mbx->ops.read(hw, &in_msg, 1, 0))
 		goto out;
 	if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
 		/* msg is not CTS and is NACK we must have lost CTS status */
 		if (in_msg & IXGBE_VT_MSGTYPE_NACK)
 			ret_val = -1;
 		goto out;
+	}
 	/* the pf is talking, if we timed out in the past we reinit */
 	if (!mbx->timeout) {
 		ret_val = -1;
 		goto out;
+	}
 	/* if we passed all the tests above then the link is up and we no
 	 * longer need to check for link
 	 */
 	mac->get_link_status = FALSE;
 out:
 	*link_up = !mac->get_link_status;
 	return ret_val;
+}
 /**
  *  ixgbevf_rlpml_set_vf - Set the maximum receive packet length
  *  @hw: pointer to the HW structure
  *  @max_size: value to assign to max frame size
  **/
 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
+{
 	u32 msgbuf[2];
 	s32 retval;
 	msgbuf[0] = IXGBE_VF_SET_LPE;
 	msgbuf[1] = max_size;
 	retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
 	if (retval)
 		return retval;
 	if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
 	    (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK))
 		return IXGBE_ERR_MBX;
 	return 0;
+}
 /**
  *  ixgbevf_negotiate_api_version - Negotiate supported API version
  *  @hw: pointer to the HW structure
  *  @api: integer containing requested API version
  **/
 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
+{
 	int err;
 	u32 msg[3];
 	/* Negotiate the mailbox API version */
 	msg[0] = IXGBE_VF_API_NEGOTIATE;
 	msg[1] = api;
 	msg[2] = 0;
 	err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
 	if (!err) {
 		msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
 		/* Store value and return 0 on success */
 		if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
 			hw->api_version = api;
 			return 0;
+		}
 		err = IXGBE_ERR_INVALID_ARGUMENT;
+	}
 	return err;
+}
 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
 		       unsigned int *default_tc)
+{
 	int err;
 	u32 msg[5];
 	/* do nothing if API doesn't support ixgbevf_get_queues */
 	switch (hw->api_version) {
 	case ixgbe_mbox_api_11:
 	case ixgbe_mbox_api_12:
 	case ixgbe_mbox_api_13:
 		break;
 	default:
 		return 0;
+	}
 	/* Fetch queue configuration from the PF */
 	msg[0] = IXGBE_VF_GET_QUEUES;
 	msg[1] = msg[2] = msg[3] = msg[4] = 0;
 	err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
 	if (!err) {
 		msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
 		/*
-		 * if we we didn't get an ACK there must have been
+		 * if we didn't get an ACK there must have been
 		 * some sort of mailbox error so we should treat it
 		 * as such
 		 */
 		if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
 			return IXGBE_ERR_MBX;
 		/* record and validate values from message */
 		hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
 		if (hw->mac.max_tx_queues == 0 ||
 		    hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
 			hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
 		hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
 		if (hw->mac.max_rx_queues == 0 ||
 		    hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
 			hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
 		*num_tcs = msg[IXGBE_VF_TRANS_VLAN];
 		/* in case of unknown state assume we cannot tag frames */
 		if (*num_tcs > hw->mac.max_rx_queues)
 			*num_tcs = 1;
 		*default_tc = msg[IXGBE_VF_DEF_QUEUE];
 		/* default to queue 0 on out-of-bounds queue number */
 		if (*default_tc >= hw->mac.max_tx_queues)
 			*default_tc = 0;
+	}
 	return err;
+}

 @@ -1,1074 +1,1074 @@
 /******************************************************************************
   SPDX-License-Identifier: BSD-3-Clause
   Copyright (c) 2001-2017, Intel Corporation
   All rights reserved.
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
 . Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
 . Redistributions in binary form must reproduce the above copyright
       notice, this list of conditions and the following disclaimer in the
       documentation and/or other materials provided with the distribution.
 . Neither the name of the Intel Corporation nor the names of its
       contributors may be used to endorse or promote products derived from
       this software without specific prior written permission.
   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   POSSIBILITY OF SUCH DAMAGE.
 ******************************************************************************/
 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_x540.c 331224 2018-03-19 20:55:05Z erj $*/
 #include "ixgbe_x540.h"
 #include "ixgbe_type.h"
 #include "ixgbe_api.h"
 #include "ixgbe_common.h"
 #include "ixgbe_phy.h"
 #define IXGBE_X540_MAX_TX_QUEUES	128
 #define IXGBE_X540_MAX_RX_QUEUES	128
 #define IXGBE_X540_RAR_ENTRIES		128
 #define IXGBE_X540_MC_TBL_SIZE		128
 #define IXGBE_X540_VFT_TBL_SIZE		128
 #define IXGBE_X540_RX_PB_SIZE		384
 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw);
 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw);
 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);
 /**
  *  ixgbe_init_ops_X540 - Inits func ptrs and MAC type
  *  @hw: pointer to hardware structure
+ *
  *  Initialize the function pointers and assign the MAC type for X540.
  *  Does not touch the hardware.
  **/
 s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw)
+{
 	struct ixgbe_mac_info *mac = &hw->mac;
 	struct ixgbe_phy_info *phy = &hw->phy;
 	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
 	s32 ret_val;
 	DEBUGFUNC("ixgbe_init_ops_X540");
 	ret_val = ixgbe_init_phy_ops_generic(hw);
 	ret_val = ixgbe_init_ops_generic(hw);
 	/* EEPROM */
 	eeprom->ops.init_params = ixgbe_init_eeprom_params_X540;
 	eeprom->ops.read = ixgbe_read_eerd_X540;
 	eeprom->ops.read_buffer = ixgbe_read_eerd_buffer_X540;
 	eeprom->ops.write = ixgbe_write_eewr_X540;
 	eeprom->ops.write_buffer = ixgbe_write_eewr_buffer_X540;
 	eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_X540;
 	eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_X540;
 	eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_X540;
 	/* PHY */
 	phy->ops.init = ixgbe_init_phy_ops_generic;
 	phy->ops.reset = NULL;
 	phy->ops.set_phy_power = ixgbe_set_copper_phy_power;
 	/* MAC */
 	mac->ops.reset_hw = ixgbe_reset_hw_X540;
 	mac->ops.enable_relaxed_ordering = ixgbe_enable_relaxed_ordering_gen2;
 	mac->ops.get_media_type = ixgbe_get_media_type_X540;
 	mac->ops.get_supported_physical_layer =
 				    ixgbe_get_supported_physical_layer_X540;
 	mac->ops.read_analog_reg8 = NULL;
 	mac->ops.write_analog_reg8 = NULL;
 	mac->ops.start_hw = ixgbe_start_hw_X540;
 	mac->ops.get_san_mac_addr = ixgbe_get_san_mac_addr_generic;
 	mac->ops.set_san_mac_addr = ixgbe_set_san_mac_addr_generic;
 	mac->ops.get_device_caps = ixgbe_get_device_caps_generic;
 	mac->ops.get_wwn_prefix = ixgbe_get_wwn_prefix_generic;
 	mac->ops.get_fcoe_boot_status = ixgbe_get_fcoe_boot_status_generic;
 	mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X540;
 	mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X540;
 	mac->ops.init_swfw_sync = ixgbe_init_swfw_sync_X540;
 	mac->ops.disable_sec_rx_path = ixgbe_disable_sec_rx_path_generic;
 	mac->ops.enable_sec_rx_path = ixgbe_enable_sec_rx_path_generic;
 	/* RAR, Multicast, VLAN */
 	mac->ops.set_vmdq = ixgbe_set_vmdq_generic;
 	mac->ops.set_vmdq_san_mac = ixgbe_set_vmdq_san_mac_generic;
 	mac->ops.clear_vmdq = ixgbe_clear_vmdq_generic;
 	mac->ops.insert_mac_addr = ixgbe_insert_mac_addr_generic;
 	mac->rar_highwater = 1;
 	mac->ops.set_vfta = ixgbe_set_vfta_generic;
 	mac->ops.set_vlvf = ixgbe_set_vlvf_generic;
 	mac->ops.clear_vfta = ixgbe_clear_vfta_generic;
 	mac->ops.init_uta_tables = ixgbe_init_uta_tables_generic;
 	mac->ops.set_mac_anti_spoofing = ixgbe_set_mac_anti_spoofing;
 	mac->ops.set_vlan_anti_spoofing = ixgbe_set_vlan_anti_spoofing;
 	/* Link */
 	mac->ops.get_link_capabilities =
 				ixgbe_get_copper_link_capabilities_generic;
 	mac->ops.setup_link = ixgbe_setup_mac_link_X540;
 	mac->ops.setup_rxpba = ixgbe_set_rxpba_generic;
 	mac->ops.check_link = ixgbe_check_mac_link_generic;
 	mac->ops.bypass_rw = ixgbe_bypass_rw_generic;
 	mac->ops.bypass_valid_rd = ixgbe_bypass_valid_rd_generic;
 	mac->ops.bypass_set = ixgbe_bypass_set_generic;
 	mac->ops.bypass_rd_eep = ixgbe_bypass_rd_eep_generic;
 	mac->mcft_size		= IXGBE_X540_MC_TBL_SIZE;
 	mac->vft_size		= IXGBE_X540_VFT_TBL_SIZE;
 	mac->num_rar_entries	= IXGBE_X540_RAR_ENTRIES;
 	mac->rx_pb_size		= IXGBE_X540_RX_PB_SIZE;
 	mac->max_rx_queues	= IXGBE_X540_MAX_RX_QUEUES;
 	mac->max_tx_queues	= IXGBE_X540_MAX_TX_QUEUES;
 	mac->max_msix_vectors	= ixgbe_get_pcie_msix_count_generic(hw);
 	/*
 	 * FWSM register
 	 * ARC supported; valid only if manageability features are
 	 * enabled.
 	 */
 	mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw))
 				     & IXGBE_FWSM_MODE_MASK);
 	hw->mbx.ops.init_params = ixgbe_init_mbx_params_pf;
 	/* LEDs */
 	mac->ops.blink_led_start = ixgbe_blink_led_start_X540;
 	mac->ops.blink_led_stop = ixgbe_blink_led_stop_X540;
 	/* Manageability interface */
 	mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_generic;
 	mac->ops.get_rtrup2tc = ixgbe_dcb_get_rtrup2tc_generic;
 	return ret_val;
+}
 /**
  *  ixgbe_get_link_capabilities_X540 - Determines link capabilities
  *  @hw: pointer to hardware structure
  *  @speed: pointer to link speed
  *  @autoneg: TRUE when autoneg or autotry is enabled
+ *
  *  Determines the link capabilities by reading the AUTOC register.
  **/
 s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
 				     ixgbe_link_speed *speed,
 				     bool *autoneg)
+{
 	ixgbe_get_copper_link_capabilities_generic(hw, speed, autoneg);
 	return IXGBE_SUCCESS;
+}
 /**
  *  ixgbe_get_media_type_X540 - Get media type
  *  @hw: pointer to hardware structure
+ *
  *  Returns the media type (fiber, copper, backplane)
  **/
 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)
+{
 	UNREFERENCED_1PARAMETER(hw);
 	return ixgbe_media_type_copper;
+}
 /**
  *  ixgbe_setup_mac_link_X540 - Sets the auto advertised capabilities
  *  @hw: pointer to hardware structure
  *  @speed: new link speed
  *  @autoneg_wait_to_complete: TRUE when waiting for completion is needed
  **/
 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
 			      ixgbe_link_speed speed,
 			      bool autoneg_wait_to_complete)
+{
 	DEBUGFUNC("ixgbe_setup_mac_link_X540");
 	return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);
+}
 /**
  *  ixgbe_reset_hw_X540 - Perform hardware reset
  *  @hw: pointer to hardware structure
+ *
  *  Resets the hardware by resetting the transmit and receive units, masks
  *  and clears all interrupts, and perform a reset.
  **/
 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
+{
 	s32 status;
 	u32 ctrl, i;
 	u32 swfw_mask = hw->phy.phy_semaphore_mask;
 	DEBUGFUNC("ixgbe_reset_hw_X540");
 	/* Call adapter stop to disable tx/rx and clear interrupts */
 	status = hw->mac.ops.stop_adapter(hw);
 	if (status != IXGBE_SUCCESS)
 		goto reset_hw_out;
 	/* flush pending Tx transactions */
 	ixgbe_clear_tx_pending(hw);
 mac_reset_top:
 	status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
 	if (status != IXGBE_SUCCESS) {
 		ERROR_REPORT2(IXGBE_ERROR_CAUTION,
 			"semaphore failed with %d", status);
 		return IXGBE_ERR_SWFW_SYNC;
+	}
 	ctrl = IXGBE_CTRL_RST;
 	ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
 	IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
 	IXGBE_WRITE_FLUSH(hw);
 	hw->mac.ops.release_swfw_sync(hw, swfw_mask);
 	/* Poll for reset bit to self-clear indicating reset is complete */
 	for (i = 0; i < 10; i++) {
 		usec_delay(1);
 		ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
 		if (!(ctrl & IXGBE_CTRL_RST_MASK))
 			break;
+	}
 	if (ctrl & IXGBE_CTRL_RST_MASK) {
 		status = IXGBE_ERR_RESET_FAILED;
 		ERROR_REPORT1(IXGBE_ERROR_POLLING,
 			     "Reset polling failed to complete.\n");
+	}
 	msec_delay(100);
 	/*
 	 * Double resets are required for recovery from certain error
 	 * conditions.  Between resets, it is necessary to stall to allow time
 	 * for any pending HW events to complete.
 	 */
 	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {
 		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;
 		goto mac_reset_top;
+	}
 	/* Set the Rx packet buffer size. */
 	IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT);
 	/* Store the permanent mac address */
 	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);
 	/*
 	 * Store MAC address from RAR0, clear receive address registers, and
 	 * clear the multicast table.  Also reset num_rar_entries to 128,
 	 * since we modify this value when programming the SAN MAC address.
 	 */
 	hw->mac.num_rar_entries = 128;
 	hw->mac.ops.init_rx_addrs(hw);
 	/* Store the permanent SAN mac address */
 	hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);
 	/* Add the SAN MAC address to the RAR only if it's a valid address */
 	if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {
 		/* Save the SAN MAC RAR index */
 		hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;
 		hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,
 				    hw->mac.san_addr, 0, IXGBE_RAH_AV);
 		/* clear VMDq pool/queue selection for this RAR */
 		hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,
 				       IXGBE_CLEAR_VMDQ_ALL);
 		/* Reserve the last RAR for the SAN MAC address */
 		hw->mac.num_rar_entries--;
+	}
 	/* Store the alternative WWNN/WWPN prefix */
 	hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,
 				   &hw->mac.wwpn_prefix);
 reset_hw_out:
 	return status;
+}
 /**
  *  ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx
  *  @hw: pointer to hardware structure
+ *
  *  Starts the hardware using the generic start_hw function
  *  and the generation start_hw function.
  *  Then performs revision-specific operations, if any.
  **/
 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw)
+{
 	s32 ret_val = IXGBE_SUCCESS;
 	DEBUGFUNC("ixgbe_start_hw_X540");
 	ret_val = ixgbe_start_hw_generic(hw);
 	if (ret_val != IXGBE_SUCCESS)
 		goto out;
 	ret_val = ixgbe_start_hw_gen2(hw);
 out:
 	return ret_val;
+}
 /**
  *  ixgbe_get_supported_physical_layer_X540 - Returns physical layer type
  *  @hw: pointer to hardware structure
+ *
  *  Determines physical layer capabilities of the current configuration.
  **/
 u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
+{
 	u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
 	u16 ext_ability = 0;
 	DEBUGFUNC("ixgbe_get_supported_physical_layer_X540");
 	hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
 	IXGBE_MDIO_PMA_PMD_DEV_TYPE, &ext_ability);
 	if (ext_ability & IXGBE_MDIO_PHY_10GBASET_ABILITY)
 		physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T;
 	if (ext_ability & IXGBE_MDIO_PHY_1000BASET_ABILITY)
 		physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T;
 	if (ext_ability & IXGBE_MDIO_PHY_100BASETX_ABILITY)
 		physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX;
 	if (hw->mac.type == ixgbe_mac_X550) {
 		physical_layer |= IXGBE_PHYSICAL_LAYER_2500BASE_T
 		    | IXGBE_PHYSICAL_LAYER_5GBASE_T;
+	}
 	return physical_layer;
+}
 /**
  *  ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
  *  @hw: pointer to hardware structure
+ *
  *  Initializes the EEPROM parameters ixgbe_eeprom_info within the
  *  ixgbe_hw struct in order to set up EEPROM access.
  **/
 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)
+{
 	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
 	u32 eec;
 	u16 eeprom_size;
 	DEBUGFUNC("ixgbe_init_eeprom_params_X540");
 	if (eeprom->type == ixgbe_eeprom_uninitialized) {
 		eeprom->semaphore_delay = 10;
 		eeprom->type = ixgbe_flash;
 		eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));
 		eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>
 				    IXGBE_EEC_SIZE_SHIFT);
 		eeprom->word_size = 1 << (eeprom_size +
 					  IXGBE_EEPROM_WORD_SIZE_SHIFT);
 		DEBUGOUT2("Eeprom params: type = %d, size = %d\n",
 			  eeprom->type, eeprom->word_size);
+	}
 	return IXGBE_SUCCESS;
+}
 /**
  *  ixgbe_read_eerd_X540- Read EEPROM word using EERD
  *  @hw: pointer to hardware structure
  *  @offset: offset of  word in the EEPROM to read
  *  @data: word read from the EEPROM
+ *
  *  Reads a 16 bit word from the EEPROM using the EERD register.
  **/
 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)
+{
 	s32 status = IXGBE_SUCCESS;
 	DEBUGFUNC("ixgbe_read_eerd_X540");
 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
 	    IXGBE_SUCCESS) {
 		status = ixgbe_read_eerd_generic(hw, offset, data);
 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
 	} else {
 		status = IXGBE_ERR_SWFW_SYNC;
+	}
 	return status;
+}
 /**
  *  ixgbe_read_eerd_buffer_X540- Read EEPROM word(s) using EERD
  *  @hw: pointer to hardware structure
  *  @offset: offset of  word in the EEPROM to read
  *  @words: number of words
  *  @data: word(s) read from the EEPROM
+ *
  *  Reads a 16 bit word(s) from the EEPROM using the EERD register.
  **/
 s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw,
 				u16 offset, u16 words, u16 *data)
+{
 	s32 status = IXGBE_SUCCESS;
 	DEBUGFUNC("ixgbe_read_eerd_buffer_X540");
 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
 	    IXGBE_SUCCESS) {
 		status = ixgbe_read_eerd_buffer_generic(hw, offset,
 							words, data);
 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
 	} else {
 		status = IXGBE_ERR_SWFW_SYNC;
+	}
 	return status;
+}
 /**
  *  ixgbe_write_eewr_X540 - Write EEPROM word using EEWR
  *  @hw: pointer to hardware structure
  *  @offset: offset of  word in the EEPROM to write
  *  @data: word write to the EEPROM
+ *
  *  Write a 16 bit word to the EEPROM using the EEWR register.
  **/
 s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data)
+{
 	s32 status = IXGBE_SUCCESS;
 	DEBUGFUNC("ixgbe_write_eewr_X540");
 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
 	    IXGBE_SUCCESS) {
 		status = ixgbe_write_eewr_generic(hw, offset, data);
 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
 	} else {
 		status = IXGBE_ERR_SWFW_SYNC;
+	}
 	return status;
+}
 /**
  *  ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR
  *  @hw: pointer to hardware structure
  *  @offset: offset of  word in the EEPROM to write
  *  @words: number of words
  *  @data: word(s) write to the EEPROM
+ *
  *  Write a 16 bit word(s) to the EEPROM using the EEWR register.
  **/
 s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw,
 				 u16 offset, u16 words, u16 *data)
+{
 	s32 status = IXGBE_SUCCESS;
 	DEBUGFUNC("ixgbe_write_eewr_buffer_X540");
 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==
 	    IXGBE_SUCCESS) {
 		status = ixgbe_write_eewr_buffer_generic(hw, offset,
 							 words, data);
 		hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
 	} else {
 		status = IXGBE_ERR_SWFW_SYNC;
+	}
 	return status;
+}
 /**
  *  ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum
+ *
  *  This function does not use synchronization for EERD and EEWR. It can
  *  be used internally by function which utilize ixgbe_acquire_swfw_sync_X540.
+ *
  *  @hw: pointer to hardware structure
+ *
  *  Returns a negative error code on error, or the 16-bit checksum
  **/
 s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw)
+{
 	u16 i, j;
 	u16 checksum = 0;
 	u16 length = 0;
 	u16 pointer = 0;
 	u16 word = 0;
 	u16 ptr_start = IXGBE_PCIE_ANALOG_PTR;
 	/* Do not use hw->eeprom.ops.read because we do not want to take
 	 * the synchronization semaphores here. Instead use
 	 * ixgbe_read_eerd_generic
 	 */
 	DEBUGFUNC("ixgbe_calc_eeprom_checksum_X540");
 	/* Include 0x0 up to IXGBE_EEPROM_CHECKSUM; do not include the
 	 * checksum itself
 	 */
 	for (i = 0; i < IXGBE_EEPROM_CHECKSUM; i++) {
 		if (ixgbe_read_eerd_generic(hw, i, &word)) {
 			DEBUGOUT("EEPROM read failed\n");
 			return IXGBE_ERR_EEPROM;
+		}
 		checksum += word;
+	}
 	/* Include all data from pointers 0x3, 0x6-0xE.  This excludes the
 	 * FW, PHY module, and PCIe Expansion/Option ROM pointers.
 	 */
 	for (i = ptr_start; i < IXGBE_FW_PTR; i++) {
 		if (i == IXGBE_PHY_PTR || i == IXGBE_OPTION_ROM_PTR)
 			continue;
 		if (ixgbe_read_eerd_generic(hw, i, &pointer)) {
 			DEBUGOUT("EEPROM read failed\n");
 			return IXGBE_ERR_EEPROM;
+		}
 		/* Skip pointer section if the pointer is invalid. */
 		if (pointer == 0xFFFF || pointer == 0 ||
 		    pointer >= hw->eeprom.word_size)
 			continue;
 		if (ixgbe_read_eerd_generic(hw, pointer, &length)) {
 			DEBUGOUT("EEPROM read failed\n");
 			return IXGBE_ERR_EEPROM;
+		}
 		/* Skip pointer section if length is invalid. */
 		if (length == 0xFFFF || length == 0 ||
 		    (pointer + length) >= hw->eeprom.word_size)
 			continue;
 		for (j = pointer + 1; j <= pointer + length; j++) {
 			if (ixgbe_read_eerd_generic(hw, j, &word)) {
 				DEBUGOUT("EEPROM read failed\n");
 				return IXGBE_ERR_EEPROM;
+			}
 			checksum += word;
+		}
+	}
 	checksum = (u16)IXGBE_EEPROM_SUM - checksum;
 	return (s32)checksum;
+}
 /**
  *  ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum
  *  @hw: pointer to hardware structure
  *  @checksum_val: calculated checksum
+ *
  *  Performs checksum calculation and validates the EEPROM checksum.  If the
  *  caller does not need checksum_val, the value can be NULL.
  **/
 s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw,
 					u16 *checksum_val)
+{
 	s32 status;
 	u16 checksum;
 	u16 read_checksum = 0;
 	DEBUGFUNC("ixgbe_validate_eeprom_checksum_X540");
 	/* Read the first word from the EEPROM. If this times out or fails, do
 	 * not continue or we could be in for a very long wait while every
 	 * EEPROM read fails
 	 */
 	status = hw->eeprom.ops.read(hw, 0, &checksum);
 	if (status) {
 		DEBUGOUT("EEPROM read failed\n");
 		return status;
+	}
 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))
 		return IXGBE_ERR_SWFW_SYNC;
 	status = hw->eeprom.ops.calc_checksum(hw);
 	if (status < 0)
 		goto out;
 	checksum = (u16)(status & 0xffff);
 	/* Do not use hw->eeprom.ops.read because we do not want to take
 	 * the synchronization semaphores twice here.
 	 */
 	status = ixgbe_read_eerd_generic(hw, IXGBE_EEPROM_CHECKSUM,
 					 &read_checksum);
 	if (status)
 		goto out;
 	/* Verify read checksum from EEPROM is the same as
 	 * calculated checksum
 	 */
 	if (read_checksum != checksum) {
 		ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE,
 			     "Invalid EEPROM checksum");
 		status = IXGBE_ERR_EEPROM_CHECKSUM;
+	}
 	/* If the user cares, return the calculated checksum */
 	if (checksum_val)
 		*checksum_val = checksum;
 out:
 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
 	return status;
+}
 /**
  * ixgbe_update_eeprom_checksum_X540 - Updates the EEPROM checksum and flash
  * @hw: pointer to hardware structure
+ *
  * After writing EEPROM to shadow RAM using EEWR register, software calculates
  * checksum and updates the EEPROM and instructs the hardware to update
  * the flash.
  **/
 s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw)
+{
 	s32 status;
 	u16 checksum;
 	DEBUGFUNC("ixgbe_update_eeprom_checksum_X540");
 	/* Read the first word from the EEPROM. If this times out or fails, do
 	 * not continue or we could be in for a very long wait while every
 	 * EEPROM read fails
 	 */
 	status = hw->eeprom.ops.read(hw, 0, &checksum);
 	if (status) {
 		DEBUGOUT("EEPROM read failed\n");
 		return status;
+	}
 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))
 		return IXGBE_ERR_SWFW_SYNC;
 	status = hw->eeprom.ops.calc_checksum(hw);
 	if (status < 0)
 		goto out;
 	checksum = (u16)(status & 0xffff);
 	/* Do not use hw->eeprom.ops.write because we do not want to
 	 * take the synchronization semaphores twice here.
 	 */
 	status = ixgbe_write_eewr_generic(hw, IXGBE_EEPROM_CHECKSUM, checksum);
 	if (status)
 		goto out;
 	status = ixgbe_update_flash_X540(hw);
 out:
 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);
 	return status;
+}
 /**
  *  ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device
  *  @hw: pointer to hardware structure
+ *
  *  Set FLUP (bit 23) of the EEC register to instruct Hardware to copy
  *  EEPROM from shadow RAM to the flash device.
  **/
 s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw)
+{
 	u32 flup;
 	s32 status;
 	DEBUGFUNC("ixgbe_update_flash_X540");
 	status = ixgbe_poll_flash_update_done_X540(hw);
 	if (status == IXGBE_ERR_EEPROM) {
 		DEBUGOUT("Flash update time out\n");
 		goto out;
+	}
 	flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)) | IXGBE_EEC_FLUP;
 	IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup);
 	status = ixgbe_poll_flash_update_done_X540(hw);
 	if (status == IXGBE_SUCCESS)
 		DEBUGOUT("Flash update complete\n");
 	else
 		DEBUGOUT("Flash update time out\n");
 	if (hw->mac.type == ixgbe_mac_X540 && hw->revision_id == 0) {
 		flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));
 		if (flup & IXGBE_EEC_SEC1VAL) {
 			flup |= IXGBE_EEC_FLUP;
 			IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup);
+		}
 		status = ixgbe_poll_flash_update_done_X540(hw);
 		if (status == IXGBE_SUCCESS)
 			DEBUGOUT("Flash update complete\n");
 		else
 			DEBUGOUT("Flash update time out\n");
+	}
 out:
 	return status;
+}
 /**
  *  ixgbe_poll_flash_update_done_X540 - Poll flash update status
  *  @hw: pointer to hardware structure
+ *
  *  Polls the FLUDONE (bit 26) of the EEC Register to determine when the
  *  flash update is done.
  **/
 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw)
+{
 	u32 i;
 	u32 reg;
 	s32 status = IXGBE_ERR_EEPROM;
 	DEBUGFUNC("ixgbe_poll_flash_update_done_X540");
 	for (i = 0; i < IXGBE_FLUDONE_ATTEMPTS; i++) {
 		reg = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));
 		if (reg & IXGBE_EEC_FLUDONE) {
 			status = IXGBE_SUCCESS;
 			break;
+		}
 		msec_delay(5);
+	}
 	if (i == IXGBE_FLUDONE_ATTEMPTS)
 		ERROR_REPORT1(IXGBE_ERROR_POLLING,
 			     "Flash update status polling timed out");
 	return status;
+}
 /**
  *  ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore
  *  @hw: pointer to hardware structure
  *  @mask: Mask to specify which semaphore to acquire
+ *
  *  Acquires the SWFW semaphore thought the SW_FW_SYNC register for
  *  the specified function (CSR, PHY0, PHY1, NVM, Flash)
  **/
 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
+{
 	u32 swmask = mask & IXGBE_GSSR_NVM_PHY_MASK;
 	u32 fwmask = swmask << 5;
 	u32 swi2c_mask = mask & IXGBE_GSSR_I2C_MASK;
 	u32 timeout = 200;
 	u32 hwmask = 0;
 	u32 swfw_sync;
 	u32 i;
 	DEBUGFUNC("ixgbe_acquire_swfw_sync_X540");
 	if (swmask & IXGBE_GSSR_EEP_SM)
 		hwmask |= IXGBE_GSSR_FLASH_SM;
 	/* SW only mask doesn't have FW bit pair */
 	if (mask & IXGBE_GSSR_SW_MNG_SM)
 		swmask |= IXGBE_GSSR_SW_MNG_SM;
 	swmask |= swi2c_mask;
 	fwmask |= swi2c_mask << 2;
 	if (hw->mac.type >= ixgbe_mac_X550)
 		timeout = 1000;
 	for (i = 0; i < timeout; i++) {
 		/* SW NVM semaphore bit is used for access to all
 		 * SW_FW_SYNC bits (not just NVM)
 		 */
 		if (ixgbe_get_swfw_sync_semaphore(hw)) {
 			DEBUGOUT("Failed to get NVM access and register semaphore, returning IXGBE_ERR_SWFW_SYNC\n");
 			return IXGBE_ERR_SWFW_SYNC;
+		}
 		swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));
 		if (!(swfw_sync & (fwmask | swmask | hwmask))) {
 			swfw_sync |= swmask;
 			IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw),
 					swfw_sync);
 			ixgbe_release_swfw_sync_semaphore(hw);
 			return IXGBE_SUCCESS;
+		}
 		/* Firmware currently using resource (fwmask), hardware
 		 * currently using resource (hwmask), or other software
 		 * thread currently using resource (swmask)
 		 */
 		ixgbe_release_swfw_sync_semaphore(hw);
 		msec_delay(5);
+	}
 	/* If the resource is not released by the FW/HW the SW can assume that
 	 * the FW/HW malfunctions. In that case the SW should set the SW bit(s)
 	 * of the requested resource(s) while ignoring the corresponding FW/HW
 	 * bits in the SW_FW_SYNC register.
 	 */
 	if (ixgbe_get_swfw_sync_semaphore(hw)) {
-		DEBUGOUT("Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
+		DEBUGOUT("Failed to get NVM semaphore and register semaphore while forcefully ignoring FW semaphore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n");
 		return IXGBE_ERR_SWFW_SYNC;
+	}
 	swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));
 	if (swfw_sync & (fwmask | hwmask)) {
 		swfw_sync |= swmask;
 		IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync);
 		ixgbe_release_swfw_sync_semaphore(hw);
 		msec_delay(5);
 		return IXGBE_SUCCESS;
+	}
 	/* If the resource is not released by other SW the SW can assume that
 	 * the other SW malfunctions. In that case the SW should clear all SW
 	 * flags that it does not own and then repeat the whole process once
 	 * again.
 	 */
 	if (swfw_sync & swmask) {
 		u32 rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM |
 			    IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM |
 			    IXGBE_GSSR_SW_MNG_SM;
 		if (swi2c_mask)
 			rmask |= IXGBE_GSSR_I2C_MASK;
 		ixgbe_release_swfw_sync_X540(hw, rmask);
 		ixgbe_release_swfw_sync_semaphore(hw);
 		DEBUGOUT("Resource not released by other SW, returning IXGBE_ERR_SWFW_SYNC\n");
 		return IXGBE_ERR_SWFW_SYNC;
+	}
 	ixgbe_release_swfw_sync_semaphore(hw);
 	DEBUGOUT("Returning error IXGBE_ERR_SWFW_SYNC\n");
 	return IXGBE_ERR_SWFW_SYNC;
+}
 /**
  *  ixgbe_release_swfw_sync_X540 - Release SWFW semaphore
  *  @hw: pointer to hardware structure
  *  @mask: Mask to specify which semaphore to release
+ *
  *  Releases the SWFW semaphore through the SW_FW_SYNC register
  *  for the specified function (CSR, PHY0, PHY1, EVM, Flash)
  **/
 void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
+{
 	u32 swmask = mask & (IXGBE_GSSR_NVM_PHY_MASK | IXGBE_GSSR_SW_MNG_SM);
 	u32 swfw_sync;
 	DEBUGFUNC("ixgbe_release_swfw_sync_X540");
 	if (mask & IXGBE_GSSR_I2C_MASK)
 		swmask |= mask & IXGBE_GSSR_I2C_MASK;
 	ixgbe_get_swfw_sync_semaphore(hw);
 	swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));
 	swfw_sync &= ~swmask;
 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync);
 	ixgbe_release_swfw_sync_semaphore(hw);
 	msec_delay(2);
+}
 /**
  *  ixgbe_get_swfw_sync_semaphore - Get hardware semaphore
  *  @hw: pointer to hardware structure
+ *
  *  Sets the hardware semaphores so SW/FW can gain control of shared resources
  **/
 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw)
+{
 	s32 status = IXGBE_ERR_EEPROM;
 	u32 timeout = 2000;
 	u32 i;
 	u32 swsm;
 	DEBUGFUNC("ixgbe_get_swfw_sync_semaphore");
 	/* Get SMBI software semaphore between device drivers first */
 	for (i = 0; i < timeout; i++) {
 		/*
 		 * If the SMBI bit is 0 when we read it, then the bit will be
 		 * set and we have the semaphore
 		 */
 		swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));
 		if (!(swsm & IXGBE_SWSM_SMBI)) {
 			status = IXGBE_SUCCESS;
 			break;
+		}
 		usec_delay(50);
+	}
 	/* Now get the semaphore between SW/FW through the REGSMP bit */
 	if (status == IXGBE_SUCCESS) {
 		for (i = 0; i < timeout; i++) {
 			swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));
 			if (!(swsm & IXGBE_SWFW_REGSMP))
 				break;
 			usec_delay(50);
+		}
 		/*
 		 * Release semaphores and return error if SW NVM semaphore
 		 * was not granted because we don't have access to the EEPROM
 		 */
 		if (i >= timeout) {
 			ERROR_REPORT1(IXGBE_ERROR_POLLING,
 				"REGSMP Software NVM semaphore not granted.\n");
 			ixgbe_release_swfw_sync_semaphore(hw);
 			status = IXGBE_ERR_EEPROM;
+		}
 	} else {
 		ERROR_REPORT1(IXGBE_ERROR_POLLING,
 			     "Software semaphore SMBI between device drivers "
 			     "not granted.\n");
+	}
 	return status;
+}
 /**
  *  ixgbe_release_swfw_sync_semaphore - Release hardware semaphore
  *  @hw: pointer to hardware structure
+ *
  *  This function clears hardware semaphore bits.
  **/
 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)
+{
 	u32 swsm;
 	DEBUGFUNC("ixgbe_release_swfw_sync_semaphore");
 	/* Release both semaphores by writing 0 to the bits REGSMP and SMBI */
 	swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));
 	swsm &= ~IXGBE_SWFW_REGSMP;
 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swsm);
 	swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));
 	swsm &= ~IXGBE_SWSM_SMBI;
 	IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm);
 	IXGBE_WRITE_FLUSH(hw);
+}
 /**
  *  ixgbe_init_swfw_sync_X540 - Release hardware semaphore
  *  @hw: pointer to hardware structure
+ *
  *  This function reset hardware semaphore bits for a semaphore that may
  *  have be left locked due to a catastrophic failure.
  **/
 void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw)
+{
 	u32 rmask;
 	/* First try to grab the semaphore but we don't need to bother
 	 * looking to see whether we got the lock or not since we do
 	 * the same thing regardless of whether we got the lock or not.
 	 * We got the lock - we release it.
 	 * We timeout trying to get the lock - we force its release.
 	 */
 	ixgbe_get_swfw_sync_semaphore(hw);
 	ixgbe_release_swfw_sync_semaphore(hw);
 	/* Acquire and release all software resources. */
 	rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM |
 		IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM |
 		IXGBE_GSSR_SW_MNG_SM;
 	rmask |= IXGBE_GSSR_I2C_MASK;
 	ixgbe_acquire_swfw_sync_X540(hw, rmask);
 	ixgbe_release_swfw_sync_X540(hw, rmask);
+}
 /**
  * ixgbe_blink_led_start_X540 - Blink LED based on index.
  * @hw: pointer to hardware structure
  * @index: led number to blink
+ *
  * Devices that implement the version 2 interface:
  *   X540
  **/
 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
+{
 	u32 macc_reg;
 	u32 ledctl_reg;
 	ixgbe_link_speed speed;
 	bool link_up;
 	DEBUGFUNC("ixgbe_blink_led_start_X540");
 	if (index > 3)
 		return IXGBE_ERR_PARAM;
 	/*
 	 * Link should be up in order for the blink bit in the LED control
 	 * register to work. Force link and speed in the MAC if link is down.
 	 * This will be reversed when we stop the blinking.
 	 */
 	hw->mac.ops.check_link(hw, &speed, &link_up, FALSE);
 	if (link_up == FALSE) {
 		macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
 		macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS;
 		IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
+	}
 	/* Set the LED to LINK_UP + BLINK. */
 	ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 	ledctl_reg &= ~IXGBE_LED_MODE_MASK(index);
 	ledctl_reg |= IXGBE_LED_BLINK(index);
 	IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
 	IXGBE_WRITE_FLUSH(hw);
 	return IXGBE_SUCCESS;
+}
 /**
  * ixgbe_blink_led_stop_X540 - Stop blinking LED based on index.
  * @hw: pointer to hardware structure
  * @index: led number to stop blinking
+ *
  * Devices that implement the version 2 interface:
  *   X540
  **/
 s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)
+{
 	u32 macc_reg;
 	u32 ledctl_reg;
 	if (index > 3)
 		return IXGBE_ERR_PARAM;
 	DEBUGFUNC("ixgbe_blink_led_stop_X540");
 	/* Restore the LED to its default value. */
 	ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 	ledctl_reg &= ~IXGBE_LED_MODE_MASK(index);
 	ledctl_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index);
 	ledctl_reg &= ~IXGBE_LED_BLINK(index);
 	IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);
 	/* Unforce link and speed in the MAC. */
 	macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
 	macc_reg &= ~(IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS);
 	IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
 	IXGBE_WRITE_FLUSH(hw);
 	return IXGBE_SUCCESS;
+}

 @@ -1,1499 +1,1502 @@
-/*$NetBSD: ixv.c,v 1.125.2.10 2020/07/10 11:35:51 martin Exp $*/
+/*$NetBSD: ixv.c,v 1.125.2.11 2021/03/11 16:00:24 martin Exp $*/
 /******************************************************************************
   Copyright (c) 2001-2017, Intel Corporation
   All rights reserved.
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
 . Redistributions of source code must retain the above copyright notice,
       this list of conditions and the following disclaimer.
 . Redistributions in binary form must reproduce the above copyright
       notice, this list of conditions and the following disclaimer in the
       documentation and/or other materials provided with the distribution.
 . Neither the name of the Intel Corporation nor the names of its
       contributors may be used to endorse or promote products derived from
       this software without specific prior written permission.
   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   POSSIBILITY OF SUCH DAMAGE.
 ******************************************************************************/
 /*$FreeBSD: head/sys/dev/ixgbe/if_ixv.c 331224 2018-03-19 20:55:05Z erj $*/
 #ifdef _KERNEL_OPT
 #include "opt_inet.h"
 #include "opt_inet6.h"
 #include "opt_net_mpsafe.h"
 #include "opt_ixgbe.h"
 #endif
 #include "ixgbe.h"
 #include "vlan.h"
 /************************************************************************
  * Driver version
  ************************************************************************/
 static const char ixv_driver_version[] = "2.0.1-k";
 /* XXX NetBSD: + 1.5.17 */
 /************************************************************************
  * PCI Device ID Table
+ *
  *   Used by probe to select devices to load on
  *   Last field stores an index into ixv_strings
  *   Last entry must be all 0s
+ *
  *   { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
  ************************************************************************/
 static const ixgbe_vendor_info_t ixv_vendor_info_array[] =
+{
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_VF, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_VF, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550_VF, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_VF, 0, 0, 0},
 	{IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_VF, 0, 0, 0},
 	/* required last entry */
 	{0, 0, 0, 0, 0}
 };
 /************************************************************************
  * Table of branding strings
  ************************************************************************/
 static const char *ixv_strings[] = {
 	"Intel(R) PRO/10GbE Virtual Function Network Driver"
 };
 /*********************************************************************
  *  Function prototypes
  *********************************************************************/
 static int	ixv_probe(device_t, cfdata_t, void *);
 static void	ixv_attach(device_t, device_t, void *);
 static int	ixv_detach(device_t, int);
 #if 0
 static int	ixv_shutdown(device_t);
 #endif
 static int	ixv_ifflags_cb(struct ethercom *);
 static int	ixv_ioctl(struct ifnet *, u_long, void *);
 static int	ixv_init(struct ifnet *);
 static void	ixv_init_locked(struct adapter *);
 static void	ixv_ifstop(struct ifnet *, int);
 static void	ixv_stop(void *);
 static void	ixv_init_device_features(struct adapter *);
 static void	ixv_media_status(struct ifnet *, struct ifmediareq *);
 static int	ixv_media_change(struct ifnet *);
 static int	ixv_allocate_pci_resources(struct adapter *,
 		    const struct pci_attach_args *);
 static int	ixv_allocate_msix(struct adapter *,
 		    const struct pci_attach_args *);
 static int	ixv_configure_interrupts(struct adapter *);
 static void	ixv_free_pci_resources(struct adapter *);
 static void	ixv_local_timer(void *);
 static void	ixv_local_timer_locked(void *);
 static int	ixv_setup_interface(device_t, struct adapter *);
 static int	ixv_negotiate_api(struct adapter *);
 static void	ixv_initialize_transmit_units(struct adapter *);
 static void	ixv_initialize_receive_units(struct adapter *);
 static void	ixv_initialize_rss_mapping(struct adapter *);
 static s32	ixv_check_link(struct adapter *);
 static void	ixv_enable_intr(struct adapter *);
 static void	ixv_disable_intr(struct adapter *);
 static int	ixv_set_rxfilter(struct adapter *);
 static void	ixv_update_link_status(struct adapter *);
 static int	ixv_sysctl_debug(SYSCTLFN_PROTO);
 static void	ixv_set_ivar(struct adapter *, u8, u8, s8);
 static void	ixv_configure_ivars(struct adapter *);
 static u8 *	ixv_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
 static void	ixv_eitr_write(struct adapter *, uint32_t, uint32_t);
 static void	ixv_setup_vlan_tagging(struct adapter *);
 static int	ixv_setup_vlan_support(struct adapter *);
 static int	ixv_vlan_cb(struct ethercom *, uint16_t, bool);
 static int	ixv_register_vlan(struct adapter *, u16);
 static int	ixv_unregister_vlan(struct adapter *, u16);
 static void	ixv_add_device_sysctls(struct adapter *);
 static void	ixv_save_stats(struct adapter *);
 static void	ixv_init_stats(struct adapter *);
 static void	ixv_update_stats(struct adapter *);
 static void	ixv_add_stats_sysctls(struct adapter *);
 static void	ixv_clear_evcnt(struct adapter *);
 /* Sysctl handlers */
 static void	ixv_set_sysctl_value(struct adapter *, const char *,
 		    const char *, int *, int);
 static int	ixv_sysctl_interrupt_rate_handler(SYSCTLFN_PROTO);
 static int	ixv_sysctl_next_to_check_handler(SYSCTLFN_PROTO);
 static int	ixv_sysctl_rdh_handler(SYSCTLFN_PROTO);
 static int	ixv_sysctl_rdt_handler(SYSCTLFN_PROTO);
 static int	ixv_sysctl_tdt_handler(SYSCTLFN_PROTO);
 static int	ixv_sysctl_tdh_handler(SYSCTLFN_PROTO);
 /* The MSI-X Interrupt handlers */
 static int	ixv_msix_que(void *);
 static int	ixv_msix_mbx(void *);
 /* Deferred interrupt tasklets */
 static void	ixv_handle_que(void *);
 static void	ixv_handle_link(void *);
 /* Workqueue handler for deferred work */
 static void	ixv_handle_que_work(struct work *, void *);
 const struct sysctlnode *ixv_sysctl_instance(struct adapter *);
 static const ixgbe_vendor_info_t *ixv_lookup(const struct pci_attach_args *);
 /************************************************************************
  * NetBSD Device Interface Entry Points
  ************************************************************************/
 CFATTACH_DECL3_NEW(ixv, sizeof(struct adapter),
     ixv_probe, ixv_attach, ixv_detach, NULL, NULL, NULL,
     DVF_DETACH_SHUTDOWN);
 #if 0
 static driver_t ixv_driver = {
 	"ixv", ixv_methods, sizeof(struct adapter),
 };
 devclass_t ixv_devclass;
 DRIVER_MODULE(ixv, pci, ixv_driver, ixv_devclass, 0, 0);
 MODULE_DEPEND(ixv, pci, 1, 1, 1);
 MODULE_DEPEND(ixv, ether, 1, 1, 1);
 #endif
 /*
  * TUNEABLE PARAMETERS:
  */
 /* Number of Queues - do not exceed MSI-X vectors - 1 */
 static int ixv_num_queues = 0;
 #define	TUNABLE_INT(__x, __y)
 TUNABLE_INT("hw.ixv.num_queues", &ixv_num_queues);
 /*
  * AIM: Adaptive Interrupt Moderation
  * which means that the interrupt rate
  * is varied over time based on the
  * traffic for that interrupt vector
  */
 static bool ixv_enable_aim = false;
 TUNABLE_INT("hw.ixv.enable_aim", &ixv_enable_aim);
 static int ixv_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
 TUNABLE_INT("hw.ixv.max_interrupt_rate", &ixv_max_interrupt_rate);
 /* How many packets rxeof tries to clean at a time */
 static int ixv_rx_process_limit = 256;
 TUNABLE_INT("hw.ixv.rx_process_limit", &ixv_rx_process_limit);
 /* How many packets txeof tries to clean at a time */
 static int ixv_tx_process_limit = 256;
 TUNABLE_INT("hw.ixv.tx_process_limit", &ixv_tx_process_limit);
 /* Which packet processing uses workqueue or softint */
 static bool ixv_txrx_workqueue = false;
 /*
  * Number of TX descriptors per ring,
  * setting higher than RX as this seems
  * the better performing choice.
  */
 static int ixv_txd = PERFORM_TXD;
 TUNABLE_INT("hw.ixv.txd", &ixv_txd);
 /* Number of RX descriptors per ring */
 static int ixv_rxd = PERFORM_RXD;
 TUNABLE_INT("hw.ixv.rxd", &ixv_rxd);
 /* Legacy Transmit (single queue) */
 static int ixv_enable_legacy_tx = 0;
 TUNABLE_INT("hw.ixv.enable_legacy_tx", &ixv_enable_legacy_tx);
 #ifdef NET_MPSAFE
 #define IXGBE_MPSAFE		1
 #define IXGBE_CALLOUT_FLAGS	CALLOUT_MPSAFE
 #define IXGBE_SOFTINT_FLAGS	SOFTINT_MPSAFE
 #define IXGBE_WORKQUEUE_FLAGS	WQ_PERCPU | WQ_MPSAFE
 #else
 #define IXGBE_CALLOUT_FLAGS	0
 #define IXGBE_SOFTINT_FLAGS	0
 #define IXGBE_WORKQUEUE_FLAGS	WQ_PERCPU
 #endif
 #define IXGBE_WORKQUEUE_PRI PRI_SOFTNET
 #if 0
 static int (*ixv_start_locked)(struct ifnet *, struct tx_ring *);
 static int (*ixv_ring_empty)(struct ifnet *, struct buf_ring *);
 #endif
 /************************************************************************
  * ixv_probe - Device identification routine
+ *
  *   Determines if the driver should be loaded on
  *   adapter based on its PCI vendor/device ID.
+ *
  *   return BUS_PROBE_DEFAULT on success, positive on failure
  ************************************************************************/
 static int
 ixv_probe(device_t dev, cfdata_t cf, void *aux)
+{
 #ifdef __HAVE_PCI_MSI_MSIX
 	const struct pci_attach_args *pa = aux;
 	return (ixv_lookup(pa) != NULL) ? 1 : 0;
 #else
 	return 0;
 #endif
 } /* ixv_probe */
 static const ixgbe_vendor_info_t *
 ixv_lookup(const struct pci_attach_args *pa)
+{
 	const ixgbe_vendor_info_t *ent;
 	pcireg_t subid;
 	INIT_DEBUGOUT("ixv_lookup: begin");
 	if (PCI_VENDOR(pa->pa_id) != IXGBE_INTEL_VENDOR_ID)
 		return NULL;
 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
 	for (ent = ixv_vendor_info_array; ent->vendor_id != 0; ent++) {
 		if ((PCI_VENDOR(pa->pa_id) == ent->vendor_id) &&
 		    (PCI_PRODUCT(pa->pa_id) == ent->device_id) &&
 		    ((PCI_SUBSYS_VENDOR(subid) == ent->subvendor_id) ||
 		     (ent->subvendor_id == 0)) &&
 		    ((PCI_SUBSYS_ID(subid) == ent->subdevice_id) ||
 		     (ent->subdevice_id == 0))) {
 			return ent;
+		}
+	}
 	return NULL;
+}
 /************************************************************************
  * ixv_attach - Device initialization routine
+ *
  *   Called when the driver is being loaded.
  *   Identifies the type of hardware, allocates all resources
  *   and initializes the hardware.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static void
 ixv_attach(device_t parent, device_t dev, void *aux)
+{
 	struct adapter *adapter;
 	struct ixgbe_hw *hw;
 	int		error = 0;
 	pcireg_t	id, subid;
 	const ixgbe_vendor_info_t *ent;
 	const struct pci_attach_args *pa = aux;
 	const char *apivstr;
 	const char *str;
 	char buf[256];
 	INIT_DEBUGOUT("ixv_attach: begin");
 	/*
 	 * Make sure BUSMASTER is set, on a VM under
 	 * KVM it may not be and will break things.
 	 */
 	ixgbe_pci_enable_busmaster(pa->pa_pc, pa->pa_tag);
 	/* Allocate, clear, and link in our adapter structure */
 	adapter = device_private(dev);
 	adapter->hw.back = adapter;
 	adapter->dev = dev;
 	hw = &adapter->hw;
 	adapter->init_locked = ixv_init_locked;
 	adapter->stop_locked = ixv_stop;
 	adapter->osdep.pc = pa->pa_pc;
 	adapter->osdep.tag = pa->pa_tag;
 	if (pci_dma64_available(pa))
 		adapter->osdep.dmat = pa->pa_dmat64;
 	else
 		adapter->osdep.dmat = pa->pa_dmat;
 	adapter->osdep.attached = false;
 	ent = ixv_lookup(pa);
 	KASSERT(ent != NULL);
 	aprint_normal(": %s, Version - %s\n",
 	    ixv_strings[ent->index], ixv_driver_version);
 	/* Core Lock Init */
 	IXGBE_CORE_LOCK_INIT(adapter, device_xname(dev));
 	/* Do base PCI setup - map BAR0 */
 	if (ixv_allocate_pci_resources(adapter, pa)) {
 		aprint_error_dev(dev, "ixv_allocate_pci_resources() failed!\n");
 		error = ENXIO;
 		goto err_out;
+	}
 	/* SYSCTL APIs */
 	ixv_add_device_sysctls(adapter);
 	/* Set up the timer callout */
 	callout_init(&adapter->timer, IXGBE_CALLOUT_FLAGS);
 	/* Save off the information about this board */
 	id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG);
 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
 	hw->vendor_id = PCI_VENDOR(id);
 	hw->device_id = PCI_PRODUCT(id);
 	hw->revision_id =
 	    PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG));
 	hw->subsystem_vendor_id = PCI_SUBSYS_VENDOR(subid);
 	hw->subsystem_device_id = PCI_SUBSYS_ID(subid);
 	/* A subset of set_mac_type */
 	switch (hw->device_id) {
 	case IXGBE_DEV_ID_82599_VF:
 		hw->mac.type = ixgbe_mac_82599_vf;
 		str = "82599 VF";
 		break;
 	case IXGBE_DEV_ID_X540_VF:
 		hw->mac.type = ixgbe_mac_X540_vf;
 		str = "X540 VF";
 		break;
 	case IXGBE_DEV_ID_X550_VF:
 		hw->mac.type = ixgbe_mac_X550_vf;
 		str = "X550 VF";
 		break;
 	case IXGBE_DEV_ID_X550EM_X_VF:
 		hw->mac.type = ixgbe_mac_X550EM_x_vf;
 		str = "X550EM X VF";
 		break;
 	case IXGBE_DEV_ID_X550EM_A_VF:
 		hw->mac.type = ixgbe_mac_X550EM_a_vf;
 		str = "X550EM A VF";
 		break;
 	default:
 		/* Shouldn't get here since probe succeeded */
 		aprint_error_dev(dev, "Unknown device ID!\n");
 		error = ENXIO;
 		goto err_out;
 		break;
+	}
 	aprint_normal_dev(dev, "device %s\n", str);
 	ixv_init_device_features(adapter);
 	/* Initialize the shared code */
 	error = ixgbe_init_ops_vf(hw);
 	if (error) {
 		aprint_error_dev(dev, "ixgbe_init_ops_vf() failed!\n");
 		error = EIO;
 		goto err_out;
+	}
 	/* Setup the mailbox */
 	ixgbe_init_mbx_params_vf(hw);
 	/* Set the right number of segments */
 	adapter->num_segs = IXGBE_82599_SCATTER;
 	/* Reset mbox api to 1.0 */
 	error = hw->mac.ops.reset_hw(hw);
 	if (error == IXGBE_ERR_RESET_FAILED)
 		aprint_error_dev(dev, "...reset_hw() failure: Reset Failed!\n");
 	else if (error)
 		aprint_error_dev(dev, "...reset_hw() failed with error %d\n",
 		    error);
 	if (error) {
 		error = EIO;
 		goto err_out;
+	}
 	error = hw->mac.ops.init_hw(hw);
 	if (error) {
 		aprint_error_dev(dev, "...init_hw() failed!\n");
 		error = EIO;
 		goto err_out;
+	}
 	/* Negotiate mailbox API version */
 	error = ixv_negotiate_api(adapter);
 	if (error)
 		aprint_normal_dev(dev,
 		    "MBX API negotiation failed during attach!\n");
 	switch (hw->api_version) {
 	case ixgbe_mbox_api_10:
 		apivstr = "1.0";
 		break;
 	case ixgbe_mbox_api_20:
 		apivstr = "2.0";
 		break;
 	case ixgbe_mbox_api_11:
 		apivstr = "1.1";
 		break;
 	case ixgbe_mbox_api_12:
 		apivstr = "1.2";
 		break;
 	case ixgbe_mbox_api_13:
 		apivstr = "1.3";
 		break;
 	default:
 		apivstr = "unknown";
 		break;
+	}
 	aprint_normal_dev(dev, "Mailbox API %s\n", apivstr);
 	/* If no mac address was assigned, make a random one */
 	if (!ixv_check_ether_addr(hw->mac.addr)) {
 		u8 addr[ETHER_ADDR_LEN];
 		uint64_t rndval = cprng_strong64();
 		memcpy(addr, &rndval, sizeof(addr));
 		addr[0] &= 0xFE;
 		addr[0] |= 0x02;
 		bcopy(addr, hw->mac.addr, sizeof(addr));
+	}
 	/* Register for VLAN events */
 	ether_set_vlan_cb(&adapter->osdep.ec, ixv_vlan_cb);
 	/* Sysctls for limiting the amount of work done in the taskqueues */
 	ixv_set_sysctl_value(adapter, "rx_processing_limit",
 	    "max number of rx packets to process",
 	    &adapter->rx_process_limit, ixv_rx_process_limit);
 	ixv_set_sysctl_value(adapter, "tx_processing_limit",
 	    "max number of tx packets to process",
 	    &adapter->tx_process_limit, ixv_tx_process_limit);
 	/* Do descriptor calc and sanity checks */
 	if (((ixv_txd * sizeof(union ixgbe_adv_tx_desc)) % DBA_ALIGN) != 0 ||
 	    ixv_txd < MIN_TXD || ixv_txd > MAX_TXD) {
 		aprint_error_dev(dev, "TXD config issue, using default!\n");
 		adapter->num_tx_desc = DEFAULT_TXD;
 	} else
 		adapter->num_tx_desc = ixv_txd;
 	if (((ixv_rxd * sizeof(union ixgbe_adv_rx_desc)) % DBA_ALIGN) != 0 ||
 	    ixv_rxd < MIN_RXD || ixv_rxd > MAX_RXD) {
 		aprint_error_dev(dev, "RXD config issue, using default!\n");
 		adapter->num_rx_desc = DEFAULT_RXD;
 	} else
 		adapter->num_rx_desc = ixv_rxd;
 	adapter->num_jcl = adapter->num_rx_desc * IXGBE_JCLNUM_MULTI;
 	/* Setup MSI-X */
 	error = ixv_configure_interrupts(adapter);
 	if (error)
 		goto err_out;
 	/* Allocate our TX/RX Queues */
 	if (ixgbe_allocate_queues(adapter)) {
 		aprint_error_dev(dev, "ixgbe_allocate_queues() failed!\n");
 		error = ENOMEM;
 		goto err_out;
+	}
 	/* hw.ix defaults init */
 	adapter->enable_aim = ixv_enable_aim;
 	adapter->txrx_use_workqueue = ixv_txrx_workqueue;
 	error = ixv_allocate_msix(adapter, pa);
 	if (error) {
 		aprint_error_dev(dev, "ixv_allocate_msix() failed!\n");
 		goto err_late;
+	}
 	/* Setup OS specific network interface */
 	error = ixv_setup_interface(dev, adapter);
 	if (error != 0) {
 		aprint_error_dev(dev, "ixv_setup_interface() failed!\n");
 		goto err_late;
+	}
 	/* Do the stats setup */
 	ixv_save_stats(adapter);
 	ixv_init_stats(adapter);
 	ixv_add_stats_sysctls(adapter);
 	if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
 		ixgbe_netmap_attach(adapter);
 	snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_cap);
 	aprint_verbose_dev(dev, "feature cap %s\n", buf);
 	snprintb(buf, sizeof(buf), IXGBE_FEATURE_FLAGS, adapter->feat_en);
 	aprint_verbose_dev(dev, "feature ena %s\n", buf);
 	INIT_DEBUGOUT("ixv_attach: end");
 	adapter->osdep.attached = true;
 	return;
 err_late:
 	ixgbe_free_queues(adapter);
 err_out:
 	ixv_free_pci_resources(adapter);
 	IXGBE_CORE_LOCK_DESTROY(adapter);
 	return;
 } /* ixv_attach */
 /************************************************************************
  * ixv_detach - Device removal routine
+ *
  *   Called when the driver is being removed.
  *   Stops the adapter and deallocates all the resources
  *   that were allocated for driver operation.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static int
 ixv_detach(device_t dev, int flags)
+{
 	struct adapter	*adapter = device_private(dev);
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue *que = adapter->queues;
 	struct tx_ring *txr = adapter->tx_rings;
 	struct rx_ring *rxr = adapter->rx_rings;
 	struct ixgbevf_hw_stats *stats = &adapter->stats.vf;
 	INIT_DEBUGOUT("ixv_detach: begin");
 	if (adapter->osdep.attached == false)
 		return 0;
 	/* Stop the interface. Callouts are stopped in it. */
 	ixv_ifstop(adapter->ifp, 1);
 #if NVLAN > 0
 	/* Make sure VLANs are not using driver */
 	if (!VLAN_ATTACHED(&adapter->osdep.ec))
 		;	/* nothing to do: no VLANs */
 	else if ((flags & (DETACH_SHUTDOWN | DETACH_FORCE)) != 0)
 		vlan_ifdetach(adapter->ifp);
 	else {
 		aprint_error_dev(dev, "VLANs in use, detach first\n");
 		return EBUSY;
+	}
 #endif
 	for (int i = 0; i < adapter->num_queues; i++, que++, txr++) {
 		if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
 			softint_disestablish(txr->txr_si);
 		softint_disestablish(que->que_si);
+	}
 	if (adapter->txr_wq != NULL)
 		workqueue_destroy(adapter->txr_wq);
 	if (adapter->txr_wq_enqueued != NULL)
 		percpu_free(adapter->txr_wq_enqueued, sizeof(u_int));
 	if (adapter->que_wq != NULL)
 		workqueue_destroy(adapter->que_wq);
 	/* Drain the Mailbox(link) queue */
 	softint_disestablish(adapter->link_si);
 	ether_ifdetach(adapter->ifp);
 	callout_halt(&adapter->timer, NULL);
 	if (adapter->feat_en & IXGBE_FEATURE_NETMAP)
 		netmap_detach(adapter->ifp);
 	ixv_free_pci_resources(adapter);
 #if 0 /* XXX the NetBSD port is probably missing something here */
 	bus_generic_detach(dev);
 #endif
 	if_detach(adapter->ifp);
 	if_percpuq_destroy(adapter->ipq);
 	sysctl_teardown(&adapter->sysctllog);
 	evcnt_detach(&adapter->efbig_tx_dma_setup);
 	evcnt_detach(&adapter->mbuf_defrag_failed);
 	evcnt_detach(&adapter->efbig2_tx_dma_setup);
 	evcnt_detach(&adapter->einval_tx_dma_setup);
 	evcnt_detach(&adapter->other_tx_dma_setup);
 	evcnt_detach(&adapter->eagain_tx_dma_setup);
 	evcnt_detach(&adapter->enomem_tx_dma_setup);
 	evcnt_detach(&adapter->watchdog_events);
 	evcnt_detach(&adapter->tso_err);
 	evcnt_detach(&adapter->link_irq);
 	txr = adapter->tx_rings;
 	for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
 		evcnt_detach(&adapter->queues[i].irqs);
 		evcnt_detach(&adapter->queues[i].handleq);
 		evcnt_detach(&adapter->queues[i].req);
 		evcnt_detach(&txr->no_desc_avail);
 		evcnt_detach(&txr->total_packets);
 		evcnt_detach(&txr->tso_tx);
 #ifndef IXGBE_LEGACY_TX
 		evcnt_detach(&txr->pcq_drops);
 #endif
 		evcnt_detach(&rxr->rx_packets);
 		evcnt_detach(&rxr->rx_bytes);
 		evcnt_detach(&rxr->rx_copies);
 		evcnt_detach(&rxr->no_jmbuf);
 		evcnt_detach(&rxr->rx_discarded);
+	}
 	evcnt_detach(&stats->ipcs);
 	evcnt_detach(&stats->l4cs);
 	evcnt_detach(&stats->ipcs_bad);
 	evcnt_detach(&stats->l4cs_bad);
 	/* Packet Reception Stats */
 	evcnt_detach(&stats->vfgorc);
 	evcnt_detach(&stats->vfgprc);
 	evcnt_detach(&stats->vfmprc);
 	/* Packet Transmission Stats */
 	evcnt_detach(&stats->vfgotc);
 	evcnt_detach(&stats->vfgptc);
 	/* Mailbox Stats */
 	evcnt_detach(&hw->mbx.stats.msgs_tx);
 	evcnt_detach(&hw->mbx.stats.msgs_rx);
 	evcnt_detach(&hw->mbx.stats.acks);
 	evcnt_detach(&hw->mbx.stats.reqs);
 	evcnt_detach(&hw->mbx.stats.rsts);
 	ixgbe_free_queues(adapter);
 	IXGBE_CORE_LOCK_DESTROY(adapter);
 	return (0);
 } /* ixv_detach */
 /************************************************************************
  * ixv_init_locked - Init entry point
+ *
  *   Used in two ways: It is used by the stack as an init entry
  *   point in network interface structure. It is also used
  *   by the driver as a hw/sw initialization routine to get
  *   to a consistent state.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static void
 ixv_init_locked(struct adapter *adapter)
+{
 	struct ifnet	*ifp = adapter->ifp;
 	device_t	dev = adapter->dev;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue	*que;
 	int		error = 0;
 	uint32_t mask;
 	int i;
 	INIT_DEBUGOUT("ixv_init_locked: begin");
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	hw->adapter_stopped = FALSE;
 	hw->mac.ops.stop_adapter(hw);
 	callout_stop(&adapter->timer);
 	for (i = 0, que = adapter->queues; i < adapter->num_queues; i++, que++)
 		que->disabled_count = 0;
 	adapter->max_frame_size =
 	    ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
 	/* reprogram the RAR[0] in case user changed it. */
 	hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
 	/* Get the latest mac address, User can use a LAA */
 	memcpy(hw->mac.addr, CLLADDR(ifp->if_sadl),
 	     IXGBE_ETH_LENGTH_OF_ADDRESS);
 	hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, 1);
 	/* Prepare transmit descriptors and buffers */
 	if (ixgbe_setup_transmit_structures(adapter)) {
 		aprint_error_dev(dev, "Could not setup transmit structures\n");
 		ixv_stop(adapter);
 		return;
+	}
 	/* Reset VF and renegotiate mailbox API version */
 	hw->mac.ops.reset_hw(hw);
 	hw->mac.ops.start_hw(hw);
 	error = ixv_negotiate_api(adapter);
 	if (error)
 		device_printf(dev,
 		    "Mailbox API negotiation failed in init_locked!\n");
 	ixv_initialize_transmit_units(adapter);
 	/* Setup Multicast table */
 	ixv_set_rxfilter(adapter);
 	/*
 	 * Determine the correct mbuf pool
 	 * for doing jumbo/headersplit
 	 */
 	if (adapter->max_frame_size <= MCLBYTES)
 		adapter->rx_mbuf_sz = MCLBYTES;
 	else
 		adapter->rx_mbuf_sz = MJUMPAGESIZE;
 	/* Prepare receive descriptors and buffers */
 	if (ixgbe_setup_receive_structures(adapter)) {
 		device_printf(dev, "Could not setup receive structures\n");
 		ixv_stop(adapter);
 		return;
+	}
 	/* Configure RX settings */
 	ixv_initialize_receive_units(adapter);
 	/* Set up VLAN offload and filter */
 	ixv_setup_vlan_support(adapter);
 	/* Set up MSI-X routing */
 	ixv_configure_ivars(adapter);
 	/* Set up auto-mask */
 	mask = (1 << adapter->vector);
 	for (i = 0, que = adapter->queues; i < adapter->num_queues; i++, que++)
 		mask |= (1 << que->msix);
 	IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, mask);
 	/* Set moderation on the Link interrupt */
 	ixv_eitr_write(adapter, adapter->vector, IXGBE_LINK_ITR);
 	/* Stats init */
 	ixv_init_stats(adapter);
 	/* Config/Enable Link */
 	hw->mac.get_link_status = TRUE;
 	hw->mac.ops.check_link(hw, &adapter->link_speed, &adapter->link_up,
 	    FALSE);
 	/* Start watchdog */
 	callout_reset(&adapter->timer, hz, ixv_local_timer, adapter);
 	/* And now turn on interrupts */
 	ixv_enable_intr(adapter);
 	/* Update saved flags. See ixgbe_ifflags_cb() */
 	adapter->if_flags = ifp->if_flags;
 	adapter->ec_capenable = adapter->osdep.ec.ec_capenable;
 	/* Now inform the stack we're ready */
 	ifp->if_flags |= IFF_RUNNING;
 	ifp->if_flags &= ~IFF_OACTIVE;
 	return;
 } /* ixv_init_locked */
 /************************************************************************
  * ixv_enable_queue
  ************************************************************************/
 static inline void
 ixv_enable_queue(struct adapter *adapter, u32 vector)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue *que = &adapter->queues[vector];
 	u32		queue = 1UL << vector;
 	u32		mask;
 	mutex_enter(&que->dc_mtx);
 	if (que->disabled_count > 0 && --que->disabled_count > 0)
 		goto out;
 	mask = (IXGBE_EIMS_RTX_QUEUE & queue);
 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
 out:
 	mutex_exit(&que->dc_mtx);
 } /* ixv_enable_queue */
 /************************************************************************
  * ixv_disable_queue
  ************************************************************************/
 static inline void
 ixv_disable_queue(struct adapter *adapter, u32 vector)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue *que = &adapter->queues[vector];
 	u32		queue = 1UL << vector;
 	u32		mask;
 	mutex_enter(&que->dc_mtx);
 	if (que->disabled_count++ > 0)
 		goto  out;
 	mask = (IXGBE_EIMS_RTX_QUEUE & queue);
 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, mask);
 out:
 	mutex_exit(&que->dc_mtx);
 } /* ixv_disable_queue */
 #if 0
 static inline void
 ixv_rearm_queues(struct adapter *adapter, u64 queues)
+{
 	u32 mask = (IXGBE_EIMS_RTX_QUEUE & queues);
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEICS, mask);
 } /* ixv_rearm_queues */
 #endif
 /************************************************************************
  * ixv_msix_que - MSI-X Queue Interrupt Service routine
  ************************************************************************/
 static int
 ixv_msix_que(void *arg)
+{
 	struct ix_queue	*que = arg;
 	struct adapter	*adapter = que->adapter;
 	struct tx_ring	*txr = que->txr;
 	struct rx_ring	*rxr = que->rxr;
 	bool		more;
 	u32		newitr = 0;
 	ixv_disable_queue(adapter, que->msix);
 	++que->irqs.ev_count;
 #ifdef __NetBSD__
 	/* Don't run ixgbe_rxeof in interrupt context */
 	more = true;
 #else
 	more = ixgbe_rxeof(que);
 #endif
 	IXGBE_TX_LOCK(txr);
 	ixgbe_txeof(txr);
 	IXGBE_TX_UNLOCK(txr);
 	/* Do AIM now? */
 	if (adapter->enable_aim == false)
 		goto no_calc;
 	/*
 	 * Do Adaptive Interrupt Moderation:
 	 *  - Write out last calculated setting
 	 *  - Calculate based on average size over
 	 *    the last interval.
 	 */
 	if (que->eitr_setting)
 		ixv_eitr_write(adapter, que->msix, que->eitr_setting);
 	que->eitr_setting = 0;
 	/* Idle, do nothing */
 	if ((txr->bytes == 0) && (rxr->bytes == 0))
 		goto no_calc;
 	if ((txr->bytes) && (txr->packets))
 		newitr = txr->bytes/txr->packets;
 	if ((rxr->bytes) && (rxr->packets))
 		newitr = uimax(newitr, (rxr->bytes / rxr->packets));
 	newitr += 24; /* account for hardware frame, crc */
 	/* set an upper boundary */
 	newitr = uimin(newitr, 3000);
 	/* Be nice to the mid range */
 	if ((newitr > 300) && (newitr < 1200))
 		newitr = (newitr / 3);
 	else
 		newitr = (newitr / 2);
 	/*
 	 * When RSC is used, ITR interval must be larger than RSC_DELAY.
 	 * Currently, we use 2us for RSC_DELAY. The minimum value is always
 	 * greater than 2us on 100M (and 10M?(not documented)), but it's not
 	 * on 1G and higher.
 	 */
 	if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
 	    && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
 		if (newitr < IXGBE_MIN_RSC_EITR_10G1G)
 			newitr = IXGBE_MIN_RSC_EITR_10G1G;
+	}
 	/* save for next interrupt */
 	que->eitr_setting = newitr;
 	/* Reset state */
 	txr->bytes = 0;
 	txr->packets = 0;
 	rxr->bytes = 0;
 	rxr->packets = 0;
 no_calc:
 	if (more)
 		softint_schedule(que->que_si);
 	else /* Re-enable this interrupt */
 		ixv_enable_queue(adapter, que->msix);
 	return 1;
 } /* ixv_msix_que */
 /************************************************************************
  * ixv_msix_mbx
  ************************************************************************/
 static int
 ixv_msix_mbx(void *arg)
+{
 	struct adapter	*adapter = arg;
 	struct ixgbe_hw *hw = &adapter->hw;
 	++adapter->link_irq.ev_count;
 	/* NetBSD: We use auto-clear, so it's not required to write VTEICR */
 	/* Link status change */
 	hw->mac.get_link_status = TRUE;
 	softint_schedule(adapter->link_si);
 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, (1 << adapter->vector));
 	return 1;
 } /* ixv_msix_mbx */
 static void
 ixv_eitr_write(struct adapter *adapter, uint32_t index, uint32_t itr)
+{
 	/*
 	 * Newer devices than 82598 have VF function, so this function is
 	 * simple.
 	 */
 	itr |= IXGBE_EITR_CNT_WDIS;
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEITR(index), itr);
+}
 /************************************************************************
  * ixv_media_status - Media Ioctl callback
+ *
  *   Called whenever the user queries the status of
  *   the interface using ifconfig.
  ************************************************************************/
 static void
 ixv_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
+{
 	struct adapter *adapter = ifp->if_softc;
 	INIT_DEBUGOUT("ixv_media_status: begin");
 	IXGBE_CORE_LOCK(adapter);
 	ixv_update_link_status(adapter);
 	ifmr->ifm_status = IFM_AVALID;
 	ifmr->ifm_active = IFM_ETHER;
 	if (adapter->link_active != LINK_STATE_UP) {
 		ifmr->ifm_active |= IFM_NONE;
 		IXGBE_CORE_UNLOCK(adapter);
 		return;
+	}
 	ifmr->ifm_status |= IFM_ACTIVE;
 	switch (adapter->link_speed) {
 		case IXGBE_LINK_SPEED_10GB_FULL:
 			ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_5GB_FULL:
 			ifmr->ifm_active |= IFM_5000_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_2_5GB_FULL:
 			ifmr->ifm_active |= IFM_2500_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_1GB_FULL:
 			ifmr->ifm_active |= IFM_1000_T | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_100_FULL:
 			ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
 			break;
 		case IXGBE_LINK_SPEED_10_FULL:
 			ifmr->ifm_active |= IFM_10_T | IFM_FDX;
 			break;
+	}
 	ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active);
 	IXGBE_CORE_UNLOCK(adapter);
 } /* ixv_media_status */
 /************************************************************************
  * ixv_media_change - Media Ioctl callback
+ *
  *   Called when the user changes speed/duplex using
  *   media/mediopt option with ifconfig.
  ************************************************************************/
 static int
 ixv_media_change(struct ifnet *ifp)
+{
 	struct adapter *adapter = ifp->if_softc;
 	struct ifmedia *ifm = &adapter->media;
 	INIT_DEBUGOUT("ixv_media_change: begin");
 	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
 		return (EINVAL);
 	switch (IFM_SUBTYPE(ifm->ifm_media)) {
 	case IFM_AUTO:
 		break;
 	default:
 		device_printf(adapter->dev, "Only auto media type\n");
 		return (EINVAL);
+	}
 	return (0);
 } /* ixv_media_change */
 /************************************************************************
  * ixv_negotiate_api
+ *
  *   Negotiate the Mailbox API with the PF;
  *   start with the most featured API first.
  ************************************************************************/
 static int
 ixv_negotiate_api(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	int		mbx_api[] = { ixgbe_mbox_api_13,
 				      ixgbe_mbox_api_12,
 				      ixgbe_mbox_api_11,
 				      ixgbe_mbox_api_10,
 				      ixgbe_mbox_api_unknown };
 	int		i = 0;
 	while (mbx_api[i] != ixgbe_mbox_api_unknown) {
 		if (ixgbevf_negotiate_api_version(hw, mbx_api[i]) == 0)
 			return (0);
 		i++;
+	}
 	return (EINVAL);
 } /* ixv_negotiate_api */
 /************************************************************************
  * ixv_set_rxfilter - Multicast Update
+ *
  *   Called whenever multicast address list is updated.
  ************************************************************************/
 static int
 ixv_set_rxfilter(struct adapter *adapter)
+{
 	u8	mta[IXGBE_MAX_VF_MC * IXGBE_ETH_LENGTH_OF_ADDRESS];
 	struct ifnet		*ifp = adapter->ifp;
 	struct ixgbe_hw		*hw = &adapter->hw;
 	u8			*update_ptr;
 	int			mcnt = 0;
 	struct ethercom		*ec = &adapter->osdep.ec;
 	struct ether_multi	*enm;
 	struct ether_multistep	step;
 	bool			overflow = false;
 	int			error, rc = 0;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	IOCTL_DEBUGOUT("ixv_set_rxfilter: begin");
 	/* 1: For PROMISC */
 	if (ifp->if_flags & IFF_PROMISC) {
 		error = hw->mac.ops.update_xcast_mode(hw,
 		    IXGBEVF_XCAST_MODE_PROMISC);
 		if (error == IXGBE_ERR_NOT_TRUSTED) {
 			device_printf(adapter->dev,
 			    "this interface is not trusted\n");
 			error = EPERM;
 		} else if (error == IXGBE_ERR_FEATURE_NOT_SUPPORTED) {
 			device_printf(adapter->dev,
 			    "the PF doesn't support promisc mode\n");
 			error = EOPNOTSUPP;
 		} else if (error == IXGBE_ERR_NOT_IN_PROMISC) {
 			device_printf(adapter->dev,
 			    "the PF may not in promisc mode\n");
 			error = EINVAL;
 		} else if (error) {
 			device_printf(adapter->dev,
 			    "failed to set promisc mode. error = %d\n",
 			    error);
 			error = EIO;
 		} else
 			return 0;
 		rc = error;
+	}
 	/* 2: For ALLMULTI or normal */
 	ETHER_LOCK(ec);
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
 		if ((mcnt >= IXGBE_MAX_VF_MC) ||
 		    (memcmp(enm->enm_addrlo, enm->enm_addrhi,
 			ETHER_ADDR_LEN) != 0)) {
 			overflow = true;
 			break;
+		}
 		bcopy(enm->enm_addrlo,
 		    &mta[mcnt * IXGBE_ETH_LENGTH_OF_ADDRESS],
 		    IXGBE_ETH_LENGTH_OF_ADDRESS);
 		mcnt++;
 		ETHER_NEXT_MULTI(step, enm);
+	}
 	ETHER_UNLOCK(ec);
 	/* 3: For ALLMULTI */
 	if (overflow) {
 		error = hw->mac.ops.update_xcast_mode(hw,
 		    IXGBEVF_XCAST_MODE_ALLMULTI);
 		if (error == IXGBE_ERR_NOT_TRUSTED) {
 			device_printf(adapter->dev,
 			    "this interface is not trusted\n");
 			error = EPERM;
 		} else if (error == IXGBE_ERR_FEATURE_NOT_SUPPORTED) {
 			device_printf(adapter->dev,
 			    "the PF doesn't support allmulti mode\n");
 			error = EOPNOTSUPP;
 		} else if (error) {
 			device_printf(adapter->dev,
 			    "number of Ethernet multicast addresses "
 			    "exceeds the limit (%d). error = %d\n",
 			    IXGBE_MAX_VF_MC, error);
 			error = ENOSPC;
 		} else {
 			ETHER_LOCK(ec);
 			ec->ec_flags |= ETHER_F_ALLMULTI;
 			ETHER_UNLOCK(ec);
 			return rc; /* Promisc might have failed */
+		}
 		if (rc == 0)
 			rc = error;
 		/* Continue to update the multicast table as many as we can */
+	}
 	/* 4: For normal operation */
 	error = hw->mac.ops.update_xcast_mode(hw, IXGBEVF_XCAST_MODE_MULTI);
 	if ((error == IXGBE_ERR_FEATURE_NOT_SUPPORTED) || (error == 0)) {
 		/* Normal operation */
 		ETHER_LOCK(ec);
 		ec->ec_flags &= ~ETHER_F_ALLMULTI;
 		ETHER_UNLOCK(ec);
 		error = 0;
 	} else if (error) {
 		device_printf(adapter->dev,
 		    "failed to set Ethernet multicast address "
 		    "operation to normal. error = %d\n", error);
+	}
 	update_ptr = mta;
 	error = adapter->hw.mac.ops.update_mc_addr_list(&adapter->hw,
 	    update_ptr, mcnt, ixv_mc_array_itr, TRUE);
 	if (rc == 0)
 		rc = error;
 	return rc;
 } /* ixv_set_rxfilter */
 /************************************************************************
  * ixv_mc_array_itr
+ *
  *   An iterator function needed by the multicast shared code.
  *   It feeds the shared code routine the addresses in the
  *   array of ixv_set_rxfilter() one by one.
  ************************************************************************/
 static u8 *
 ixv_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
+{
 	u8 *addr = *update_ptr;
 	u8 *newptr;
 	*vmdq = 0;
 	newptr = addr + IXGBE_ETH_LENGTH_OF_ADDRESS;
 	*update_ptr = newptr;
 	return addr;
 } /* ixv_mc_array_itr */
 /************************************************************************
  * ixv_local_timer - Timer routine
+ *
  *   Checks for link status, updates statistics,
  *   and runs the watchdog check.
  ************************************************************************/
 static void
 ixv_local_timer(void *arg)
+{
 	struct adapter *adapter = arg;
 	IXGBE_CORE_LOCK(adapter);
 	ixv_local_timer_locked(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
+}
 static void
 ixv_local_timer_locked(void *arg)
+{
 	struct adapter	*adapter = arg;
 	device_t	dev = adapter->dev;
 	struct ix_queue	*que = adapter->queues;
 	u64		queues = 0;
 	u64		v0, v1, v2, v3, v4, v5, v6, v7;
 	int		hung = 0;
 	int		i;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	if (ixv_check_link(adapter)) {
 		ixv_init_locked(adapter);
 		return;
+	}
 	/* Stats Update */
 	ixv_update_stats(adapter);
 	/* Update some event counters */
 	v0 = v1 = v2 = v3 = v4 = v5 = v6 = v7 = 0;
 	que = adapter->queues;
 	for (i = 0; i < adapter->num_queues; i++, que++) {
 		struct tx_ring	*txr = que->txr;
 		v0 += txr->q_efbig_tx_dma_setup;
 		v1 += txr->q_mbuf_defrag_failed;
 		v2 += txr->q_efbig2_tx_dma_setup;
 		v3 += txr->q_einval_tx_dma_setup;
 		v4 += txr->q_other_tx_dma_setup;
 		v5 += txr->q_eagain_tx_dma_setup;
 		v6 += txr->q_enomem_tx_dma_setup;
 		v7 += txr->q_tso_err;
+	}
 	adapter->efbig_tx_dma_setup.ev_count = v0;
 	adapter->mbuf_defrag_failed.ev_count = v1;
 	adapter->efbig2_tx_dma_setup.ev_count = v2;
 	adapter->einval_tx_dma_setup.ev_count = v3;
 	adapter->other_tx_dma_setup.ev_count = v4;
 	adapter->eagain_tx_dma_setup.ev_count = v5;
 	adapter->enomem_tx_dma_setup.ev_count = v6;
 	adapter->tso_err.ev_count = v7;
 	/*
 	 * Check the TX queues status
 	 *	- mark hung queues so we don't schedule on them
 	 *	- watchdog only if all queues show hung
 	 */
 	que = adapter->queues;
 	for (i = 0; i < adapter->num_queues; i++, que++) {
 		/* Keep track of queues with work for soft irq */
 		if (que->txr->busy)
 			queues |= ((u64)1 << que->me);
 		/*
 		 * Each time txeof runs without cleaning, but there
 		 * are uncleaned descriptors it increments busy. If
 		 * we get to the MAX we declare it hung.
 		 */
 		if (que->busy == IXGBE_QUEUE_HUNG) {
 			++hung;
 			/* Mark the queue as inactive */
 			adapter->active_queues &= ~((u64)1 << que->me);
 			continue;
 		} else {
 			/* Check if we've come back from hung */
 			if ((adapter->active_queues & ((u64)1 << que->me)) == 0)
 				adapter->active_queues |= ((u64)1 << que->me);
+		}
 		if (que->busy >= IXGBE_MAX_TX_BUSY) {
 			device_printf(dev,
 			    "Warning queue %d appears to be hung!\n", i);
 			que->txr->busy = IXGBE_QUEUE_HUNG;
 			++hung;
+		}
+	}
 	/* Only truly watchdog if all queues show hung */
 	if (hung == adapter->num_queues)
 		goto watchdog;
 #if 0
 	else if (queues != 0) { /* Force an IRQ on queues with work */
 		ixv_rearm_queues(adapter, queues);
+	}
 #endif
 	callout_reset(&adapter->timer, hz, ixv_local_timer, adapter);
 	return;
 watchdog:
 	device_printf(adapter->dev, "Watchdog timeout -- resetting\n");
 	adapter->ifp->if_flags &= ~IFF_RUNNING;
 	adapter->watchdog_events.ev_count++;
 	ixv_init_locked(adapter);
 } /* ixv_local_timer */
 /************************************************************************
  * ixv_update_link_status - Update OS on link state
+ *
  * Note: Only updates the OS on the cached link state.
  *	 The real check of the hardware only happens with
  *	 a link interrupt.
  ************************************************************************/
 static void
 ixv_update_link_status(struct adapter *adapter)
+{
 	struct ifnet *ifp = adapter->ifp;
 	device_t     dev = adapter->dev;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	if (adapter->link_up) {
 		if (adapter->link_active != LINK_STATE_UP) {
 			if (bootverbose) {
 				const char *bpsmsg;
 				switch (adapter->link_speed) {
 				case IXGBE_LINK_SPEED_10GB_FULL:
 					bpsmsg = "10 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_5GB_FULL:
 					bpsmsg = "5 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_2_5GB_FULL:
 					bpsmsg = "2.5 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_1GB_FULL:
 					bpsmsg = "1 Gbps";
 					break;
 				case IXGBE_LINK_SPEED_100_FULL:
 					bpsmsg = "100 Mbps";
 					break;
 				case IXGBE_LINK_SPEED_10_FULL:
 					bpsmsg = "10 Mbps";
 					break;
 				default:
 					bpsmsg = "unknown speed";
 					break;
+				}
 				device_printf(dev, "Link is up %s %s \n",
 				    bpsmsg, "Full Duplex");
+			}
 			adapter->link_active = LINK_STATE_UP;
 			if_link_state_change(ifp, LINK_STATE_UP);
+		}
 	} else {
 		/*
 		 * Do it when link active changes to DOWN. i.e.
 		 * a) LINK_STATE_UNKNOWN -> LINK_STATE_DOWN
 		 * b) LINK_STATE_UP	 -> LINK_STATE_DOWN
 		 */
 		if (adapter->link_active != LINK_STATE_DOWN) {
 			if (bootverbose)
 				device_printf(dev, "Link is Down\n");
 			if_link_state_change(ifp, LINK_STATE_DOWN);
 			adapter->link_active = LINK_STATE_DOWN;
+		}
+	}
 } /* ixv_update_link_status */
 /************************************************************************
  * ixv_stop - Stop the hardware
+ *
  *   Disables all traffic on the adapter by issuing a
  *   global reset on the MAC and deallocates TX/RX buffers.
  ************************************************************************/
 static void
 ixv_ifstop(struct ifnet *ifp, int disable)
+{
 	struct adapter *adapter = ifp->if_softc;
 	IXGBE_CORE_LOCK(adapter);
 	ixv_stop(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
+}
 static void
 ixv_stop(void *arg)
+{
 	struct ifnet	*ifp;
 	struct adapter	*adapter = arg;
 	struct ixgbe_hw *hw = &adapter->hw;
 	ifp = adapter->ifp;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	INIT_DEBUGOUT("ixv_stop: begin\n");
 	ixv_disable_intr(adapter);
 	/* Tell the stack that the interface is no longer active */
 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
 	hw->mac.ops.reset_hw(hw);
 	adapter->hw.adapter_stopped = FALSE;
 	hw->mac.ops.stop_adapter(hw);
 	callout_stop(&adapter->timer);
 	/* reprogram the RAR[0] in case user changed it. */
 	hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
 	return;
 } /* ixv_stop */
 /************************************************************************
  * ixv_allocate_pci_resources
  ************************************************************************/
 static int
 ixv_allocate_pci_resources(struct adapter *adapter,
     const struct pci_attach_args *pa)
+{
 	pcireg_t	memtype, csr;
 	device_t	dev = adapter->dev;
 	bus_addr_t addr;
 	int flags;
 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR(0));
 	switch (memtype) {
 	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
 	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
 		adapter->osdep.mem_bus_space_tag = pa->pa_memt;
 		if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(0),
 		      memtype, &addr, &adapter->osdep.mem_size, &flags) != 0)
 			goto map_err;
 		if ((flags & BUS_SPACE_MAP_PREFETCHABLE) != 0) {
 			aprint_normal_dev(dev, "clearing prefetchable bit\n");
 			flags &= ~BUS_SPACE_MAP_PREFETCHABLE;
+		}
 		if (bus_space_map(adapter->osdep.mem_bus_space_tag, addr,
 		     adapter->osdep.mem_size, flags,
 		     &adapter->osdep.mem_bus_space_handle) != 0) {
 map_err:
 			adapter->osdep.mem_size = 0;
 			aprint_error_dev(dev, "unable to map BAR0\n");
 			return ENXIO;
+		}
 		/*
 		 * Enable address decoding for memory range in case it's not
 		 * set.
 		 */
 		csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
 		    PCI_COMMAND_STATUS_REG);
 		csr |= PCI_COMMAND_MEM_ENABLE;
 		pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
 		    csr);
 		break;
 	default:
 		aprint_error_dev(dev, "unexpected type on BAR0\n");
 		return ENXIO;
+	}
 @@ -1503,1929 +1506,1936 @@ map_err:
 	return (0);
 } /* ixv_allocate_pci_resources */
 /************************************************************************
  * ixv_free_pci_resources
  ************************************************************************/
 static void
 ixv_free_pci_resources(struct adapter * adapter)
+{
 	struct		ix_queue *que = adapter->queues;
 	int		rid;
 	/*
 	 *  Release all msix queue resources:
 	 */
 	for (int i = 0; i < adapter->num_queues; i++, que++) {
 		if (que->res != NULL)
 			pci_intr_disestablish(adapter->osdep.pc,
 			    adapter->osdep.ihs[i]);
+	}
 	/* Clean the Mailbox interrupt last */
 	rid = adapter->vector;
 	if (adapter->osdep.ihs[rid] != NULL) {
 		pci_intr_disestablish(adapter->osdep.pc,
 		    adapter->osdep.ihs[rid]);
 		adapter->osdep.ihs[rid] = NULL;
+	}
 	pci_intr_release(adapter->osdep.pc, adapter->osdep.intrs,
 	    adapter->osdep.nintrs);
 	if (adapter->osdep.mem_size != 0) {
 		bus_space_unmap(adapter->osdep.mem_bus_space_tag,
 		    adapter->osdep.mem_bus_space_handle,
 		    adapter->osdep.mem_size);
+	}
 	return;
 } /* ixv_free_pci_resources */
 /************************************************************************
  * ixv_setup_interface
+ *
  *   Setup networking device structure and register an interface.
  ************************************************************************/
 static int
 ixv_setup_interface(device_t dev, struct adapter *adapter)
+{
 	struct ethercom *ec = &adapter->osdep.ec;
 	struct ifnet   *ifp;
 	int rv;
 	INIT_DEBUGOUT("ixv_setup_interface: begin");
 	ifp = adapter->ifp = &ec->ec_if;
 	strlcpy(ifp->if_xname, device_xname(dev), IFNAMSIZ);
 	ifp->if_baudrate = IF_Gbps(10);
 	ifp->if_init = ixv_init;
 	ifp->if_stop = ixv_ifstop;
 	ifp->if_softc = adapter;
 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 #ifdef IXGBE_MPSAFE
 	ifp->if_extflags = IFEF_MPSAFE;
 #endif
 	ifp->if_ioctl = ixv_ioctl;
 	if (adapter->feat_en & IXGBE_FEATURE_LEGACY_TX) {
 #if 0
 		ixv_start_locked = ixgbe_legacy_start_locked;
 #endif
 	} else {
 		ifp->if_transmit = ixgbe_mq_start;
 #if 0
 		ixv_start_locked = ixgbe_mq_start_locked;
 #endif
+	}
 	ifp->if_start = ixgbe_legacy_start;
 	IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 2);
 	IFQ_SET_READY(&ifp->if_snd);
 	rv = if_initialize(ifp);
 	if (rv != 0) {
 		aprint_error_dev(dev, "if_initialize failed(%d)\n", rv);
 		return rv;
+	}
 	adapter->ipq = if_percpuq_create(&adapter->osdep.ec.ec_if);
 	ether_ifattach(ifp, adapter->hw.mac.addr);
 	aprint_normal_dev(dev, "Ethernet address %s\n",
 	    ether_sprintf(adapter->hw.mac.addr));
 	/*
 	 * We use per TX queue softint, so if_deferred_start_init() isn't
 	 * used.
 	 */
 	ether_set_ifflags_cb(ec, ixv_ifflags_cb);
 	adapter->max_frame_size = ifp->if_mtu + IXGBE_MTU_HDR;
 	/*
 	 * Tell the upper layer(s) we support long frames.
 	 */
 	ifp->if_hdrlen = sizeof(struct ether_vlan_header);
 	/* Set capability flags */
 	ifp->if_capabilities |= IFCAP_HWCSUM
 			     |	IFCAP_TSOv4
 			     |	IFCAP_TSOv6;
 	ifp->if_capenable = 0;
 	ec->ec_capabilities |= ETHERCAP_VLAN_HWFILTER
 			    |  ETHERCAP_VLAN_HWTAGGING
 			    |  ETHERCAP_VLAN_HWCSUM
 			    |  ETHERCAP_JUMBO_MTU
 			    |  ETHERCAP_VLAN_MTU;
 	/* Enable the above capabilities by default */
 	ec->ec_capenable = ec->ec_capabilities;
 	/* Don't enable LRO by default */
 #if 0
 	/* NetBSD doesn't support LRO yet */
 	ifp->if_capabilities |= IFCAP_LRO;
 #endif
 	/*
 	 * Specify the media types supported by this adapter and register
 	 * callbacks to update media and link information
 	 */
 	ec->ec_ifmedia = &adapter->media;
 	ifmedia_init(&adapter->media, IFM_IMASK, ixv_media_change,
 	    ixv_media_status);
 	ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
 	ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
 	if_register(ifp);
 	return 0;
 } /* ixv_setup_interface */
 /************************************************************************
  * ixv_initialize_transmit_units - Enable transmit unit.
  ************************************************************************/
 static void
 ixv_initialize_transmit_units(struct adapter *adapter)
+{
 	struct tx_ring	*txr = adapter->tx_rings;
 	struct ixgbe_hw	*hw = &adapter->hw;
 	int i;
 	for (i = 0; i < adapter->num_queues; i++, txr++) {
 		u64 tdba = txr->txdma.dma_paddr;
 		u32 txctrl, txdctl;
 		int j = txr->me;
 		/* Set WTHRESH to 8, burst writeback */
 		txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
 		txdctl |= (8 << 16);
 		IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
 		/* Set the HW Tx Head and Tail indices */
 		IXGBE_WRITE_REG(&adapter->hw, IXGBE_VFTDH(j), 0);
 		IXGBE_WRITE_REG(&adapter->hw, IXGBE_VFTDT(j), 0);
 		/* Set Tx Tail register */
 		txr->tail = IXGBE_VFTDT(j);
 		txr->txr_no_space = false;
 		/* Set Ring parameters */
 		IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
 		    (tdba & 0x00000000ffffffffULL));
 		IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
 		IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j),
 		    adapter->num_tx_desc * sizeof(struct ixgbe_legacy_tx_desc));
 		txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
 		txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
 		IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
 		/* Now enable */
 		txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
 		txdctl |= IXGBE_TXDCTL_ENABLE;
 		IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
+	}
 	return;
 } /* ixv_initialize_transmit_units */
 /************************************************************************
  * ixv_initialize_rss_mapping
  ************************************************************************/
 static void
 ixv_initialize_rss_mapping(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		reta = 0, mrqc, rss_key[10];
 	int		queue_id;
 	int		i, j;
 	u32		rss_hash_config;
 	/* force use default RSS key. */
 #ifdef __NetBSD__
 	rss_getkey((uint8_t *) &rss_key);
 #else
 	if (adapter->feat_en & IXGBE_FEATURE_RSS) {
 		/* Fetch the configured RSS key */
 		rss_getkey((uint8_t *)&rss_key);
 	} else {
 		/* set up random bits */
 		cprng_fast(&rss_key, sizeof(rss_key));
+	}
 #endif
 	/* Now fill out hash function seeds */
 	for (i = 0; i < 10; i++)
 		IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), rss_key[i]);
 	/* Set up the redirection table */
 	for (i = 0, j = 0; i < 64; i++, j++) {
 		if (j == adapter->num_queues)
 			j = 0;
 		if (adapter->feat_en & IXGBE_FEATURE_RSS) {
 			/*
 			 * Fetch the RSS bucket id for the given indirection
 			 * entry. Cap it at the number of configured buckets
 			 * (which is num_queues.)
 			 */
 			queue_id = rss_get_indirection_to_bucket(i);
 			queue_id = queue_id % adapter->num_queues;
 		} else
 			queue_id = j;
 		/*
 		 * The low 8 bits are for hash value (n+0);
 		 * The next 8 bits are for hash value (n+1), etc.
 		 */
 		reta >>= 8;
 		reta |= ((uint32_t)queue_id) << 24;
 		if ((i & 3) == 3) {
 			IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), reta);
 			reta = 0;
+		}
+	}
 	/* Perform hash on these packet types */
 	if (adapter->feat_en & IXGBE_FEATURE_RSS)
 		rss_hash_config = rss_gethashconfig();
 	else {
 		/*
 		 * Disable UDP - IP fragments aren't currently being handled
 		 * and so we end up with a mix of 2-tuple and 4-tuple
 		 * traffic.
 		 */
 		rss_hash_config = RSS_HASHTYPE_RSS_IPV4
 				| RSS_HASHTYPE_RSS_TCP_IPV4
 				| RSS_HASHTYPE_RSS_IPV6
 				| RSS_HASHTYPE_RSS_TCP_IPV6;
+	}
 	mrqc = IXGBE_MRQC_RSSEN;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX)
 		device_printf(adapter->dev, "%s: RSS_HASHTYPE_RSS_IPV6_EX defined, but not supported\n",
 		    __func__);
 	if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX)
 		device_printf(adapter->dev, "%s: RSS_HASHTYPE_RSS_TCP_IPV6_EX defined, but not supported\n",
 		    __func__);
 	if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6)
 		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
 	if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX)
 		device_printf(adapter->dev, "%s: RSS_HASHTYPE_RSS_UDP_IPV6_EX defined, but not supported\n",
 		    __func__);
 	IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, mrqc);
 } /* ixv_initialize_rss_mapping */
 /************************************************************************
  * ixv_initialize_receive_units - Setup receive registers and features.
  ************************************************************************/
 static void
 ixv_initialize_receive_units(struct adapter *adapter)
+{
 	struct	rx_ring	*rxr = adapter->rx_rings;
 	struct ixgbe_hw	*hw = &adapter->hw;
 	struct ifnet	*ifp = adapter->ifp;
 	u32		bufsz, psrtype;
 	if (ifp->if_mtu > ETHERMTU)
 		bufsz = 4096 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
 	else
 		bufsz = 2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
 	psrtype = IXGBE_PSRTYPE_TCPHDR
 		| IXGBE_PSRTYPE_UDPHDR
 		| IXGBE_PSRTYPE_IPV4HDR
 		| IXGBE_PSRTYPE_IPV6HDR
 		| IXGBE_PSRTYPE_L2HDR;
 	if (adapter->num_queues > 1)
 		psrtype |= 1 << 29;
 	IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
 	/* Tell PF our max_frame size */
 	if (ixgbevf_rlpml_set_vf(hw, adapter->max_frame_size) != 0) {
 		device_printf(adapter->dev, "There is a problem with the PF setup.  It is likely the receive unit for this VF will not function correctly.\n");
+	}
 	for (int i = 0; i < adapter->num_queues; i++, rxr++) {
 		u64 rdba = rxr->rxdma.dma_paddr;
 		u32 reg, rxdctl;
 		int j = rxr->me;
 		/* Disable the queue */
 		rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
 		rxdctl &= ~IXGBE_RXDCTL_ENABLE;
 		IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
 		for (int k = 0; k < 10; k++) {
 			if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) &
 			    IXGBE_RXDCTL_ENABLE)
 				msec_delay(1);
 			else
 				break;
+		}
 		IXGBE_WRITE_BARRIER(hw);
 		/* Setup the Base and Length of the Rx Descriptor Ring */
 		IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
 		    (rdba & 0x00000000ffffffffULL));
 		IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
 		IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j),
 		    adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc));
 		/* Reset the ring indices */
 		IXGBE_WRITE_REG(hw, IXGBE_VFRDH(rxr->me), 0);
 		IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me), 0);
 		/* Set up the SRRCTL register */
 		reg = IXGBE_READ_REG(hw, IXGBE_VFSRRCTL(j));
 		reg &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
 		reg &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
 		reg |= bufsz;
 		reg |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
 		IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(j), reg);
 		/* Capture Rx Tail index */
 		rxr->tail = IXGBE_VFRDT(rxr->me);
 		/* Do the queue enabling last */
 		rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
 		IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
 		for (int k = 0; k < 10; k++) {
 			if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) &
 			    IXGBE_RXDCTL_ENABLE)
 				break;
 			msec_delay(1);
+		}
 		IXGBE_WRITE_BARRIER(hw);
 		/* Set the Tail Pointer */
 #ifdef DEV_NETMAP
 		/*
 		 * In netmap mode, we must preserve the buffers made
 		 * available to userspace before the if_init()
 		 * (this is true by default on the TX side, because
 		 * init makes all buffers available to userspace).
+		 *
 		 * netmap_reset() and the device specific routines
 		 * (e.g. ixgbe_setup_receive_rings()) map these
 		 * buffers at the end of the NIC ring, so here we
 		 * must set the RDT (tail) register to make sure
 		 * they are not overwritten.
+		 *
 		 * In this driver the NIC ring starts at RDH = 0,
 		 * RDT points to the last slot available for reception (?),
 		 * so RDT = num_rx_desc - 1 means the whole ring is available.
 		 */
 		if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
 		    (ifp->if_capenable & IFCAP_NETMAP)) {
 			struct netmap_adapter *na = NA(adapter->ifp);
 			struct netmap_kring *kring = na->rx_rings[i];
 			int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring);
 			IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me), t);
 		} else
 #endif /* DEV_NETMAP */
 			IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me),
 			    adapter->num_rx_desc - 1);
+	}
 	if (adapter->hw.mac.type >= ixgbe_mac_X550_vf)
 		ixv_initialize_rss_mapping(adapter);
 } /* ixv_initialize_receive_units */
 /************************************************************************
  * ixv_sysctl_tdh_handler - Transmit Descriptor Head handler function
+ *
  *   Retrieves the TDH value from the hardware
  ************************************************************************/
 static int
 ixv_sysctl_tdh_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
 	uint32_t val;
 	if (!txr)
 		return (0);
 	val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_VFTDH(txr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixv_sysctl_tdh_handler */
 /************************************************************************
  * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function
+ *
  *   Retrieves the TDT value from the hardware
  ************************************************************************/
 static int
 ixv_sysctl_tdt_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
 	uint32_t val;
 	if (!txr)
 		return (0);
 	val = IXGBE_READ_REG(&txr->adapter->hw, IXGBE_VFTDT(txr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixv_sysctl_tdt_handler */
 /************************************************************************
  * ixv_sysctl_next_to_check_handler - Receive Descriptor next to check
  * handler function
+ *
  *   Retrieves the next_to_check value
  ************************************************************************/
 static int
 ixv_sysctl_next_to_check_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
 	uint32_t val;
 	if (!rxr)
 		return (0);
 	val = rxr->next_to_check;
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixv_sysctl_next_to_check_handler */
 /************************************************************************
  * ixv_sysctl_rdh_handler - Receive Descriptor Head handler function
+ *
  *   Retrieves the RDH value from the hardware
  ************************************************************************/
 static int
 ixv_sysctl_rdh_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
 	uint32_t val;
 	if (!rxr)
 		return (0);
 	val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_VFRDH(rxr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixv_sysctl_rdh_handler */
 /************************************************************************
  * ixv_sysctl_rdt_handler - Receive Descriptor Tail handler function
+ *
  *   Retrieves the RDT value from the hardware
  ************************************************************************/
 static int
 ixv_sysctl_rdt_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct rx_ring *rxr = (struct rx_ring *)node.sysctl_data;
 	uint32_t val;
 	if (!rxr)
 		return (0);
 	val = IXGBE_READ_REG(&rxr->adapter->hw, IXGBE_VFRDT(rxr->me));
 	node.sysctl_data = &val;
 	return sysctl_lookup(SYSCTLFN_CALL(&node));
 } /* ixv_sysctl_rdt_handler */
 static void
 ixv_setup_vlan_tagging(struct adapter *adapter)
+{
 	struct ethercom *ec = &adapter->osdep.ec;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct rx_ring	*rxr;
 	u32		ctrl;
 	int		i;
 	bool		hwtagging;
 	/* Enable HW tagging only if any vlan is attached */
 	hwtagging = (ec->ec_capenable & ETHERCAP_VLAN_HWTAGGING)
 	    && VLAN_ATTACHED(ec);
 	/* Enable the queues */
 	for (i = 0; i < adapter->num_queues; i++) {
 		rxr = &adapter->rx_rings[i];
 		ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(rxr->me));
 		if (hwtagging)
 			ctrl |= IXGBE_RXDCTL_VME;
 		else
 			ctrl &= ~IXGBE_RXDCTL_VME;
 		IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(rxr->me), ctrl);
 		/*
 		 * Let Rx path know that it needs to store VLAN tag
 		 * as part of extra mbuf info.
 		 */
 		rxr->vtag_strip = hwtagging ? TRUE : FALSE;
+	}
 } /* ixv_setup_vlan_tagging */
 /************************************************************************
  * ixv_setup_vlan_support
  ************************************************************************/
 static int
 ixv_setup_vlan_support(struct adapter *adapter)
+{
 	struct ethercom *ec = &adapter->osdep.ec;
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		vid, vfta, retry;
 	struct vlanid_list *vlanidp;
 	int rv, error = 0;
 	/*
 	 *  This function is called from both if_init and ifflags_cb()
 	 * on NetBSD.
 	 */
 	/*
 	 * Part 1:
 	 * Setup VLAN HW tagging
 	 */
 	ixv_setup_vlan_tagging(adapter);
 	if (!VLAN_ATTACHED(ec))
 		return 0;
 	/*
 	 * Part 2:
 	 * Setup VLAN HW filter
 	 */
 	/* Cleanup shadow_vfta */
 	for (int i = 0; i < IXGBE_VFTA_SIZE; i++)
 		adapter->shadow_vfta[i] = 0;
 	/* Generate shadow_vfta from ec_vids */
 	ETHER_LOCK(ec);
 	SIMPLEQ_FOREACH(vlanidp, &ec->ec_vids, vid_list) {
 		uint32_t idx;
 		idx = vlanidp->vid / 32;
 		KASSERT(idx < IXGBE_VFTA_SIZE);
 		adapter->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32);
+	}
 	ETHER_UNLOCK(ec);
 	/*
 	 * A soft reset zero's out the VFTA, so
 	 * we need to repopulate it now.
 	 */
 	for (int i = 0; i < IXGBE_VFTA_SIZE; i++) {
 		if (adapter->shadow_vfta[i] == 0)
 			continue;
 		vfta = adapter->shadow_vfta[i];
 		/*
 		 * Reconstruct the vlan id's
 		 * based on the bits set in each
 		 * of the array ints.
 		 */
 		for (int j = 0; j < 32; j++) {
 			retry = 0;
 			if ((vfta & ((u32)1 << j)) == 0)
 				continue;
 			vid = (i * 32) + j;
 			/* Call the shared code mailbox routine */
 			while ((rv = hw->mac.ops.set_vfta(hw, vid, 0, TRUE,
 			    FALSE)) != 0) {
 				if (++retry > 5) {
 					device_printf(adapter->dev,
 					    "%s: max retry exceeded\n",
 						__func__);
 					break;
+				}
+			}
 			if (rv != 0) {
 				device_printf(adapter->dev,
 				    "failed to set vlan %d\n", vid);
 				error = EACCES;
+			}
+		}
+	}
 	return error;
 } /* ixv_setup_vlan_support */
 static int
 ixv_vlan_cb(struct ethercom *ec, uint16_t vid, bool set)
+{
 	struct ifnet *ifp = &ec->ec_if;
 	struct adapter *adapter = ifp->if_softc;
 	int rv;
 	if (set)
 		rv = ixv_register_vlan(adapter, vid);
 	else
 		rv = ixv_unregister_vlan(adapter, vid);
 	if (rv != 0)
 		return rv;
 	/*
 	 * Control VLAN HW tagging when ec_nvlan is changed from 1 to 0
 	 * or 0 to 1.
 	 */
 	if ((set && (ec->ec_nvlans == 1)) || (!set && (ec->ec_nvlans == 0)))
 		ixv_setup_vlan_tagging(adapter);
 	return rv;
+}
 /************************************************************************
  * ixv_register_vlan
+ *
  *   Run via a vlan config EVENT, it enables us to use the
  *   HW Filter table since we can get the vlan id. This just
  *   creates the entry in the soft version of the VFTA, init
  *   will repopulate the real table.
  ************************************************************************/
 static int
 ixv_register_vlan(struct adapter *adapter, u16 vtag)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u16		index, bit;
 	int error;
 	if ((vtag == 0) || (vtag > 4095)) /* Invalid */
 		return EINVAL;
 	IXGBE_CORE_LOCK(adapter);
 	index = (vtag >> 5) & 0x7F;
 	bit = vtag & 0x1F;
 	adapter->shadow_vfta[index] |= ((u32)1 << bit);
 	error = hw->mac.ops.set_vfta(hw, vtag, 0, true, false);
 	IXGBE_CORE_UNLOCK(adapter);
 	if (error != 0) {
 		device_printf(adapter->dev, "failed to register vlan %hu\n",
 		    vtag);
 		error = EACCES;
+	}
 	return error;
 } /* ixv_register_vlan */
 /************************************************************************
  * ixv_unregister_vlan
+ *
  *   Run via a vlan unconfig EVENT, remove our entry
  *   in the soft vfta.
  ************************************************************************/
 static int
 ixv_unregister_vlan(struct adapter *adapter, u16 vtag)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u16		index, bit;
 	int		error;
 	if ((vtag == 0) || (vtag > 4095))  /* Invalid */
 		return EINVAL;
 	IXGBE_CORE_LOCK(adapter);
 	index = (vtag >> 5) & 0x7F;
 	bit = vtag & 0x1F;
 	adapter->shadow_vfta[index] &= ~((u32)1 << bit);
 	error = hw->mac.ops.set_vfta(hw, vtag, 0, false, false);
 	IXGBE_CORE_UNLOCK(adapter);
 	if (error != 0) {
 		device_printf(adapter->dev, "failed to unregister vlan %hu\n",
 		    vtag);
 		error = EIO;
+	}
 	return error;
 } /* ixv_unregister_vlan */
 /************************************************************************
  * ixv_enable_intr
  ************************************************************************/
 static void
 ixv_enable_intr(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ix_queue *que = adapter->queues;
 	u32		mask;
 	int i;
 	/* For VTEIAC */
 	mask = (1 << adapter->vector);
 	for (i = 0; i < adapter->num_queues; i++, que++)
 		mask |= (1 << que->msix);
 	IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
 	/* For VTEIMS */
 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, (1 << adapter->vector));
 	que = adapter->queues;
 	for (i = 0; i < adapter->num_queues; i++, que++)
 		ixv_enable_queue(adapter, que->msix);
 	IXGBE_WRITE_FLUSH(hw);
 } /* ixv_enable_intr */
 /************************************************************************
  * ixv_disable_intr
  ************************************************************************/
 static void
 ixv_disable_intr(struct adapter *adapter)
+{
 	struct ix_queue	*que = adapter->queues;
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEIAC, 0);
 	/* disable interrupts other than queues */
 	IXGBE_WRITE_REG(&adapter->hw, IXGBE_VTEIMC, adapter->vector);
 	for (int i = 0; i < adapter->num_queues; i++, que++)
 		ixv_disable_queue(adapter, que->msix);
 	IXGBE_WRITE_FLUSH(&adapter->hw);
 } /* ixv_disable_intr */
 /************************************************************************
  * ixv_set_ivar
+ *
  *   Setup the correct IVAR register for a particular MSI-X interrupt
  *    - entry is the register array entry
  *    - vector is the MSI-X vector for this queue
  *    - type is RX/TX/MISC
  ************************************************************************/
 static void
 ixv_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	u32		ivar, index;
 	vector |= IXGBE_IVAR_ALLOC_VAL;
 	if (type == -1) { /* MISC IVAR */
 		ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
 		ivar &= ~0xFF;
 		ivar |= vector;
 		IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
 	} else {	  /* RX/TX IVARS */
 		index = (16 * (entry & 1)) + (8 * type);
 		ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(entry >> 1));
 		ivar &= ~(0xffUL << index);
 		ivar |= ((u32)vector << index);
 		IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(entry >> 1), ivar);
+	}
 } /* ixv_set_ivar */
 /************************************************************************
  * ixv_configure_ivars
  ************************************************************************/
 static void
 ixv_configure_ivars(struct adapter *adapter)
+{
 	struct ix_queue *que = adapter->queues;
 	/* XXX We should sync EITR value calculation with ixgbe.c? */
 	for (int i = 0; i < adapter->num_queues; i++, que++) {
 		/* First the RX queue entry */
 		ixv_set_ivar(adapter, i, que->msix, 0);
 		/* ... and the TX */
 		ixv_set_ivar(adapter, i, que->msix, 1);
 		/* Set an initial value in EITR */
 		ixv_eitr_write(adapter, que->msix, IXGBE_EITR_DEFAULT);
+	}
 	/* For the mailbox interrupt */
 	ixv_set_ivar(adapter, 1, adapter->vector, -1);
 } /* ixv_configure_ivars */
 /************************************************************************
  * ixv_save_stats
+ *
  *   The VF stats registers never have a truly virgin
  *   starting point, so this routine tries to make an
  *   artificial one, marking ground zero on attach as
  *   it were.
  ************************************************************************/
 static void
 ixv_save_stats(struct adapter *adapter)
+{
 	struct ixgbevf_hw_stats *stats = &adapter->stats.vf;
 	if (stats->vfgprc.ev_count || stats->vfgptc.ev_count) {
 		stats->saved_reset_vfgprc +=
 		    stats->vfgprc.ev_count - stats->base_vfgprc;
 		stats->saved_reset_vfgptc +=
 		    stats->vfgptc.ev_count - stats->base_vfgptc;
 		stats->saved_reset_vfgorc +=
 		    stats->vfgorc.ev_count - stats->base_vfgorc;
 		stats->saved_reset_vfgotc +=
 		    stats->vfgotc.ev_count - stats->base_vfgotc;
 		stats->saved_reset_vfmprc +=
 		    stats->vfmprc.ev_count - stats->base_vfmprc;
+	}
 } /* ixv_save_stats */
 /************************************************************************
  * ixv_init_stats
  ************************************************************************/
 static void
 ixv_init_stats(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	adapter->stats.vf.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
 	adapter->stats.vf.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
 	adapter->stats.vf.last_vfgorc |=
 	    (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
 	adapter->stats.vf.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
 	adapter->stats.vf.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
 	adapter->stats.vf.last_vfgotc |=
 	    (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
 	adapter->stats.vf.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
 	adapter->stats.vf.base_vfgprc = adapter->stats.vf.last_vfgprc;
 	adapter->stats.vf.base_vfgorc = adapter->stats.vf.last_vfgorc;
 	adapter->stats.vf.base_vfgptc = adapter->stats.vf.last_vfgptc;
 	adapter->stats.vf.base_vfgotc = adapter->stats.vf.last_vfgotc;
 	adapter->stats.vf.base_vfmprc = adapter->stats.vf.last_vfmprc;
 } /* ixv_init_stats */
 #define UPDATE_STAT_32(reg, last, count)		\
 {							\
 	u32 current = IXGBE_READ_REG(hw, (reg));	\
 	if (current < (last))				\
 		count.ev_count += 0x100000000LL;	\
 	(last) = current;				\
 	count.ev_count &= 0xFFFFFFFF00000000LL;		\
 	count.ev_count |= current;			\
+}
 #define UPDATE_STAT_36(lsb, msb, last, count)		\
 {							\
 	u64 cur_lsb = IXGBE_READ_REG(hw, (lsb));	\
 	u64 cur_msb = IXGBE_READ_REG(hw, (msb));	\
 	u64 current = ((cur_msb << 32) | cur_lsb);	\
 	if (current < (last))				\
 		count.ev_count += 0x1000000000LL;	\
 	(last) = current;				\
 	count.ev_count &= 0xFFFFFFF000000000LL;		\
 	count.ev_count |= current;			\
+}
 /************************************************************************
  * ixv_update_stats - Update the board statistics counters.
  ************************************************************************/
 void
 ixv_update_stats(struct adapter *adapter)
+{
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ixgbevf_hw_stats *stats = &adapter->stats.vf;
 	UPDATE_STAT_32(IXGBE_VFGPRC, stats->last_vfgprc, stats->vfgprc);
 	UPDATE_STAT_32(IXGBE_VFGPTC, stats->last_vfgptc, stats->vfgptc);
 	UPDATE_STAT_36(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, stats->last_vfgorc,
 	    stats->vfgorc);
 	UPDATE_STAT_36(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, stats->last_vfgotc,
 	    stats->vfgotc);
 	UPDATE_STAT_32(IXGBE_VFMPRC, stats->last_vfmprc, stats->vfmprc);
 	/* VF doesn't count errors by hardware */
 } /* ixv_update_stats */
 /************************************************************************
  * ixv_sysctl_interrupt_rate_handler
  ************************************************************************/
 static int
 ixv_sysctl_interrupt_rate_handler(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct ix_queue *que = (struct ix_queue *)node.sysctl_data;
 	struct adapter	*adapter = que->adapter;
 	uint32_t reg, usec, rate;
 	int error;
 	if (que == NULL)
 		return 0;
 	reg = IXGBE_READ_REG(&que->adapter->hw, IXGBE_VTEITR(que->msix));
 	usec = ((reg & 0x0FF8) >> 3);
 	if (usec > 0)
 		rate = 500000 / usec;
 	else
 		rate = 0;
 	node.sysctl_data = &rate;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if (error || newp == NULL)
 		return error;
 	reg &= ~0xfff; /* default, no limitation */
 	if (rate > 0 && rate < 500000) {
 		if (rate < 1000)
 			rate = 1000;
 		reg |= ((4000000 / rate) & 0xff8);
 		/*
 		 * When RSC is used, ITR interval must be larger than
 		 * RSC_DELAY. Currently, we use 2us for RSC_DELAY.
 		 * The minimum value is always greater than 2us on 100M
 		 * (and 10M?(not documented)), but it's not on 1G and higher.
 		 */
 		if ((adapter->link_speed != IXGBE_LINK_SPEED_100_FULL)
 		    && (adapter->link_speed != IXGBE_LINK_SPEED_10_FULL)) {
 			if ((adapter->num_queues > 1)
 			    && (reg < IXGBE_MIN_RSC_EITR_10G1G))
 				return EINVAL;
+		}
 		ixv_max_interrupt_rate = rate;
 	} else
 		ixv_max_interrupt_rate = 0;
 	ixv_eitr_write(adapter, que->msix, reg);
 	return (0);
 } /* ixv_sysctl_interrupt_rate_handler */
 const struct sysctlnode *
 ixv_sysctl_instance(struct adapter *adapter)
+{
 	const char *dvname;
 	struct sysctllog **log;
 	int rc;
 	const struct sysctlnode *rnode;
 	log = &adapter->sysctllog;
 	dvname = device_xname(adapter->dev);
 	if ((rc = sysctl_createv(log, 0, NULL, &rnode,
 , CTLTYPE_NODE, dvname,
 	    SYSCTL_DESCR("ixv information and settings"),
 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
 		goto err;
 	return rnode;
 err:
 	device_printf(adapter->dev,
 	    "%s: sysctl_createv failed, rc = %d\n", __func__, rc);
 	return NULL;
+}
 static void
 ixv_add_device_sysctls(struct adapter *adapter)
+{
 	struct sysctllog **log;
 	const struct sysctlnode *rnode, *cnode;
 	device_t dev;
 	dev = adapter->dev;
 	log = &adapter->sysctllog;
 	if ((rnode = ixv_sysctl_instance(adapter)) == NULL) {
 		aprint_error_dev(dev, "could not create sysctl root\n");
 		return;
+	}
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READWRITE, CTLTYPE_INT,
 	    "debug", SYSCTL_DESCR("Debug Info"),
 	    ixv_sysctl_debug, 0, (void *)adapter, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READONLY, CTLTYPE_INT, "num_jcl_per_queue",
 	    SYSCTL_DESCR("Number of jumbo buffers per queue"),
 	    NULL, 0, &adapter->num_jcl, 0, CTL_CREATE,
 	    CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READWRITE, CTLTYPE_BOOL,
 	    "enable_aim", SYSCTL_DESCR("Interrupt Moderation"),
 	    NULL, 0, &adapter->enable_aim, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READWRITE, CTLTYPE_BOOL,
 	    "txrx_workqueue", SYSCTL_DESCR("Use workqueue for packet processing"),
 		NULL, 0, &adapter->txrx_use_workqueue, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
+}
 /************************************************************************
  * ixv_add_stats_sysctls - Add statistic sysctls for the VF.
  ************************************************************************/
 static void
 ixv_add_stats_sysctls(struct adapter *adapter)
+{
 	device_t		dev = adapter->dev;
 	struct tx_ring		*txr = adapter->tx_rings;
 	struct rx_ring		*rxr = adapter->rx_rings;
 	struct ixgbevf_hw_stats *stats = &adapter->stats.vf;
 	struct ixgbe_hw *hw = &adapter->hw;
 	const struct sysctlnode *rnode, *cnode;
 	struct sysctllog **log = &adapter->sysctllog;
 	const char *xname = device_xname(dev);
 	/* Driver Statistics */
 	evcnt_attach_dynamic(&adapter->efbig_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma soft fail EFBIG");
 	evcnt_attach_dynamic(&adapter->mbuf_defrag_failed, EVCNT_TYPE_MISC,
 	    NULL, xname, "m_defrag() failed");
 	evcnt_attach_dynamic(&adapter->efbig2_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma hard fail EFBIG");
 	evcnt_attach_dynamic(&adapter->einval_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma hard fail EINVAL");
 	evcnt_attach_dynamic(&adapter->other_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma hard fail other");
 	evcnt_attach_dynamic(&adapter->eagain_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma soft fail EAGAIN");
 	evcnt_attach_dynamic(&adapter->enomem_tx_dma_setup, EVCNT_TYPE_MISC,
 	    NULL, xname, "Driver tx dma soft fail ENOMEM");
 	evcnt_attach_dynamic(&adapter->watchdog_events, EVCNT_TYPE_MISC,
 	    NULL, xname, "Watchdog timeouts");
 	evcnt_attach_dynamic(&adapter->tso_err, EVCNT_TYPE_MISC,
 	    NULL, xname, "TSO errors");
 	evcnt_attach_dynamic(&adapter->link_irq, EVCNT_TYPE_INTR,
 	    NULL, xname, "Link MSI-X IRQ Handled");
 	for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
 		snprintf(adapter->queues[i].evnamebuf,
 		    sizeof(adapter->queues[i].evnamebuf), "%s q%d",
 		    xname, i);
 		snprintf(adapter->queues[i].namebuf,
 		    sizeof(adapter->queues[i].namebuf), "q%d", i);
 		if ((rnode = ixv_sysctl_instance(adapter)) == NULL) {
 			aprint_error_dev(dev, "could not create sysctl root\n");
 			break;
+		}
 		if (sysctl_createv(log, 0, &rnode, &rnode,
 , CTLTYPE_NODE,
 		    adapter->queues[i].namebuf, SYSCTL_DESCR("Queue Name"),
 		    NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READWRITE, CTLTYPE_INT,
 		    "interrupt_rate", SYSCTL_DESCR("Interrupt Rate"),
 		    ixv_sysctl_interrupt_rate_handler, 0,
 		    (void *)&adapter->queues[i], 0, CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY, CTLTYPE_INT,
 		    "txd_head", SYSCTL_DESCR("Transmit Descriptor Head"),
 		    ixv_sysctl_tdh_handler, 0, (void *)txr,
 , CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY, CTLTYPE_INT,
 		    "txd_tail", SYSCTL_DESCR("Transmit Descriptor Tail"),
 		    ixv_sysctl_tdt_handler, 0, (void *)txr,
 , CTL_CREATE, CTL_EOL) != 0)
 			break;
 		evcnt_attach_dynamic(&adapter->queues[i].irqs, EVCNT_TYPE_INTR,
 		    NULL, adapter->queues[i].evnamebuf, "IRQs on queue");
 		evcnt_attach_dynamic(&adapter->queues[i].handleq,
 		    EVCNT_TYPE_MISC, NULL, adapter->queues[i].evnamebuf,
 		    "Handled queue in softint");
 		evcnt_attach_dynamic(&adapter->queues[i].req, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Requeued in softint");
 		evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "TSO");
 		evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf,
-		    "Queue No Descriptor Available");
+		    "TX Queue No Descriptor Available");
 		evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf,
 		    "Queue Packets Transmitted");
 #ifndef IXGBE_LEGACY_TX
 		evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf,
 		    "Packets dropped in pcq");
 #endif
 #ifdef LRO
 		struct lro_ctrl *lro = &rxr->lro;
 #endif /* LRO */
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY,
 		    CTLTYPE_INT,
 		    "rxd_nxck", SYSCTL_DESCR("Receive Descriptor next to check"),
 			ixv_sysctl_next_to_check_handler, 0, (void *)rxr, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY,
 		    CTLTYPE_INT,
 		    "rxd_head", SYSCTL_DESCR("Receive Descriptor Head"),
 		    ixv_sysctl_rdh_handler, 0, (void *)rxr, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			break;
 		if (sysctl_createv(log, 0, &rnode, &cnode,
 		    CTLFLAG_READONLY,
 		    CTLTYPE_INT,
 		    "rxd_tail", SYSCTL_DESCR("Receive Descriptor Tail"),
 		    ixv_sysctl_rdt_handler, 0, (void *)rxr, 0,
 		    CTL_CREATE, CTL_EOL) != 0)
 			break;
 		evcnt_attach_dynamic(&rxr->rx_packets, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Queue Packets Received");
 		evcnt_attach_dynamic(&rxr->rx_bytes, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Queue Bytes Received");
 		evcnt_attach_dynamic(&rxr->rx_copies, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Copied RX Frames");
 		evcnt_attach_dynamic(&rxr->no_jmbuf, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Rx no jumbo mbuf");
 		evcnt_attach_dynamic(&rxr->rx_discarded, EVCNT_TYPE_MISC,
 		    NULL, adapter->queues[i].evnamebuf, "Rx discarded");
 #ifdef LRO
 		SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_queued",
 				CTLFLAG_RD, &lro->lro_queued, 0,
 				"LRO Queued");
 		SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, "lro_flushed",
 				CTLFLAG_RD, &lro->lro_flushed, 0,
 				"LRO Flushed");
 #endif /* LRO */
+	}
 	/* MAC stats get their own sub node */
 	snprintf(stats->namebuf,
 	    sizeof(stats->namebuf), "%s MAC Statistics", xname);
 	evcnt_attach_dynamic(&stats->ipcs, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - IP");
 	evcnt_attach_dynamic(&stats->l4cs, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - L4");
 	evcnt_attach_dynamic(&stats->ipcs_bad, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - IP bad");
 	evcnt_attach_dynamic(&stats->l4cs_bad, EVCNT_TYPE_MISC, NULL,
 	    stats->namebuf, "rx csum offload - L4 bad");
 	/* Packet Reception Stats */
 	evcnt_attach_dynamic(&stats->vfgprc, EVCNT_TYPE_MISC, NULL,
 	    xname, "Good Packets Received");
 	evcnt_attach_dynamic(&stats->vfgorc, EVCNT_TYPE_MISC, NULL,
 	    xname, "Good Octets Received");
 	evcnt_attach_dynamic(&stats->vfmprc, EVCNT_TYPE_MISC, NULL,
 	    xname, "Multicast Packets Received");
 	evcnt_attach_dynamic(&stats->vfgptc, EVCNT_TYPE_MISC, NULL,
 	    xname, "Good Packets Transmitted");
 	evcnt_attach_dynamic(&stats->vfgotc, EVCNT_TYPE_MISC, NULL,
 	    xname, "Good Octets Transmitted");
 	/* Mailbox Stats */
 	evcnt_attach_dynamic(&hw->mbx.stats.msgs_tx, EVCNT_TYPE_MISC, NULL,
 	    xname, "message TXs");
 	evcnt_attach_dynamic(&hw->mbx.stats.msgs_rx, EVCNT_TYPE_MISC, NULL,
 	    xname, "message RXs");
 	evcnt_attach_dynamic(&hw->mbx.stats.acks, EVCNT_TYPE_MISC, NULL,
 	    xname, "ACKs");
 	evcnt_attach_dynamic(&hw->mbx.stats.reqs, EVCNT_TYPE_MISC, NULL,
 	    xname, "REQs");
 	evcnt_attach_dynamic(&hw->mbx.stats.rsts, EVCNT_TYPE_MISC, NULL,
 	    xname, "RSTs");
 } /* ixv_add_stats_sysctls */
 static void
 ixv_clear_evcnt(struct adapter *adapter)
+{
 	struct tx_ring		*txr = adapter->tx_rings;
 	struct rx_ring		*rxr = adapter->rx_rings;
 	struct ixgbevf_hw_stats *stats = &adapter->stats.vf;
 	struct ixgbe_hw *hw = &adapter->hw;
 	int i;
 	/* Driver Statistics */
 	adapter->efbig_tx_dma_setup.ev_count = 0;
 	adapter->mbuf_defrag_failed.ev_count = 0;
 	adapter->efbig2_tx_dma_setup.ev_count = 0;
 	adapter->einval_tx_dma_setup.ev_count = 0;
 	adapter->other_tx_dma_setup.ev_count = 0;
 	adapter->eagain_tx_dma_setup.ev_count = 0;
 	adapter->enomem_tx_dma_setup.ev_count = 0;
 	adapter->watchdog_events.ev_count = 0;
 	adapter->tso_err.ev_count = 0;
 	adapter->link_irq.ev_count = 0;
 	for (i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
 		adapter->queues[i].irqs.ev_count = 0;
 		adapter->queues[i].handleq.ev_count = 0;
 		adapter->queues[i].req.ev_count = 0;
 		txr->tso_tx.ev_count = 0;
 		txr->no_desc_avail.ev_count = 0;
 		txr->total_packets.ev_count = 0;
 #ifndef IXGBE_LEGACY_TX
 		txr->pcq_drops.ev_count = 0;
 #endif
 		txr->q_efbig_tx_dma_setup = 0;
 		txr->q_mbuf_defrag_failed = 0;
 		txr->q_efbig2_tx_dma_setup = 0;
 		txr->q_einval_tx_dma_setup = 0;
 		txr->q_other_tx_dma_setup = 0;
 		txr->q_eagain_tx_dma_setup = 0;
 		txr->q_enomem_tx_dma_setup = 0;
 		txr->q_tso_err = 0;
 		rxr->rx_packets.ev_count = 0;
 		rxr->rx_bytes.ev_count = 0;
 		rxr->rx_copies.ev_count = 0;
 		rxr->no_jmbuf.ev_count = 0;
 		rxr->rx_discarded.ev_count = 0;
+	}
 	/* MAC stats get their own sub node */
 	stats->ipcs.ev_count = 0;
 	stats->l4cs.ev_count = 0;
 	stats->ipcs_bad.ev_count = 0;
 	stats->l4cs_bad.ev_count = 0;
 	/* Packet Reception Stats */
 	stats->vfgprc.ev_count = 0;
 	stats->vfgorc.ev_count = 0;
 	stats->vfmprc.ev_count = 0;
 	stats->vfgptc.ev_count = 0;
 	stats->vfgotc.ev_count = 0;
 	/* Mailbox Stats */
 	hw->mbx.stats.msgs_tx.ev_count = 0;
 	hw->mbx.stats.msgs_rx.ev_count = 0;
 	hw->mbx.stats.acks.ev_count = 0;
 	hw->mbx.stats.reqs.ev_count = 0;
 	hw->mbx.stats.rsts.ev_count = 0;
 } /* ixv_clear_evcnt */
 /************************************************************************
  * ixv_set_sysctl_value
  ************************************************************************/
 static void
 ixv_set_sysctl_value(struct adapter *adapter, const char *name,
 	const char *description, int *limit, int value)
+{
 	device_t dev =	adapter->dev;
 	struct sysctllog **log;
 	const struct sysctlnode *rnode, *cnode;
 	log = &adapter->sysctllog;
 	if ((rnode = ixv_sysctl_instance(adapter)) == NULL) {
 		aprint_error_dev(dev, "could not create sysctl root\n");
 		return;
+	}
 	if (sysctl_createv(log, 0, &rnode, &cnode,
 	    CTLFLAG_READWRITE, CTLTYPE_INT,
 	    name, SYSCTL_DESCR(description),
 	    NULL, 0, limit, 0, CTL_CREATE, CTL_EOL) != 0)
 		aprint_error_dev(dev, "could not create sysctl\n");
 	*limit = value;
 } /* ixv_set_sysctl_value */
 /************************************************************************
  * ixv_print_debug_info
+ *
  *   Called only when em_display_debug_stats is enabled.
  *   Provides a way to take a look at important statistics
  *   maintained by the driver and hardware.
  ************************************************************************/
 static void
 ixv_print_debug_info(struct adapter *adapter)
+{
 	device_t	dev = adapter->dev;
 	struct ix_queue *que = adapter->queues;
 	struct rx_ring	*rxr;
 	struct tx_ring	*txr;
 #ifdef LRO
 	struct lro_ctrl *lro;
 #endif /* LRO */
 	for (int i = 0; i < adapter->num_queues; i++, que++) {
 		txr = que->txr;
 		rxr = que->rxr;
 #ifdef LRO
 		lro = &rxr->lro;
 #endif /* LRO */
 		device_printf(dev, "QUE(%d) IRQs Handled: %lu\n",
 		    que->msix, (long)que->irqs.ev_count);
 		device_printf(dev, "RX(%d) Packets Received: %lld\n",
 		    rxr->me, (long long)rxr->rx_packets.ev_count);
 		device_printf(dev, "RX(%d) Bytes Received: %lu\n",
 		    rxr->me, (long)rxr->rx_bytes.ev_count);
 #ifdef LRO
 		device_printf(dev, "RX(%d) LRO Queued= %ju\n",
 		    rxr->me, (uintmax_t)lro->lro_queued);
 		device_printf(dev, "RX(%d) LRO Flushed= %ju\n",
 		    rxr->me, (uintmax_t)lro->lro_flushed);
 #endif /* LRO */
 		device_printf(dev, "TX(%d) Packets Sent: %lu\n",
 		    txr->me, (long)txr->total_packets.ev_count);
 		device_printf(dev, "TX(%d) NO Desc Avail: %lu\n",
 		    txr->me, (long)txr->no_desc_avail.ev_count);
+	}
 	device_printf(dev, "MBX IRQ Handled: %lu\n",
 	    (long)adapter->link_irq.ev_count);
 } /* ixv_print_debug_info */
 /************************************************************************
  * ixv_sysctl_debug
  ************************************************************************/
 static int
 ixv_sysctl_debug(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node = *rnode;
 	struct adapter *adapter = (struct adapter *)node.sysctl_data;
 	int	       error, result;
 	node.sysctl_data = &result;
 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
 	if (error || newp == NULL)
 		return error;
 	if (result == 1)
 		ixv_print_debug_info(adapter);
 	return 0;
 } /* ixv_sysctl_debug */
 /************************************************************************
  * ixv_init_device_features
  ************************************************************************/
 static void
 ixv_init_device_features(struct adapter *adapter)
+{
 	adapter->feat_cap = IXGBE_FEATURE_NETMAP
 			  | IXGBE_FEATURE_VF
 			  | IXGBE_FEATURE_RSS
 			  | IXGBE_FEATURE_LEGACY_TX;
 	/* A tad short on feature flags for VFs, atm. */
 	switch (adapter->hw.mac.type) {
 	case ixgbe_mac_82599_vf:
 		break;
 	case ixgbe_mac_X540_vf:
 		break;
 	case ixgbe_mac_X550_vf:
 	case ixgbe_mac_X550EM_x_vf:
 	case ixgbe_mac_X550EM_a_vf:
 		adapter->feat_cap |= IXGBE_FEATURE_NEEDS_CTXD;
 		break;
 	default:
 		break;
+	}
 	/* Enabled by default... */
 	/* Is a virtual function (VF) */
 	if (adapter->feat_cap & IXGBE_FEATURE_VF)
 		adapter->feat_en |= IXGBE_FEATURE_VF;
 	/* Netmap */
 	if (adapter->feat_cap & IXGBE_FEATURE_NETMAP)
 		adapter->feat_en |= IXGBE_FEATURE_NETMAP;
 	/* Receive-Side Scaling (RSS) */
 	if (adapter->feat_cap & IXGBE_FEATURE_RSS)
 		adapter->feat_en |= IXGBE_FEATURE_RSS;
 	/* Needs advanced context descriptor regardless of offloads req'd */
 	if (adapter->feat_cap & IXGBE_FEATURE_NEEDS_CTXD)
 		adapter->feat_en |= IXGBE_FEATURE_NEEDS_CTXD;
 	/* Enabled via sysctl... */
 	/* Legacy (single queue) transmit */
 	if ((adapter->feat_cap & IXGBE_FEATURE_LEGACY_TX) &&
 	    ixv_enable_legacy_tx)
 		adapter->feat_en |= IXGBE_FEATURE_LEGACY_TX;
 } /* ixv_init_device_features */
 /************************************************************************
  * ixv_shutdown - Shutdown entry point
  ************************************************************************/
 #if 0 /* XXX NetBSD ought to register something like this through pmf(9) */
 static int
 ixv_shutdown(device_t dev)
+{
 	struct adapter *adapter = device_private(dev);
 	IXGBE_CORE_LOCK(adapter);
 	ixv_stop(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 	return (0);
 } /* ixv_shutdown */
 #endif
 static int
 ixv_ifflags_cb(struct ethercom *ec)
+{
 	struct ifnet *ifp = &ec->ec_if;
 	struct adapter *adapter = ifp->if_softc;
 	u_short saved_flags;
 	u_short change;
 	int rv = 0;
 	IXGBE_CORE_LOCK(adapter);
 	saved_flags = adapter->if_flags;
 	change = ifp->if_flags ^ adapter->if_flags;
 	if (change != 0)
 		adapter->if_flags = ifp->if_flags;
 	if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) {
 		rv = ENETRESET;
 		goto out;
 	} else if ((change & IFF_PROMISC) != 0) {
 		rv = ixv_set_rxfilter(adapter);
 		if (rv != 0) {
 			/* Restore previous */
 			adapter->if_flags = saved_flags;
 			goto out;
+		}
+	}
 	/* Check for ec_capenable. */
 	change = ec->ec_capenable ^ adapter->ec_capenable;
 	adapter->ec_capenable = ec->ec_capenable;
 	if ((change & ~(ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING
 	    | ETHERCAP_VLAN_HWFILTER)) != 0) {
 		rv = ENETRESET;
 		goto out;
+	}
 	/*
 	 * Special handling is not required for ETHERCAP_VLAN_MTU.
 	 * PF's MAXFRS(MHADD) does not include the 4bytes of the VLAN header.
 	 */
 	/* Set up VLAN support and filter */
 	if ((change & (ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_HWFILTER)) != 0)
 		rv = ixv_setup_vlan_support(adapter);
 out:
 	IXGBE_CORE_UNLOCK(adapter);
 	return rv;
+}
 /************************************************************************
  * ixv_ioctl - Ioctl entry point
+ *
  *   Called when the user wants to configure the interface.
+ *
  *   return 0 on success, positive on failure
  ************************************************************************/
 static int
 ixv_ioctl(struct ifnet *ifp, u_long command, void *data)
+{
 	struct adapter	*adapter = ifp->if_softc;
 	struct ixgbe_hw *hw = &adapter->hw;
 	struct ifcapreq *ifcr = data;
 	int		error;
 	int l4csum_en;
 	const int l4csum = IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
 	     IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx;
 	switch (command) {
 	case SIOCSIFFLAGS:
 		IOCTL_DEBUGOUT("ioctl: SIOCSIFFLAGS (Set Interface Flags)");
 		break;
 	case SIOCADDMULTI: {
 		struct ether_multi *enm;
 		struct ether_multistep step;
 		struct ethercom *ec = &adapter->osdep.ec;
 		bool overflow = false;
 		int mcnt = 0;
 		/*
 		 * Check the number of multicast address. If it exceeds,
 		 * return ENOSPC.
 		 * Update this code when we support API 1.3.
 		 */
 		ETHER_LOCK(ec);
 		ETHER_FIRST_MULTI(step, ec, enm);
 		while (enm != NULL) {
 			mcnt++;
 			/*
 			 * This code is before adding, so one room is required
 			 * at least.
 			 */
 			if (mcnt > (IXGBE_MAX_VF_MC - 1)) {
 				overflow = true;
 				break;
+			}
 			ETHER_NEXT_MULTI(step, enm);
+		}
 		ETHER_UNLOCK(ec);
 		error = 0;
 		if (overflow && ((ec->ec_flags & ETHER_F_ALLMULTI) == 0)) {
 			error = hw->mac.ops.update_xcast_mode(hw,
 			    IXGBEVF_XCAST_MODE_ALLMULTI);
 			if (error == IXGBE_ERR_NOT_TRUSTED) {
 				device_printf(adapter->dev,
 				    "this interface is not trusted\n");
 				error = EPERM;
 			} else if (error == IXGBE_ERR_FEATURE_NOT_SUPPORTED) {
 				device_printf(adapter->dev,
 				    "the PF doesn't support allmulti mode\n");
 				error = EOPNOTSUPP;
 			} else if (error) {
 				device_printf(adapter->dev,
 				    "number of Ethernet multicast addresses "
 				    "exceeds the limit (%d). error = %d\n",
 				    IXGBE_MAX_VF_MC, error);
 				error = ENOSPC;
 			} else
 				ec->ec_flags |= ETHER_F_ALLMULTI;
+		}
 		if (error)
 			return error;
+	}
 		/*FALLTHROUGH*/
 	case SIOCDELMULTI:
 		IOCTL_DEBUGOUT("ioctl: SIOC(ADD|DEL)MULTI");
 		break;
 	case SIOCSIFMEDIA:
 	case SIOCGIFMEDIA:
 		IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)");
 		break;
 	case SIOCSIFCAP:
 		IOCTL_DEBUGOUT("ioctl: SIOCSIFCAP (Set Capabilities)");
 		break;
 	case SIOCSIFMTU:
 		IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)");
 		break;
 	case SIOCZIFDATA:
 		IOCTL_DEBUGOUT("ioctl: SIOCZIFDATA (Zero counter)");
 		ixv_update_stats(adapter);
 		ixv_clear_evcnt(adapter);
 		break;
 	default:
 		IOCTL_DEBUGOUT1("ioctl: UNKNOWN (0x%X)", (int)command);
 		break;
+	}
 	switch (command) {
 	case SIOCSIFCAP:
 		/* Layer-4 Rx checksum offload has to be turned on and
 		 * off as a unit.
 		 */
 		l4csum_en = ifcr->ifcr_capenable & l4csum;
 		if (l4csum_en != l4csum && l4csum_en != 0)
 			return EINVAL;
 		/*FALLTHROUGH*/
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 	case SIOCSIFFLAGS:
 	case SIOCSIFMTU:
 	default:
 		if ((error = ether_ioctl(ifp, command, data)) != ENETRESET)
 			return error;
 		if ((ifp->if_flags & IFF_RUNNING) == 0)
+			;
 		else if (command == SIOCSIFCAP || command == SIOCSIFMTU) {
 			IXGBE_CORE_LOCK(adapter);
 			ixv_init_locked(adapter);
 			IXGBE_CORE_UNLOCK(adapter);
 		} else if (command == SIOCADDMULTI || command == SIOCDELMULTI) {
 			/*
 			 * Multicast list has changed; set the hardware filter
 			 * accordingly.
 			 */
 			IXGBE_CORE_LOCK(adapter);
 			ixv_disable_intr(adapter);
 			ixv_set_rxfilter(adapter);
 			ixv_enable_intr(adapter);
 			IXGBE_CORE_UNLOCK(adapter);
+		}
 		return 0;
+	}
 } /* ixv_ioctl */
 /************************************************************************
  * ixv_init
  ************************************************************************/
 static int
 ixv_init(struct ifnet *ifp)
+{
 	struct adapter *adapter = ifp->if_softc;
 	IXGBE_CORE_LOCK(adapter);
 	ixv_init_locked(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 	return 0;
 } /* ixv_init */
 /************************************************************************
  * ixv_handle_que
  ************************************************************************/
 static void
 ixv_handle_que(void *context)
+{
 	struct ix_queue *que = context;
 	struct adapter	*adapter = que->adapter;
 	struct tx_ring	*txr = que->txr;
 	struct ifnet	*ifp = adapter->ifp;
 	bool		more;
 	que->handleq.ev_count++;
 	if (ifp->if_flags & IFF_RUNNING) {
 		more = ixgbe_rxeof(que);
 		IXGBE_TX_LOCK(txr);
 		more |= ixgbe_txeof(txr);
 		if (!(adapter->feat_en & IXGBE_FEATURE_LEGACY_TX))
 			if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq))
 				ixgbe_mq_start_locked(ifp, txr);
 		/* Only for queue 0 */
 		/* NetBSD still needs this for CBQ */
 		if ((&adapter->queues[0] == que)
 		    && (!ixgbe_legacy_ring_empty(ifp, NULL)))
 			ixgbe_legacy_start_locked(ifp, txr);
 		IXGBE_TX_UNLOCK(txr);
 		if (more) {
 			que->req.ev_count++;
 			if (adapter->txrx_use_workqueue) {
 				/*
 				 * "enqueued flag" is not required here
 				 * the same as ixg(4). See ixgbe_msix_que().
 				 */
 				workqueue_enqueue(adapter->que_wq,
 				    &que->wq_cookie, curcpu());
 			} else
 				  softint_schedule(que->que_si);
 			return;
+		}
+	}
 	/* Re-enable this interrupt */
 	ixv_enable_queue(adapter, que->msix);
 	return;
 } /* ixv_handle_que */
 /************************************************************************
  * ixv_handle_que_work
  ************************************************************************/
 static void
 ixv_handle_que_work(struct work *wk, void *context)
+{
 	struct ix_queue *que = container_of(wk, struct ix_queue, wq_cookie);
 	/*
 	 * "enqueued flag" is not required here the same as ixg(4).
 	 * See ixgbe_msix_que().
 	 */
 	ixv_handle_que(que);
+}
 /************************************************************************
  * ixv_allocate_msix - Setup MSI-X Interrupt resources and handlers
  ************************************************************************/
 static int
 ixv_allocate_msix(struct adapter *adapter, const struct pci_attach_args *pa)
+{
 	device_t	dev = adapter->dev;
 	struct ix_queue *que = adapter->queues;
 	struct		tx_ring *txr = adapter->tx_rings;
 	int		error, msix_ctrl, rid, vector = 0;
 	pci_chipset_tag_t pc;
 	pcitag_t	tag;
 	char		intrbuf[PCI_INTRSTR_LEN];
 	char		wqname[MAXCOMLEN];
 	char		intr_xname[32];
 	const char	*intrstr = NULL;
 	kcpuset_t	*affinity;
 	int		cpu_id = 0;
 	pc = adapter->osdep.pc;
 	tag = adapter->osdep.tag;
 	adapter->osdep.nintrs = adapter->num_queues + 1;
 	if (pci_msix_alloc_exact(pa, &adapter->osdep.intrs,
 	    adapter->osdep.nintrs) != 0) {
 		aprint_error_dev(dev,
 		    "failed to allocate MSI-X interrupt\n");
 		return (ENXIO);
+	}
 	kcpuset_create(&affinity, false);
 	for (int i = 0; i < adapter->num_queues; i++, vector++, que++, txr++) {
 		snprintf(intr_xname, sizeof(intr_xname), "%s TXRX%d",
 		    device_xname(dev), i);
 		intrstr = pci_intr_string(pc, adapter->osdep.intrs[i], intrbuf,
 		    sizeof(intrbuf));
 #ifdef IXGBE_MPSAFE
 		pci_intr_setattr(pc, &adapter->osdep.intrs[i], PCI_INTR_MPSAFE,
 		    true);
 #endif
 		/* Set the handler function */
 		que->res = adapter->osdep.ihs[i] = pci_intr_establish_xname(pc,
 		    adapter->osdep.intrs[i], IPL_NET, ixv_msix_que, que,
 		    intr_xname);
 		if (que->res == NULL) {
 			pci_intr_release(pc, adapter->osdep.intrs,
 			    adapter->osdep.nintrs);
 			aprint_error_dev(dev,
 			    "Failed to register QUE handler\n");
 			kcpuset_destroy(affinity);
 			return (ENXIO);
+		}
 		que->msix = vector;
 		adapter->active_queues |= (u64)(1 << que->msix);
 		cpu_id = i;
 		/* Round-robin affinity */
 		kcpuset_zero(affinity);
 		kcpuset_set(affinity, cpu_id % ncpu);
 		error = interrupt_distribute(adapter->osdep.ihs[i], affinity,
 		    NULL);
 		aprint_normal_dev(dev, "for TX/RX, interrupting at %s",
 		    intrstr);
 		if (error == 0)
 			aprint_normal(", bound queue %d to cpu %d\n",
 			    i, cpu_id % ncpu);
 		else
 			aprint_normal("\n");
 #ifndef IXGBE_LEGACY_TX
 		txr->txr_si
 		    = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS,
 			ixgbe_deferred_mq_start, txr);
 #endif
 		que->que_si
 		    = softint_establish(SOFTINT_NET | IXGBE_SOFTINT_FLAGS,
 			ixv_handle_que, que);
 		if (que->que_si == NULL) {
 			aprint_error_dev(dev,
 			    "could not establish software interrupt\n");
+		}
+	}
 	snprintf(wqname, sizeof(wqname), "%sdeferTx", device_xname(dev));
 	error = workqueue_create(&adapter->txr_wq, wqname,
 	    ixgbe_deferred_mq_start_work, adapter, IXGBE_WORKQUEUE_PRI, IPL_NET,
 	    IXGBE_WORKQUEUE_FLAGS);
 	if (error) {
 		aprint_error_dev(dev, "couldn't create workqueue for deferred Tx\n");
+	}
 	adapter->txr_wq_enqueued = percpu_alloc(sizeof(u_int));
 	snprintf(wqname, sizeof(wqname), "%sTxRx", device_xname(dev));
 	error = workqueue_create(&adapter->que_wq, wqname,
 	    ixv_handle_que_work, adapter, IXGBE_WORKQUEUE_PRI, IPL_NET,
 	    IXGBE_WORKQUEUE_FLAGS);
 	if (error) {
 		aprint_error_dev(dev,
 		    "couldn't create workqueue\n");
+	}
 	/* and Mailbox */
 	cpu_id++;
 	snprintf(intr_xname, sizeof(intr_xname), "%s link", device_xname(dev));
 	adapter->vector = vector;
 	intrstr = pci_intr_string(pc, adapter->osdep.intrs[vector], intrbuf,
 	    sizeof(intrbuf));
 #ifdef IXGBE_MPSAFE
 	pci_intr_setattr(pc, &adapter->osdep.intrs[vector], PCI_INTR_MPSAFE,
 	    true);
 #endif
 	/* Set the mbx handler function */
 	adapter->osdep.ihs[vector] = pci_intr_establish_xname(pc,
 	    adapter->osdep.intrs[vector], IPL_NET, ixv_msix_mbx, adapter,
 	    intr_xname);
 	if (adapter->osdep.ihs[vector] == NULL) {
 		aprint_error_dev(dev, "Failed to register LINK handler\n");
 		kcpuset_destroy(affinity);
 		return (ENXIO);
+	}
 	/* Round-robin affinity */
 	kcpuset_zero(affinity);
 	kcpuset_set(affinity, cpu_id % ncpu);
 	error = interrupt_distribute(adapter->osdep.ihs[vector], affinity,
 	    NULL);
 	aprint_normal_dev(dev,
 	    "for link, interrupting at %s", intrstr);
 	if (error == 0)
 		aprint_normal(", affinity to cpu %d\n", cpu_id % ncpu);
 	else
 		aprint_normal("\n");
 	/* Tasklets for Mailbox */
 	adapter->link_si = softint_establish(SOFTINT_NET |IXGBE_SOFTINT_FLAGS,
 	    ixv_handle_link, adapter);
 	/*
 	 * Due to a broken design QEMU will fail to properly
 	 * enable the guest for MSI-X unless the vectors in
 	 * the table are all set up, so we must rewrite the
 	 * ENABLE in the MSI-X control register again at this
 	 * point to cause it to successfully initialize us.
 	 */
 	if (adapter->hw.mac.type == ixgbe_mac_82599_vf) {
 		pci_get_capability(pc, tag, PCI_CAP_MSIX, &rid, NULL);
 		rid += PCI_MSIX_CTL;
 		msix_ctrl = pci_conf_read(pc, tag, rid);
 		msix_ctrl |= PCI_MSIX_CTL_ENABLE;
 		pci_conf_write(pc, tag, rid, msix_ctrl);
+	}
 	kcpuset_destroy(affinity);
 	return (0);
 } /* ixv_allocate_msix */
 /************************************************************************
  * ixv_configure_interrupts - Setup MSI-X resources
+ *
  *   Note: The VF device MUST use MSI-X, there is no fallback.
  ************************************************************************/
 static int
 ixv_configure_interrupts(struct adapter *adapter)
+{
 	device_t dev = adapter->dev;
 	int want, queues, msgs;
 	/* Must have at least 2 MSI-X vectors */
 	msgs = pci_msix_count(adapter->osdep.pc, adapter->osdep.tag);
 	if (msgs < 2) {
 		aprint_error_dev(dev, "MSIX config error\n");
 		return (ENXIO);
+	}
 	msgs = MIN(msgs, IXG_MAX_NINTR);
 	/* Figure out a reasonable auto config value */
 	queues = (ncpu > (msgs - 1)) ? (msgs - 1) : ncpu;
 	if (ixv_num_queues != 0)
 		queues = ixv_num_queues;
 	else if ((ixv_num_queues == 0) && (queues > IXGBE_VF_MAX_TX_QUEUES))
 		queues = IXGBE_VF_MAX_TX_QUEUES;
 	/*
 	 * Want vectors for the queues,
 	 * plus an additional for mailbox.
 	 */
 	want = queues + 1;
 	if (msgs >= want)
 		msgs = want;
 	else {
 		aprint_error_dev(dev,
 		    "MSI-X Configuration Problem, "
 		    "%d vectors but %d queues wanted!\n",
 		    msgs, want);
 		return -1;
+	}
 	adapter->msix_mem = (void *)1; /* XXX */
 	aprint_normal_dev(dev,
 	    "Using MSI-X interrupts with %d vectors\n", msgs);
 	adapter->num_queues = queues;
 	return (0);
 } /* ixv_configure_interrupts */
 /************************************************************************
  * ixv_handle_link - Tasklet handler for MSI-X MBX interrupts
+ *
  *   Done outside of interrupt context since the driver might sleep
  ************************************************************************/
 static void
 ixv_handle_link(void *context)
+{
 	struct adapter *adapter = context;
 	IXGBE_CORE_LOCK(adapter);
 	adapter->hw.mac.ops.check_link(&adapter->hw, &adapter->link_speed,
 	    &adapter->link_up, FALSE);
 	ixv_update_link_status(adapter);
 	IXGBE_CORE_UNLOCK(adapter);
 } /* ixv_handle_link */
 /************************************************************************
  * ixv_check_link - Used in the local timer to poll for link changes
  ************************************************************************/
 static s32
 ixv_check_link(struct adapter *adapter)
+{
 	s32 error;
 	KASSERT(mutex_owned(&adapter->core_mtx));
 	adapter->hw.mac.get_link_status = TRUE;
 	error = adapter->hw.mac.ops.check_link(&adapter->hw,
 	    &adapter->link_speed, &adapter->link_up, FALSE);
 	ixv_update_link_status(adapter);
 	return error;
 } /* ixv_check_link */

 @@ -1,115 +1,135 @@
-.\" $NetBSD: ixg.4,v 1.12 2018/05/09 08:01:16 wiz Exp $
+.\" $NetBSD: ixg.4,v 1.12.4.1 2021/03/11 16:00:24 martin Exp $
 .\"
 .\" Copyright (c) 2001-2008, Intel Corporation
 .\" All rights reserved.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
 .\" modification, are permitted provided that the following conditions are met:
 .\"
 .\" 1. Redistributions of source code must retain the above copyright notice,
 .\"    this list of conditions and the following disclaimer.
 .\"
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
 .\"
 .\" 3. Neither the name of the Intel Corporation nor the names of its
 .\"    contributors may be used to endorse or promote products derived from
 .\"    this software without specific prior written permission.
 .\"
 .\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 .\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 .\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 .\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 .\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 .\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 .\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 .\" POSSIBILITY OF SUCH DAMAGE.
 .\"
 .\" * Other names and brands may be claimed as the property of others.
 .\"
 .\" $FreeBSD: src/share/man/man4/ixgbe.4,v 1.3 2010/12/19 23:54:31 yongari Exp $
 .\"
-.Dd May 9, 2018
+.Dd March 9, 2021
 .Dt IXG 4
 .Os
 .Sh NAME
 .Nm ixg
 .Nd Intel(R) 10Gb Ethernet driver
 .Sh SYNOPSIS
 .Cd "ixg* at pci? dev ? function ?"
 .Sh DESCRIPTION
 The
 .Nm
 driver provides support for PCI 10Gb Ethernet adapters based on
 the Intel(R) 82598EB, 82599, X540 and X550 Ethernet Controllers.
 The driver supports Jumbo Frames, TCP Segmentation Offload (TSO).
 .Pp
 For questions related to hardware requirements,
 refer to the documentation supplied with your Intel 10GbE adapter.
 All hardware requirements listed apply to use with
 .Nx .
 .Pp
 Support for Jumbo Frames is provided via the interface MTU setting.
 Selecting an MTU larger than 1500 bytes with the
 .Xr ifconfig 8
 utility configures the adapter to receive and transmit Jumbo Frames.
 On
 .Nx ,
 the maximum MTU size for Jumbo Frames is 9000 bytes.
 .Pp
 This driver version supports VLANs.
 For information on enabling VLANs, see
 .Xr ifconfig 8 .
 .Sh DIAGNOSTICS
 .Bl -diag
 .It "ixg%d: Unable to allocate bus resource: memory"
 A fatal initialization error has occurred.
 .It "ixg%d: Unable to allocate bus resource: interrupt"
 A fatal initialization error has occurred.
 .It "ixg%d: watchdog timeout -- resetting"
 The device has stopped responding to the network, or there is a problem with
 the network connection (cable).
 .El
 .Sh SUPPORT
 For general information and support,
 go to the Intel support website at:
 .Lk http://www.intel.com/support/ .
 .\" .Pp
 .\" If an issue is identified with the released source code on the supported kernel
 .\" with a supported adapter, email the specific information related to the
 .\" issue to
 .\" .Aq freebsdnic@mailbox.intel.com .
 .Sh OPTIONS
 The
 .Nm
 driver doesn't use the common
 .Xr MCLGET 9
 interface and use the driver specific cluster allocation mechanism.
 If it's exhausted, the
 .Xr evcnt 9
 counter "ixgX qY Rx no jumbo mbuf" is incremented.
 If this is observed,
 the number can be changed by the following config parameter:
 .Bl -tag -width IXGBE_JCLNUM_MULTI -offset 3n
 .It Dv IXGBE_JCLNUM_MULTI
 The number of RX jumbo buffers (clusters) per queue is calculated by
 .Dv IXGBE_JCLNUM_MULTI
 * (number of rx descriptors).
 The total number of clusters per queue is available via the
 .Li hw.ixgN.num_jcl_per_queue
 .Xr sysctl 7 .
 .El
 .Sh SEE ALSO
 .Xr arp 4 ,
 .Xr ixv 4 ,
 .Xr netintro 4 ,
 .Xr vlan 4 ,
 .Xr ifconfig 8
 .Sh HISTORY
 The
 .Nm
 device driver comes from
 .Fx ,
 where it is called
 .Nm ixgbe .
 It first appeared in
 .Nx 6.0 .
 .Sh AUTHORS
 The
 .Nm
 driver was written by
 .An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com .
 It was imported from
 .Fx
 into
 .Nx
 by
 .An David Young Aq Mt dyoung@NetBSD.org .
 .Sh BUGS
 The hardware supports a maximum MTU of 16114 bytes, but the
 .Nx
 port of the driver supports only 9000 bytes.

 @@ -1,80 +1,100 @@
-.\"	$NetBSD: ixv.4,v 1.4.2.1 2019/09/26 19:07:23 martin Exp $
+.\"	$NetBSD: ixv.4,v 1.4.2.2 2021/03/11 16:00:24 martin Exp $
 .\"
 .\" Copyright (c) 2018 The NetBSD Foundation, Inc.
 .\" All rights reserved.
 .\"
 .\" This code is derived from software contributed to The NetBSD Foundation
 .\" by Masanobu SAITOH.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
 .\" modification, are permitted provided that the following conditions
 .\" are met:
 .\" 1. Redistributions of source code must retain the above copyright
 .\"    notice, this list of conditions and the following disclaimer.
 .\" 2. Redistributions in binary form must reproduce the above copyright
 .\"    notice, this list of conditions and the following disclaimer in the
 .\"    documentation and/or other materials provided with the distribution.
 .\"
 .\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 .\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 .\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 .\" PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 .\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 .\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 .\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 .\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 .\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 .\" POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd September 5, 2019
+.Dd March 9, 2021
 .Dt IXV 4
 .Os
 .Sh NAME
 .Nm ixv
 .Nd Intel 10 Gigabit Ethernet virtual function
 .Sh SYNOPSIS
 .Cd "ixv* at pci? dev ? function ?"
 .Sh DESCRIPTION
 The
 .Nm
 driver supports Intel 10 Gigabit Ethernet virtual function that 82599 and
 newer chips support.
 It can be used on a
 .Nx
 guest that the host supports SR-IOV.
 .Sh OPTIONS
 The
 .Nm
 driver doesn't use the common
 .Xr MCLGET 9
 interface and use the driver specific cluster allocation mechanism.
 If it's exhausted, the
 .Xr evcnt 9
 counter "ixgX qY Rx no jumbo mbuf" is incremented.
 If this is observed,
 the number can be changed by the following config parameter:
 .Bl -tag -width IXGBE_JCLNUM_MULTI -offset 3n
 .It Dv IXGBE_JCLNUM_MULTI
 The number of RX jumbo buffers (clusters) per queue is calculated by
 .Dv IXGBE_JCLNUM_MULTI
 * (number of rx descriptors).
 The total number of clusters per queue is available with the
 .Li hw.ixgN.num_jcl_per_queue
 .Xr sysctl 7 .
 .El
 .Sh SEE ALSO
 .Xr arp 4 ,
 .Xr ixg 4 ,
 .Xr netintro 4 ,
 .Xr vlan 4 ,
 .Xr ifconfig 8
 .Sh HISTORY
 The
 .Nm
 device driver comes from
 .Fx .
 It first appeared in
 .Nx 8.0 .
 .Sh AUTHORS
 The
 .Nm
 driver was written by
 .An Intel Corporation Aq Mt freebsdnic@mailbox.intel.com .
 .Sh BUGS
 The following event counters are not cleared by
 .Dv SIOCZIFDATA
 because the corresponding registers are read only and not cleared on read:
 .Pp
 .Bl -item -offset indent -compact
 .It
 Good Packets Received
 .It
 Good Octets Received
 .It
 Multicast Packets Received
 .It
 Good Packets Transmitted
 .It
 Good Octets Transmitted
 .El