Sun Mar 14 08:09:20 2021 UTC ()
Remove an unnecessary if statement in gic_v2m_msi_alloc when finding a
'count' that fits the available.


(skrll)
diff -r1.10 -r1.11 src/sys/arch/arm/cortex/gic_v2m.c
cvs diff -r1.10 -r1.11 src/sys/arch/arm/cortex/gic_v2m.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/gic_v2m.c 2020/12/11 21:40:50 1.10
+++ src/sys/arch/arm/cortex/gic_v2m.c 2021/03/14 08:09:20 1.11
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: gic_v2m.c,v 1.10 2020/12/11 21:40:50 jmcneill Exp $ */ 1/* $NetBSD: gic_v2m.c,v 1.11 2021/03/14 08:09:20 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill@invisible.ca>. 8 * by Jared McNeill <jmcneill@invisible.ca>.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -22,27 +22,27 @@ @@ -22,27 +22,27 @@
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#define _INTR_PRIVATE 32#define _INTR_PRIVATE
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: gic_v2m.c,v 1.10 2020/12/11 21:40:50 jmcneill Exp $"); 35__KERNEL_RCSID(0, "$NetBSD: gic_v2m.c,v 1.11 2021/03/14 08:09:20 skrll Exp $");
36 36
37#include <sys/param.h> 37#include <sys/param.h>
38#include <sys/kmem.h> 38#include <sys/kmem.h>
39#include <sys/bitops.h> 39#include <sys/bitops.h>
40 40
41#include <dev/pci/pcireg.h> 41#include <dev/pci/pcireg.h>
42#include <dev/pci/pcivar.h> 42#include <dev/pci/pcivar.h>
43 43
44#include <arm/pic/picvar.h> 44#include <arm/pic/picvar.h>
45#include <arm/cortex/gic_v2m.h> 45#include <arm/cortex/gic_v2m.h>
46 46
47static uint64_t 47static uint64_t
48gic_v2m_msi_addr(struct gic_v2m_frame *frame, int spi) 48gic_v2m_msi_addr(struct gic_v2m_frame *frame, int spi)
@@ -230,30 +230,29 @@ gic_v2m_msi_alloc(struct arm_pci_msi *ms @@ -230,30 +230,29 @@ gic_v2m_msi_alloc(struct arm_pci_msi *ms
230 const struct pci_attach_args *pa, bool exact) 230 const struct pci_attach_args *pa, bool exact)
231{ 231{
232 struct gic_v2m_frame * const frame = msi->msi_priv; 232 struct gic_v2m_frame * const frame = msi->msi_priv;
233 pci_intr_handle_t *vectors; 233 pci_intr_handle_t *vectors;
234 int n, off; 234 int n, off;
235 235
236 if (!pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSI, &off, NULL)) 236 if (!pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSI, &off, NULL))
237 return NULL; 237 return NULL;
238 238
239 const int avail = gic_v2m_msi_available_spi(frame); 239 const int avail = gic_v2m_msi_available_spi(frame);
240 if (exact && *count > avail) 240 if (exact && *count > avail)
241 return NULL; 241 return NULL;
242 242
243 while (*count > avail) { 243 while (*count > avail)
244 if (avail < *count) 244 (*count) >>= 1;
245 (*count) >>= 1; 245
246 } 
247 if (*count == 0) 246 if (*count == 0)
248 return NULL; 247 return NULL;
249 248
250 const int spi_base = gic_v2m_msi_alloc_spi(frame, *count, pa); 249 const int spi_base = gic_v2m_msi_alloc_spi(frame, *count, pa);
251 if (spi_base == -1) 250 if (spi_base == -1)
252 return NULL; 251 return NULL;
253 252
254 vectors = kmem_alloc(sizeof(*vectors) * *count, KM_SLEEP); 253 vectors = kmem_alloc(sizeof(*vectors) * *count, KM_SLEEP);
255 for (n = 0; n < *count; n++) { 254 for (n = 0; n < *count; n++) {
256 const int spi = spi_base + n; 255 const int spi = spi_base + n;
257 vectors[n] = ARM_PCI_INTR_MSI | 256 vectors[n] = ARM_PCI_INTR_MSI |
258 __SHIFTIN(spi, ARM_PCI_INTR_IRQ) | 257 __SHIFTIN(spi, ARM_PCI_INTR_IRQ) |
259 __SHIFTIN(n, ARM_PCI_INTR_MSI_VEC) | 258 __SHIFTIN(n, ARM_PCI_INTR_MSI_VEC) |