Sun Mar 14 08:16:57 2021 UTC ()
Use fdtbus_intr_establish_xname


(skrll)
diff -r1.13 -r1.14 src/sys/arch/arm/samsung/exynos_combiner.c
diff -r1.14 -r1.15 src/sys/arch/arm/samsung/exynos_dwcmmc.c
diff -r1.5 -r1.6 src/sys/arch/arm/samsung/exynos_ehci.c
diff -r1.21 -r1.22 src/sys/arch/arm/samsung/exynos_i2c.c
diff -r1.4 -r1.5 src/sys/arch/arm/samsung/exynos_ohci.c
diff -r1.4 -r1.5 src/sys/arch/arm/samsung/exynos_uart.c
diff -r1.17 -r1.18 src/sys/arch/arm/samsung/mct.c

cvs diff -r1.13 -r1.14 src/sys/arch/arm/samsung/exynos_combiner.c (expand / switch to unified diff)

--- src/sys/arch/arm/samsung/exynos_combiner.c 2021/01/27 03:10:19 1.13
+++ src/sys/arch/arm/samsung/exynos_combiner.c 2021/03/14 08:16:57 1.14
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: exynos_combiner.c,v 1.13 2021/01/27 03:10:19 thorpej Exp $ */ 1/* $NetBSD: exynos_combiner.c,v 1.14 2021/03/14 08:16:57 skrll Exp $ */
2 2
3/*- 3/*-
4* Copyright (c) 2015 The NetBSD Foundation, Inc. 4* Copyright (c) 2015 The NetBSD Foundation, Inc.
5* All rights reserved. 5* All rights reserved.
6* 6*
7* This code is derived from software contributed to The NetBSD Foundation 7* This code is derived from software contributed to The NetBSD Foundation
8* by Marty Fouts 8* by Marty Fouts
9* 9*
10* Redistribution and use in source and binary forms, with or without 10* Redistribution and use in source and binary forms, with or without
11* modification, are permitted provided that the following conditions 11* modification, are permitted provided that the following conditions
12* are met: 12* are met:
13* 1. Redistributions of source code must retain the above copyright 13* 1. Redistributions of source code must retain the above copyright
14* notice, this list of conditions and the following disclaimer. 14* notice, this list of conditions and the following disclaimer.
@@ -25,27 +25,27 @@ @@ -25,27 +25,27 @@
25* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29* POSSIBILITY OF SUCH DAMAGE. 29* POSSIBILITY OF SUCH DAMAGE.
30*/ 30*/
31 31
32#include "opt_exynos.h" 32#include "opt_exynos.h"
33#include "opt_arm_debug.h" 33#include "opt_arm_debug.h"
34#include "opt_multiprocessor.h" 34#include "opt_multiprocessor.h"
35#include "gpio.h" 35#include "gpio.h"
36 36
37#include <sys/cdefs.h> 37#include <sys/cdefs.h>
38__KERNEL_RCSID(1, "$NetBSD: exynos_combiner.c,v 1.13 2021/01/27 03:10:19 thorpej Exp $"); 38__KERNEL_RCSID(1, "$NetBSD: exynos_combiner.c,v 1.14 2021/03/14 08:16:57 skrll Exp $");
39 39
40#include <sys/param.h> 40#include <sys/param.h>
41#include <sys/bus.h> 41#include <sys/bus.h>
42#include <sys/cpu.h> 42#include <sys/cpu.h>
43#include <sys/device.h> 43#include <sys/device.h>
44#include <sys/intr.h> 44#include <sys/intr.h>
45#include <sys/systm.h> 45#include <sys/systm.h>
46#include <sys/kmem.h> 46#include <sys/kmem.h>
47 47
48#include <arm/cortex/gic_intr.h> 48#include <arm/cortex/gic_intr.h>
49 49
50#include <arm/samsung/exynos_reg.h> 50#include <arm/samsung/exynos_reg.h>
51#include <arm/samsung/exynos_intr.h> 51#include <arm/samsung/exynos_intr.h>
@@ -244,32 +244,33 @@ exynos_combiner_establish(device_t dev,  @@ -244,32 +244,33 @@ exynos_combiner_establish(device_t dev,
244 struct exynos_combiner_softc * const sc = device_private(dev); 244 struct exynos_combiner_softc * const sc = device_private(dev);
245 struct exynos_combiner_irq_group *groupp; 245 struct exynos_combiner_irq_group *groupp;
246 struct exynos_combiner_irq_entry *entryp; 246 struct exynos_combiner_irq_entry *entryp;
247 const bool mpsafe = (flags & FDT_INTR_MPSAFE) != 0; 247 const bool mpsafe = (flags & FDT_INTR_MPSAFE) != 0;
248 uint32_t iesr; 248 uint32_t iesr;
249 249
250 const u_int group = be32toh(specifier[0]); 250 const u_int group = be32toh(specifier[0]);
251 const u_int intr = be32toh(specifier[1]); 251 const u_int intr = be32toh(specifier[1]);
252 252
253 groupp = exynos_combiner_get_group(sc, group); 253 groupp = exynos_combiner_get_group(sc, group);
254 if (!groupp) { 254 if (!groupp) {
255 groupp = exynos_combiner_new_group(sc, group); 255 groupp = exynos_combiner_new_group(sc, group);
256 if (arg == NULL) { 256 if (arg == NULL) {
257 groupp->irq_ih = fdtbus_intr_establish(sc->sc_phandle, 257 groupp->irq_ih = fdtbus_intr_establish_xname(
258 group, ipl /* XXX */, flags, func, NULL); 258 sc->sc_phandle, group, ipl /* XXX */, flags, func, NULL,
 259 device_xname(dev));
259 } else { 260 } else {
260 groupp->irq_ih = fdtbus_intr_establish(sc->sc_phandle, 261 groupp->irq_ih = fdtbus_intr_establish_xname(
261 group, ipl /* XXX */, FDT_INTR_MPSAFE, 262 sc->sc_phandle, group, ipl /* XXX */, FDT_INTR_MPSAFE,
262 exynos_combiner_irq, groupp); 263 exynos_combiner_irq, groupp, device_xname(dev));
263 } 264 }
264 KASSERT(groupp->irq_ih != NULL); 265 KASSERT(groupp->irq_ih != NULL);
265 groupp->irq_ipl = ipl; 266 groupp->irq_ipl = ipl;
266 } else if (groupp->irq_ipl != ipl) { 267 } else if (groupp->irq_ipl != ipl) {
267 aprint_error_dev(dev, 268 aprint_error_dev(dev,
268 "interrupt combiner cannot share interrupts with different ipl\n"); 269 "interrupt combiner cannot share interrupts with different ipl\n");
269 return NULL; 270 return NULL;
270 } 271 }
271 272
272 if (exynos_combiner_get_irq(groupp, intr) != NULL) 273 if (exynos_combiner_get_irq(groupp, intr) != NULL)
273 return NULL; 274 return NULL;
274 275
275 entryp = exynos_combiner_new_irq(groupp, intr, mpsafe, func, arg); 276 entryp = exynos_combiner_new_irq(groupp, intr, mpsafe, func, arg);

cvs diff -r1.14 -r1.15 src/sys/arch/arm/samsung/exynos_dwcmmc.c (expand / switch to unified diff)

--- src/sys/arch/arm/samsung/exynos_dwcmmc.c 2021/01/27 03:10:19 1.14
+++ src/sys/arch/arm/samsung/exynos_dwcmmc.c 2021/03/14 08:16:57 1.15
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: exynos_dwcmmc.c,v 1.14 2021/01/27 03:10:19 thorpej Exp $ */ 1/* $NetBSD: exynos_dwcmmc.c,v 1.15 2021/03/14 08:16:57 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -17,27 +17,27 @@ @@ -17,27 +17,27 @@
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.14 2021/01/27 03:10:19 thorpej Exp $"); 30__KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.15 2021/03/14 08:16:57 skrll Exp $");
31 31
32#include <sys/param.h> 32#include <sys/param.h>
33#include <sys/bus.h> 33#include <sys/bus.h>
34#include <sys/device.h> 34#include <sys/device.h>
35#include <sys/intr.h> 35#include <sys/intr.h>
36#include <sys/systm.h> 36#include <sys/systm.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38#include <sys/mutex.h> 38#include <sys/mutex.h>
39#include <sys/condvar.h> 39#include <sys/condvar.h>
40 40
41#include <arm/samsung/exynos_var.h> 41#include <arm/samsung/exynos_var.h>
42 42
43#include <dev/ic/dwc_mmc_reg.h> 43#include <dev/ic/dwc_mmc_reg.h>
@@ -155,28 +155,28 @@ exynos_dwcmmc_attach(device_t parent, de @@ -155,28 +155,28 @@ exynos_dwcmmc_attach(device_t parent, de
155 sc->sc_card_detect = exynos_dwcmmc_card_detect; 155 sc->sc_card_detect = exynos_dwcmmc_card_detect;
156 156
157 aprint_naive("\n"); 157 aprint_naive("\n");
158 aprint_normal(": MHS (%u Hz)\n", sc->sc_clock_freq); 158 aprint_normal(": MHS (%u Hz)\n", sc->sc_clock_freq);
159 159
160 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 160 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
161 aprint_error_dev(self, "failed to decode interrupt\n"); 161 aprint_error_dev(self, "failed to decode interrupt\n");
162 return; 162 return;
163 } 163 }
164 164
165 if (dwc_mmc_init(sc) != 0) 165 if (dwc_mmc_init(sc) != 0)
166 return; 166 return;
167 167
168 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0, 168 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_BIO, 0,
169 dwc_mmc_intr, sc); 169 dwc_mmc_intr, sc, device_xname(self));
170 if (sc->sc_ih == NULL) { 170 if (sc->sc_ih == NULL) {
171 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 171 aprint_error_dev(self, "couldn't establish interrupt on %s\n",
172 intrstr); 172 intrstr);
173 return; 173 return;
174 } 174 }
175 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 175 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
176 176
177 /* Disable encryption mode */ 177 /* Disable encryption mode */
178 if (dce->value != 0) { 178 if (dce->value != 0) {
179 bus_space_write_4(sc->sc_bst, sc->sc_bsh, MPS_BEGIN, 0); 179 bus_space_write_4(sc->sc_bst, sc->sc_bsh, MPS_BEGIN, 0);
180 bus_space_write_4(sc->sc_bst, sc->sc_bsh, MPS_END, ~0U); 180 bus_space_write_4(sc->sc_bst, sc->sc_bsh, MPS_END, ~0U);
181 bus_space_write_4(sc->sc_bst, sc->sc_bsh, MPS_CTRL, 181 bus_space_write_4(sc->sc_bst, sc->sc_bsh, MPS_CTRL,
182 MPS_CTRL_NON_SECURE_READ | MPS_CTRL_NON_SECURE_WRITE | 182 MPS_CTRL_NON_SECURE_READ | MPS_CTRL_NON_SECURE_WRITE |

cvs diff -r1.5 -r1.6 src/sys/arch/arm/samsung/exynos_ehci.c (expand / switch to unified diff)

--- src/sys/arch/arm/samsung/exynos_ehci.c 2021/01/27 03:10:19 1.5
+++ src/sys/arch/arm/samsung/exynos_ehci.c 2021/03/14 08:16:57 1.6
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: exynos_ehci.c,v 1.5 2021/01/27 03:10:19 thorpej Exp $ */ 1/* $NetBSD: exynos_ehci.c,v 1.6 2021/03/14 08:16:57 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -17,27 +17,27 @@ @@ -17,27 +17,27 @@
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: exynos_ehci.c,v 1.5 2021/01/27 03:10:19 thorpej Exp $"); 30__KERNEL_RCSID(0, "$NetBSD: exynos_ehci.c,v 1.6 2021/03/14 08:16:57 skrll Exp $");
31 31
32#include <sys/param.h> 32#include <sys/param.h>
33#include <sys/bus.h> 33#include <sys/bus.h>
34#include <sys/device.h> 34#include <sys/device.h>
35#include <sys/intr.h> 35#include <sys/intr.h>
36#include <sys/systm.h> 36#include <sys/systm.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38 38
39#include <dev/usb/usb.h> 39#include <dev/usb/usb.h>
40#include <dev/usb/usbdi.h> 40#include <dev/usb/usbdi.h>
41#include <dev/usb/usbdivar.h> 41#include <dev/usb/usbdivar.h>
42#include <dev/usb/usb_mem.h> 42#include <dev/usb/usb_mem.h>
43#include <dev/usb/ehcireg.h> 43#include <dev/usb/ehcireg.h>
@@ -116,28 +116,28 @@ exynos_ehci_attach(device_t parent, devi @@ -116,28 +116,28 @@ exynos_ehci_attach(device_t parent, devi
116 116
117 aprint_naive("\n"); 117 aprint_naive("\n");
118 aprint_normal(": Exynos EHCI\n"); 118 aprint_normal(": Exynos EHCI\n");
119 119
120 /* Disable interrupts */ 120 /* Disable interrupts */
121 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 121 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
122 EOWRITE4(sc, EHCI_USBINTR, 0); 122 EOWRITE4(sc, EHCI_USBINTR, 0);
123 123
124 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 124 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
125 aprint_error_dev(self, "failed to decode interrupt\n"); 125 aprint_error_dev(self, "failed to decode interrupt\n");
126 return; 126 return;
127 } 127 }
128 128
129 ih = fdtbus_intr_establish(phandle, 0, IPL_USB, FDT_INTR_MPSAFE, 129 ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,
130 ehci_intr, sc); 130 ehci_intr, sc, device_xname(self));
131 if (ih == NULL) { 131 if (ih == NULL) {
132 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 132 aprint_error_dev(self, "couldn't establish interrupt on %s\n",
133 intrstr); 133 intrstr);
134 return; 134 return;
135 } 135 }
136 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 136 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
137 137
138 error = ehci_init(sc); 138 error = ehci_init(sc);
139 if (error) { 139 if (error) {
140 aprint_error_dev(self, "init failed, error = %d\n", error); 140 aprint_error_dev(self, "init failed, error = %d\n", error);
141 return; 141 return;
142 } 142 }
143 143

cvs diff -r1.21 -r1.22 src/sys/arch/arm/samsung/exynos_i2c.c (expand / switch to unified diff)

--- src/sys/arch/arm/samsung/exynos_i2c.c 2021/01/27 03:10:19 1.21
+++ src/sys/arch/arm/samsung/exynos_i2c.c 2021/03/14 08:16:57 1.22
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: exynos_i2c.c,v 1.21 2021/01/27 03:10:19 thorpej Exp $ */ 1/* $NetBSD: exynos_i2c.c,v 1.22 2021/03/14 08:16:57 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE. 26 * POSSIBILITY OF SUCH DAMAGE.
27 * 27 *
28 */ 28 */
29 29
30#include "opt_exynos.h" 30#include "opt_exynos.h"
31#include "opt_arm_debug.h" 31#include "opt_arm_debug.h"
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: exynos_i2c.c,v 1.21 2021/01/27 03:10:19 thorpej Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: exynos_i2c.c,v 1.22 2021/03/14 08:16:57 skrll Exp $");
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/bus.h> 37#include <sys/bus.h>
38#include <sys/device.h> 38#include <sys/device.h>
39#include <sys/intr.h> 39#include <sys/intr.h>
40#include <sys/systm.h> 40#include <sys/systm.h>
41#include <sys/kernel.h> 41#include <sys/kernel.h>
42#include <sys/kmem.h> 42#include <sys/kmem.h>
43 43
44#include <arm/samsung/exynos_reg.h> 44#include <arm/samsung/exynos_reg.h>
45#include <arm/samsung/exynos_var.h> 45#include <arm/samsung/exynos_var.h>
46#include <arm/samsung/exynos_intr.h> 46#include <arm/samsung/exynos_intr.h>
47 47
@@ -149,28 +149,28 @@ exynos_i2c_attach(device_t parent, devic @@ -149,28 +149,28 @@ exynos_i2c_attach(device_t parent, devic
149 error); 149 error);
150 return; 150 return;
151 } 151 }
152 152
153 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM); 153 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
154 cv_init(&sc->sc_intr_wait, device_xname(self)); 154 cv_init(&sc->sc_intr_wait, device_xname(self));
155 aprint_normal(" @ 0x%08x\n", (uint)addr); 155 aprint_normal(" @ 0x%08x\n", (uint)addr);
156 156
157 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 157 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
158 aprint_error_dev(self, "failed to decode interrupt\n"); 158 aprint_error_dev(self, "failed to decode interrupt\n");
159 return; 159 return;
160 } 160 }
161 161
162 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_VM, 162 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
163 FDT_INTR_MPSAFE, exynos_i2c_intr, sc); 163 FDT_INTR_MPSAFE, exynos_i2c_intr, sc, device_xname(self));
164 if (sc->sc_ih == NULL) { 164 if (sc->sc_ih == NULL) {
165 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 165 aprint_error_dev(self, "couldn't establish interrupt on %s\n",
166 intrstr); 166 intrstr);
167 return; 167 return;
168 } 168 }
169 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 169 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
170 170
171 iic_tag_init(&sc->sc_ic); 171 iic_tag_init(&sc->sc_ic);
172 sc->sc_ic.ic_cookie = sc; 172 sc->sc_ic.ic_cookie = sc;
173 sc->sc_ic.ic_send_start = exynos_i2c_send_start; 173 sc->sc_ic.ic_send_start = exynos_i2c_send_start;
174 sc->sc_ic.ic_send_stop = exynos_i2c_send_stop; 174 sc->sc_ic.ic_send_stop = exynos_i2c_send_stop;
175 sc->sc_ic.ic_initiate_xfer = exynos_i2c_initiate_xfer; 175 sc->sc_ic.ic_initiate_xfer = exynos_i2c_initiate_xfer;
176 sc->sc_ic.ic_read_byte = exynos_i2c_read_byte; 176 sc->sc_ic.ic_read_byte = exynos_i2c_read_byte;

cvs diff -r1.4 -r1.5 src/sys/arch/arm/samsung/exynos_ohci.c (expand / switch to unified diff)

--- src/sys/arch/arm/samsung/exynos_ohci.c 2021/01/27 03:10:19 1.4
+++ src/sys/arch/arm/samsung/exynos_ohci.c 2021/03/14 08:16:57 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: exynos_ohci.c,v 1.4 2021/01/27 03:10:19 thorpej Exp $ */ 1/* $NetBSD: exynos_ohci.c,v 1.5 2021/03/14 08:16:57 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -17,27 +17,27 @@ @@ -17,27 +17,27 @@
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: exynos_ohci.c,v 1.4 2021/01/27 03:10:19 thorpej Exp $"); 30__KERNEL_RCSID(0, "$NetBSD: exynos_ohci.c,v 1.5 2021/03/14 08:16:57 skrll Exp $");
31 31
32#include <sys/param.h> 32#include <sys/param.h>
33#include <sys/bus.h> 33#include <sys/bus.h>
34#include <sys/device.h> 34#include <sys/device.h>
35#include <sys/intr.h> 35#include <sys/intr.h>
36#include <sys/systm.h> 36#include <sys/systm.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38 38
39#include <dev/usb/usb.h> 39#include <dev/usb/usb.h>
40#include <dev/usb/usbdi.h> 40#include <dev/usb/usbdi.h>
41#include <dev/usb/usbdivar.h> 41#include <dev/usb/usbdivar.h>
42#include <dev/usb/usb_mem.h> 42#include <dev/usb/usb_mem.h>
43#include <dev/usb/ohcireg.h> 43#include <dev/usb/ohcireg.h>
@@ -112,28 +112,28 @@ exynos_ohci_attach(device_t parent, devi @@ -112,28 +112,28 @@ exynos_ohci_attach(device_t parent, devi
112 112
113 aprint_naive("\n"); 113 aprint_naive("\n");
114 aprint_normal(": Exynos OHCI\n"); 114 aprint_normal(": Exynos OHCI\n");
115 115
116 /* Disable interrupts */ 116 /* Disable interrupts */
117 bus_space_write_4(sc->iot, sc->ioh, OHCI_INTERRUPT_DISABLE, 117 bus_space_write_4(sc->iot, sc->ioh, OHCI_INTERRUPT_DISABLE,
118 OHCI_ALL_INTRS); 118 OHCI_ALL_INTRS);
119 119
120 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 120 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
121 aprint_error_dev(self, "failed to decode interrupt\n"); 121 aprint_error_dev(self, "failed to decode interrupt\n");
122 return; 122 return;
123 } 123 }
124 124
125 ih = fdtbus_intr_establish(phandle, 0, IPL_USB, FDT_INTR_MPSAFE, 125 ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,
126 ohci_intr, sc); 126 ohci_intr, sc, device_xname(self));
127 if (ih == NULL) { 127 if (ih == NULL) {
128 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 128 aprint_error_dev(self, "couldn't establish interrupt on %s\n",
129 intrstr); 129 intrstr);
130 return; 130 return;
131 } 131 }
132 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 132 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
133 133
134 error = ohci_init(sc); 134 error = ohci_init(sc);
135 if (error) { 135 if (error) {
136 aprint_error_dev(self, "init failed, error = %d\n", error); 136 aprint_error_dev(self, "init failed, error = %d\n", error);
137 return; 137 return;
138 } 138 }
139 139

cvs diff -r1.4 -r1.5 src/sys/arch/arm/samsung/exynos_uart.c (expand / switch to unified diff)

--- src/sys/arch/arm/samsung/exynos_uart.c 2021/01/27 03:10:19 1.4
+++ src/sys/arch/arm/samsung/exynos_uart.c 2021/03/14 08:16:57 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: exynos_uart.c,v 1.4 2021/01/27 03:10:19 thorpej Exp $ */ 1/* $NetBSD: exynos_uart.c,v 1.5 2021/03/14 08:16:57 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2013-2018 The NetBSD Foundation, Inc. 4 * Copyright (c) 2013-2018 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry and Jared McNeill. 8 * by Matt Thomas of 3am Software Foundry and Jared McNeill.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -23,27 +23,27 @@ @@ -23,27 +23,27 @@
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include "locators.h" 32#include "locators.h"
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35 35
36__KERNEL_RCSID(1, "$NetBSD: exynos_uart.c,v 1.4 2021/01/27 03:10:19 thorpej Exp $"); 36__KERNEL_RCSID(1, "$NetBSD: exynos_uart.c,v 1.5 2021/03/14 08:16:57 skrll Exp $");
37 37
38#define cn_trap() \ 38#define cn_trap() \
39 do { \ 39 do { \
40 console_debugger(); \ 40 console_debugger(); \
41 cn_trapped = 1; \ 41 cn_trapped = 1; \
42 } while (/* CONSTCOND */ 0) 42 } while (/* CONSTCOND */ 0)
43 43
44#include <sys/param.h> 44#include <sys/param.h>
45#include <sys/bus.h> 45#include <sys/bus.h>
46#include <sys/device.h> 46#include <sys/device.h>
47#include <sys/conf.h> 47#include <sys/conf.h>
48#include <sys/intr.h> 48#include <sys/intr.h>
49#include <sys/systm.h> 49#include <sys/systm.h>
@@ -189,28 +189,28 @@ exynos_uart_attach(device_t parent, devi @@ -189,28 +189,28 @@ exynos_uart_attach(device_t parent, devi
189 sc->sc_bst = faa->faa_bst; 189 sc->sc_bst = faa->faa_bst;
190 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 190 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
191 sc->sc_console = is_console; 191 sc->sc_console = is_console;
192 if (is_console) { 192 if (is_console) {
193 sc->sc_bsh = exynos_uart_cnsc.sc_bsh; 193 sc->sc_bsh = exynos_uart_cnsc.sc_bsh;
194 } else { 194 } else {
195 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 195 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
196 aprint_error(": failed to map registers\n"); 196 aprint_error(": failed to map registers\n");
197 return; 197 return;
198 } 198 }
199 } 199 }
200 sc->sc_freq = clk_get_rate(clk_uart_baud0); 200 sc->sc_freq = clk_get_rate(clk_uart_baud0);
201 201
202 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_SERIAL, 202 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL,
203 0, exynos_uart_intr, sc); 203 0, exynos_uart_intr, sc, device_xname(self));
204 if (sc->sc_ih == NULL) { 204 if (sc->sc_ih == NULL) {
205 aprint_error(": failed to establish interrupt on %s\n", 205 aprint_error(": failed to establish interrupt on %s\n",
206 intrstr); 206 intrstr);
207 return; 207 return;
208 } 208 }
209 209
210 if (exynos_uart_cmajor == -1) { 210 if (exynos_uart_cmajor == -1) {
211 /* allocate a major number */ 211 /* allocate a major number */
212 int bmajor = -1, cmajor = -1; 212 int bmajor = -1, cmajor = -1;
213 int error = devsw_attach("exuart", NULL, &bmajor, 213 int error = devsw_attach("exuart", NULL, &bmajor,
214 &exuart_cdevsw, &cmajor); 214 &exuart_cdevsw, &cmajor);
215 if (error) { 215 if (error) {
216 aprint_error(": couldn't allocate major number\n"); 216 aprint_error(": couldn't allocate major number\n");

cvs diff -r1.17 -r1.18 src/sys/arch/arm/samsung/mct.c (expand / switch to unified diff)

--- src/sys/arch/arm/samsung/mct.c 2021/01/27 03:10:19 1.17
+++ src/sys/arch/arm/samsung/mct.c 2021/03/14 08:16:57 1.18
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: mct.c,v 1.17 2021/01/27 03:10:19 thorpej Exp $ */ 1/* $NetBSD: mct.c,v 1.18 2021/03/14 08:16:57 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2014-2018 The NetBSD Foundation, Inc. 4 * Copyright (c) 2014-2018 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Reinoud Zandijk and Jared McNeill. 8 * by Reinoud Zandijk and Jared McNeill.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -24,27 +24,27 @@ @@ -24,27 +24,27 @@
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include "opt_arm_timer.h" 32#include "opt_arm_timer.h"
33#include "opt_multiprocessor.h" 33#include "opt_multiprocessor.h"
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36 36
37__KERNEL_RCSID(1, "$NetBSD: mct.c,v 1.17 2021/01/27 03:10:19 thorpej Exp $"); 37__KERNEL_RCSID(1, "$NetBSD: mct.c,v 1.18 2021/03/14 08:16:57 skrll Exp $");
38 38
39#include <sys/param.h> 39#include <sys/param.h>
40#include <sys/bus.h> 40#include <sys/bus.h>
41#include <sys/device.h> 41#include <sys/device.h>
42#include <sys/intr.h> 42#include <sys/intr.h>
43#include <sys/kernel.h> 43#include <sys/kernel.h>
44#include <sys/proc.h> 44#include <sys/proc.h>
45#include <sys/systm.h> 45#include <sys/systm.h>
46#include <sys/timetc.h> 46#include <sys/timetc.h>
47#include <sys/kmem.h> 47#include <sys/kmem.h>
48 48
49#include <prop/proplib.h> 49#include <prop/proplib.h>
50 50
@@ -183,28 +183,28 @@ mct_read_gcnt(struct mct_softc *sc) @@ -183,28 +183,28 @@ mct_read_gcnt(struct mct_softc *sc)
183 183
184 return ((uint64_t)gcntu << 32) | gcntl; 184 return ((uint64_t)gcntu << 32) | gcntl;
185} 185}
186 186
187static void 187static void
188mct_cpu_initclocks(void) 188mct_cpu_initclocks(void)
189{ 189{
190 struct mct_softc * const sc = &mct_sc; 190 struct mct_softc * const sc = &mct_sc;
191 char intrstr[128]; 191 char intrstr[128];
192 192
193 if (!fdtbus_intr_str(sc->sc_phandle, 0, intrstr, sizeof(intrstr))) 193 if (!fdtbus_intr_str(sc->sc_phandle, 0, intrstr, sizeof(intrstr)))
194 panic("%s: failed to decode interrupt", __func__); 194 panic("%s: failed to decode interrupt", __func__);
195 195
196 sc->sc_global_ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_CLOCK, 196 sc->sc_global_ih = fdtbus_intr_establish_xname(sc->sc_phandle, 0, IPL_CLOCK,
197 FDT_INTR_MPSAFE, mct_intr, NULL); 197 FDT_INTR_MPSAFE, mct_intr, NULL, device_xname(sc->sc_dev));
198 if (sc->sc_global_ih == NULL) 198 if (sc->sc_global_ih == NULL)
199 panic("%s: failed to establish timer interrupt on %s", __func__, intrstr); 199 panic("%s: failed to establish timer interrupt on %s", __func__, intrstr);
200 200
201 aprint_normal_dev(sc->sc_dev, "interrupting on %s\n", intrstr); 201 aprint_normal_dev(sc->sc_dev, "interrupting on %s\n", intrstr);
202 202
203 /* Start the timer */ 203 /* Start the timer */
204 const u_int autoinc = sc->sc_freq / hz; 204 const u_int autoinc = sc->sc_freq / hz;
205 const uint64_t comp0 = mct_read_gcnt(sc) + autoinc; 205 const uint64_t comp0 = mct_read_gcnt(sc) + autoinc;
206 206
207 mct_write_global(sc, MCT_G_TCON, G_TCON_START | G_TCON_COMP0_AUTOINC); 207 mct_write_global(sc, MCT_G_TCON, G_TCON_START | G_TCON_COMP0_AUTOINC);
208 mct_write_global(sc, MCT_G_COMP0_ADD_INCR, autoinc); 208 mct_write_global(sc, MCT_G_COMP0_ADD_INCR, autoinc);
209 mct_write_global(sc, MCT_G_COMP0_L, (uint32_t)comp0); 209 mct_write_global(sc, MCT_G_COMP0_L, (uint32_t)comp0);
210 mct_write_global(sc, MCT_G_COMP0_U, (uint32_t)(comp0 >> 32)); 210 mct_write_global(sc, MCT_G_COMP0_U, (uint32_t)(comp0 >> 32));