 @@ -1,14 +1,14 @@
-/*	$NetBSD: pmap.c,v 1.425 2021/02/01 19:02:28 skrll Exp $	*/
+/*	$NetBSD: pmap.c,v 1.426 2021/03/14 10:36:46 skrll Exp $	*/
 /*
  * Copyright 2003 Wasabi Systems, Inc.
  * All rights reserved.
+ *
  * Written by Steve C. Woodford for Wasabi Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -182,27 +182,27 @@
 /* Include header files */
 #include "opt_arm_debug.h"
 #include "opt_cpuoptions.h"
 #include "opt_ddb.h"
 #include "opt_lockdebug.h"
 #include "opt_multiprocessor.h"
 #ifdef MULTIPROCESSOR
 #define _INTR_PRIVATE
 #endif
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.425 2021/02/01 19:02:28 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.426 2021/03/14 10:36:46 skrll Exp $");
 #include <sys/param.h>
 #include <sys/types.h>
 #include <sys/asan.h>
 #include <sys/atomic.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/intr.h>
 #include <sys/kernel.h>
 #include <sys/kernhist.h>
 #include <sys/kmem.h>
 #include <sys/pool.h>
 @@ -2827,40 +2827,43 @@ static void
 pmap_page_remove(struct vm_page_md *md, paddr_t pa)
+{
 	struct l2_bucket *l2b;
 	struct pv_entry *pv;
 	pt_entry_t *ptep;
 #ifndef ARM_MMU_EXTENDED
 	bool flush = false;
 #endif
 	u_int flags = 0;
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx", (uintptr_t)md, pa, 0, 0);
 	kpreempt_disable();
 	pmap_acquire_page_lock(md);
 	struct pv_entry **pvp = &SLIST_FIRST(&md->pvh_list);
 	if (*pvp == NULL) {
 #ifdef PMAP_CACHE_VIPT
 		/*
 		 * We *know* the page contents are about to be replaced.
 		 * Discard the exec contents
 		 */
 		if (PV_IS_EXEC_P(md->pvh_attrs))
 			PMAPCOUNT(exec_discarded_page_protect);
 		md->pvh_attrs &= ~PVF_EXEC;
 		PMAP_VALIDATE_MD_PAGE(md);
 #endif
 		pmap_release_page_lock(md);
 		kpreempt_enable();
 		return;
+	}
 #if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
 	KASSERT(arm_cache_prefer_mask == 0 || pmap_is_page_colored_p(md));
 #endif
 	/*
 	 * Clear alias counts
 	 */
 #ifdef PMAP_CACHE_VIVT
 	md->k_mappings = 0;
 #endif
 	md->urw_mappings = md->uro_mappings = 0;
 @@ -2994,26 +2997,28 @@ pmap_page_remove(struct vm_page_md *md,
 		 * Note: We can't use pmap_tlb_flush{I,D}() here since that
 		 * would need a subsequent call to pmap_update() to ensure
 		 * curpm->pm_cstate.cs_all is reset. Our callers are not
 		 * required to do that (see pmap(9)), so we can't modify
 		 * the current pmap's state.
 		 */
 		if (PV_BEEN_EXECD(flags))
 			cpu_tlb_flushID();
 		else
 			cpu_tlb_flushD();
+	}
 	cpu_cpwait();
 #endif /* ARM_MMU_EXTENDED */
 	kpreempt_enable();
+}
 /*
  * pmap_t pmap_create(void)
+ *
  *      Create a new pmap structure from scratch.
  */
 pmap_t
 pmap_create(void)
+{
 	pmap_t pm;
 	pm = pool_cache_get(&pmap_cache, PR_WAITOK);
 @@ -3101,40 +3106,43 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_
 	 * with the kernel_pmap locked
 	 */
 	if (pg || pp)
 		new_pv = pool_get(&pmap_pv_pool, PR_NOWAIT);
 	nflags = 0;
 	if (prot & VM_PROT_WRITE)
 		nflags |= PVF_WRITE;
 	if (prot & VM_PROT_EXECUTE)
 		nflags |= PVF_EXEC;
 	if (flags & PMAP_WIRED)
 		nflags |= PVF_WIRED;
 	kpreempt_disable();
 	pmap_acquire_pmap_lock(pm);
 	/*
 	 * Fetch the L2 bucket which maps this page, allocating one if
 	 * necessary for user pmaps.
 	 */
 	if (kpm_p) {
 		l2b = pmap_get_l2_bucket(pm, va);
 	} else {
 		l2b = pmap_alloc_l2_bucket(pm, va);
+	}
 	if (l2b == NULL) {
 		if (flags & PMAP_CANFAIL) {
 			pmap_release_pmap_lock(pm);
 			kpreempt_enable();
 			error = ENOMEM;
 			goto free_pv;
+		}
 		panic("pmap_enter: failed to allocate L2 bucket");
+	}
 	pt_entry_t *ptep = &l2b->l2b_kva[l2pte_index(va)];
 	const pt_entry_t opte = *ptep;
 	pt_entry_t npte = pa;
 	oflags = 0;
 	if (opte) {
 		/*
 		 * There is already a mapping at this address.
 @@ -3409,33 +3417,34 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_
 	if (pg) {
 		struct vm_page_md *md = VM_PAGE_TO_MD(pg);
 		pmap_acquire_page_lock(md);
 #ifndef ARM_MMU_EXTENDED
 		KASSERT((md->pvh_attrs & PVF_DMOD) == 0 || (md->pvh_attrs & (PVF_DIRTY|PVF_NC)));
 #endif
 		PMAP_VALIDATE_MD_PAGE(md);
 		pmap_release_page_lock(md);
+	}
 #endif
 	pmap_release_pmap_lock(pm);
 	kpreempt_enable();
 	if (old_pv)
 		pool_put(&pmap_pv_pool, old_pv);
 free_pv:
 	if (new_pv)
 		pool_put(&pmap_pv_pool, new_pv);
 	return error;
+}
 /*
  * pmap_remove()
+ *
  * pmap_remove is responsible for nuking a number of mappings for a range
  * of virtual address space in the current pmap. To do this efficiently
  * is interesting, because in a number of cases a wide virtual address
  * range may be supplied that contains few actual mappings. So, the
  * optimisations are:
  *  1. Skip over hunks of address space for which no L1 or L2 entry exists.
  *  2. Build up a list of pages we've hit, up to a maximum, so we can
 @@ -3460,26 +3469,27 @@ pmap_remove(pmap_t pm, vaddr_t sva, vadd
 	UVMHIST_CALLARGS(maphist, " (pm=%#jx, sva=%#jx, eva=%#jx)",
 	    (uintptr_t)pm, sva, eva, 0);
 #ifdef PMAP_FAULTINFO
 	curpcb->pcb_faultinfo.pfi_faultaddr = 0;
 	curpcb->pcb_faultinfo.pfi_repeats = 0;
 	curpcb->pcb_faultinfo.pfi_faultptep = NULL;
 #endif
 	SLIST_INIT(&opv_list);
 	/*
 	 * we lock in the pmap => pv_head direction
 	 */
 	kpreempt_disable();
 	pmap_acquire_pmap_lock(pm);
 #ifndef ARM_MMU_EXTENDED
 	u_int cleanlist_idx, total, cnt;
 	struct {
 		vaddr_t va;
 		pt_entry_t *ptep;
 	} cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE];
 	if (pm->pm_remove_all || !pmap_is_cached(pm)) {
 		cleanlist_idx = PMAP_REMOVE_CLEAN_LIST_SIZE + 1;
 		if (pm->pm_cstate.cs_tlb == 0)
 			pm->pm_remove_all = true;
 @@ -3627,26 +3637,28 @@ pmap_remove(pmap_t pm, vaddr_t sva, vadd
 #ifdef PMAP_CACHE_VIVT
 				pmap_cache_wbinv_all(pm, PVF_EXEC);
 #endif
 				pm->pm_remove_all = true;
+			}
+		}
 #endif /* ARM_MMU_EXTENDED */
 		pmap_free_l2_bucket(pm, l2b, mappings);
 		pm->pm_stats.resident_count -= mappings / (PAGE_SIZE/L2_S_SIZE);
+	}
 	pmap_release_pmap_lock(pm);
 	kpreempt_enable();
 	SLIST_FOREACH_SAFE(pv, &opv_list, pv_link, npv) {
 		pool_put(&pmap_pv_pool, pv);
+	}
+}
 #if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
 static struct pv_entry *
 pmap_kremove_pg(struct vm_page *pg, vaddr_t va)
+{
 	struct vm_page_md *md = VM_PAGE_TO_MD(pg);
 	paddr_t pa = VM_PAGE_TO_PHYS(pg);
 	struct pv_entry *pv;
 @@ -3699,26 +3711,27 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, v
 	struct pv_entry *pv = NULL;
 #endif
 #endif
 	struct vm_page_md *md = pg != NULL ? VM_PAGE_TO_MD(pg) : NULL;
 	UVMHIST_FUNC(__func__);
 	if (pmap_initialized) {
 		UVMHIST_CALLARGS(maphist,
 		    "va=%#jx, pa=%#jx, prot=%#jx, flags=%#jx", va, pa, prot,
 		     flags);
+	}
 	kpreempt_disable();
 	pmap_t kpm = pmap_kernel();
 	pmap_acquire_pmap_lock(kpm);
 	struct l2_bucket * const l2b = pmap_get_l2_bucket(kpm, va);
 	const size_t l1slot __diagused = l1pte_index(va);
 	KASSERTMSG(l2b != NULL,
 	    "va %#lx pa %#lx prot %d maxkvaddr %#lx: l2 %p l2b %p kva %p",
 	    va, pa, prot, pmap_curmaxkvaddr, kpm->pm_l2[L2_IDX(l1slot)],
 	    kpm->pm_l2[L2_IDX(l1slot)]
 		? &kpm->pm_l2[L2_IDX(l1slot)]->l2_bucket[L2_BUCKET(l1slot)]
 		: NULL,
 	    kpm->pm_l2[L2_IDX(l1slot)]
 		? kpm->pm_l2[L2_IDX(l1slot)]->l2_bucket[L2_BUCKET(l1slot)].l2b_kva
 		: NULL);
 @@ -3835,48 +3848,51 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, v
 			    && !(md->pvh_attrs & PVF_NC))
 				md->pvh_attrs |= PVF_DIRTY;
 			KASSERT((prot & VM_PROT_WRITE) == 0 || (md->pvh_attrs & (PVF_DIRTY|PVF_NC)));
 			pmap_vac_me_harder(md, pa, pmap_kernel(), va);
 			pmap_release_page_lock(md);
 #endif
+		}
 #if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
 	} else {
 		if (pv != NULL)
 			pool_put(&pmap_pv_pool, pv);
 #endif
+	}
 	kpreempt_enable();
 	if (pmap_initialized) {
 		UVMHIST_LOG(maphist, "  <-- done (ptep %#jx: %#jx -> %#jx)",
 		    (uintptr_t)ptep, opte, npte, 0);
+	}
+}
 void
 pmap_kremove(vaddr_t va, vsize_t len)
+{
 #ifdef UVMHIST
 	u_int total_mappings = 0;
 #endif
 	PMAPCOUNT(kenter_unmappings);
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, " (va=%#jx, len=%#jx)", va, len, 0, 0);
 	const vaddr_t eva = va + len;
 	pmap_t kpm = pmap_kernel();
 	kpreempt_disable();
 	pmap_acquire_pmap_lock(kpm);
 	while (va < eva) {
 		vaddr_t next_bucket = L2_NEXT_BUCKET_VA(va);
 		if (next_bucket > eva)
 			next_bucket = eva;
 		struct l2_bucket * const l2b = pmap_get_l2_bucket(kpm, va);
 		KDASSERT(l2b != NULL);
 		pt_entry_t * const sptep = &l2b->l2b_kva[l2pte_index(va)];
 		pt_entry_t *ptep = sptep;
 		u_int mappings = 0;
 @@ -3921,47 +3937,50 @@ pmap_kremove(vaddr_t va, vsize_t len)
 			va += PAGE_SIZE;
 			ptep += PAGE_SIZE / L2_S_SIZE;
+		}
 		KDASSERTMSG(mappings <= l2b->l2b_occupancy, "%u %u",
 		    mappings, l2b->l2b_occupancy);
 		l2b->l2b_occupancy -= mappings;
 		//PTE_SYNC_RANGE(sptep, (u_int)(ptep - sptep));
 #ifdef UVMHIST
 		total_mappings += mappings;
 #endif
+	}
 	pmap_release_pmap_lock(kpm);
 	cpu_cpwait();
 	kpreempt_enable();
 	UVMHIST_LOG(maphist, "  <--- done (%ju mappings removed)",
 	    total_mappings, 0, 0, 0);
+}
 bool
 pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap)
+{
 	return pmap_extract_coherency(pm, va, pap, NULL);
+}
 bool
 pmap_extract_coherency(pmap_t pm, vaddr_t va, paddr_t *pap, bool *coherentp)
+{
 	struct l2_dtable *l2;
 	pd_entry_t *pdep, pde;
 	pt_entry_t *ptep, pte;
 	paddr_t pa;
 	u_int l1slot;
 	bool coherent;
 	kpreempt_disable();
 	pmap_acquire_pmap_lock(pm);
 	l1slot = l1pte_index(va);
 	pdep = pmap_l1_kva(pm) + l1slot;
 	pde = *pdep;
 	if (l1pte_section_p(pde)) {
 		/*
 		 * These should only happen for pmap_kernel()
 		 */
 		KDASSERT(pm == pmap_kernel());
 		pmap_release_pmap_lock(pm);
 #if (ARM_MMU_V6 + ARM_MMU_V7) > 0
 @@ -3972,31 +3991,34 @@ pmap_extract_coherency(pmap_t pm, vaddr_
 			pa = (pde & L1_S_FRAME) | (va & L1_S_OFFSET);
 		coherent = (pde & L1_S_CACHE_MASK) == 0;
 	} else {
 		/*
 		 * Note that we can't rely on the validity of the L1
 		 * descriptor as an indication that a mapping exists.
 		 * We have to look it up in the L2 dtable.
 		 */
 		l2 = pm->pm_l2[L2_IDX(l1slot)];
 		if (l2 == NULL ||
 		    (ptep = l2->l2_bucket[L2_BUCKET(l1slot)].l2b_kva) == NULL) {
 			pmap_release_pmap_lock(pm);
 			kpreempt_enable();
 			return false;
+		}
 		pte = ptep[l2pte_index(va)];
 		pmap_release_pmap_lock(pm);
 		kpreempt_enable();
 		if (pte == 0)
 			return false;
 		switch (pte & L2_TYPE_MASK) {
 		case L2_TYPE_L:
 			pa = (pte & L2_L_FRAME) | (va & L2_L_OFFSET);
 			coherent = (pte & L2_L_CACHE_MASK) == 0;
 			break;
 		default:
 			pa = (pte & ~PAGE_MASK) | (va & PAGE_MASK);
 			coherent = (pte & L2_S_CACHE_MASK) == 0;
 @@ -4013,26 +4035,27 @@ pmap_extract_coherency(pmap_t pm, vaddr_
 	return true;
+}
 /*
  * pmap_pv_remove: remove an unmanaged pv-tracked page from all pmaps
  *	that map it
  */
 static void
 pmap_pv_remove(paddr_t pa)
+{
 	struct pmap_page *pp;
 	KASSERT(kpreempt_disabled());
 	pp = pmap_pv_tracked(pa);
 	if (pp == NULL)
 		panic("pmap_pv_protect: page not pv-tracked: 0x%"PRIxPADDR,
 		    pa);
 	struct vm_page_md *md = PMAP_PAGE_TO_MD(pp);
 	pmap_page_remove(md, pa);
+}
 void
 pmap_pv_protect(paddr_t pa, vm_prot_t prot)
+{
 @@ -4054,26 +4077,27 @@ pmap_protect(pmap_t pm, vaddr_t sva, vad
 	if ((prot & VM_PROT_READ) == 0) {
 		pmap_remove(pm, sva, eva);
 		return;
+	}
 	if (prot & VM_PROT_WRITE) {
 		/*
 		 * If this is a read->write transition, just ignore it and let
 		 * uvm_fault() take care of it later.
 		 */
 		return;
+	}
 	kpreempt_disable();
 	pmap_acquire_pmap_lock(pm);
 #ifndef ARM_MMU_EXTENDED
 	const bool flush = eva - sva >= PAGE_SIZE * 4;
 	u_int flags = 0;
 #endif
 	u_int clr_mask = PVF_WRITE | ((prot & VM_PROT_EXECUTE) ? 0 : PVF_EXEC);
 	while (sva < eva) {
 		next_bucket = L2_NEXT_BUCKET_VA(sva);
 		if (next_bucket > eva)
 			next_bucket = eva;
 @@ -4144,26 +4168,27 @@ pmap_protect(pmap_t pm, vaddr_t sva, vad
+	}
 #ifndef ARM_MMU_EXTENDED
 	if (flush) {
 		if (PV_BEEN_EXECD(flags)) {
 			pmap_tlb_flushID(pm);
 		} else if (PV_BEEN_REFD(flags)) {
 			pmap_tlb_flushD(pm);
+		}
+	}
 #endif
 	pmap_release_pmap_lock(pm);
 	kpreempt_enable();
+}
 void
 pmap_icache_sync_range(pmap_t pm, vaddr_t sva, vaddr_t eva)
+{
 	struct l2_bucket *l2b;
 	pt_entry_t *ptep;
 	vaddr_t next_bucket;
 	vsize_t page_size = trunc_page(sva) + PAGE_SIZE - sva;
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "pm %#jx va %#jx...#%jx",
 	    (uintptr_t)pm, sva, eva, 0);
 @@ -4354,26 +4379,27 @@ pmap_prefetchabt_fixup(void *v)
 		PTE_SYNC(ptep);
 		pmap_tlb_flush_SE(pm, va, PVF_EXEC | PVF_REF);
 		if (!PV_IS_EXEC_P(md->pvh_attrs)) {
 			pmap_syncicache_page(md, pa);
+		}
 		rv = ABORT_FIXUP_RETURN;
 		l2pte_set(ptep, opte & ~L2_XS_XN, 0);
 		PTE_SYNC(ptep);
+	}
 	pmap_release_page_lock(md);
   out:
 	kpreempt_enable();
 	return rv;
+}
 #endif
 int
 pmap_fault_fixup(pmap_t pm, vaddr_t va, vm_prot_t ftype, int user)
+{
 	struct l2_dtable *l2;
 	struct l2_bucket *l2b;
 	paddr_t pa;
 	const size_t l1slot = l1pte_index(va);
 	int rv = 0;
 @@ -4382,26 +4408,27 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va,
 	    (uintptr_t)pm, va, ftype, user);
 	va = trunc_page(va);
 	KASSERT(!user || (pm != pmap_kernel()));
 #ifdef ARM_MMU_EXTENDED
 	UVMHIST_LOG(maphist, " ti=%#jx pai=%#jx asid=%#jx",
 	    (uintptr_t)cpu_tlb_info(curcpu()),
 	    (uintptr_t)PMAP_PAI(pm, cpu_tlb_info(curcpu())),
 	    (uintptr_t)PMAP_PAI(pm, cpu_tlb_info(curcpu()))->pai_asid, 0);
 #endif
 	kpreempt_disable();
 	pmap_acquire_pmap_lock(pm);
 	/*
 	 * If there is no l2_dtable for this address, then the process
 	 * has no business accessing it.
+	 *
 	 * Note: This will catch userland processes trying to access
 	 * kernel addresses.
 	 */
 	l2 = pm->pm_l2[L2_IDX(l1slot)];
 	if (l2 == NULL) {
 		UVMHIST_LOG(maphist, " no l2 for l1slot %#jx", l1slot, 0, 0, 0);
 		goto out;
 @@ -4775,26 +4802,27 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va,
 #endif
 #endif
 #ifndef ARM_MMU_EXTENDED
 	/* Flush the TLB in the shared L1 case - see comment above */
 	pmap_tlb_flush_SE(pm, va,
 	    (ftype & VM_PROT_EXECUTE) ? PVF_EXEC | PVF_REF : PVF_REF);
 #endif
 	rv = 1;
 out:
 	pmap_release_pmap_lock(pm);
 	kpreempt_enable();
 	return rv;
+}
 /*
  * Routine:	pmap_procwr
+ *
  * Function:
  *	Synchronize caches corresponding to [addr, addr+len) in p.
+ *
  */
 void
 pmap_procwr(struct proc *p, vaddr_t va, int len)
 @@ -4815,47 +4843,49 @@ pmap_procwr(struct proc *p, vaddr_t va,
  *		The mapping must already exist in the pmap.
  */
 void
 pmap_unwire(pmap_t pm, vaddr_t va)
+{
 	struct l2_bucket *l2b;
 	pt_entry_t *ptep, pte;
 	struct vm_page *pg;
 	paddr_t pa;
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "pm %#jx va %#jx", (uintptr_t)pm, va, 0, 0);
 	kpreempt_disable();
 	pmap_acquire_pmap_lock(pm);
 	l2b = pmap_get_l2_bucket(pm, va);
 	KDASSERT(l2b != NULL);
 	ptep = &l2b->l2b_kva[l2pte_index(va)];
 	pte = *ptep;
 	/* Extract the physical address of the page */
 	pa = l2pte_pa(pte);
 	if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) {
 		/* Update the wired bit in the pv entry for this page. */
 		struct vm_page_md *md = VM_PAGE_TO_MD(pg);
 		pmap_acquire_page_lock(md);
 		(void) pmap_modify_pv(md, pa, pm, va, PVF_WIRED, 0);
 		pmap_release_page_lock(md);
+	}
 	pmap_release_pmap_lock(pm);
 	kpreempt_enable();
 	UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0);
+}
 #ifdef ARM_MMU_EXTENDED
 void
 pmap_md_pdetab_activate(pmap_t pm, struct lwp *l)
+{
 	UVMHIST_FUNC(__func__);
 	struct cpu_info * const ci = curcpu();
 	struct pmap_asid_info * const pai = PMAP_PAI(pm, cpu_tlb_info(ci));
 	UVMHIST_CALLARGS(maphist, "pm %#jx (pm->pm_l1_pa %08jx asid %ju)",
 @@ -5178,50 +5208,52 @@ pmap_update(pmap_t pm)
 	cpu_cpwait();
 	UVMHIST_LOG(maphist, "  <-- done", 0, 0, 0, 0);
+}
 bool
 pmap_remove_all(pmap_t pm)
+{
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "(pm=%#jx)", (uintptr_t)pm, 0, 0, 0);
 	KASSERT(pm != pmap_kernel());
 	kpreempt_disable();
 	/*
 	 * The vmspace described by this pmap is about to be torn down.
 	 * Until pmap_update() is called, UVM will only make calls
 	 * to pmap_remove(). We can make life much simpler by flushing
 	 * the cache now, and deferring TLB invalidation to pmap_update().
 	 */
 #ifdef PMAP_CACHE_VIVT
 	pmap_cache_wbinv_all(pm, PVF_EXEC);
 #endif
 #ifdef ARM_MMU_EXTENDED
 #ifdef MULTIPROCESSOR
 	struct cpu_info * const ci = curcpu();
 	// This should be the last CPU with this pmap onproc
 	KASSERT(!kcpuset_isotherset(pm->pm_onproc, cpu_index(ci)));
 	if (kcpuset_isset(pm->pm_onproc, cpu_index(ci)))
 #endif
 		pmap_tlb_asid_deactivate(pm);
 #ifdef MULTIPROCESSOR
 	KASSERT(kcpuset_iszero(pm->pm_onproc));
 #endif
 	pmap_tlb_asid_release_all(pm);
 #endif
 	pm->pm_remove_all = true;
 	kpreempt_enable();
 	UVMHIST_LOG(maphist, " <-- done", 0, 0, 0, 0);
 	return false;
+}
 /*
  * Retire the given physical map from service.
  * Should only be called if the map contains no valid mappings.
  */
 void
 pmap_destroy(pmap_t pm)
+{
 	UVMHIST_FUNC(__func__);