Tue Mar 30 04:11:30 2021 UTC ()
- Explicitly include <sys/param.h>.
- G/C headers.
- Sort headers.

No binary changes.


(rin)
diff -r1.9 -r1.10 src/sys/arch/evbppc/obs405/obs266_autoconf.c

cvs diff -r1.9 -r1.10 src/sys/arch/evbppc/obs405/obs266_autoconf.c (expand / switch to unified diff)

--- src/sys/arch/evbppc/obs405/obs266_autoconf.c 2021/03/29 13:38:31 1.9
+++ src/sys/arch/evbppc/obs405/obs266_autoconf.c 2021/03/30 04:11:29 1.10
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: obs266_autoconf.c,v 1.9 2021/03/29 13:38:31 rin Exp $ */ 1/* $NetBSD: obs266_autoconf.c,v 1.10 2021/03/30 04:11:29 rin Exp $ */
2 2
3/* 3/*
4 * Copyright 2004 Shigeyuki Fukushima. 4 * Copyright 2004 Shigeyuki Fukushima.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Shigeyuki Fukushima for The NetBSD Project. 7 * Written by Shigeyuki Fukushima for The NetBSD Project.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above 14 * 2. Redistributions in binary form must reproduce the above
@@ -23,39 +23,37 @@ @@ -23,39 +23,37 @@
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
28 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
32 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 32 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
33 * DAMAGE. 33 * DAMAGE.
34 */ 34 */
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: obs266_autoconf.c,v 1.9 2021/03/29 13:38:31 rin Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: obs266_autoconf.c,v 1.10 2021/03/30 04:11:29 rin Exp $");
37 37
38#include <sys/systm.h> 38#include <sys/param.h>
39#include <sys/device.h> 39#include <sys/device.h>
40#include <sys/cpu.h> 40#include <sys/systm.h>
41 41
42#include <machine/obs266.h> 42#include <machine/obs266.h>
43 43
44#include <powerpc/ibm4xx/cpu.h> 44#include <powerpc/ibm4xx/cpu.h>
45#include <powerpc/ibm4xx/dcr4xx.h> 45#include <powerpc/ibm4xx/dcr4xx.h>
46 46
47#include <dev/ic/comreg.h> 
48 
49/* 47/*
50 * Determine device configuration for a machine. 48 * Determine device configuration for a machine.
51 */ 49 */
52void 50void
53cpu_configure(void) 51cpu_configure(void)
54{ 52{
55 53
56 intr_init(); 54 intr_init();
57 calc_delayconst(); 55 calc_delayconst();
58 56
59 /* Make sure that timers run at CPU frequency */ 57 /* Make sure that timers run at CPU frequency */
60 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE); 58 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);
61 59