 @@ -1,106 +1,235 @@
-/*	$NetBSD: pcfiic_ebus.c,v 1.7 2020/10/23 15:18:10 jdc Exp $	*/
+/*	$NetBSD: pcfiic_ebus.c,v 1.7.6.1 2021/05/14 06:53:14 thorpej Exp $	*/
 /*	$OpenBSD: pcfiic_ebus.c,v 1.13 2008/06/08 03:07:40 deraadt Exp $ */
 /*
  * Copyright (c) 2021 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pcfiic_ebus.c,v 1.7 2020/10/23 15:18:10 jdc Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pcfiic_ebus.c,v 1.7.6.1 2021/05/14 06:53:14 thorpej Exp $");
 /*
  * Device specific driver for the EBus i2c devices found on some sun4u
  * systems. On systems not having a boot-bus controller the i2c devices
  * are PCF8584.
  */
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/kernel.h>
-#include <sys/rwlock.h>
+#include <sys/kmem.h>
 #include <sys/mutex.h>
 #include <sys/bus.h>
 #include <machine/openfirm.h>
 #include <machine/autoconf.h>
 #include <dev/ebus/ebusreg.h>
 #include <dev/ebus/ebusvar.h>
 #include <dev/i2c/i2cvar.h>
 #include <dev/ic/pcf8584var.h>
 #include <dev/ic/pcf8584reg.h>
 int	pcfiic_ebus_match(device_t, struct cfdata *, void *);
 void	pcfiic_ebus_attach(device_t, device_t, void *);
 struct pcfiic_ebus_softc {
 	struct pcfiic_softc	esc_sc;
-	int			esc_node;
+	kmutex_t		esc_ctrl_lock;
 	bus_space_handle_t	esc_ioh;	/* for channel selection */
 	void			*esc_ih;
 };
-CFATTACH_DECL_NEW(pcfiic, sizeof(struct pcfiic_ebus_softc),
+static void
-	pcfiic_ebus_match, pcfiic_ebus_attach, NULL, NULL);
+bbc_select_channel(struct pcfiic_ebus_softc *esc, uint8_t channel)
+{
 	bus_space_write_1(esc->esc_sc.sc_iot, esc->esc_ioh, 0, channel);
 	bus_space_barrier(esc->esc_sc.sc_iot, esc->esc_ioh, 0, 1,
 	    BUS_SPACE_BARRIER_WRITE);
+}
 static int
 bbc_acquire_bus(void *v, int flags)
+{
 	struct pcfiic_channel *ch = v;
 	struct pcfiic_ebus_softc *esc = container_of(ch->ch_sc,
 	    struct pcfiic_ebus_softc, esc_sc);
 	if (flags & I2C_F_POLL) {
 		if (! mutex_tryenter(&esc->esc_ctrl_lock)) {
 			return EBUSY;
+		}
 	} else {
 		mutex_enter(&esc->esc_ctrl_lock);
+	}
 	bbc_select_channel(esc, (uint8_t)ch->ch_channel);
 	return 0;
+}
 static void
 bbc_release_bus(void *v, int flags)
+{
 	struct pcfiic_channel *ch = v;
 	struct pcfiic_ebus_softc *esc = container_of(ch->ch_sc,
 	    struct pcfiic_ebus_softc, esc_sc);
-int
+	mutex_exit(&esc->esc_ctrl_lock);
+}
 static void
 bbc_initialize_channels(struct pcfiic_ebus_softc *esc)
+{
 	struct pcfiic_softc *sc = &esc->esc_sc;
 	struct pcfiic_channel *ch;
 	devhandle_t devhandle = device_handle(sc->sc_dev);
 	unsigned int busmap = 0;
 	int node = devhandle_to_of(devhandle);
 	uint32_t reg[2];
 	uint32_t channel;
 	int i, nchannels;
 	/*
 	 * Two physical I2C busses share a single controller.  The
 	 * devices are not distinct, so it's not easy to treat it
 	 * it as a mux.
+	 *
 	 * The locking order is:
+	 *
 	 *	iic bus mutex -> ctrl_lock
+	 *
 	 * ctrl_lock is taken in bbc_acquire_bus.
 	 */
 	mutex_init(&esc->esc_ctrl_lock, MUTEX_DEFAULT, IPL_NONE);
 	sc->sc_acquire_bus = bbc_acquire_bus;
 	sc->sc_release_bus = bbc_release_bus;
 	/*
 	 * The Sun device tree has all devices, no matter the
 	 * channel, as direct children of this node.  Figure
 	 * out which channel numbers are listed, count them,
 	 * and then populate the channel structures.
 	 */
 	for (node = OF_child(node); node != 0; node = OF_peer(node)) {
 		if (OF_getprop(node, "reg", reg, sizeof(reg)) != sizeof(reg)) {
 			continue;
+		}
 		/* Channel is in the first cell. */
 		channel = be32toh(reg[0]);
 		KASSERT(channel < 32);
 		busmap |= __BIT(channel);
+	}
 	nchannels = popcount(busmap);
 	if (nchannels == 0) {
 		/* No child devices. */
 		return;
+	}
 	ch = kmem_alloc(nchannels * sizeof(*ch), KM_SLEEP);
 	for (i = 0; i < nchannels; i++) {
 		channel = ffs(busmap);
 		KASSERT(channel != 0);
 		channel--;	/* ffs() returns 0 if no bits set. */
 		busmap &= ~__BIT(channel);
 		ch[i].ch_channel = channel;
 		ch[i].ch_devhandle = devhandle;
+	}
 	sc->sc_channels = ch;
 	sc->sc_nchannels = nchannels;
+}
 static int
 pcfiic_ebus_match(device_t parent, struct cfdata *match, void *aux)
+{
 	struct ebus_attach_args		*ea = aux;
 	char				compat[32];
 	if (strcmp(ea->ea_name, "SUNW,envctrl") == 0 ||
 	    strcmp(ea->ea_name, "SUNW,envctrltwo") == 0)
 		return (1);
 	if (strcmp(ea->ea_name, "i2c") != 0)
 		return (0);
 	if (OF_getprop(ea->ea_node, "compatible", compat, sizeof(compat)) == -1)
 		return (0);
 	if (strcmp(compat, "pcf8584") == 0 ||
 	    strcmp(compat, "i2cpcf,8584") == 0 ||
 	    strcmp(compat, "SUNW,i2c-pic16f747") == 0 ||
 	    strcmp(compat, "SUNW,bbc-i2c") == 0)
 		return (1);
 	return (0);
+}
-void
+static void
 pcfiic_ebus_attach(device_t parent, device_t self, void *aux)
+{
 	struct pcfiic_ebus_softc	*esc = device_private(self);
 	struct pcfiic_softc		*sc = &esc->esc_sc;
 	struct ebus_attach_args		*ea = aux;
 	char				compat[32];
-	u_int64_t			addr;
+	uint32_t			addr[2];
-	u_int8_t			clock = PCF8584_CLK_12 | PCF8584_SCL_90;
+	uint8_t				clock = PCF8584_CLK_12 | PCF8584_SCL_90;
 	int				swapregs = 0;
 	if (ea->ea_nreg < 1 || ea->ea_nreg > 2) {
 		printf(": expected 1 or 2 registers, got %d\n", ea->ea_nreg);
 		return;
+	}
 	/* E450 and E250 have a different clock */
 	if ((strcmp(ea->ea_name, "SUNW,envctrl") == 0) ||
 	    (strcmp(ea->ea_name, "SUNW,envctrltwo") == 0))
 		clock = PCF8584_CLK_12 | PCF8584_SCL_45;
 	sc->sc_dev = self;
 @@ -111,54 +240,56 @@ pcfiic_ebus_attach(device_t parent, devi
 		 * the registers on their clone pcf, plus they feed
 		 * it a non-standard clock.
 		 */
 		int clk = prom_getpropint(findroot(), "clock-frequency", 0);
 		if (clk < 105000000)
 			clock = PCF8584_CLK_3 | PCF8584_SCL_90;
 		else if (clk < 160000000)
 			clock = PCF8584_CLK_4_43 | PCF8584_SCL_90;
 		swapregs = 1;
+	}
 	if (OF_getprop(ea->ea_node, "own-address", &addr, sizeof(addr)) == -1) {
-		addr = 0xaa;
+		addr[0] = 0;
-	} else if (addr == 0x00 || addr > 0xff) {
+		addr[1] = 0x55 << 1;
 	} else if (addr[1] == 0x00 || addr[1] > 0xff) {
 		printf(": invalid address on I2C bus");
 		return;
+	}
-	if (bus_space_map(ea->ea_bustag,
+	if (bus_space_map(ea->ea_bustag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
-	    EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
+			  ea->ea_reg[0].size, 0, &sc->sc_ioh) == 0) {
 	    ea->ea_reg[0].size, 0, &sc->sc_ioh) == 0) {
 		sc->sc_iot = ea->ea_bustag;
 	} else {
 		printf(": can't map register space\n");
                	return;
+	}
 	if (ea->ea_nreg == 2) {
 		/*
 		 * Second register only occurs on BBC-based machines,
 		 * and is likely not prom mapped
-		*/
+		 */
-		if (bus_space_map(sc->sc_iot, EBUS_ADDR_FROM_REG(&ea->ea_reg[1]),
+		if (bus_space_map(sc->sc_iot,
-		    ea->ea_reg[1].size, 0, &sc->sc_ioh2) != 0) {
+				  EBUS_ADDR_FROM_REG(&ea->ea_reg[1]),
 				  ea->ea_reg[1].size, 0, &esc->esc_ioh) != 0) {
 			printf(": can't map 2nd register space\n");
 			return;
+		}
-		sc->sc_master = 1;
+		bbc_initialize_channels(esc);
 		printf(": iic mux present");
+	}
 	if (ea->ea_nintr >= 1)
 		esc->esc_ih = bus_intr_establish(sc->sc_iot, ea->ea_intr[0],
 		    IPL_BIO, pcfiic_intr, sc);
 	else
 		esc->esc_ih = NULL;
 	if (esc->esc_ih == NULL)
 		sc->sc_poll = 1;
-	pcfiic_attach(sc, (i2c_addr_t)(addr >> 1), clock, swapregs);
+	pcfiic_attach(sc, (i2c_addr_t)(addr[1] >> 1), clock, swapregs);
+}
 CFATTACH_DECL_NEW(pcfiic, sizeof(struct pcfiic_ebus_softc),
     pcfiic_ebus_match, pcfiic_ebus_attach, NULL, NULL);

 @@ -1,141 +1,192 @@
-/*	$NetBSD: pcf8584.c,v 1.18 2021/04/24 23:36:55 thorpej Exp $	*/
+/*	$NetBSD: pcf8584.c,v 1.18.2.1 2021/05/14 06:53:14 thorpej Exp $	*/
 /*	$OpenBSD: pcf8584.c,v 1.9 2007/10/20 18:46:21 kettenis Exp $ */
 /*
  * Copyright (c) 2021 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
-#include <sys/malloc.h>
+#include <sys/kmem.h>
 #include <sys/kernel.h>
 #include <sys/proc.h>
 #include <sys/bus.h>
 #include <dev/i2c/i2cvar.h>
 #include <dev/ic/pcf8584var.h>
 #include <dev/ic/pcf8584reg.h>
 #include "locators.h"
 /* Internal registers */
 #define PCF8584_S0		0x00
 #define PCF8584_S1		0x01
 #define PCF8584_S2		0x02
 #define PCF8584_S3		0x03
 void		pcfiic_init(struct pcfiic_softc *);
 int		pcfiic_i2c_acquire_bus(void *, int);
 void		pcfiic_i2c_release_bus(void *, int);
 int		pcfiic_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *,
 		    size_t, void *, size_t, int);
 int		pcfiic_xmit(struct pcfiic_softc *, u_int8_t, const u_int8_t *,
 		    size_t, const u_int8_t *, size_t);
 int		pcfiic_recv(struct pcfiic_softc *, u_int8_t, u_int8_t *,
 		    size_t);
 u_int8_t	pcfiic_read(struct pcfiic_softc *, bus_size_t);
 void		pcfiic_write(struct pcfiic_softc *, bus_size_t, u_int8_t);
 void		pcfiic_choose_bus(struct pcfiic_softc *, u_int8_t);
 int		pcfiic_wait_BBN(struct pcfiic_softc *);
 int		pcfiic_wait_pin(struct pcfiic_softc *, volatile u_int8_t *);
 void
 pcfiic_init(struct pcfiic_softc *sc)
+{
 	/* init S1 */
 	pcfiic_write(sc, PCF8584_S1, PCF8584_CTRL_PIN);
 	/* own address */
 	pcfiic_write(sc, PCF8584_S0, sc->sc_addr);
 	/* select clock reg */
 	pcfiic_write(sc, PCF8584_S1, PCF8584_CTRL_PIN | PCF8584_CTRL_ES1);
 	pcfiic_write(sc, PCF8584_S0, sc->sc_clock);
 	pcfiic_write(sc, PCF8584_S1, PCF8584_CMD_IDLE);
 	delay(200000);	/* Multi-Master mode, wait for longest i2c message */
+}
 void
-pcfiic_attach(struct pcfiic_softc *sc, i2c_addr_t addr, u_int8_t clock,
+pcfiic_attach(struct pcfiic_softc *sc, i2c_addr_t addr, uint8_t clock,
     int swapregs)
+{
-	struct i2cbus_attach_args		iba;
+	struct i2cbus_attach_args iba;
 	struct pcfiic_channel *ch;
 	int i;
 	if (swapregs) {
 		sc->sc_regmap[PCF8584_S1] = PCF8584_S0;
 		sc->sc_regmap[PCF8584_S0] = PCF8584_S1;
 	} else {
 		sc->sc_regmap[PCF8584_S0] = PCF8584_S0;
 		sc->sc_regmap[PCF8584_S1] = PCF8584_S1;
+	}
 	sc->sc_clock = clock;
 	sc->sc_addr = addr;
 	pcfiic_init(sc);
 	printf("\n");
-	if (sc->sc_master)
+	if (sc->sc_channels == NULL) {
-		pcfiic_choose_bus(sc, 0);
+		KASSERT(sc->sc_nchannels == 0);
 		ch = kmem_alloc(sizeof(*sc->sc_channels), KM_SLEEP);
 		ch->ch_channel = 0;
 		ch->ch_devhandle = device_handle(sc->sc_dev);
-	iic_tag_init(&sc->sc_i2c);
+		sc->sc_channels = ch;
-	sc->sc_i2c.ic_cookie = sc;
+		sc->sc_nchannels = 1;
-	sc->sc_i2c.ic_exec = pcfiic_i2c_exec;
+	} else {
 		KASSERT(sc->sc_nchannels != 0);
 	bzero(&iba, sizeof(iba));
 	iba.iba_tag = &sc->sc_i2c;
-	config_found(sc->sc_dev, &iba, iicbus_print, CFARG_EOL);
+	for (i = 0; i < sc->sc_nchannels; i++) {
 		int locs[I2CBUSCF_NLOCS];
 		ch = &sc->sc_channels[i];
 		ch->ch_sc = sc;
 		iic_tag_init(&ch->ch_i2c);
 		ch->ch_i2c.ic_cookie = ch;
 		ch->ch_i2c.ic_exec = pcfiic_i2c_exec;
 		ch->ch_i2c.ic_acquire_bus = sc->sc_acquire_bus;
 		ch->ch_i2c.ic_release_bus = sc->sc_release_bus;
 		locs[I2CBUSCF_BUS] = ch->ch_i2c.ic_channel;
 		memset(&iba, 0, sizeof(iba));
 		iba.iba_tag = &ch->ch_i2c;
 		config_found(sc->sc_dev, &iba,
 		    sc->sc_nchannels == 1 ? iicbus_print : iicbus_print_multi,
 		    CFARG_SUBMATCH, config_stdsubmatch,
 		    CFARG_LOCATORS, locs,
 		    CFARG_DEVHANDLE, ch->ch_devhandle,
 		    CFARG_EOL);
+	}
+}
 int
 pcfiic_intr(void *arg)
+{
 	return (0);
+}
 int
 pcfiic_i2c_exec(void *arg, i2c_op_t op, i2c_addr_t addr,
     const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
+{
 	struct pcfiic_softc	*sc = arg;
 	int			ret = 0;
 #if 0
         printf("%s: exec op: %d addr: 0x%x cmdlen: %d len: %d flags 0x%x\n",
             device_xname(sc->sc_dev), op, addr, (int)cmdlen, (int)len, flags);
 #endif
 	if (sc->sc_poll)
 		flags |= I2C_F_POLL;
 	if (sc->sc_master)
 		pcfiic_choose_bus(sc, addr >> 7);
 	/*
 	 * If we are writing, write address, cmdbuf, buf.
 	 * If we are reading, write address, cmdbuf, then read address, buf.
 	 */
 	if (I2C_OP_WRITE_P(op)) {
 		ret = pcfiic_xmit(sc, addr & 0x7f, cmdbuf, cmdlen, buf, len);
 	} else {
 		if (pcfiic_xmit(sc, addr & 0x7f, cmdbuf, cmdlen, NULL, 0) != 0)
 			return (1);
 		ret = pcfiic_recv(sc, addr & 0x7f, buf, len);
+	}
 	return (ret);
+}
 @@ -214,34 +265,26 @@ pcfiic_read(struct pcfiic_softc *sc, bus
+{
 	bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], 1,
 	    BUS_SPACE_BARRIER_READ);
 	return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r]));
+}
 void
 pcfiic_write(struct pcfiic_softc *sc, bus_size_t r, u_int8_t v)
+{
 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], v);
 	(void)bus_space_read_1(sc->sc_iot, sc->sc_ioh, PCF8584_S1);
+}
 void
 pcfiic_choose_bus(struct pcfiic_softc *sc, u_int8_t bus)
 	bus_space_write_1(sc->sc_iot, sc->sc_ioh2, 0, bus);
 	bus_space_barrier(sc->sc_iot, sc->sc_ioh2, 0, 1,
 	    BUS_SPACE_BARRIER_WRITE);
 int
 pcfiic_wait_BBN(struct pcfiic_softc *sc)
+{
 	int		i;
 	for (i = 0; i < 1000; i++) {
 		if (pcfiic_read(sc, PCF8584_S1) & PCF8584_STATUS_BBN)
 			return (0);
 		delay(1000);
+	}
 	return (1);
+}

 @@ -1,37 +1,57 @@
-/*	$NetBSD: pcf8584var.h,v 1.6 2019/12/22 23:23:32 thorpej Exp $	*/
+/*	$NetBSD: pcf8584var.h,v 1.6.12.1 2021/05/14 06:53:14 thorpej Exp $	*/
 /*	$OpenBSD: pcf8584var.h,v 1.5 2007/10/20 18:46:21 kettenis Exp $ */
 /*
  * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #ifndef _DEV_IC_PCF8584VAR_H_
 #define	_DEV_IC_PCF8584VAR_H_
 struct pcfiic_channel {
 	struct i2c_controller	ch_i2c;
 	struct pcfiic_softc	*ch_sc;
 	devhandle_t		ch_devhandle;
 	int			ch_channel;
 };
 struct pcfiic_softc {
 	device_t		sc_dev;
 	bus_space_tag_t		sc_iot;
 	bus_space_handle_t	sc_ioh;
-	bus_space_handle_t	sc_ioh2;
+	uint8_t			sc_addr;
-	int			sc_master;
+	uint8_t			sc_clock;
-	u_int8_t		sc_addr;
+	uint8_t			sc_regmap[2];
 	u_int8_t		sc_clock;
 	u_int8_t		sc_regmap[2];
 	int			sc_poll;
-	struct i2c_controller	sc_i2c;
+	/*
 	 * Some Sun clones of the this i2c controller support
 	 * multiple channels.  The specific attachment will
 	 * initialize these fields for controllers that support
 	 * this.  If not, the core driver will assume a single
 	 * channel.
 	 */
 	struct pcfiic_channel	*sc_channels;
 	int			sc_nchannels;
 	int			(*sc_acquire_bus)(void *, int);
 	void			(*sc_release_bus)(void *, int);
 };
-void	pcfiic_attach(struct pcfiic_softc *, i2c_addr_t, u_int8_t, int);
+void	pcfiic_attach(struct pcfiic_softc *, i2c_addr_t, uint8_t, int);
 int	pcfiic_intr(void *);
 #endif /* _DEV_IC_PCF8584VAR_H_ */