Thu May 27 22:11:31 2021 UTC ()
The Tsunami / Typhoon chipsets have a static "monster window" for DMA
that allows for up to 32GB of RAM to be direct-mapped if the PCI device
can issue a 64-bit address (the monster window lives at 0x10000000000).
Enable this window and provide this to the PCI bus as a "dmat64".


(thorpej)
diff -r1.21 -r1.22 src/sys/arch/alpha/include/pci_machdep.h
diff -r1.25 -r1.26 src/sys/arch/alpha/pci/tsc.c
diff -r1.16 -r1.17 src/sys/arch/alpha/pci/tsp_dma.c
diff -r1.8 -r1.9 src/sys/arch/alpha/pci/tsreg.h
diff -r1.14 -r1.15 src/sys/arch/alpha/pci/tsvar.h

cvs diff -r1.21 -r1.22 src/sys/arch/alpha/include/pci_machdep.h (expand / switch to context diff)
--- src/sys/arch/alpha/include/pci_machdep.h 2020/09/26 21:07:48 1.21
+++ src/sys/arch/alpha/include/pci_machdep.h 2021/05/27 22:11:31 1.22
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.h,v 1.21 2020/09/26 21:07:48 thorpej Exp $ */
+/* $NetBSD: pci_machdep.h,v 1.22 2021/05/27 22:11:31 thorpej Exp $ */
 
 /*
  * Copyright (c) 1996 Carnegie-Mellon University.
@@ -36,6 +36,7 @@
  * Machine-specific definitions for PCI autoconfiguration.
  */
 #define	__HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
+#define	_PCI_HAVE_DMA64
 
 /*
  * Types provided to machine-independent PCI code

cvs diff -r1.25 -r1.26 src/sys/arch/alpha/pci/tsc.c (expand / switch to context diff)
--- src/sys/arch/alpha/pci/tsc.c 2021/04/24 23:36:23 1.25
+++ src/sys/arch/alpha/pci/tsc.c 2021/05/27 22:11:31 1.26
@@ -1,4 +1,4 @@
-/* $NetBSD: tsc.c,v 1.25 2021/04/24 23:36:23 thorpej Exp $ */
+/* $NetBSD: tsc.c,v 1.26 2021/05/27 22:11:31 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
@@ -35,7 +35,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.25 2021/04/24 23:36:23 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.26 2021/05/27 22:11:31 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -231,7 +231,7 @@
 	pba.pba_memt = &pcp->pc_memt;
 	pba.pba_dmat =
 	    alphabus_dma_get_tag(&pcp->pc_dmat_direct, ALPHA_BUS_PCI);
-	pba.pba_dmat64 = NULL;
+	pba.pba_dmat64 = &pcp->pc_dmat64_direct;
 	pba.pba_pc = &pcp->pc_pc;
 	pba.pba_bus = 0;
 	pba.pba_bridgetag = NULL;

cvs diff -r1.16 -r1.17 src/sys/arch/alpha/pci/tsp_dma.c (expand / switch to context diff)
--- src/sys/arch/alpha/pci/tsp_dma.c 2021/05/05 02:15:18 1.16
+++ src/sys/arch/alpha/pci/tsp_dma.c 2021/05/27 22:11:31 1.17
@@ -1,6 +1,36 @@
-/* $NetBSD: tsp_dma.c,v 1.16 2021/05/05 02:15:18 thorpej Exp $ */
+/* $NetBSD: tsp_dma.c,v 1.17 2021/05/27 22:11:31 thorpej Exp $ */
 
 /*-
+ * Copyright (c) 1997, 1998, 2021 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -28,41 +58,10 @@
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
- *
  */
 
-/*-
- * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tsp_dma.c,v 1.16 2021/05/05 02:15:18 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsp_dma.c,v 1.17 2021/05/27 22:11:31 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -108,6 +107,31 @@
  */
 #define	TSP_SGMAP_PFTHRESH	256
 
+/*
+ * Quoting the 21272 programmer's reference manual:
+ *
+ * <quote>
+ * 10.1.4.4 Monster Window DMA Address Translation
+ *
+ * In case of a PCI dual-address cycle command, the high-order PCI address
+ * bits <63:40> are compared to the constant value 0x0000_01 (that is, bit
+ * <40> = 1; all other bits = 0). If these bits match, a monster window hit
+ * has occurred and the low-order PCI address bits <34:0> are used unchanged
+ * as the system address bits <34:0>. PCI address bits <39:35> are ignored.
+ * The high-order 32 PCI address bits are available on b_ad<31:0> in the
+ * second cycle of a DAC, and also on b_ad<63:32> in the first cycle of a
+ * DAC if b_req64_l is asserted.
+ * </quote>
+ *
+ * This means that we can address up to 32GB of RAM using a direct-mapped
+ * 64-bit DMA tag.  This leaves us possibly having to fall back on SGMAP
+ * DMA on a Titan system (those support up to 64GB of RAM), and we may have
+ * to address that with an additional large SGMAP DAC window at another
+ * time.
+ */
+#define	TSP_MONSTER_DMA_WINDOW_BASE	0x100##00000000UL
+#define	TSP_MONSTER_DMA_WINDOW_SIZE	0x008##00000000UL
+
 void
 tsp_dma_init(struct tsp_config *pcp)
 {
@@ -137,7 +161,36 @@
 		pccsr->tsp_wsba[i].tsg_r = premap[i].base | premap[i].enables;
 		pccsr->tsp_wsm[i].tsg_r = premap[i].mask;
 	}
+
+	/* Ensure the Monster Window is enabled. */
+	pccsr->tsp_pctl.tsg_r |= PCTL_MWIN;
 	alpha_mb();
+
+	/*
+	 * Initialize the DMA tag used for direct-mapped 64-bit DMA.
+	 */
+	t = &pcp->pc_dmat64_direct;
+	t->_cookie = pcp;
+	t->_wbase = TSP_MONSTER_DMA_WINDOW_BASE;
+	t->_wsize = TSP_MONSTER_DMA_WINDOW_SIZE;
+	t->_next_window = &pcp->pc_dmat_sgmap;
+	t->_boundary = 0;
+	t->_sgmap = NULL;
+	t->_get_tag = tsp_dma_get_tag;
+	t->_dmamap_create = _bus_dmamap_create;
+	t->_dmamap_destroy = _bus_dmamap_destroy;
+	t->_dmamap_load = _bus_dmamap_load_direct;
+	t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf_direct;
+	t->_dmamap_load_uio = _bus_dmamap_load_uio_direct;
+	t->_dmamap_load_raw = _bus_dmamap_load_raw_direct;
+	t->_dmamap_unload = _bus_dmamap_unload;
+	t->_dmamap_sync = _bus_dmamap_sync;
+
+	t->_dmamem_alloc = _bus_dmamem_alloc;
+	t->_dmamem_free = _bus_dmamem_free;
+	t->_dmamem_map = _bus_dmamem_map;
+	t->_dmamem_unmap = _bus_dmamem_unmap;
+	t->_dmamem_mmap = _bus_dmamem_mmap;
 
 	/*
 	 * Initialize the DMA tag used for direct-mapped DMA.

cvs diff -r1.8 -r1.9 src/sys/arch/alpha/pci/tsreg.h (expand / switch to context diff)
--- src/sys/arch/alpha/pci/tsreg.h 2020/09/23 00:46:17 1.8
+++ src/sys/arch/alpha/pci/tsreg.h 2021/05/27 22:11:31 1.9
@@ -1,4 +1,4 @@
-/* $NetBSD: tsreg.h,v 1.8 2020/09/23 00:46:17 thorpej Exp $ */
+/* $NetBSD: tsreg.h,v 1.9 2021/05/27 22:11:31 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
@@ -167,6 +167,29 @@
 #define P_TBA3		0x02c0
 
 #define P_PCTL		0x0300
+
+#define	PCTL_FDSC	__BIT(0)	/* fast discard enable */
+#define	PCTL_FBTB	__BIT(1)	/* fast back-to-back enable */
+#define	PCTL_THDIS	__BIT(2)	/* disable TLB anti-thrash (debug) */
+#define	PCTL_CHAINDIS	__BIT(3)	/* disable chaining */
+#define	PCTL_TGTLAT	__BIT(4)	/* target latency timers enable */
+#define	PCTL_HOLE	__BIT(5)	/* 512KB->1M hole enable */
+#define	PCTL_MWIN	__BIT(6)	/* monster window enable */
+#define	PCTL_PRIGRP	__BITS(8,14)	/* arbiter priority group */
+#define	PCTL_PPRI	__BIT(15)	/* arbiter priority group for Pchip */
+#define	PCTL_ECCEN	__BIT(18)	/* ECC enable for DMA and SGTE */
+#define	PCTL_PADM	__BIT(19)	/* PADbus mode */
+#define	PCTL_CDQMAX	__BITS(20,23)	/* see manual */
+#define	PCTL_REV	__BITS(24,31)	/* Pchip revision */
+#define	PCTL_CRQMAX	__BITS(32,35)	/* see manual */
+#define	PCTL_PTPMAX	__BITS(36,39)	/* see manual */
+#define	PCTL_PCLKX	__BITS(40,41)	/* PCI clock freq multipler */
+#define	PCTL_FDSDIS	__BIT(42)	/* fast DMA start and SGTE disable */
+#define	PCTL_FDWDIS	__BIT(43)	/* fast DMA read cache block disable */
+#define	PCTL_PTEVRFY	__BIT(44)	/* PTE verify for DMA read */
+#define	PCTL_RPP	__BIT(45)	/* remote Pchip present */
+#define	PCTL_PID	__BITS(46,47)	/* Pchip ID */
+
 #define P_PLAT		0x0340
 	/* reserved	0x0380 */
 #define P_PERROR	0x03c0

cvs diff -r1.14 -r1.15 src/sys/arch/alpha/pci/tsvar.h (expand / switch to context diff)
--- src/sys/arch/alpha/pci/tsvar.h 2020/06/17 03:50:04 1.14
+++ src/sys/arch/alpha/pci/tsvar.h 2021/05/27 22:11:31 1.15
@@ -1,4 +1,4 @@
-/* $NetBSD: tsvar.h,v 1.14 2020/06/17 03:50:04 thorpej Exp $ */
+/* $NetBSD: tsvar.h,v 1.15 2021/05/27 22:11:31 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
@@ -51,6 +51,7 @@
 	struct	alpha_bus_space pc_iot, pc_memt;
 	struct	alpha_pci_chipset pc_pc;
 
+	struct	alpha_bus_dma_tag pc_dmat64_direct;
 	struct	alpha_bus_dma_tag pc_dmat_direct;
 	struct	alpha_bus_dma_tag pc_dmat_sgmap;