Wed Jul 7 08:32:51 2021 UTC ()
Set rxr->next_to_refresh correctly in ixgbe_setup_receive_ring().

 ixgbe_setup_receive_ring() fully allocates rx buffers. When a
descriptor ring is full, rxr->next_to_refresh should point to
rxr_next_to_check -1. Before this change, rxr->next_to_refresh
is set to 0 and ixgbe_refresh_mbufs() wastefully loops in
ixgbe_refresh_mbufs() because it means the ring is empty.


(msaitoh)
diff -r1.79 -r1.80 src/sys/dev/pci/ixgbe/ix_txrx.c
cvs diff -r1.79 -r1.80 src/sys/dev/pci/ixgbe/ix_txrx.c (expand / switch to unified diff)

--- src/sys/dev/pci/ixgbe/ix_txrx.c 2021/05/27 06:11:34 1.79
+++ src/sys/dev/pci/ixgbe/ix_txrx.c 2021/07/07 08:32:51 1.80
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ix_txrx.c,v 1.79 2021/05/27 06:11:34 msaitoh Exp $ */ 1/* $NetBSD: ix_txrx.c,v 1.80 2021/07/07 08:32:51 msaitoh Exp $ */
2 2
3/****************************************************************************** 3/******************************************************************************
4 4
5 Copyright (c) 2001-2017, Intel Corporation 5 Copyright (c) 2001-2017, Intel Corporation
6 All rights reserved. 6 All rights reserved.
7 7
8 Redistribution and use in source and binary forms, with or without 8 Redistribution and use in source and binary forms, with or without
9 modification, are permitted provided that the following conditions are met: 9 modification, are permitted provided that the following conditions are met:
10 10
11 1. Redistributions of source code must retain the above copyright notice, 11 1. Redistributions of source code must retain the above copyright notice,
12 this list of conditions and the following disclaimer. 12 this list of conditions and the following disclaimer.
13 13
14 2. Redistributions in binary form must reproduce the above copyright 14 2. Redistributions in binary form must reproduce the above copyright
@@ -54,27 +54,27 @@ @@ -54,27 +54,27 @@
54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
63 * POSSIBILITY OF SUCH DAMAGE. 63 * POSSIBILITY OF SUCH DAMAGE.
64 */ 64 */
65 65
66#include <sys/cdefs.h> 66#include <sys/cdefs.h>
67__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.79 2021/05/27 06:11:34 msaitoh Exp $"); 67__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.80 2021/07/07 08:32:51 msaitoh Exp $");
68 68
69#include "opt_inet.h" 69#include "opt_inet.h"
70#include "opt_inet6.h" 70#include "opt_inet6.h"
71 71
72#include "ixgbe.h" 72#include "ixgbe.h"
73 73
74/* 74/*
75 * HW RSC control: 75 * HW RSC control:
76 * this feature only works with 76 * this feature only works with
77 * IPv4, and only on 82599 and later. 77 * IPv4, and only on 82599 and later.
78 * Also this will cause IP forwarding to 78 * Also this will cause IP forwarding to
79 * fail and that can't be controlled by 79 * fail and that can't be controlled by
80 * the stack as LRO can. For all these 80 * the stack as LRO can. For all these
@@ -1567,27 +1567,27 @@ ixgbe_setup_receive_ring(struct rx_ring  @@ -1567,27 +1567,27 @@ ixgbe_setup_receive_ring(struct rx_ring
1567 rxbuf->buf = NULL; 1567 rxbuf->buf = NULL;
1568 goto fail; 1568 goto fail;
1569 } 1569 }
1570 bus_dmamap_sync(rxr->ptag->dt_dmat, rxbuf->pmap, 1570 bus_dmamap_sync(rxr->ptag->dt_dmat, rxbuf->pmap,
1571 0, adapter->rx_mbuf_sz, BUS_DMASYNC_PREREAD); 1571 0, adapter->rx_mbuf_sz, BUS_DMASYNC_PREREAD);
1572 /* Update the descriptor and the cached value */ 1572 /* Update the descriptor and the cached value */
1573 rxr->rx_base[j].read.pkt_addr = 1573 rxr->rx_base[j].read.pkt_addr =
1574 htole64(rxbuf->pmap->dm_segs[0].ds_addr); 1574 htole64(rxbuf->pmap->dm_segs[0].ds_addr);
1575 rxbuf->addr = htole64(rxbuf->pmap->dm_segs[0].ds_addr); 1575 rxbuf->addr = htole64(rxbuf->pmap->dm_segs[0].ds_addr);
1576 } 1576 }
1577 1577
1578 /* Setup our descriptor indices */ 1578 /* Setup our descriptor indices */
1579 rxr->next_to_check = 0; 1579 rxr->next_to_check = 0;
1580 rxr->next_to_refresh = 0; 1580 rxr->next_to_refresh = adapter->num_rx_desc - 1; /* Fully allocated */
1581 rxr->lro_enabled = FALSE; 1581 rxr->lro_enabled = FALSE;
1582 rxr->rx_copies.ev_count = 0; 1582 rxr->rx_copies.ev_count = 0;
1583#if 0 /* NetBSD */ 1583#if 0 /* NetBSD */
1584 rxr->rx_bytes.ev_count = 0; 1584 rxr->rx_bytes.ev_count = 0;
1585#if 1 /* Fix inconsistency */ 1585#if 1 /* Fix inconsistency */
1586 rxr->rx_packets.ev_count = 0; 1586 rxr->rx_packets.ev_count = 0;
1587#endif 1587#endif
1588#endif 1588#endif
1589 rxr->vtag_strip = FALSE; 1589 rxr->vtag_strip = FALSE;
1590 1590
1591 ixgbe_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, 1591 ixgbe_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
1592 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1592 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1593 1593