| @@ -1,285 +1,297 @@ | | | @@ -1,285 +1,297 @@ |
1 | /* $NetBSD: sti_sgc.c,v 1.1 2014/02/24 07:23:43 skrll Exp $ */ | | 1 | /* $NetBSD: sti_sgc.c,v 1.1.28.1 2021/07/14 17:53:50 martin Exp $ */ |
2 | | | 2 | |
3 | /* $OpenBSD: sti_sgc.c,v 1.38 2009/02/06 22:51:04 miod Exp $ */ | | 3 | /* $OpenBSD: sti_sgc.c,v 1.38 2009/02/06 22:51:04 miod Exp $ */ |
4 | | | 4 | |
5 | /* | | 5 | /* |
6 | * Copyright (c) 2000-2003 Michael Shalayeff | | 6 | * Copyright (c) 2000-2003 Michael Shalayeff |
7 | * All rights reserved. | | 7 | * All rights reserved. |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
15 | * notice, this list of conditions and the following disclaimer in the | | 15 | * notice, this list of conditions and the following disclaimer in the |
16 | * documentation and/or other materials provided with the distribution. | | 16 | * documentation and/or other materials provided with the distribution. |
17 | * | | 17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | | 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | | 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, | | 21 | * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, |
22 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | | 22 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | | 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
24 | * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 24 | * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | | 25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
26 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | | 26 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
27 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF | | 27 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
28 | * THE POSSIBILITY OF SUCH DAMAGE. | | 28 | * THE POSSIBILITY OF SUCH DAMAGE. |
29 | */ | | 29 | */ |
30 | /* | | 30 | /* |
31 | * These cards has to be known to work so far: | | 31 | * These cards has to be known to work so far: |
32 | * - HPA1991AGrayscale rev 0.02 (705/35) (byte-wide) | | 32 | * - HPA1991AGrayscale rev 0.02 (705/35) (byte-wide) |
33 | * - HPA1991AC19 rev 0.02 (715/33) (byte-wide) | | 33 | * - HPA1991AC19 rev 0.02 (715/33) (byte-wide) |
34 | * - HPA208LC1280 rev 8.04 (712/80) just works | | 34 | * - HPA208LC1280 rev 8.04 (712/80) just works |
35 | */ | | 35 | */ |
36 | | | 36 | |
37 | #include <sys/cdefs.h> | | 37 | #include <sys/cdefs.h> |
38 | __KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.1 2014/02/24 07:23:43 skrll Exp $"); | | 38 | __KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.1.28.1 2021/07/14 17:53:50 martin Exp $"); |
39 | | | 39 | |
40 | #include "opt_cputype.h" | | 40 | #include "opt_cputype.h" |
41 | | | 41 | |
42 | #include <sys/param.h> | | 42 | #include <sys/param.h> |
43 | #include <sys/systm.h> | | 43 | #include <sys/systm.h> |
44 | #include <sys/device.h> | | 44 | #include <sys/device.h> |
45 | | | 45 | |
46 | #include <uvm/uvm.h> | | 46 | #include <uvm/uvm.h> |
47 | | | 47 | |
48 | #include <sys/bus.h> | | 48 | #include <sys/bus.h> |
49 | #include <machine/cpu.h> | | 49 | #include <machine/cpu.h> |
50 | #include <machine/iomod.h> | | 50 | #include <machine/iomod.h> |
51 | #include <machine/autoconf.h> | | 51 | #include <machine/autoconf.h> |
52 | | | 52 | |
53 | #include <dev/wscons/wsdisplayvar.h> | | 53 | #include <dev/wscons/wsdisplayvar.h> |
54 | #include <dev/wscons/wsconsio.h> | | 54 | #include <dev/wscons/wsconsio.h> |
55 | | | 55 | |
56 | #include <dev/ic/stireg.h> | | 56 | #include <dev/ic/stireg.h> |
57 | #include <dev/ic/stivar.h> | | 57 | #include <dev/ic/stivar.h> |
58 | | | 58 | |
59 | #include <hppa/dev/cpudevs.h> | | 59 | #include <hppa/dev/cpudevs.h> |
60 | #include <hppa/hppa/machdep.h> | | 60 | #include <hppa/hppa/machdep.h> |
61 | | | 61 | |
62 | #ifdef STIDEBUG | | 62 | #ifdef STIDEBUG |
63 | #define DPRINTF(s) do { \ | | 63 | #define DPRINTF(s) do { \ |
64 | if (stidebug) \ | | 64 | if (stidebug) \ |
65 | printf s; \ | | 65 | printf s; \ |
66 | } while(0) | | 66 | } while(0) |
67 | | | 67 | |
68 | extern int stidebug; | | 68 | extern int stidebug; |
69 | #else | | 69 | #else |
70 | #define DPRINTF(s) /* */ | | 70 | #define DPRINTF(s) /* */ |
71 | #endif | | 71 | #endif |
72 | | | 72 | |
73 | #define STI_ROMSIZE (sizeof(struct sti_dd) * 4) | | 73 | #define STI_ROMSIZE (sizeof(struct sti_dd) * 4) |
74 | #define STI_ID_FDDI 0x280b31af /* Medusa FDDI ROM id */ | | 74 | #define STI_ID_FDDI 0x280b31af /* Medusa FDDI ROM id */ |
75 | | | 75 | |
| | | 76 | /* |
| | | 77 | * hpa addresses to check on-board variants |
| | | 78 | * XXX should check via device_register(9)? |
| | | 79 | * |
| | | 80 | * 0xf4000000: HPA1991AC19 on 715/33, 715/50 |
| | | 81 | * 0xf8000000: HPA1439A on 735/99, HPA208LCxxx on 715/80, 715/100, 712 |
| | | 82 | */ |
| | | 83 | #define STI_ONBOARD_HPA0 0xf4000000 |
| | | 84 | #define STI_ONBOARD_HPA1 0xf8000000 |
| | | 85 | |
76 | /* gecko optional graphics */ | | 86 | /* gecko optional graphics */ |
77 | #define STI_GOPT1_REV 0x17 | | 87 | #define STI_GOPT1_REV 0x17 |
78 | #define STI_GOPT2_REV 0x70 | | 88 | #define STI_GOPT2_REV 0x70 |
79 | #define STI_GOPT3_REV 0xd0 | | 89 | #define STI_GOPT3_REV 0xd0 |
80 | #define STI_GOPT4_REV 0x00 | | 90 | #define STI_GOPT4_REV 0x00 |
81 | #define STI_GOPT5_REV 0x20 | | 91 | #define STI_GOPT5_REV 0x20 |
82 | #define STI_GOPT6_REV 0x40 | | 92 | #define STI_GOPT6_REV 0x40 |
83 | #define STI_GOPT7_REV 0x30 | | 93 | #define STI_GOPT7_REV 0x30 |
84 | | | 94 | |
85 | const char sti_sgc_opt[] = { | | 95 | const char sti_sgc_opt[] = { |
86 | STI_GOPT1_REV, | | 96 | STI_GOPT1_REV, |
87 | STI_GOPT2_REV, | | 97 | STI_GOPT2_REV, |
88 | STI_GOPT3_REV, | | 98 | STI_GOPT3_REV, |
89 | STI_GOPT4_REV, | | 99 | STI_GOPT4_REV, |
90 | STI_GOPT5_REV, | | 100 | STI_GOPT5_REV, |
91 | STI_GOPT6_REV, | | 101 | STI_GOPT6_REV, |
92 | STI_GOPT7_REV | | 102 | STI_GOPT7_REV |
93 | }; | | 103 | }; |
94 | | | 104 | |
95 | int sti_sgc_probe(device_t, cfdata_t, void *); | | 105 | int sti_sgc_probe(device_t, cfdata_t, void *); |
96 | void sti_sgc_attach(device_t, device_t, void *); | | 106 | void sti_sgc_attach(device_t, device_t, void *); |
97 | | | 107 | |
98 | void sti_sgc_end_attach(device_t); | | 108 | void sti_sgc_end_attach(device_t); |
99 | | | 109 | |
100 | extern struct cfdriver sti_cd; | | 110 | extern struct cfdriver sti_cd; |
101 | | | 111 | |
102 | CFATTACH_DECL_NEW(sti_gedoens, sizeof(struct sti_softc), sti_sgc_probe, | | 112 | CFATTACH_DECL_NEW(sti_gedoens, sizeof(struct sti_softc), sti_sgc_probe, |
103 | sti_sgc_attach, NULL, NULL); | | 113 | sti_sgc_attach, NULL, NULL); |
104 | | | 114 | |
105 | paddr_t sti_sgc_getrom(struct confargs *); | | 115 | paddr_t sti_sgc_getrom(struct confargs *); |
106 | | | 116 | |
107 | /* | | 117 | /* |
108 | * Locate STI ROM. | | 118 | * Locate STI ROM. |
109 | * On some machines it may not be part of the HPA space. | | 119 | * On some machines it may not be part of the HPA space. |
110 | */ | | 120 | */ |
111 | paddr_t | | 121 | paddr_t |
112 | sti_sgc_getrom(struct confargs *ca) | | 122 | sti_sgc_getrom(struct confargs *ca) |
113 | { | | 123 | { |
114 | paddr_t rom; | | 124 | paddr_t rom; |
115 | int pagezero_cookie; | | 125 | int pagezero_cookie; |
116 | | | 126 | |
117 | pagezero_cookie = hppa_pagezero_map(); | | 127 | pagezero_cookie = hppa_pagezero_map(); |
118 | rom = PAGE0->pd_resv2[1]; | | 128 | rom = PAGE0->pd_resv2[1]; |
119 | hppa_pagezero_unmap(pagezero_cookie); | | 129 | hppa_pagezero_unmap(pagezero_cookie); |
120 | | | 130 | |
121 | if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC) { | | 131 | if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC && |
| | | 132 | ca->ca_hpa != STI_ONBOARD_HPA0 && |
| | | 133 | ca->ca_hpa != STI_ONBOARD_HPA1) { |
122 | int i; | | 134 | int i; |
123 | for (i = sizeof(sti_sgc_opt); i--; ) | | 135 | for (i = sizeof(sti_sgc_opt); i--; ) |
124 | if (sti_sgc_opt[i] == ca->ca_type.iodc_revision) | | 136 | if (sti_sgc_opt[i] == ca->ca_type.iodc_revision) |
125 | break; | | 137 | break; |
126 | if (i < 0) | | 138 | if (i < 0) |
127 | rom = 0; | | 139 | rom = 0; |
128 | } | | 140 | } |
129 | | | 141 | |
130 | if (rom < HPPA_IOBEGIN) { | | 142 | if (rom < HPPA_IOBEGIN) { |
131 | if (ca->ca_naddrs > 0) | | 143 | if (ca->ca_naddrs > 0) |
132 | rom = ca->ca_addrs[0].addr; | | 144 | rom = ca->ca_addrs[0].addr; |
133 | else | | 145 | else |
134 | rom = ca->ca_hpa; | | 146 | rom = ca->ca_hpa; |
135 | } | | 147 | } |
136 | | | 148 | |
137 | return rom; | | 149 | return rom; |
138 | } | | 150 | } |
139 | | | 151 | |
140 | int | | 152 | int |
141 | sti_sgc_probe(device_t parent, cfdata_t cf, void *aux) | | 153 | sti_sgc_probe(device_t parent, cfdata_t cf, void *aux) |
142 | { | | 154 | { |
143 | struct confargs *ca = aux; | | 155 | struct confargs *ca = aux; |
144 | bus_space_handle_t romh; | | 156 | bus_space_handle_t romh; |
145 | paddr_t rom; | | 157 | paddr_t rom; |
146 | uint32_t id; | | 158 | uint32_t id; |
147 | u_char devtype; | | 159 | u_char devtype; |
148 | int rv = 0, romunmapped = 0; | | 160 | int rv = 0, romunmapped = 0; |
149 | | | 161 | |
150 | /* due to the graphic nature of this program do probe only one */ | | 162 | /* due to the graphic nature of this program do probe only one */ |
151 | if (cf->cf_unit > sti_cd.cd_ndevs) | | 163 | if (cf->cf_unit > sti_cd.cd_ndevs) |
152 | return 0; | | 164 | return 0; |
153 | | | 165 | |
154 | if (ca->ca_type.iodc_type != HPPA_TYPE_FIO) | | 166 | if (ca->ca_type.iodc_type != HPPA_TYPE_FIO) |
155 | return 0; | | 167 | return 0; |
156 | | | 168 | |
157 | /* these need further checking for the graphics id */ | | 169 | /* these need further checking for the graphics id */ |
158 | if (ca->ca_type.iodc_sv_model != HPPA_FIO_GSGC && | | 170 | if (ca->ca_type.iodc_sv_model != HPPA_FIO_GSGC && |
159 | ca->ca_type.iodc_sv_model != HPPA_FIO_SGC) | | 171 | ca->ca_type.iodc_sv_model != HPPA_FIO_SGC) |
160 | return 0; | | 172 | return 0; |
161 | | | 173 | |
162 | rom = sti_sgc_getrom(ca); | | 174 | rom = sti_sgc_getrom(ca); |
163 | DPRINTF(("%s: hpa=%x, rom=%x\n", __func__, (uint)ca->ca_hpa, | | 175 | DPRINTF(("%s: hpa=%x, rom=%x\n", __func__, (uint)ca->ca_hpa, |
164 | (uint)rom)); | | 176 | (uint)rom)); |
165 | | | 177 | |
166 | /* if it does not map, probably part of the lasi space */ | | 178 | /* if it does not map, probably part of the lasi space */ |
167 | if ((rv = bus_space_map(ca->ca_iot, rom, STI_ROMSIZE, 0, &romh))) { | | 179 | if ((rv = bus_space_map(ca->ca_iot, rom, STI_ROMSIZE, 0, &romh))) { |
168 | DPRINTF(("%s: can't map rom space (%d)\n", __func__, rv)); | | 180 | DPRINTF(("%s: can't map rom space (%d)\n", __func__, rv)); |
169 | | | 181 | |
170 | if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) { | | 182 | if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) { |
171 | romh = rom; | | 183 | romh = rom; |
172 | romunmapped++; | | 184 | romunmapped++; |
173 | } else { | | 185 | } else { |
174 | /* in this case nobody has no freaking idea */ | | 186 | /* in this case nobody has no freaking idea */ |
175 | return 0; | | 187 | return 0; |
176 | } | | 188 | } |
177 | } | | 189 | } |
178 | | | 190 | |
179 | devtype = bus_space_read_1(ca->ca_iot, romh, 3); | | 191 | devtype = bus_space_read_1(ca->ca_iot, romh, 3); |
180 | | | 192 | |
181 | DPRINTF(("%s: devtype=%d\n", __func__, devtype)); | | 193 | DPRINTF(("%s: devtype=%d\n", __func__, devtype)); |
182 | rv = 1; | | 194 | rv = 1; |
183 | switch (devtype) { | | 195 | switch (devtype) { |
184 | case STI_DEVTYPE4: | | 196 | case STI_DEVTYPE4: |
185 | id = bus_space_read_4(ca->ca_iot, romh, STI_DEV4_DD_GRID); | | 197 | id = bus_space_read_4(ca->ca_iot, romh, STI_DEV4_DD_GRID); |
186 | break; | | 198 | break; |
187 | case STI_DEVTYPE1: | | 199 | case STI_DEVTYPE1: |
188 | id = (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID | | 200 | id = (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID |
189 | + 3) << 24) | | | 201 | + 3) << 24) | |
190 | (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID | | 202 | (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID |
191 | + 7) << 16) | | | 203 | + 7) << 16) | |
192 | (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID | | 204 | (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID |
193 | + 11) << 8) | | | 205 | + 11) << 8) | |
194 | (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID | | 206 | (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID |
195 | + 15)); | | 207 | + 15)); |
196 | break; | | 208 | break; |
197 | default: | | 209 | default: |
198 | DPRINTF(("%s: unknown type (%x)\n", __func__, devtype)); | | 210 | DPRINTF(("%s: unknown type (%x)\n", __func__, devtype)); |
199 | rv = 0; | | 211 | rv = 0; |
200 | } | | 212 | } |
201 | | | 213 | |
202 | if (rv && | | 214 | if (rv && |
203 | ca->ca_type.iodc_sv_model == HPPA_FIO_SGC && id == STI_ID_FDDI) { | | 215 | ca->ca_type.iodc_sv_model == HPPA_FIO_SGC && id == STI_ID_FDDI) { |
204 | DPRINTF(("%s: not a graphics device\n", __func__)); | | 216 | DPRINTF(("%s: not a graphics device\n", __func__)); |
205 | rv = 0; | | 217 | rv = 0; |
206 | } | | 218 | } |
207 | | | 219 | |
208 | if (ca->ca_naddrs >= sizeof(ca->ca_addrs) / sizeof(ca->ca_addrs[0])) { | | 220 | if (ca->ca_naddrs >= sizeof(ca->ca_addrs) / sizeof(ca->ca_addrs[0])) { |
209 | printf("sti: address list overflow\n"); | | 221 | printf("sti: address list overflow\n"); |
210 | return 0; | | 222 | return 0; |
211 | } | | 223 | } |
212 | | | 224 | |
213 | ca->ca_addrs[ca->ca_naddrs].addr = rom; | | 225 | ca->ca_addrs[ca->ca_naddrs].addr = rom; |
214 | ca->ca_addrs[ca->ca_naddrs].size = sti_rom_size(ca->ca_iot, romh); | | 226 | ca->ca_addrs[ca->ca_naddrs].size = sti_rom_size(ca->ca_iot, romh); |
215 | ca->ca_naddrs++; | | 227 | ca->ca_naddrs++; |
216 | | | 228 | |
217 | if (!romunmapped) | | 229 | if (!romunmapped) |
218 | bus_space_unmap(ca->ca_iot, romh, STI_ROMSIZE); | | 230 | bus_space_unmap(ca->ca_iot, romh, STI_ROMSIZE); |
219 | return rv; | | 231 | return rv; |
220 | } | | 232 | } |
221 | | | 233 | |
222 | void | | 234 | void |
223 | sti_sgc_attach(device_t parent, device_t self, void *aux) | | 235 | sti_sgc_attach(device_t parent, device_t self, void *aux) |
224 | { | | 236 | { |
225 | struct sti_softc *sc = device_private(self); | | 237 | struct sti_softc *sc = device_private(self); |
226 | struct confargs *ca = aux; | | 238 | struct confargs *ca = aux; |
227 | bus_space_handle_t romh; | | 239 | bus_space_handle_t romh; |
228 | hppa_hpa_t consaddr; | | 240 | hppa_hpa_t consaddr; |
229 | int pagezero_cookie; | | 241 | int pagezero_cookie; |
230 | paddr_t rom; | | 242 | paddr_t rom; |
231 | uint32_t romlen; | | 243 | uint32_t romlen; |
232 | int rv; | | 244 | int rv; |
233 | int i; | | 245 | int i; |
234 | | | 246 | |
235 | pagezero_cookie = hppa_pagezero_map(); | | 247 | pagezero_cookie = hppa_pagezero_map(); |
236 | consaddr = (hppa_hpa_t)PAGE0->mem_cons.pz_hpa; | | 248 | consaddr = (hppa_hpa_t)PAGE0->mem_cons.pz_hpa; |
237 | hppa_pagezero_unmap(pagezero_cookie); | | 249 | hppa_pagezero_unmap(pagezero_cookie); |
238 | | | 250 | |
239 | sc->sc_dev = self; | | 251 | sc->sc_dev = self; |
240 | sc->sc_enable_rom = NULL; | | 252 | sc->sc_enable_rom = NULL; |
241 | sc->sc_disable_rom = NULL; | | 253 | sc->sc_disable_rom = NULL; |
242 | | | 254 | |
243 | /* we stashed rom addr/len into the last slot during probe */ | | 255 | /* we stashed rom addr/len into the last slot during probe */ |
244 | rom = ca->ca_addrs[ca->ca_naddrs - 1].addr; | | 256 | rom = ca->ca_addrs[ca->ca_naddrs - 1].addr; |
245 | romlen = ca->ca_addrs[ca->ca_naddrs - 1].size; | | 257 | romlen = ca->ca_addrs[ca->ca_naddrs - 1].size; |
246 | | | 258 | |
247 | if ((rv = bus_space_map(ca->ca_iot, rom, romlen, 0, &romh))) { | | 259 | if ((rv = bus_space_map(ca->ca_iot, rom, romlen, 0, &romh))) { |
248 | if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) | | 260 | if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) |
249 | romh = rom; | | 261 | romh = rom; |
250 | else { | | 262 | else { |
251 | aprint_error(": can't map rom space (%d)\n", rv); | | 263 | aprint_error(": can't map rom space (%d)\n", rv); |
252 | return; | | 264 | return; |
253 | } | | 265 | } |
254 | } | | 266 | } |
255 | | | 267 | |
256 | sc->bases[0] = romh; | | 268 | sc->bases[0] = romh; |
257 | for (i = 1; i < STI_REGION_MAX; i++) | | 269 | for (i = 1; i < STI_REGION_MAX; i++) |
258 | sc->bases[i] = ca->ca_hpa; | | 270 | sc->bases[i] = ca->ca_hpa; |
259 | | | 271 | |
260 | #ifdef HP7300LC_CPU | | 272 | #ifdef HP7300LC_CPU |
261 | /* | | 273 | /* |
262 | * PCXL2: enable accel I/O for this space, see PCX-L2 ERS "ACCEL_IO". | | 274 | * PCXL2: enable accel I/O for this space, see PCX-L2 ERS "ACCEL_IO". |
263 | * "pcxl2_ers.{ps,pdf}", (section / chapter . rel. page / abs. page) | | 275 | * "pcxl2_ers.{ps,pdf}", (section / chapter . rel. page / abs. page) |
264 | * 8.7.4 / 8-12 / 92, 11.3.14 / 11-14 / 122 and 14.8 / 14-5 / 203. | | 276 | * 8.7.4 / 8-12 / 92, 11.3.14 / 11-14 / 122 and 14.8 / 14-5 / 203. |
265 | */ | | 277 | */ |
266 | if (hppa_cpu_info->hci_cputype == hpcxl2 | | 278 | if (hppa_cpu_info->hci_cputype == hpcxl2 |
267 | && ca->ca_hpa >= PCXL2_ACCEL_IO_START | | 279 | && ca->ca_hpa >= PCXL2_ACCEL_IO_START |
268 | && ca->ca_hpa <= PCXL2_ACCEL_IO_END) | | 280 | && ca->ca_hpa <= PCXL2_ACCEL_IO_END) |
269 | eaio_l2(PCXL2_ACCEL_IO_ADDR2MASK(ca->ca_hpa)); | | 281 | eaio_l2(PCXL2_ACCEL_IO_ADDR2MASK(ca->ca_hpa)); |
270 | #endif /* HP7300LC_CPU */ | | 282 | #endif /* HP7300LC_CPU */ |
271 | | | 283 | |
272 | if (ca->ca_hpa == consaddr) | | 284 | if (ca->ca_hpa == consaddr) |
273 | sc->sc_flags |= STI_CONSOLE; | | 285 | sc->sc_flags |= STI_CONSOLE; |
274 | if (sti_attach_common(sc, ca->ca_iot, ca->ca_iot, romh, | | 286 | if (sti_attach_common(sc, ca->ca_iot, ca->ca_iot, romh, |
275 | STI_CODEBASE_PA) == 0) | | 287 | STI_CODEBASE_PA) == 0) |
276 | config_interrupts(self, sti_sgc_end_attach); | | 288 | config_interrupts(self, sti_sgc_end_attach); |
277 | } | | 289 | } |
278 | | | 290 | |
279 | void | | 291 | void |
280 | sti_sgc_end_attach(device_t dev) | | 292 | sti_sgc_end_attach(device_t dev) |
281 | { | | 293 | { |
282 | struct sti_softc *sc = device_private(dev); | | 294 | struct sti_softc *sc = device_private(dev); |
283 | | | 295 | |
284 | sti_end_attach(sc); | | 296 | sti_end_attach(sc); |
285 | } | | 297 | } |