Thu Jul 15 04:58:33 2021 UTC ()
For cpu_switchto(), inherit PSL_IMASK field of SR between lwp's.

Otherwise, IPL is lost during context switch, which allows improper
interrupts when, e.g., spin mutexes are hold.

With this fix, full ATF is successfully completed on DIAGNOSTIC
kernel (with one KASSERT in uvm_map.c, which triggers kern/51254,
converted to printf).

Thanks uwe@ for review and suggesting optimization.

Also thanks ad@ for useful comment, and ryo@ for giving me reference
manuals of SH-4!


(rin)
diff -r1.60 -r1.61 src/sys/arch/sh3/sh3/locore_subr.S
cvs diff -r1.60 -r1.61 src/sys/arch/sh3/sh3/locore_subr.S (expand / switch to unified diff)

--- src/sys/arch/sh3/sh3/locore_subr.S 2020/08/03 16:43:44 1.60
+++ src/sys/arch/sh3/sh3/locore_subr.S 2021/07/15 04:58:33 1.61
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: locore_subr.S,v 1.60 2020/08/03 16:43:44 uwe Exp $ */ 1/* $NetBSD: locore_subr.S,v 1.61 2021/07/15 04:58:33 rin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -30,27 +30,27 @@ @@ -30,27 +30,27 @@
30#include "opt_cputype.h" 30#include "opt_cputype.h"
31#include "opt_ddb.h" 31#include "opt_ddb.h"
32#include "opt_kgdb.h" 32#include "opt_kgdb.h"
33#include "opt_modular.h" 33#include "opt_modular.h"
34#include "assym.h" 34#include "assym.h"
35 35
36#include <sys/syscall.h> /* SYS___sigreturn14, SYS_exit */ 36#include <sys/syscall.h> /* SYS___sigreturn14, SYS_exit */
37#include <sh3/asm.h> 37#include <sh3/asm.h>
38#include <sh3/locore.h> 38#include <sh3/locore.h>
39#include <sh3/param.h> /* UPAGES */ 39#include <sh3/param.h> /* UPAGES */
40#include <sh3/mmu_sh3.h> 40#include <sh3/mmu_sh3.h>
41#include <sh3/mmu_sh4.h> 41#include <sh3/mmu_sh4.h>
42 42
43__KERNEL_RCSID(0, "$NetBSD: locore_subr.S,v 1.60 2020/08/03 16:43:44 uwe Exp $") 43__KERNEL_RCSID(0, "$NetBSD: locore_subr.S,v 1.61 2021/07/15 04:58:33 rin Exp $")
44 44
45 45
46/* 46/*
47 * LINTSTUB: include <sys/types.h> 47 * LINTSTUB: include <sys/types.h>
48 * LINTSTUB: include <sys/lwp.h> 48 * LINTSTUB: include <sys/lwp.h>
49 * LINTSTUB: include <sh3/locore.h> 49 * LINTSTUB: include <sh3/locore.h>
50 */ 50 */
51 51
52 52
53/* 53/*
54 * Save processor state to pcb->pcb_sf switchframe. 54 * Save processor state to pcb->pcb_sf switchframe.
55 * Note that offsetof(struct pcb, pcb_sf) is zero. 55 * Note that offsetof(struct pcb, pcb_sf) is zero.
56 */ 56 */
@@ -130,27 +130,42 @@ ENTRY(cpu_switchto) @@ -130,27 +130,42 @@ ENTRY(cpu_switchto)
130 !! wire u-area in TLB 130 !! wire u-area in TLB
131 MOV (switch_resume, r0) 131 MOV (switch_resume, r0)
132 jsr @r0 132 jsr @r0
133 mov r8, r4 ! nlwp 133 mov r8, r4 ! nlwp
134#endif 134#endif
135 !! safe to use nlwp's kernel stack now 135 !! safe to use nlwp's kernel stack now
136 ldc r11, sr ! __EXCEPTION_UNBLOCK 136 ldc r11, sr ! __EXCEPTION_UNBLOCK
137 137
138 !! finish restoring new lwp's context from switchframe 138 !! finish restoring new lwp's context from switchframe
139 !! sf_r15, sf_r6_bank, sf_r7_bank are already restored 139 !! sf_r15, sf_r6_bank, sf_r7_bank are already restored
140 mov r10, r1 ! &nlwp->l_md.md_pcb->pcb_sf 140 mov r10, r1 ! &nlwp->l_md.md_pcb->pcb_sf
141 mov r9, r0 ! return olwp (we are about to clobber r9) 141 mov r9, r0 ! return olwp (we are about to clobber r9)
142 ldc.l @r1+, gbr 142 ldc.l @r1+, gbr
143 ldc.l @r1+, sr 143
 144 /*
 145 * We cannot simply pop SR here; PSL_IMASK field should be
 146 * inherited to nlwp. Otherwise, IPL is lost during context
 147 * switch, which allows improper interrupts when, e.g.,
 148 * spin mutexes are hold.
 149 */
 150 mov.l @r1+, r8 ! r8 = new SR
 151 mov #0x78, r9
 152 shll r9 ! r9 = PSL_IMASK
 153 not r9, r10 ! r10 = ~PSL_IMASK
 154 and r9, r11 ! r11 = old SR & PSL_IMASK
 155 and r10, r8
 156 or r11, r8
 157 ldc r8, sr
 158
144 lds.l @r1+, pr 159 lds.l @r1+, pr
145 mov.l @r1+, r8 160 mov.l @r1+, r8
146 mov.l @r1+, r9 161 mov.l @r1+, r9
147 mov.l @r1+, r10 162 mov.l @r1+, r10
148 mov.l @r1+, r11 163 mov.l @r1+, r11
149 mov.l @r1+, r12 164 mov.l @r1+, r12
150 mov.l @r1+, r13 165 mov.l @r1+, r13
151 rts 166 rts
152 mov.l @r1+, r14 167 mov.l @r1+, r14
153 168
154 .align 2 169 .align 2
155.L_curlwp: .long _C_LABEL(curlwp) 170.L_curlwp: .long _C_LABEL(curlwp)
156.L_curpcb: .long _C_LABEL(curpcb) 171.L_curpcb: .long _C_LABEL(curpcb)