 @@ -1,38 +1,38 @@
-/*	$NetBSD: ichsmb.c,v 1.50.6.4 2020/08/05 15:54:30 martin Exp $	*/
+/*	$NetBSD: ichsmb.c,v 1.50.6.5 2021/12/03 17:54:30 martin Exp $	*/
-/*	$OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $	*/
+/*	$OpenBSD: ichiic.c,v 1.44 2020/10/07 11:23:05 jsg Exp $	*/
 /*
  * Copyright (c) 2005, 2006 Alexander Yurchenko <grange@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 /*
  * Intel ICH SMBus controller driver.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.50.6.4 2020/08/05 15:54:30 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.50.6.5 2021/12/03 17:54:30 martin Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/errno.h>
 #include <sys/kernel.h>
 #include <sys/mutex.h>
 #include <sys/proc.h>
 #include <sys/bus.h>
 #include <dev/pci/pcidevs.h>
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
 @@ -109,45 +109,52 @@ ichsmb_match(device_t parent, cfdata_t m
 		case PCI_PRODUCT_INTEL_82801I_SMB:
 		case PCI_PRODUCT_INTEL_82801JD_SMB:
 		case PCI_PRODUCT_INTEL_82801JI_SMB:
 		case PCI_PRODUCT_INTEL_3400_SMB:
 		case PCI_PRODUCT_INTEL_6SERIES_SMB:
 		case PCI_PRODUCT_INTEL_7SERIES_SMB:
 		case PCI_PRODUCT_INTEL_8SERIES_SMB:
 		case PCI_PRODUCT_INTEL_9SERIES_SMB:
 		case PCI_PRODUCT_INTEL_100SERIES_SMB:
 		case PCI_PRODUCT_INTEL_100SERIES_LP_SMB:
 		case PCI_PRODUCT_INTEL_2HS_SMB:
 		case PCI_PRODUCT_INTEL_3HS_SMB:
 		case PCI_PRODUCT_INTEL_3HS_U_SMB:
 		case PCI_PRODUCT_INTEL_4HS_H_SMB:
 		case PCI_PRODUCT_INTEL_4HS_V_SMB:
 		case PCI_PRODUCT_INTEL_CORE4G_M_SMB:
 		case PCI_PRODUCT_INTEL_CORE5G_M_SMB:
 		case PCI_PRODUCT_INTEL_CMTLK_SMB:
 		case PCI_PRODUCT_INTEL_BAYTRAIL_PCU_SMB:
 		case PCI_PRODUCT_INTEL_BSW_PCU_SMB:
 		case PCI_PRODUCT_INTEL_APL_SMB:
 		case PCI_PRODUCT_INTEL_GLK_SMB:
 		case PCI_PRODUCT_INTEL_EHL_SMB:
 		case PCI_PRODUCT_INTEL_JSL_SMB:
 		case PCI_PRODUCT_INTEL_C600_SMBUS:
 		case PCI_PRODUCT_INTEL_C600_SMB_0:
 		case PCI_PRODUCT_INTEL_C600_SMB_1:
 		case PCI_PRODUCT_INTEL_C600_SMB_2:
 		case PCI_PRODUCT_INTEL_C610_SMB:
 		case PCI_PRODUCT_INTEL_C620_SMB:
 		case PCI_PRODUCT_INTEL_C620_SMB_S:
 		case PCI_PRODUCT_INTEL_EP80579_SMB:
 		case PCI_PRODUCT_INTEL_DH89XXCC_SMB:
 		case PCI_PRODUCT_INTEL_DH89XXCL_SMB:
 		case PCI_PRODUCT_INTEL_C2000_PCU_SMBUS:
 		case PCI_PRODUCT_INTEL_C3K_SMBUS_LEGACY:
 		case PCI_PRODUCT_INTEL_495_YU_SMB:
 		case PCI_PRODUCT_INTEL_5HS_H_SMB:
 		case PCI_PRODUCT_INTEL_5HS_LP_SMB:
 			return 1;
+		}
+	}
 	return 0;
+}
 static void
 ichsmb_attach(device_t parent, device_t self, void *aux)
+{
 	struct ichsmb_softc *sc = device_private(self);
 	struct pci_attach_args *pa = aux;
 	pcireg_t conf;
 	bus_size_t iosize;
 @@ -373,71 +380,68 @@ ichsmb_i2c_exec(void *cookie, i2c_op_t o
 		if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz))
 			goto timeout;
+	}
 	if (sc->sc_i2c_xfer.error)
 		return (1);
 	return (0);
 timeout:
 	/*
 	 * Transfer timeout. Kill the transaction and clear status bits.
 	 */
 	snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
 	aprint_error_dev(sc->sc_dev,
 	    "exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, "
 	    "flags 0x%02x: timeout, status %s\n",
 	    op, addr, cmdlen, len, flags, fbuf);
 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC,
 	    LPCIB_SMB_HC_KILL);
 	DELAY(ICHIIC_DELAY);
 	st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
 	if ((st & LPCIB_SMB_HS_FAILED) == 0) {
 		snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
 		aprint_error_dev(sc->sc_dev, "abort failed, status %s\n",
 		    fbuf);
+	}
 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
 	return (1);
+}
 static int
 ichsmb_intr(void *arg)
+{
 	struct ichsmb_softc *sc = arg;
 	uint8_t st;
 	uint8_t *b;
 	size_t len;
 #ifdef ICHIIC_DEBUG
 	char fbuf[64];
 #endif
 	/* Read status */
 	st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
 	/* Clear status bits */
 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
 	/* XXX Ignore SMBALERT# for now */
 	if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR |
 	    LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED |
-	    LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0)
+	    LPCIB_SMB_HS_BDONE)) == 0)
 		/* Interrupt was not for us */
 		return (0);
 #ifdef ICHIIC_DEBUG
 	snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
 	printf("%s: intr st %s\n", device_xname(sc->sc_dev), fbuf);
 #endif
 	/* Clear status bits */
 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
 	/* Check for errors */
 	if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) {
 		sc->sc_i2c_xfer.error = 1;
 		goto done;
+	}
 	if (st & LPCIB_SMB_HS_INTR) {
 		if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
 			goto done;
 		/* Read data */
 		b = sc->sc_i2c_xfer.buf;
 		len = sc->sc_i2c_xfer.len;