 @@ -1,14 +1,14 @@
-/*	$NetBSD: intel_display.c,v 1.9 2021/12/19 12:11:46 riastradh Exp $	*/
+/*	$NetBSD: intel_display.c,v 1.10 2021/12/19 12:28:55 riastradh Exp $	*/
 /*
  * Copyright © 2006-2007 Intel Corporation
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
  * to deal in the Software without restriction, including without limitation
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
+ *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
 @@ -17,27 +17,27 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
+ *
  * Authors:
  *	Eric Anholt <eric@anholt.net>
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_display.c,v 1.9 2021/12/19 12:11:46 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_display.c,v 1.10 2021/12/19 12:28:55 riastradh Exp $");
 #include "intel_display.h"	/* for pipe_drmhack */
 #include <linux/i2c.h>
 #include <linux/input.h>
 #include <linux/intel-iommu.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/dma-resv.h>
 #include <linux/slab.h>
 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
 @@ -17319,107 +17319,131 @@ void intel_init_display_hooks(struct drm
 		dev_priv->display.commit_modeset_enables = skl_commit_modeset_enables;
 	else
 		dev_priv->display.commit_modeset_enables = intel_commit_modeset_enables;
+}
 void intel_modeset_init_hw(struct drm_i915_private *i915)
+{
 	intel_update_cdclk(i915);
 	intel_dump_cdclk_state(&i915->cdclk.hw, "Current CDCLK");
 	i915->cdclk.logical = i915->cdclk.actual = i915->cdclk.hw;
+}
 static int sanitize_watermarks_add_affected(struct drm_atomic_state *state)
+{
 	struct drm_plane *plane;
 	struct drm_crtc *crtc;
 	drm_for_each_crtc(crtc, state->dev) {
 		struct drm_crtc_state *crtc_state;
 		crtc_state = drm_atomic_get_crtc_state(state, crtc);
 		if (IS_ERR(crtc_state))
 			return PTR_ERR(crtc_state);
+	}
 	drm_for_each_plane(plane, state->dev) {
 		struct drm_plane_state *plane_state;
 		plane_state = drm_atomic_get_plane_state(state, plane);
 		if (IS_ERR(plane_state))
 			return PTR_ERR(plane_state);
+	}
 	return 0;
+}
 /*
  * Calculate what we think the watermarks should be for the state we've read
  * out of the hardware and then immediately program those watermarks so that
  * we ensure the hardware settings match our internal state.
+ *
  * We can calculate what we think WM's should be by creating a duplicate of the
  * current state (which was constructed during hardware readout) and running it
  * through the atomic check code to calculate new watermark values in the
  * state object.
  */
-static void sanitize_watermarks(struct drm_device *dev)
+static void sanitize_watermarks(struct drm_i915_private *dev_priv)
+{
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	struct drm_atomic_state *state;
 	struct intel_atomic_state *intel_state;
 	struct intel_crtc *crtc;
 	struct intel_crtc_state *crtc_state;
 	struct drm_modeset_acquire_ctx ctx;
 	int ret;
 	int i;
 	/* Only supported on platforms that use atomic watermark design */
 	if (!dev_priv->display.optimize_watermarks)
 		return;
-	/*
+	state = drm_atomic_state_alloc(&dev_priv->drm);
-	 * We need to hold connection_mutex before calling duplicate_state so
+	if (WARN_ON(!state))
-	 * that the connector loop is protected.
+		return;
 	 */
 	drm_modeset_acquire_init(&ctx, 0);
 retry:
 	ret = drm_modeset_lock_all_ctx(dev, &ctx);
 	if (ret == -EDEADLK) {
 		drm_modeset_backoff(&ctx);
 		goto retry;
 	} else if (WARN_ON(ret)) {
 		goto fail;
 	state = drm_atomic_helper_duplicate_state(dev, &ctx);
 	if (WARN_ON(IS_ERR(state)))
 		goto fail;
 	intel_state = to_intel_atomic_state(state);
 	drm_modeset_acquire_init(&ctx, 0);
 retry:
 	state->acquire_ctx = &ctx;
 	/*
 	 * Hardware readout is the only time we don't want to calculate
 	 * intermediate watermarks (since we don't trust the current
 	 * watermarks).
 	 */
 	if (!HAS_GMCH(dev_priv))
 		intel_state->skip_intermediate_wm = true;
-	ret = intel_atomic_check(dev, state);
+	ret = sanitize_watermarks_add_affected(state);
-	if (ret) {
+	if (ret)
-		/*
+		goto fail;
 		 * If we fail here, it means that the hardware appears to be
-		 * programmed in a way that shouldn't be possible, given our
+	ret = intel_atomic_check(&dev_priv->drm, state);
-		 * understanding of watermark requirements.  This might mean a
+	if (ret)
-		 * mistake in the hardware readout code or a mistake in the
+		goto fail;
 		 * watermark calculations for a given platform.  Raise a WARN
 		 * so that this is noticeable.
 		 * If this actually happens, we'll have to just leave the
 		 * BIOS-programmed watermarks untouched and hope for the best.
 		 */
 		WARN(true, "Could not determine valid watermarks for inherited state\n");
 		goto put_state;
 	/* Write calculated watermark values back */
 	for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) {
 		crtc_state->wm.need_postvbl_update = true;
 		dev_priv->display.optimize_watermarks(intel_state, crtc);
 		to_intel_crtc_state(crtc->base.state)->wm = crtc_state->wm;
+	}
 put_state:
 	drm_atomic_state_put(state);
 fail:
 	if (ret == -EDEADLK) {
 		drm_atomic_state_clear(state);
 		drm_modeset_backoff(&ctx);
 		goto retry;
+	}
 	/*
 	 * If we fail here, it means that the hardware appears to be
 	 * programmed in a way that shouldn't be possible, given our
 	 * understanding of watermark requirements.  This might mean a
 	 * mistake in the hardware readout code or a mistake in the
 	 * watermark calculations for a given platform.  Raise a WARN
 	 * so that this is noticeable.
+	 *
 	 * If this actually happens, we'll have to just leave the
 	 * BIOS-programmed watermarks untouched and hope for the best.
 	 */
 	WARN(ret, "Could not determine valid watermarks for inherited state\n");
 	drm_atomic_state_put(state);
 	drm_modeset_drop_locks(&ctx);
 	drm_modeset_acquire_fini(&ctx);
+}
 static void intel_update_fdi_pll_freq(struct drm_i915_private *dev_priv)
+{
 	if (IS_GEN(dev_priv, 5)) {
 		u32 fdi_pll_clk =
 			I915_READ(FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
 		dev_priv->fdi_pll_freq = (fdi_pll_clk + 2) * 10000;
 	} else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv)) {
 		dev_priv->fdi_pll_freq = 270000;
 @@ -17640,27 +17664,27 @@ int intel_modeset_init(struct drm_i915_p
 		/*
 		 * If the fb is shared between multiple heads, we'll
 		 * just get the first one.
 		 */
 		intel_find_initial_plane_obj(crtc, &plane_config);
+	}
 	/*
 	 * Make sure hardware watermarks really match the state we read out.
 	 * Note that we need to do this after reconstructing the BIOS fb's
 	 * since the watermark calculation done here will use pstate->fb.
 	 */
 	if (!HAS_GMCH(i915))
-		sanitize_watermarks(dev);
+		sanitize_watermarks(i915);
 	/*
 	 * Force all active planes to recompute their states. So that on
 	 * mode_setcrtc after probe, all the intel_plane_state variables
 	 * are already calculated and there is no assert_plane warnings
 	 * during bootup.
 	 */
 	ret = intel_initial_commit(dev);
 	if (ret)
 		DRM_DEBUG_KMS("Initial commit in probe failed.\n");
 	return 0;
+}