Wed Feb 23 07:55:56 2022 UTC ()
API naming consistency.  NFC.


(skrll)
diff -r1.14 -r1.15 src/sys/arch/arm/nvidia/tegra_drm.c
diff -r1.11 -r1.12 src/sys/dev/fdt/fdt_i2c.c
diff -r1.74 -r1.75 src/sys/dev/fdt/fdtvar.h
cvs diff -r1.14 -r1.15 src/sys/arch/arm/nvidia/tegra_drm.c (switch to unified diff)

--- src/sys/arch/arm/nvidia/tegra_drm.c 2021/12/19 12:44:50 1.14
+++ src/sys/arch/arm/nvidia/tegra_drm.c 2022/02/23 07:55:56 1.15
@@ -1,310 +1,310 @@ @@ -1,310 +1,310 @@
1/* $NetBSD: tegra_drm.c,v 1.14 2021/12/19 12:44:50 riastradh Exp $ */ 1/* $NetBSD: tegra_drm.c,v 1.15 2022/02/23 07:55:56 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
15 * 15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: tegra_drm.c,v 1.14 2021/12/19 12:44:50 riastradh Exp $"); 30__KERNEL_RCSID(0, "$NetBSD: tegra_drm.c,v 1.15 2022/02/23 07:55:56 skrll Exp $");
31 31
32#include <sys/param.h> 32#include <sys/param.h>
33#include <sys/bus.h> 33#include <sys/bus.h>
34#include <sys/device.h> 34#include <sys/device.h>
35#include <sys/intr.h> 35#include <sys/intr.h>
36#include <sys/systm.h> 36#include <sys/systm.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38#include <sys/conf.h> 38#include <sys/conf.h>
39 39
40#include <uvm/uvm_extern.h> 40#include <uvm/uvm_extern.h>
41#include <uvm/uvm_device.h> 41#include <uvm/uvm_device.h>
42 42
43#include <drm/drm_drv.h> 43#include <drm/drm_drv.h>
44#include <drm/drm_encoder.h> 44#include <drm/drm_encoder.h>
45 45
46#include <arm/nvidia/tegra_reg.h> 46#include <arm/nvidia/tegra_reg.h>
47#include <arm/nvidia/tegra_var.h> 47#include <arm/nvidia/tegra_var.h>
48#include <arm/nvidia/tegra_drm.h> 48#include <arm/nvidia/tegra_drm.h>
49 49
50#include <dev/fdt/fdtvar.h> 50#include <dev/fdt/fdtvar.h>
51 51
52static int tegra_drm_match(device_t, cfdata_t, void *); 52static int tegra_drm_match(device_t, cfdata_t, void *);
53static void tegra_drm_attach(device_t, device_t, void *); 53static void tegra_drm_attach(device_t, device_t, void *);
54 54
55static int tegra_drm_load(struct drm_device *, unsigned long); 55static int tegra_drm_load(struct drm_device *, unsigned long);
56static void tegra_drm_unload(struct drm_device *); 56static void tegra_drm_unload(struct drm_device *);
57 57
58static void tegra_drm_task_work(struct work *, void *); 58static void tegra_drm_task_work(struct work *, void *);
59 59
60static struct drm_driver tegra_drm_driver = { 60static struct drm_driver tegra_drm_driver = {
61 .driver_features = DRIVER_MODESET | DRIVER_GEM, 61 .driver_features = DRIVER_MODESET | DRIVER_GEM,
62 .dev_priv_size = 0, 62 .dev_priv_size = 0,
63 .load = tegra_drm_load, 63 .load = tegra_drm_load,
64 .unload = tegra_drm_unload, 64 .unload = tegra_drm_unload,
65 65
66 .gem_free_object = drm_gem_cma_free_object, 66 .gem_free_object = drm_gem_cma_free_object,
67 .mmap_object = drm_gem_or_legacy_mmap_object, 67 .mmap_object = drm_gem_or_legacy_mmap_object,
68 .gem_uvm_ops = &drm_gem_cma_uvm_ops, 68 .gem_uvm_ops = &drm_gem_cma_uvm_ops,
69 69
70 .dumb_create = drm_gem_cma_dumb_create, 70 .dumb_create = drm_gem_cma_dumb_create,
71 71
72 .get_vblank_counter = tegra_drm_get_vblank_counter, 72 .get_vblank_counter = tegra_drm_get_vblank_counter,
73 .enable_vblank = tegra_drm_enable_vblank, 73 .enable_vblank = tegra_drm_enable_vblank,
74 .disable_vblank = tegra_drm_disable_vblank, 74 .disable_vblank = tegra_drm_disable_vblank,
75 75
76 .name = DRIVER_NAME, 76 .name = DRIVER_NAME,
77 .desc = DRIVER_DESC, 77 .desc = DRIVER_DESC,
78 .date = DRIVER_DATE, 78 .date = DRIVER_DATE,
79 .major = DRIVER_MAJOR, 79 .major = DRIVER_MAJOR,
80 .minor = DRIVER_MINOR, 80 .minor = DRIVER_MINOR,
81 .patchlevel = DRIVER_PATCHLEVEL, 81 .patchlevel = DRIVER_PATCHLEVEL,
82}; 82};
83 83
84CFATTACH_DECL_NEW(tegra_drm, sizeof(struct tegra_drm_softc), 84CFATTACH_DECL_NEW(tegra_drm, sizeof(struct tegra_drm_softc),
85 tegra_drm_match, tegra_drm_attach, NULL, NULL); 85 tegra_drm_match, tegra_drm_attach, NULL, NULL);
86 86
87static const struct device_compatible_entry compat_data[] = { 87static const struct device_compatible_entry compat_data[] = {
88 { .compat = "nvidia,tegra124-host1x" }, 88 { .compat = "nvidia,tegra124-host1x" },
89 DEVICE_COMPAT_EOL 89 DEVICE_COMPAT_EOL
90}; 90};
91 91
92static int 92static int
93tegra_drm_match(device_t parent, cfdata_t cf, void *aux) 93tegra_drm_match(device_t parent, cfdata_t cf, void *aux)
94{ 94{
95 struct fdt_attach_args * const faa = aux; 95 struct fdt_attach_args * const faa = aux;
96 96
97 return of_compatible_match(faa->faa_phandle, compat_data); 97 return of_compatible_match(faa->faa_phandle, compat_data);
98} 98}
99 99
100static const struct device_compatible_entry hdmi_compat[] = { 100static const struct device_compatible_entry hdmi_compat[] = {
101 { .compat = "nvidia,tegra124-hdmi" }, 101 { .compat = "nvidia,tegra124-hdmi" },
102 DEVICE_COMPAT_EOL 102 DEVICE_COMPAT_EOL
103}; 103};
104 104
105static const struct device_compatible_entry dc_compat[] = { 105static const struct device_compatible_entry dc_compat[] = {
106 { .compat = "nvidia,tegra124-dc" }, 106 { .compat = "nvidia,tegra124-dc" },
107 DEVICE_COMPAT_EOL 107 DEVICE_COMPAT_EOL
108}; 108};
109 109
110static void 110static void
111tegra_drm_attach(device_t parent, device_t self, void *aux) 111tegra_drm_attach(device_t parent, device_t self, void *aux)
112{ 112{
113 struct tegra_drm_softc * const sc = device_private(self); 113 struct tegra_drm_softc * const sc = device_private(self);
114 struct fdt_attach_args * const faa = aux; 114 struct fdt_attach_args * const faa = aux;
115 struct drm_driver * const driver = &tegra_drm_driver; 115 struct drm_driver * const driver = &tegra_drm_driver;
116 prop_dictionary_t prop = device_properties(self); 116 prop_dictionary_t prop = device_properties(self);
117 int error, node, hdmi_phandle, ddc_phandle; 117 int error, node, hdmi_phandle, ddc_phandle;
118 static const char * const hdmi_supplies[] = { 118 static const char * const hdmi_supplies[] = {
119 "hdmi-supply", "pll-supply", "vdd-supply" 119 "hdmi-supply", "pll-supply", "vdd-supply"
120 }; 120 };
121 struct fdtbus_regulator *reg; 121 struct fdtbus_regulator *reg;
122 u_int n, ndc; 122 u_int n, ndc;
123 123
124 sc->sc_dev = self; 124 sc->sc_dev = self;
125 sc->sc_dmat = faa->faa_dmat; 125 sc->sc_dmat = faa->faa_dmat;
126 sc->sc_bst = faa->faa_bst; 126 sc->sc_bst = faa->faa_bst;
127 sc->sc_phandle = faa->faa_phandle; 127 sc->sc_phandle = faa->faa_phandle;
128 sc->sc_task_thread = NULL; 128 sc->sc_task_thread = NULL;
129 SIMPLEQ_INIT(&sc->sc_tasks); 129 SIMPLEQ_INIT(&sc->sc_tasks);
130 if (workqueue_create(&sc->sc_task_wq, "tegradrm", 130 if (workqueue_create(&sc->sc_task_wq, "tegradrm",
131 &tegra_drm_task_work, NULL, PRI_NONE, IPL_NONE, WQ_MPSAFE)) { 131 &tegra_drm_task_work, NULL, PRI_NONE, IPL_NONE, WQ_MPSAFE)) {
132 aprint_error_dev(self, "unable to create workqueue\n"); 132 aprint_error_dev(self, "unable to create workqueue\n");
133 sc->sc_task_wq = NULL; 133 sc->sc_task_wq = NULL;
134 return; 134 return;
135 } 135 }
136 136
137 aprint_naive("\n"); 137 aprint_naive("\n");
138 aprint_normal("\n"); 138 aprint_normal("\n");
139 139
140 sc->sc_clk_host1x = fdtbus_clock_get_index(faa->faa_phandle, 0); 140 sc->sc_clk_host1x = fdtbus_clock_get_index(faa->faa_phandle, 0);
141 if (sc->sc_clk_host1x == NULL) { 141 if (sc->sc_clk_host1x == NULL) {
142 aprint_error_dev(self, "couldn't get clock host1x\n"); 142 aprint_error_dev(self, "couldn't get clock host1x\n");
143 return; 143 return;
144 } 144 }
145 sc->sc_rst_host1x = fdtbus_reset_get(faa->faa_phandle, "host1x"); 145 sc->sc_rst_host1x = fdtbus_reset_get(faa->faa_phandle, "host1x");
146 if (sc->sc_clk_host1x == NULL || sc->sc_rst_host1x == NULL) { 146 if (sc->sc_clk_host1x == NULL || sc->sc_rst_host1x == NULL) {
147 aprint_error_dev(self, "couldn't get reset host1x\n"); 147 aprint_error_dev(self, "couldn't get reset host1x\n");
148 return; 148 return;
149 } 149 }
150 150
151 ndc = 0; 151 ndc = 0;
152 hdmi_phandle = -1; 152 hdmi_phandle = -1;
153 for (node = OF_child(faa->faa_phandle); node; node = OF_peer(node)) { 153 for (node = OF_child(faa->faa_phandle); node; node = OF_peer(node)) {
154 if (of_compatible_match(node, hdmi_compat)) { 154 if (of_compatible_match(node, hdmi_compat)) {
155 sc->sc_clk_hdmi = fdtbus_clock_get(node, "hdmi"); 155 sc->sc_clk_hdmi = fdtbus_clock_get(node, "hdmi");
156 sc->sc_clk_hdmi_parent = fdtbus_clock_get(node, 156 sc->sc_clk_hdmi_parent = fdtbus_clock_get(node,
157 "parent"); 157 "parent");
158 sc->sc_rst_hdmi = fdtbus_reset_get(node, "hdmi"); 158 sc->sc_rst_hdmi = fdtbus_reset_get(node, "hdmi");
159 hdmi_phandle = node; 159 hdmi_phandle = node;
160 } else if (of_compatible_match(node, dc_compat) && 160 } else if (of_compatible_match(node, dc_compat) &&
161 ndc < __arraycount(sc->sc_clk_dc)) { 161 ndc < __arraycount(sc->sc_clk_dc)) {
162 sc->sc_clk_dc[ndc] = fdtbus_clock_get(node, "dc"); 162 sc->sc_clk_dc[ndc] = fdtbus_clock_get(node, "dc");
163 sc->sc_clk_dc_parent[ndc] = fdtbus_clock_get(node, 163 sc->sc_clk_dc_parent[ndc] = fdtbus_clock_get(node,
164 "parent"); 164 "parent");
165 sc->sc_rst_dc[ndc] = fdtbus_reset_get(node, "dc"); 165 sc->sc_rst_dc[ndc] = fdtbus_reset_get(node, "dc");
166 ++ndc; 166 ++ndc;
167 } 167 }
168 } 168 }
169 if (hdmi_phandle >= 0) { 169 if (hdmi_phandle >= 0) {
170 ddc_phandle = fdtbus_get_phandle(hdmi_phandle, 170 ddc_phandle = fdtbus_get_phandle(hdmi_phandle,
171 "nvidia,ddc-i2c-bus"); 171 "nvidia,ddc-i2c-bus");
172 if (ddc_phandle >= 0) { 172 if (ddc_phandle >= 0) {
173 sc->sc_ddc = fdtbus_get_i2c_tag(ddc_phandle); 173 sc->sc_ddc = fdtbus_i2c_get_tag(ddc_phandle);
174 } 174 }
175 175
176 sc->sc_pin_hpd = fdtbus_gpio_acquire(hdmi_phandle, 176 sc->sc_pin_hpd = fdtbus_gpio_acquire(hdmi_phandle,
177 "nvidia,hpd-gpio", GPIO_PIN_INPUT); 177 "nvidia,hpd-gpio", GPIO_PIN_INPUT);
178 178
179 for (n = 0; n < __arraycount(hdmi_supplies); n++) { 179 for (n = 0; n < __arraycount(hdmi_supplies); n++) {
180 const char *supply = hdmi_supplies[n]; 180 const char *supply = hdmi_supplies[n];
181 reg = fdtbus_regulator_acquire(hdmi_phandle, supply); 181 reg = fdtbus_regulator_acquire(hdmi_phandle, supply);
182 if (reg == NULL) { 182 if (reg == NULL) {
183 aprint_error_dev(self, "couldn't acquire %s\n", 183 aprint_error_dev(self, "couldn't acquire %s\n",
184 supply); 184 supply);
185 continue; 185 continue;
186 } 186 }
187 if (fdtbus_regulator_enable(reg) != 0) { 187 if (fdtbus_regulator_enable(reg) != 0) {
188 aprint_error_dev(self, "couldn't enable %s\n", 188 aprint_error_dev(self, "couldn't enable %s\n",
189 supply); 189 supply);
190 } 190 }
191 fdtbus_regulator_release(reg); 191 fdtbus_regulator_release(reg);
192 } 192 }
193 } 193 }
194 194
195 fdtbus_reset_assert(sc->sc_rst_host1x); 195 fdtbus_reset_assert(sc->sc_rst_host1x);
196 error = clk_enable(sc->sc_clk_host1x); 196 error = clk_enable(sc->sc_clk_host1x);
197 if (error) { 197 if (error) {
198 aprint_error_dev(self, "couldn't enable clock host1x: %d\n", 198 aprint_error_dev(self, "couldn't enable clock host1x: %d\n",
199 error); 199 error);
200 return; 200 return;
201 } 201 }
202 fdtbus_reset_deassert(sc->sc_rst_host1x); 202 fdtbus_reset_deassert(sc->sc_rst_host1x);
203 203
204 prop_dictionary_get_bool(prop, "force-dvi", &sc->sc_force_dvi); 204 prop_dictionary_get_bool(prop, "force-dvi", &sc->sc_force_dvi);
205 205
206 sc->sc_ddev = drm_dev_alloc(driver, sc->sc_dev); 206 sc->sc_ddev = drm_dev_alloc(driver, sc->sc_dev);
207 if (IS_ERR(sc->sc_ddev)) { 207 if (IS_ERR(sc->sc_ddev)) {
208 aprint_error_dev(self, "couldn't allocate DRM device\n"); 208 aprint_error_dev(self, "couldn't allocate DRM device\n");
209 return; 209 return;
210 } 210 }
211 sc->sc_ddev->dev_private = sc; 211 sc->sc_ddev->dev_private = sc;
212 sc->sc_ddev->bst = sc->sc_bst; 212 sc->sc_ddev->bst = sc->sc_bst;
213 sc->sc_ddev->bus_dmat = sc->sc_dmat; 213 sc->sc_ddev->bus_dmat = sc->sc_dmat;
214 sc->sc_ddev->dmat = sc->sc_ddev->bus_dmat; 214 sc->sc_ddev->dmat = sc->sc_ddev->bus_dmat;
215 sc->sc_ddev->dmat_subregion_p = false; 215 sc->sc_ddev->dmat_subregion_p = false;
216 216
217 /* 217 /*
218 * Cause any tasks issued synchronously during attach to be 218 * Cause any tasks issued synchronously during attach to be
219 * processed at the end of this function. 219 * processed at the end of this function.
220 */ 220 */
221 sc->sc_task_thread = curlwp; 221 sc->sc_task_thread = curlwp;
222 222
223 error = -drm_dev_register(sc->sc_ddev, 0); 223 error = -drm_dev_register(sc->sc_ddev, 0);
224 if (error) { 224 if (error) {
225 drm_dev_put(sc->sc_ddev); 225 drm_dev_put(sc->sc_ddev);
226 sc->sc_ddev = NULL; 226 sc->sc_ddev = NULL;
227 aprint_error_dev(self, "couldn't register DRM device: %d\n", 227 aprint_error_dev(self, "couldn't register DRM device: %d\n",
228 error); 228 error);
229 goto out; 229 goto out;
230 } 230 }
231 sc->sc_dev_registered = true; 231 sc->sc_dev_registered = true;
232 232
233 aprint_normal_dev(self, "initialized %s %d.%d.%d %s on minor %d\n", 233 aprint_normal_dev(self, "initialized %s %d.%d.%d %s on minor %d\n",
234 driver->name, driver->major, driver->minor, driver->patchlevel, 234 driver->name, driver->major, driver->minor, driver->patchlevel,
235 driver->date, sc->sc_ddev->primary->index); 235 driver->date, sc->sc_ddev->primary->index);
236 236
237 /* 237 /*
238 * Process asynchronous tasks queued synchronously during 238 * Process asynchronous tasks queued synchronously during
239 * attach. This will be for display detection to attach a 239 * attach. This will be for display detection to attach a
240 * framebuffer, so we have the opportunity for a console device 240 * framebuffer, so we have the opportunity for a console device
241 * to attach before autoconf has completed, in time for init(8) 241 * to attach before autoconf has completed, in time for init(8)
242 * to find that console without panicking. 242 * to find that console without panicking.
243 */ 243 */
244 while (!SIMPLEQ_EMPTY(&sc->sc_tasks)) { 244 while (!SIMPLEQ_EMPTY(&sc->sc_tasks)) {
245 struct tegra_drm_task *const task = 245 struct tegra_drm_task *const task =
246 SIMPLEQ_FIRST(&sc->sc_tasks); 246 SIMPLEQ_FIRST(&sc->sc_tasks);
247 247
248 SIMPLEQ_REMOVE_HEAD(&sc->sc_tasks, tdt_u.queue); 248 SIMPLEQ_REMOVE_HEAD(&sc->sc_tasks, tdt_u.queue);
249 (*task->tdt_fn)(task); 249 (*task->tdt_fn)(task);
250 } 250 }
251 251
252out: /* Cause any subesquent tasks to be processed by the workqueue. */ 252out: /* Cause any subesquent tasks to be processed by the workqueue. */
253 atomic_store_relaxed(&sc->sc_task_thread, NULL); 253 atomic_store_relaxed(&sc->sc_task_thread, NULL);
254} 254}
255 255
256static int 256static int
257tegra_drm_load(struct drm_device *ddev, unsigned long flags) 257tegra_drm_load(struct drm_device *ddev, unsigned long flags)
258{ 258{
259 int error; 259 int error;
260 260
261 error = tegra_drm_mode_init(ddev); 261 error = tegra_drm_mode_init(ddev);
262 if (error) 262 if (error)
263 goto drmerr; 263 goto drmerr;
264 264
265 error = tegra_drm_fb_init(ddev); 265 error = tegra_drm_fb_init(ddev);
266 if (error) 266 if (error)
267 goto drmerr; 267 goto drmerr;
268 268
269 return 0; 269 return 0;
270 270
271drmerr: 271drmerr:
272 drm_mode_config_cleanup(ddev); 272 drm_mode_config_cleanup(ddev);
273 273
274 return error; 274 return error;
275} 275}
276 276
277static void 277static void
278tegra_drm_unload(struct drm_device *ddev) 278tegra_drm_unload(struct drm_device *ddev)
279{ 279{
280 280
281 drm_mode_config_cleanup(ddev); 281 drm_mode_config_cleanup(ddev);
282} 282}
283 283
284static void 284static void
285tegra_drm_task_work(struct work *work, void *cookie) 285tegra_drm_task_work(struct work *work, void *cookie)
286{ 286{
287 struct tegra_drm_task *task = container_of(work, struct tegra_drm_task, 287 struct tegra_drm_task *task = container_of(work, struct tegra_drm_task,
288 tdt_u.work); 288 tdt_u.work);
289 289
290 (*task->tdt_fn)(task); 290 (*task->tdt_fn)(task);
291} 291}
292 292
293void 293void
294tegra_task_init(struct tegra_drm_task *task, 294tegra_task_init(struct tegra_drm_task *task,
295 void (*fn)(struct tegra_drm_task *)) 295 void (*fn)(struct tegra_drm_task *))
296{ 296{
297 297
298 task->tdt_fn = fn; 298 task->tdt_fn = fn;
299} 299}
300 300
301void 301void
302tegra_task_schedule(device_t self, struct tegra_drm_task *task) 302tegra_task_schedule(device_t self, struct tegra_drm_task *task)
303{ 303{
304 struct tegra_drm_softc *sc = device_private(self); 304 struct tegra_drm_softc *sc = device_private(self);
305 305
306 if (atomic_load_relaxed(&sc->sc_task_thread) == curlwp) 306 if (atomic_load_relaxed(&sc->sc_task_thread) == curlwp)
307 SIMPLEQ_INSERT_TAIL(&sc->sc_tasks, task, tdt_u.queue); 307 SIMPLEQ_INSERT_TAIL(&sc->sc_tasks, task, tdt_u.queue);
308 else 308 else
309 workqueue_enqueue(sc->sc_task_wq, &task->tdt_u.work, NULL); 309 workqueue_enqueue(sc->sc_task_wq, &task->tdt_u.work, NULL);
310} 310}
cvs diff -r1.11 -r1.12 src/sys/dev/fdt/fdt_i2c.c (switch to unified diff)

--- src/sys/dev/fdt/fdt_i2c.c 2021/08/07 16:19:10 1.11
+++ src/sys/dev/fdt/fdt_i2c.c 2022/02/23 07:55:55 1.12
@@ -1,131 +1,131 @@ @@ -1,131 +1,131 @@
1/* $NetBSD: fdt_i2c.c,v 1.11 2021/08/07 16:19:10 thorpej Exp $ */ 1/* $NetBSD: fdt_i2c.c,v 1.12 2022/02/23 07:55:55 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
15 * 15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: fdt_i2c.c,v 1.11 2021/08/07 16:19:10 thorpej Exp $"); 30__KERNEL_RCSID(0, "$NetBSD: fdt_i2c.c,v 1.12 2022/02/23 07:55:55 skrll Exp $");
31 31
32#include <sys/param.h> 32#include <sys/param.h>
33#include <sys/bus.h> 33#include <sys/bus.h>
34#include <sys/kmem.h> 34#include <sys/kmem.h>
35#include <sys/queue.h> 35#include <sys/queue.h>
36 36
37#include <libfdt.h> 37#include <libfdt.h>
38#include <dev/fdt/fdtvar.h> 38#include <dev/fdt/fdtvar.h>
39 39
40struct fdtbus_i2c_controller { 40struct fdtbus_i2c_controller {
41 i2c_tag_t i2c_tag; 41 i2c_tag_t i2c_tag;
42 int i2c_phandle; 42 int i2c_phandle;
43 43
44 LIST_ENTRY(fdtbus_i2c_controller) i2c_next; 44 LIST_ENTRY(fdtbus_i2c_controller) i2c_next;
45}; 45};
46 46
47static LIST_HEAD(, fdtbus_i2c_controller) fdtbus_i2c_controllers = 47static LIST_HEAD(, fdtbus_i2c_controller) fdtbus_i2c_controllers =
48 LIST_HEAD_INITIALIZER(fdtbus_i2c_controllers); 48 LIST_HEAD_INITIALIZER(fdtbus_i2c_controllers);
49 49
50int 50int
51fdtbus_register_i2c_controller(i2c_tag_t tag, int phandle) 51fdtbus_register_i2c_controller(i2c_tag_t tag, int phandle)
52{ 52{
53 struct fdtbus_i2c_controller *i2c; 53 struct fdtbus_i2c_controller *i2c;
54 54
55 i2c = kmem_alloc(sizeof(*i2c), KM_SLEEP); 55 i2c = kmem_alloc(sizeof(*i2c), KM_SLEEP);
56 i2c->i2c_tag = tag; 56 i2c->i2c_tag = tag;
57 i2c->i2c_phandle = phandle; 57 i2c->i2c_phandle = phandle;
58 58
59 LIST_INSERT_HEAD(&fdtbus_i2c_controllers, i2c, i2c_next); 59 LIST_INSERT_HEAD(&fdtbus_i2c_controllers, i2c, i2c_next);
60 60
61 return 0; 61 return 0;
62} 62}
63 63
64static struct fdtbus_i2c_controller * 64static struct fdtbus_i2c_controller *
65fdtbus_get_i2c_controller(int phandle) 65fdtbus_get_i2c_controller(int phandle)
66{ 66{
67 struct fdtbus_i2c_controller *i2c; 67 struct fdtbus_i2c_controller *i2c;
68 68
69 LIST_FOREACH(i2c, &fdtbus_i2c_controllers, i2c_next) { 69 LIST_FOREACH(i2c, &fdtbus_i2c_controllers, i2c_next) {
70 if (i2c->i2c_phandle == phandle) 70 if (i2c->i2c_phandle == phandle)
71 return i2c; 71 return i2c;
72 } 72 }
73 73
74 return NULL; 74 return NULL;
75} 75}
76 76
77i2c_tag_t 77i2c_tag_t
78fdtbus_get_i2c_tag(int phandle) 78fdtbus_i2c_get_tag(int phandle)
79{ 79{
80 struct fdtbus_i2c_controller *i2c; 80 struct fdtbus_i2c_controller *i2c;
81 81
82 i2c = fdtbus_get_i2c_controller(phandle); 82 i2c = fdtbus_get_i2c_controller(phandle);
83 if (i2c == NULL) 83 if (i2c == NULL)
84 return NULL; 84 return NULL;
85 85
86 return i2c->i2c_tag; 86 return i2c->i2c_tag;
87} 87}
88 88
89i2c_tag_t 89i2c_tag_t
90fdtbus_i2c_acquire(int phandle, const char *prop) 90fdtbus_i2c_acquire(int phandle, const char *prop)
91{ 91{
92 int i2c_phandle; 92 int i2c_phandle;
93 93
94 i2c_phandle = fdtbus_get_phandle(phandle, prop); 94 i2c_phandle = fdtbus_get_phandle(phandle, prop);
95 if (i2c_phandle == -1) 95 if (i2c_phandle == -1)
96 return NULL; 96 return NULL;
97 97
98 return fdtbus_get_i2c_tag(i2c_phandle); 98 return fdtbus_i2c_get_tag(i2c_phandle);
99} 99}
100 100
101device_t 101device_t
102fdtbus_attach_i2cbus(device_t dev, int phandle, i2c_tag_t tag, cfprint_t print) 102fdtbus_attach_i2cbus(device_t dev, int phandle, i2c_tag_t tag, cfprint_t print)
103{ 103{
104 struct i2cbus_attach_args iba; 104 struct i2cbus_attach_args iba;
105 prop_dictionary_t devs, props; 105 prop_dictionary_t devs, props;
106 device_t ret; 106 device_t ret;
107 u_int address_cells; 107 u_int address_cells;
108 108
109 devs = prop_dictionary_create(); 109 devs = prop_dictionary_create();
110 if (of_getprop_uint32(phandle, "#address-cells", &address_cells)) 110 if (of_getprop_uint32(phandle, "#address-cells", &address_cells))
111 address_cells = 1; 111 address_cells = 1;
112 112
113 of_enter_i2c_devs(devs, phandle, address_cells * 4, 0); 113 of_enter_i2c_devs(devs, phandle, address_cells * 4, 0);
114 114
115 memset(&iba, 0, sizeof(iba)); 115 memset(&iba, 0, sizeof(iba));
116 iba.iba_tag = tag; 116 iba.iba_tag = tag;
117 iba.iba_child_devices = prop_dictionary_get(devs, "i2c-child-devices"); 117 iba.iba_child_devices = prop_dictionary_get(devs, "i2c-child-devices");
118 if (iba.iba_child_devices) 118 if (iba.iba_child_devices)
119 prop_object_retain(iba.iba_child_devices); 119 prop_object_retain(iba.iba_child_devices);
120 prop_object_release(devs); 120 prop_object_release(devs);
121 121
122 props = device_properties(dev); 122 props = device_properties(dev);
123 prop_dictionary_set_bool(props, "i2c-no-indirect-config", true); 123 prop_dictionary_set_bool(props, "i2c-no-indirect-config", true);
124 124
125 ret = config_found(dev, &iba, print, 125 ret = config_found(dev, &iba, print,
126 CFARGS(.iattr = "i2cbus")); 126 CFARGS(.iattr = "i2cbus"));
127 if (iba.iba_child_devices) 127 if (iba.iba_child_devices)
128 prop_object_release(iba.iba_child_devices); 128 prop_object_release(iba.iba_child_devices);
129 129
130 return ret; 130 return ret;
131} 131}
cvs diff -r1.74 -r1.75 src/sys/dev/fdt/fdtvar.h (switch to unified diff)

--- src/sys/dev/fdt/fdtvar.h 2022/01/14 07:40:52 1.74
+++ src/sys/dev/fdt/fdtvar.h 2022/02/23 07:55:55 1.75
@@ -1,475 +1,475 @@ @@ -1,475 +1,475 @@
1/* $NetBSD: fdtvar.h,v 1.74 2022/01/14 07:40:52 skrll Exp $ */ 1/* $NetBSD: fdtvar.h,v 1.75 2022/02/23 07:55:55 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
15 * 15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#ifndef _DEV_FDT_FDTVAR_H_ 29#ifndef _DEV_FDT_FDTVAR_H_
30#define _DEV_FDT_FDTVAR_H_ 30#define _DEV_FDT_FDTVAR_H_
31 31
32#include <sys/types.h> 32#include <sys/types.h>
33#include <sys/bus.h> 33#include <sys/bus.h>
34#include <sys/gpio.h> 34#include <sys/gpio.h>
35#include <sys/termios.h> 35#include <sys/termios.h>
36 36
37#include <dev/i2c/i2cvar.h> 37#include <dev/i2c/i2cvar.h>
38#include <dev/pwm/pwmvar.h> 38#include <dev/pwm/pwmvar.h>
39#include <dev/clk/clk.h> 39#include <dev/clk/clk.h>
40 40
41#ifdef _KERNEL_OPT 41#ifdef _KERNEL_OPT
42#include "audio.h" 42#include "audio.h"
43#endif 43#endif
44#if NAUDIO > 0 44#if NAUDIO > 0
45#include <dev/audio/audio_dai.h> 45#include <dev/audio/audio_dai.h>
46#else 46#else
47typedef void *audio_dai_tag_t; 47typedef void *audio_dai_tag_t;
48#endif 48#endif
49 49
50#include <dev/clock_subr.h> 50#include <dev/clock_subr.h>
51 51
52#include <dev/ofw/openfirm.h> 52#include <dev/ofw/openfirm.h>
53 53
54struct fdt_attach_args { 54struct fdt_attach_args {
55 const char *faa_name; 55 const char *faa_name;
56 bus_space_tag_t faa_bst; 56 bus_space_tag_t faa_bst;
57 bus_dma_tag_t faa_dmat; 57 bus_dma_tag_t faa_dmat;
58 int faa_phandle; 58 int faa_phandle;
59 int faa_quiet; 59 int faa_quiet;
60}; 60};
61 61
62/* flags for fdtbus_intr_establish */ 62/* flags for fdtbus_intr_establish */
63#define FDT_INTR_MPSAFE __BIT(0) 63#define FDT_INTR_MPSAFE __BIT(0)
64 64
65/* Interrupt trigger types defined by the FDT "interrupts" bindings. */ 65/* Interrupt trigger types defined by the FDT "interrupts" bindings. */
66#define FDT_INTR_TYPE_POS_EDGE __BIT(0) 66#define FDT_INTR_TYPE_POS_EDGE __BIT(0)
67#define FDT_INTR_TYPE_NEG_EDGE __BIT(1) 67#define FDT_INTR_TYPE_NEG_EDGE __BIT(1)
68#define FDT_INTR_TYPE_DOUBLE_EDGE (FDT_INTR_TYPE_POS_EDGE | \ 68#define FDT_INTR_TYPE_DOUBLE_EDGE (FDT_INTR_TYPE_POS_EDGE | \
69 FDT_INTR_TYPE_NEG_EDGE) 69 FDT_INTR_TYPE_NEG_EDGE)
70#define FDT_INTR_TYPE_HIGH_LEVEL __BIT(2) 70#define FDT_INTR_TYPE_HIGH_LEVEL __BIT(2)
71#define FDT_INTR_TYPE_LOW_LEVEL __BIT(3) 71#define FDT_INTR_TYPE_LOW_LEVEL __BIT(3)
72 72
73struct fdtbus_interrupt_controller_func { 73struct fdtbus_interrupt_controller_func {
74 void * (*establish)(device_t, u_int *, int, int, 74 void * (*establish)(device_t, u_int *, int, int,
75 int (*)(void *), void *, const char *); 75 int (*)(void *), void *, const char *);
76 void (*disestablish)(device_t, void *); 76 void (*disestablish)(device_t, void *);
77 bool (*intrstr)(device_t, u_int *, char *, size_t); 77 bool (*intrstr)(device_t, u_int *, char *, size_t);
78 void (*mask)(device_t, void *); 78 void (*mask)(device_t, void *);
79 void (*unmask)(device_t, void *); 79 void (*unmask)(device_t, void *);
80}; 80};
81 81
82struct fdtbus_spi_controller_func { 82struct fdtbus_spi_controller_func {
83 struct spi_controller * (*get_controller)(device_t); 83 struct spi_controller * (*get_controller)(device_t);
84}; 84};
85 85
86struct fdtbus_gpio_controller; 86struct fdtbus_gpio_controller;
87 87
88struct fdtbus_gpio_pin { 88struct fdtbus_gpio_pin {
89 struct fdtbus_gpio_controller *gp_gc; 89 struct fdtbus_gpio_controller *gp_gc;
90 void *gp_priv; 90 void *gp_priv;
91}; 91};
92 92
93struct fdtbus_gpio_controller_func { 93struct fdtbus_gpio_controller_func {
94 void * (*acquire)(device_t, const void *, size_t, int); 94 void * (*acquire)(device_t, const void *, size_t, int);
95 void (*release)(device_t, void *); 95 void (*release)(device_t, void *);
96 int (*read)(device_t, void *, bool); 96 int (*read)(device_t, void *, bool);
97 void (*write)(device_t, void *, int, bool); 97 void (*write)(device_t, void *, int, bool);
98}; 98};
99 99
100struct fdtbus_pinctrl_controller; 100struct fdtbus_pinctrl_controller;
101 101
102struct fdtbus_pinctrl_pin { 102struct fdtbus_pinctrl_pin {
103 struct fdtbus_pinctrl_controller *pp_pc; 103 struct fdtbus_pinctrl_controller *pp_pc;
104 void *pp_priv; 104 void *pp_priv;
105}; 105};
106 106
107struct fdtbus_pinctrl_controller_func { 107struct fdtbus_pinctrl_controller_func {
108 int (*set_config)(device_t, const void *, size_t); 108 int (*set_config)(device_t, const void *, size_t);
109}; 109};
110 110
111struct fdtbus_iommu_func { 111struct fdtbus_iommu_func {
112 bus_dma_tag_t (*map)(device_t, const u_int *, bus_dma_tag_t); 112 bus_dma_tag_t (*map)(device_t, const u_int *, bus_dma_tag_t);
113}; 113};
114 114
115struct fdtbus_regulator_controller; 115struct fdtbus_regulator_controller;
116 116
117struct fdtbus_regulator { 117struct fdtbus_regulator {
118 struct fdtbus_regulator_controller *reg_rc; 118 struct fdtbus_regulator_controller *reg_rc;
119}; 119};
120 120
121struct fdtbus_regulator_controller_func { 121struct fdtbus_regulator_controller_func {
122 int (*acquire)(device_t); 122 int (*acquire)(device_t);
123 void (*release)(device_t); 123 void (*release)(device_t);
124 int (*enable)(device_t, bool); 124 int (*enable)(device_t, bool);
125 int (*set_voltage)(device_t, u_int, u_int); 125 int (*set_voltage)(device_t, u_int, u_int);
126 int (*get_voltage)(device_t, u_int *); 126 int (*get_voltage)(device_t, u_int *);
127}; 127};
128 128
129struct fdtbus_clock_controller_func { 129struct fdtbus_clock_controller_func {
130 struct clk * (*decode)(device_t, int, const void *, size_t); 130 struct clk * (*decode)(device_t, int, const void *, size_t);
131}; 131};
132 132
133struct fdtbus_reset_controller; 133struct fdtbus_reset_controller;
134 134
135struct fdtbus_reset { 135struct fdtbus_reset {
136 struct fdtbus_reset_controller *rst_rc; 136 struct fdtbus_reset_controller *rst_rc;
137 void *rst_priv; 137 void *rst_priv;
138}; 138};
139 139
140struct fdtbus_reset_controller_func { 140struct fdtbus_reset_controller_func {
141 void * (*acquire)(device_t, const void *, size_t); 141 void * (*acquire)(device_t, const void *, size_t);
142 void (*release)(device_t, void *); 142 void (*release)(device_t, void *);
143 int (*reset_assert)(device_t, void *); 143 int (*reset_assert)(device_t, void *);
144 int (*reset_deassert)(device_t, void *); 144 int (*reset_deassert)(device_t, void *);
145}; 145};
146 146
147struct fdtbus_dai_controller_func { 147struct fdtbus_dai_controller_func {
148 audio_dai_tag_t (*get_tag)(device_t, const void *, size_t); 148 audio_dai_tag_t (*get_tag)(device_t, const void *, size_t);
149}; 149};
150 150
151struct fdtbus_dma_controller; 151struct fdtbus_dma_controller;
152 152
153struct fdtbus_dma { 153struct fdtbus_dma {
154 struct fdtbus_dma_controller *dma_dc; 154 struct fdtbus_dma_controller *dma_dc;
155 void *dma_priv; 155 void *dma_priv;
156}; 156};
157 157
158enum fdtbus_dma_dir { 158enum fdtbus_dma_dir {
159 FDT_DMA_READ, /* device -> memory */ 159 FDT_DMA_READ, /* device -> memory */
160 FDT_DMA_WRITE /* memory -> device */ 160 FDT_DMA_WRITE /* memory -> device */
161}; 161};
162 162
163struct fdtbus_dma_opt { 163struct fdtbus_dma_opt {
164 int opt_bus_width; /* Bus width */ 164 int opt_bus_width; /* Bus width */
165 int opt_burst_len; /* Burst length */ 165 int opt_burst_len; /* Burst length */
166 int opt_swap; /* Enable data swapping */ 166 int opt_swap; /* Enable data swapping */
167 int opt_dblbuf; /* Enable double buffering */ 167 int opt_dblbuf; /* Enable double buffering */
168 int opt_wrap_len; /* Address wrap-around window */ 168 int opt_wrap_len; /* Address wrap-around window */
169}; 169};
170 170
171struct fdtbus_dma_req { 171struct fdtbus_dma_req {
172 bus_dma_segment_t *dreq_segs; /* Memory */ 172 bus_dma_segment_t *dreq_segs; /* Memory */
173 int dreq_nsegs; 173 int dreq_nsegs;
174 174
175 bus_addr_t dreq_dev_phys; /* Device */ 175 bus_addr_t dreq_dev_phys; /* Device */
176 int dreq_sel; /* Device selector */ 176 int dreq_sel; /* Device selector */
177 177
178 enum fdtbus_dma_dir dreq_dir; /* Transfer direction */ 178 enum fdtbus_dma_dir dreq_dir; /* Transfer direction */
179 179
180 int dreq_block_irq; /* Enable IRQ at end of block */ 180 int dreq_block_irq; /* Enable IRQ at end of block */
181 int dreq_block_multi; /* Enable multiple block transfers */ 181 int dreq_block_multi; /* Enable multiple block transfers */
182 int dreq_flow; /* Enable flow control */ 182 int dreq_flow; /* Enable flow control */
183 183
184 struct fdtbus_dma_opt dreq_mem_opt; /* Memory options */ 184 struct fdtbus_dma_opt dreq_mem_opt; /* Memory options */
185 struct fdtbus_dma_opt dreq_dev_opt; /* Device options */ 185 struct fdtbus_dma_opt dreq_dev_opt; /* Device options */
186}; 186};
187 187
188struct fdtbus_dma_controller_func { 188struct fdtbus_dma_controller_func {
189 void * (*acquire)(device_t, const void *, size_t, 189 void * (*acquire)(device_t, const void *, size_t,
190 void (*)(void *), void *); 190 void (*)(void *), void *);
191 void (*release)(device_t, void *); 191 void (*release)(device_t, void *);
192 int (*transfer)(device_t, void *, struct fdtbus_dma_req *); 192 int (*transfer)(device_t, void *, struct fdtbus_dma_req *);
193 void (*halt)(device_t, void *); 193 void (*halt)(device_t, void *);
194}; 194};
195 195
196struct fdtbus_power_controller; 196struct fdtbus_power_controller;
197 197
198struct fdtbus_power_controller_func { 198struct fdtbus_power_controller_func {
199 void (*reset)(device_t); 199 void (*reset)(device_t);
200 void (*poweroff)(device_t); 200 void (*poweroff)(device_t);
201}; 201};
202 202
203struct fdtbus_phy_controller; 203struct fdtbus_phy_controller;
204 204
205struct fdtbus_phy { 205struct fdtbus_phy {
206 struct fdtbus_phy_controller *phy_pc; 206 struct fdtbus_phy_controller *phy_pc;
207 void *phy_priv; 207 void *phy_priv;
208}; 208};
209 209
210struct fdtbus_phy_controller_func { 210struct fdtbus_phy_controller_func {
211 void * (*acquire)(device_t, const void *, size_t); 211 void * (*acquire)(device_t, const void *, size_t);
212 void (*release)(device_t, void *); 212 void (*release)(device_t, void *);
213 int (*enable)(device_t, void *, bool); 213 int (*enable)(device_t, void *, bool);
214}; 214};
215 215
216struct fdtbus_pwm_controller_func { 216struct fdtbus_pwm_controller_func {
217 pwm_tag_t (*get_tag)(device_t, const void *, size_t); 217 pwm_tag_t (*get_tag)(device_t, const void *, size_t);
218}; 218};
219 219
220struct fdtbus_mmc_pwrseq; 220struct fdtbus_mmc_pwrseq;
221 221
222struct fdtbus_mmc_pwrseq_func { 222struct fdtbus_mmc_pwrseq_func {
223 void (*pre_power_on)(device_t); 223 void (*pre_power_on)(device_t);
224 void (*post_power_on)(device_t); 224 void (*post_power_on)(device_t);
225 void (*power_off)(device_t); 225 void (*power_off)(device_t);
226 void (*reset)(device_t); 226 void (*reset)(device_t);
227}; 227};
228 228
229struct syscon; 229struct syscon;
230 230
231struct fdt_console { 231struct fdt_console {
232 int (*match)(int); 232 int (*match)(int);
233 void (*consinit)(struct fdt_attach_args *, u_int); 233 void (*consinit)(struct fdt_attach_args *, u_int);
234}; 234};
235 235
236struct fdt_console_info { 236struct fdt_console_info {
237 const struct fdt_console *ops; 237 const struct fdt_console *ops;
238}; 238};
239 239
240struct fdt_phandle_data { 240struct fdt_phandle_data {
241 int phandle; 241 int phandle;
242 int count; 242 int count;
243 const u_int *values; 243 const u_int *values;
244}; 244};
245 245
246#define _FDT_CONSOLE_REGISTER(name) \ 246#define _FDT_CONSOLE_REGISTER(name) \
247 __link_set_add_rodata(fdt_consoles, __CONCAT(name,_consinfo)); 247 __link_set_add_rodata(fdt_consoles, __CONCAT(name,_consinfo));
248 248
249#define FDT_CONSOLE(_name, _ops) \ 249#define FDT_CONSOLE(_name, _ops) \
250static const struct fdt_console_info __CONCAT(_name,_consinfo) = { \ 250static const struct fdt_console_info __CONCAT(_name,_consinfo) = { \
251 .ops = (_ops) \ 251 .ops = (_ops) \
252}; \ 252}; \
253_FDT_CONSOLE_REGISTER(_name) 253_FDT_CONSOLE_REGISTER(_name)
254 254
255struct fdt_opp_info { 255struct fdt_opp_info {
256 const char * opp_compat; 256 const char * opp_compat;
257 bool (*opp_supported)(const int, const int); 257 bool (*opp_supported)(const int, const int);
258}; 258};
259 259
260#define _FDT_OPP_REGISTER(name) \ 260#define _FDT_OPP_REGISTER(name) \
261 __link_set_add_rodata(fdt_opps, __CONCAT(name,_oppinfo)); 261 __link_set_add_rodata(fdt_opps, __CONCAT(name,_oppinfo));
262 262
263#define FDT_OPP(_name, _compat, _suppfn) \ 263#define FDT_OPP(_name, _compat, _suppfn) \
264static const struct fdt_opp_info __CONCAT(_name,_oppinfo) = { \ 264static const struct fdt_opp_info __CONCAT(_name,_oppinfo) = { \
265 .opp_compat = (_compat), \ 265 .opp_compat = (_compat), \
266 .opp_supported = (_suppfn) \ 266 .opp_supported = (_suppfn) \
267}; \ 267}; \
268_FDT_OPP_REGISTER(_name) 268_FDT_OPP_REGISTER(_name)
269 269
270TAILQ_HEAD(fdt_conslist, fdt_console_info); 270TAILQ_HEAD(fdt_conslist, fdt_console_info);
271 271
272struct fdt_dma_range { 272struct fdt_dma_range {
273 paddr_t dr_sysbase; 273 paddr_t dr_sysbase;
274 bus_addr_t dr_busbase; 274 bus_addr_t dr_busbase;
275 bus_size_t dr_len; 275 bus_size_t dr_len;
276}; 276};
277 277
278#define FDT_BUS_SPACE_FLAG_NONPOSTED_MMIO __BIT(0) 278#define FDT_BUS_SPACE_FLAG_NONPOSTED_MMIO __BIT(0)
279 279
280int fdtbus_register_interrupt_controller(device_t, int, 280int fdtbus_register_interrupt_controller(device_t, int,
281 const struct fdtbus_interrupt_controller_func *); 281 const struct fdtbus_interrupt_controller_func *);
282int fdtbus_register_i2c_controller(i2c_tag_t, int); 282int fdtbus_register_i2c_controller(i2c_tag_t, int);
283int fdtbus_register_spi_controller(device_t, int, 283int fdtbus_register_spi_controller(device_t, int,
284 const struct fdtbus_spi_controller_func *); 284 const struct fdtbus_spi_controller_func *);
285int fdtbus_register_gpio_controller(device_t, int, 285int fdtbus_register_gpio_controller(device_t, int,
286 const struct fdtbus_gpio_controller_func *); 286 const struct fdtbus_gpio_controller_func *);
287int fdtbus_register_pinctrl_config(device_t, int, 287int fdtbus_register_pinctrl_config(device_t, int,
288 const struct fdtbus_pinctrl_controller_func *); 288 const struct fdtbus_pinctrl_controller_func *);
289int fdtbus_register_regulator_controller(device_t, int, 289int fdtbus_register_regulator_controller(device_t, int,
290 const struct fdtbus_regulator_controller_func *); 290 const struct fdtbus_regulator_controller_func *);
291int fdtbus_register_clock_controller(device_t, int, 291int fdtbus_register_clock_controller(device_t, int,
292 const struct fdtbus_clock_controller_func *); 292 const struct fdtbus_clock_controller_func *);
293int fdtbus_register_reset_controller(device_t, int, 293int fdtbus_register_reset_controller(device_t, int,
294 const struct fdtbus_reset_controller_func *); 294 const struct fdtbus_reset_controller_func *);
295int fdtbus_register_dai_controller(device_t, int, 295int fdtbus_register_dai_controller(device_t, int,
296 const struct fdtbus_dai_controller_func *); 296 const struct fdtbus_dai_controller_func *);
297int fdtbus_register_dma_controller(device_t, int, 297int fdtbus_register_dma_controller(device_t, int,
298 const struct fdtbus_dma_controller_func *); 298 const struct fdtbus_dma_controller_func *);
299int fdtbus_register_power_controller(device_t, int, 299int fdtbus_register_power_controller(device_t, int,
300 const struct fdtbus_power_controller_func *); 300 const struct fdtbus_power_controller_func *);
301int fdtbus_register_phy_controller(device_t, int, 301int fdtbus_register_phy_controller(device_t, int,
302 const struct fdtbus_phy_controller_func *); 302 const struct fdtbus_phy_controller_func *);
303int fdtbus_register_pwm_controller(device_t, int, 303int fdtbus_register_pwm_controller(device_t, int,
304 const struct fdtbus_pwm_controller_func *); 304 const struct fdtbus_pwm_controller_func *);
305int fdtbus_register_mmc_pwrseq(device_t, int, 305int fdtbus_register_mmc_pwrseq(device_t, int,
306 const struct fdtbus_mmc_pwrseq_func *); 306 const struct fdtbus_mmc_pwrseq_func *);
307int fdtbus_register_syscon(device_t, int, struct syscon *); 307int fdtbus_register_syscon(device_t, int, struct syscon *);
308int fdtbus_register_iommu(device_t, int, 308int fdtbus_register_iommu(device_t, int,
309 const struct fdtbus_iommu_func *); 309 const struct fdtbus_iommu_func *);
310 310
311void fdtbus_set_decoderegprop(bool); 311void fdtbus_set_decoderegprop(bool);
312 312
313int fdtbus_get_reg(int, u_int, bus_addr_t *, bus_size_t *); 313int fdtbus_get_reg(int, u_int, bus_addr_t *, bus_size_t *);
314int fdtbus_get_reg_byname(int, const char *, bus_addr_t *, 314int fdtbus_get_reg_byname(int, const char *, bus_addr_t *,
315 bus_size_t *); 315 bus_size_t *);
316int fdtbus_get_reg64(int, u_int, uint64_t *, uint64_t *); 316int fdtbus_get_reg64(int, u_int, uint64_t *, uint64_t *);
317int fdtbus_get_addr_cells(int); 317int fdtbus_get_addr_cells(int);
318int fdtbus_get_size_cells(int); 318int fdtbus_get_size_cells(int);
319uint64_t fdtbus_get_cells(const uint8_t *, int); 319uint64_t fdtbus_get_cells(const uint8_t *, int);
320int fdtbus_get_phandle(int, const char *); 320int fdtbus_get_phandle(int, const char *);
321int fdtbus_get_phandle_with_data(int, const char *, const char *, 321int fdtbus_get_phandle_with_data(int, const char *, const char *,
322 int, struct fdt_phandle_data *); 322 int, struct fdt_phandle_data *);
323int fdtbus_get_phandle_from_native(int); 323int fdtbus_get_phandle_from_native(int);
324 324
325i2c_tag_t fdtbus_get_i2c_tag(int); 325i2c_tag_t fdtbus_i2c_get_tag(int);
326i2c_tag_t fdtbus_i2c_acquire(int, const char *); 326i2c_tag_t fdtbus_i2c_acquire(int, const char *);
327 327
328void * fdtbus_intr_establish(int, u_int, int, int, 328void * fdtbus_intr_establish(int, u_int, int, int,
329 int (*func)(void *), void *arg); 329 int (*func)(void *), void *arg);
330void * fdtbus_intr_establish_xname(int, u_int, int, int, 330void * fdtbus_intr_establish_xname(int, u_int, int, int,
331 int (*func)(void *), void *arg, const char *); 331 int (*func)(void *), void *arg, const char *);
332void * fdtbus_intr_establish_byname(int, const char *, int, int, 332void * fdtbus_intr_establish_byname(int, const char *, int, int,
333 int (*func)(void *), void *arg, const char *); 333 int (*func)(void *), void *arg, const char *);
334void * fdtbus_intr_establish_raw(int, const u_int *, int, int, 334void * fdtbus_intr_establish_raw(int, const u_int *, int, int,
335 int (*func)(void *), void *arg, const char *); 335 int (*func)(void *), void *arg, const char *);
336void fdtbus_intr_mask(int, void *); 336void fdtbus_intr_mask(int, void *);
337void fdtbus_intr_unmask(int, void *); 337void fdtbus_intr_unmask(int, void *);
338void fdtbus_intr_disestablish(int, void *); 338void fdtbus_intr_disestablish(int, void *);
339bool fdtbus_intr_str(int, u_int, char *, size_t); 339bool fdtbus_intr_str(int, u_int, char *, size_t);
340bool fdtbus_intr_str_raw(int, const u_int *, char *, size_t); 340bool fdtbus_intr_str_raw(int, const u_int *, char *, size_t);
341int fdtbus_intr_parent(int); 341int fdtbus_intr_parent(int);
342 342
343int fdtbus_gpio_count(int, const char *); 343int fdtbus_gpio_count(int, const char *);
344struct fdtbus_gpio_pin * 344struct fdtbus_gpio_pin *
345 fdtbus_gpio_acquire(int, const char *, int); 345 fdtbus_gpio_acquire(int, const char *, int);
346struct fdtbus_gpio_pin * 346struct fdtbus_gpio_pin *
347 fdtbus_gpio_acquire_index(int, const char *, int, int); 347 fdtbus_gpio_acquire_index(int, const char *, int, int);
348void fdtbus_gpio_release(struct fdtbus_gpio_pin *); 348void fdtbus_gpio_release(struct fdtbus_gpio_pin *);
349int fdtbus_gpio_read(struct fdtbus_gpio_pin *); 349int fdtbus_gpio_read(struct fdtbus_gpio_pin *);
350void fdtbus_gpio_write(struct fdtbus_gpio_pin *, int); 350void fdtbus_gpio_write(struct fdtbus_gpio_pin *, int);
351int fdtbus_gpio_read_raw(struct fdtbus_gpio_pin *); 351int fdtbus_gpio_read_raw(struct fdtbus_gpio_pin *);
352void fdtbus_gpio_write_raw(struct fdtbus_gpio_pin *, int); 352void fdtbus_gpio_write_raw(struct fdtbus_gpio_pin *, int);
353 353
354audio_dai_tag_t fdtbus_dai_acquire(int, const char *); 354audio_dai_tag_t fdtbus_dai_acquire(int, const char *);
355audio_dai_tag_t fdtbus_dai_acquire_index(int, const char *, int); 355audio_dai_tag_t fdtbus_dai_acquire_index(int, const char *, int);
356 356
357pwm_tag_t fdtbus_pwm_acquire(int, const char *); 357pwm_tag_t fdtbus_pwm_acquire(int, const char *);
358pwm_tag_t fdtbus_pwm_acquire_index(int, const char *, int); 358pwm_tag_t fdtbus_pwm_acquire_index(int, const char *, int);
359 359
360int fdtbus_pinctrl_set_config_index(int, u_int); 360int fdtbus_pinctrl_set_config_index(int, u_int);
361int fdtbus_pinctrl_set_config(int, const char *); 361int fdtbus_pinctrl_set_config(int, const char *);
362bool fdtbus_pinctrl_has_config(int, const char *); 362bool fdtbus_pinctrl_has_config(int, const char *);
363const char * fdtbus_pinctrl_parse_function(int); 363const char * fdtbus_pinctrl_parse_function(int);
364const void * fdtbus_pinctrl_parse_pins(int, int *); 364const void * fdtbus_pinctrl_parse_pins(int, int *);
365const char * fdtbus_pinctrl_parse_groups(int, int *); 365const char * fdtbus_pinctrl_parse_groups(int, int *);
366const u_int * fdtbus_pinctrl_parse_pinmux(int, int *); 366const u_int * fdtbus_pinctrl_parse_pinmux(int, int *);
367int fdtbus_pinctrl_parse_bias(int, int *); 367int fdtbus_pinctrl_parse_bias(int, int *);
368int fdtbus_pinctrl_parse_drive(int); 368int fdtbus_pinctrl_parse_drive(int);
369int fdtbus_pinctrl_parse_drive_strength(int); 369int fdtbus_pinctrl_parse_drive_strength(int);
370int fdtbus_pinctrl_parse_input_output(int, int *); 370int fdtbus_pinctrl_parse_input_output(int, int *);
371 371
372struct fdtbus_regulator * 372struct fdtbus_regulator *
373 fdtbus_regulator_acquire(int, const char *); 373 fdtbus_regulator_acquire(int, const char *);
374void fdtbus_regulator_release(struct fdtbus_regulator *); 374void fdtbus_regulator_release(struct fdtbus_regulator *);
375int fdtbus_regulator_enable(struct fdtbus_regulator *); 375int fdtbus_regulator_enable(struct fdtbus_regulator *);
376int fdtbus_regulator_disable(struct fdtbus_regulator *); 376int fdtbus_regulator_disable(struct fdtbus_regulator *);
377int fdtbus_regulator_set_voltage(struct fdtbus_regulator *, 377int fdtbus_regulator_set_voltage(struct fdtbus_regulator *,
378 u_int, u_int); 378 u_int, u_int);
379int fdtbus_regulator_get_voltage(struct fdtbus_regulator *, 379int fdtbus_regulator_get_voltage(struct fdtbus_regulator *,
380 u_int *); 380 u_int *);
381int fdtbus_regulator_supports_voltage(struct fdtbus_regulator *, 381int fdtbus_regulator_supports_voltage(struct fdtbus_regulator *,
382 u_int, u_int); 382 u_int, u_int);
383 383
384struct syscon * fdtbus_syscon_acquire(int, const char *); 384struct syscon * fdtbus_syscon_acquire(int, const char *);
385struct syscon * fdtbus_syscon_lookup(int); 385struct syscon * fdtbus_syscon_lookup(int);
386 386
387bus_dma_tag_t fdtbus_iommu_map(int, u_int, bus_dma_tag_t); 387bus_dma_tag_t fdtbus_iommu_map(int, u_int, bus_dma_tag_t);
388bus_dma_tag_t fdtbus_iommu_map_pci(int, uint32_t, bus_dma_tag_t); 388bus_dma_tag_t fdtbus_iommu_map_pci(int, uint32_t, bus_dma_tag_t);
389 389
390struct fdtbus_dma * 390struct fdtbus_dma *
391 fdtbus_dma_get(int, const char *, void (*)(void *), void *); 391 fdtbus_dma_get(int, const char *, void (*)(void *), void *);
392struct fdtbus_dma * 392struct fdtbus_dma *
393 fdtbus_dma_get_index(int, u_int, void (*)(void *), 393 fdtbus_dma_get_index(int, u_int, void (*)(void *),
394 void *); 394 void *);
395void fdtbus_dma_put(struct fdtbus_dma *); 395void fdtbus_dma_put(struct fdtbus_dma *);
396int fdtbus_dma_transfer(struct fdtbus_dma *, 396int fdtbus_dma_transfer(struct fdtbus_dma *,
397 struct fdtbus_dma_req *); 397 struct fdtbus_dma_req *);
398void fdtbus_dma_halt(struct fdtbus_dma *); 398void fdtbus_dma_halt(struct fdtbus_dma *);
399 399
400struct clk * fdtbus_clock_get(int, const char *); 400struct clk * fdtbus_clock_get(int, const char *);
401struct clk * fdtbus_clock_get_index(int, u_int); 401struct clk * fdtbus_clock_get_index(int, u_int);
402struct clk * fdtbus_clock_byname(const char *); 402struct clk * fdtbus_clock_byname(const char *);
403void fdtbus_clock_assign(int); 403void fdtbus_clock_assign(int);
404u_int fdtbus_clock_count(int, const char *); 404u_int fdtbus_clock_count(int, const char *);
405int fdtbus_clock_enable(int, const char *, bool); 405int fdtbus_clock_enable(int, const char *, bool);
406int fdtbus_clock_enable_index(int, u_int, bool); 406int fdtbus_clock_enable_index(int, u_int, bool);
407 407
408struct fdtbus_reset * 408struct fdtbus_reset *
409 fdtbus_reset_get(int, const char *); 409 fdtbus_reset_get(int, const char *);
410struct fdtbus_reset * 410struct fdtbus_reset *
411 fdtbus_reset_get_index(int, u_int); 411 fdtbus_reset_get_index(int, u_int);
412void fdtbus_reset_put(struct fdtbus_reset *); 412void fdtbus_reset_put(struct fdtbus_reset *);
413int fdtbus_reset_assert(struct fdtbus_reset *); 413int fdtbus_reset_assert(struct fdtbus_reset *);
414int fdtbus_reset_deassert(struct fdtbus_reset *); 414int fdtbus_reset_deassert(struct fdtbus_reset *);
415 415
416struct fdtbus_phy * 416struct fdtbus_phy *
417 fdtbus_phy_get(int, const char *); 417 fdtbus_phy_get(int, const char *);
418struct fdtbus_phy * 418struct fdtbus_phy *
419 fdtbus_phy_get_index(int, u_int); 419 fdtbus_phy_get_index(int, u_int);
420void fdtbus_phy_put(struct fdtbus_phy *); 420void fdtbus_phy_put(struct fdtbus_phy *);
421device_t fdtbus_phy_device(struct fdtbus_phy *); 421device_t fdtbus_phy_device(struct fdtbus_phy *);
422int fdtbus_phy_enable(struct fdtbus_phy *, bool); 422int fdtbus_phy_enable(struct fdtbus_phy *, bool);
423 423
424struct fdtbus_mmc_pwrseq * 424struct fdtbus_mmc_pwrseq *
425 fdtbus_mmc_pwrseq_get(int); 425 fdtbus_mmc_pwrseq_get(int);
426void fdtbus_mmc_pwrseq_pre_power_on(struct fdtbus_mmc_pwrseq *); 426void fdtbus_mmc_pwrseq_pre_power_on(struct fdtbus_mmc_pwrseq *);
427void fdtbus_mmc_pwrseq_post_power_on(struct fdtbus_mmc_pwrseq *); 427void fdtbus_mmc_pwrseq_post_power_on(struct fdtbus_mmc_pwrseq *);
428void fdtbus_mmc_pwrseq_power_off(struct fdtbus_mmc_pwrseq *); 428void fdtbus_mmc_pwrseq_power_off(struct fdtbus_mmc_pwrseq *);
429void fdtbus_mmc_pwrseq_reset(struct fdtbus_mmc_pwrseq *); 429void fdtbus_mmc_pwrseq_reset(struct fdtbus_mmc_pwrseq *);
430 430
431int fdtbus_todr_attach(device_t, int, todr_chip_handle_t); 431int fdtbus_todr_attach(device_t, int, todr_chip_handle_t);
432 432
433void fdtbus_power_reset(void); 433void fdtbus_power_reset(void);
434void fdtbus_power_poweroff(void); 434void fdtbus_power_poweroff(void);
435 435
436device_t fdtbus_attach_i2cbus(device_t, int, i2c_tag_t, cfprint_t); 436device_t fdtbus_attach_i2cbus(device_t, int, i2c_tag_t, cfprint_t);
437device_t fdtbus_attach_spibus(device_t, int, cfprint_t); 437device_t fdtbus_attach_spibus(device_t, int, cfprint_t);
438 438
439bool fdtbus_init(const void *); 439bool fdtbus_init(const void *);
440const void * fdtbus_get_data(void); 440const void * fdtbus_get_data(void);
441int fdtbus_phandle2offset(int); 441int fdtbus_phandle2offset(int);
442int fdtbus_offset2phandle(int); 442int fdtbus_offset2phandle(int);
443bool fdtbus_get_path(int, char *, size_t); 443bool fdtbus_get_path(int, char *, size_t);
444 444
445const struct fdt_console * 445const struct fdt_console *
446 fdtbus_get_console(void); 446 fdtbus_get_console(void);
447 447
448const char * fdtbus_get_stdout_path(void); 448const char * fdtbus_get_stdout_path(void);
449int fdtbus_get_stdout_phandle(void); 449int fdtbus_get_stdout_phandle(void);
450int fdtbus_get_stdout_speed(void); 450int fdtbus_get_stdout_speed(void);
451tcflag_t fdtbus_get_stdout_flags(void); 451tcflag_t fdtbus_get_stdout_flags(void);
452 452
453bool fdtbus_status_okay(int); 453bool fdtbus_status_okay(int);
454 454
455const void * fdtbus_get_prop(int, const char *, int *); 455const void * fdtbus_get_prop(int, const char *, int *);
456const char * fdtbus_get_string(int, const char *); 456const char * fdtbus_get_string(int, const char *);
457const char * fdtbus_get_string_index(int, const char *, u_int); 457const char * fdtbus_get_string_index(int, const char *, u_int);
458int fdtbus_get_index(int, const char *, const char *, u_int *); 458int fdtbus_get_index(int, const char *, const char *, u_int *);
459 459
460void fdt_add_bus(device_t, int, struct fdt_attach_args *); 460void fdt_add_bus(device_t, int, struct fdt_attach_args *);
461void fdt_add_bus_match(device_t, int, struct fdt_attach_args *, 461void fdt_add_bus_match(device_t, int, struct fdt_attach_args *,
462 bool (*)(void *, int), void *); 462 bool (*)(void *, int), void *);
463void fdt_add_child(device_t, int, struct fdt_attach_args *, u_int); 463void fdt_add_child(device_t, int, struct fdt_attach_args *, u_int);
464 464
465void fdt_remove_byhandle(int); 465void fdt_remove_byhandle(int);
466void fdt_remove_bycompat(const char *[]); 466void fdt_remove_bycompat(const char *[]);
467int fdt_find_with_property(const char *, int *); 467int fdt_find_with_property(const char *, int *);
468 468
469int fdtbus_print(void *, const char *); 469int fdtbus_print(void *, const char *);
470 470
471bus_dma_tag_t fdtbus_dma_tag_create(int, const struct fdt_dma_range *, 471bus_dma_tag_t fdtbus_dma_tag_create(int, const struct fdt_dma_range *,
472 u_int); 472 u_int);
473bus_space_tag_t fdtbus_bus_tag_create(int, uint32_t); 473bus_space_tag_t fdtbus_bus_tag_create(int, uint32_t);
474 474
475#endif /* _DEV_FDT_FDTVAR_H_ */ 475#endif /* _DEV_FDT_FDTVAR_H_ */