| @@ -1,214 +1,214 @@ | | | @@ -1,214 +1,214 @@ |
1 | /* $NetBSD: db_machdep.c,v 1.9 2021/02/23 07:13:52 mrg Exp $ */ | | 1 | /* $NetBSD: db_machdep.c,v 1.10 2022/02/24 08:06:41 skrll Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2010 The NetBSD Foundation, Inc. | | 4 | * Copyright (c) 2010 The NetBSD Foundation, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation | | 7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Nick Hudson | | 8 | * by Nick Hudson |
9 | * | | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | | 10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions | | 11 | * modification, are permitted provided that the following conditions |
12 | * are met: | | 12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright | | 13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. | | 14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright | | 15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the | | 16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. | | 17 | * documentation and/or other materials provided with the distribution. |
18 | * | | 18 | * |
19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS | | 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | | 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
29 | * POSSIBILITY OF SUCH DAMAGE. | | 29 | * POSSIBILITY OF SUCH DAMAGE. |
30 | */ | | 30 | */ |
31 | | | 31 | |
32 | #include <sys/cdefs.h> | | 32 | #include <sys/cdefs.h> |
33 | __KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.9 2021/02/23 07:13:52 mrg Exp $"); | | 33 | __KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.10 2022/02/24 08:06:41 skrll Exp $"); |
34 | | | 34 | |
35 | #include <sys/param.h> | | 35 | #include <sys/param.h> |
36 | #include <sys/lwp.h> | | 36 | #include <sys/lwp.h> |
37 | | | 37 | |
38 | #include <machine/db_machdep.h> | | 38 | #include <machine/db_machdep.h> |
39 | #include <machine/psl.h> | | 39 | #include <machine/psl.h> |
40 | | | 40 | |
41 | #include <ddb/db_command.h> | | 41 | #include <ddb/db_command.h> |
42 | #include <ddb/db_output.h> | | 42 | #include <ddb/db_output.h> |
43 | #include <ddb/db_variables.h> | | 43 | #include <ddb/db_variables.h> |
44 | #include <ddb/db_access.h> | | 44 | #include <ddb/db_access.h> |
45 | | | 45 | |
46 | #ifndef _KERNEL | | 46 | #ifndef _KERNEL |
47 | #include <util.h> | | 47 | #include <util.h> |
48 | #endif | | 48 | #endif |
49 | | | 49 | |
50 | db_regs_t ddb_regs; | | 50 | db_regs_t ddb_regs; |
51 | const struct db_variable db_regs[] = { | | 51 | const struct db_variable db_regs[] = { |
52 | { "flags", (long *)&ddb_regs.tf_flags, FCN_NULL, NULL }, | | 52 | { "flags", (long *)&ddb_regs.tf_flags, FCN_NULL, NULL }, |
53 | { "r1", (long *)&ddb_regs.tf_r1, FCN_NULL, NULL }, | | 53 | { "r1", (long *)&ddb_regs.tf_r1, FCN_NULL, NULL }, |
54 | { "r2(rp)", (long *)&ddb_regs.tf_rp, FCN_NULL, NULL }, | | 54 | { "r2(rp)", (long *)&ddb_regs.tf_rp, FCN_NULL, NULL }, |
55 | { "r3(fp)", (long *)&ddb_regs.tf_r3, FCN_NULL, NULL }, | | 55 | { "r3(fp)", (long *)&ddb_regs.tf_r3, FCN_NULL, NULL }, |
56 | { "r4", (long *)&ddb_regs.tf_r4, FCN_NULL, NULL }, | | 56 | { "r4", (long *)&ddb_regs.tf_r4, FCN_NULL, NULL }, |
57 | { "r5", (long *)&ddb_regs.tf_r5, FCN_NULL, NULL }, | | 57 | { "r5", (long *)&ddb_regs.tf_r5, FCN_NULL, NULL }, |
58 | { "r6", (long *)&ddb_regs.tf_r6, FCN_NULL, NULL }, | | 58 | { "r6", (long *)&ddb_regs.tf_r6, FCN_NULL, NULL }, |
59 | { "r7", (long *)&ddb_regs.tf_r7, FCN_NULL, NULL }, | | 59 | { "r7", (long *)&ddb_regs.tf_r7, FCN_NULL, NULL }, |
60 | { "r8", (long *)&ddb_regs.tf_r8, FCN_NULL, NULL }, | | 60 | { "r8", (long *)&ddb_regs.tf_r8, FCN_NULL, NULL }, |
61 | { "r9", (long *)&ddb_regs.tf_r9, FCN_NULL, NULL }, | | 61 | { "r9", (long *)&ddb_regs.tf_r9, FCN_NULL, NULL }, |
62 | { "r10", (long *)&ddb_regs.tf_r10, FCN_NULL, NULL }, | | 62 | { "r10", (long *)&ddb_regs.tf_r10, FCN_NULL, NULL }, |
63 | { "r11", (long *)&ddb_regs.tf_r11, FCN_NULL, NULL }, | | 63 | { "r11", (long *)&ddb_regs.tf_r11, FCN_NULL, NULL }, |
64 | { "r12", (long *)&ddb_regs.tf_r12, FCN_NULL, NULL }, | | 64 | { "r12", (long *)&ddb_regs.tf_r12, FCN_NULL, NULL }, |
65 | { "r13", (long *)&ddb_regs.tf_r13, FCN_NULL, NULL }, | | 65 | { "r13", (long *)&ddb_regs.tf_r13, FCN_NULL, NULL }, |
66 | { "r14", (long *)&ddb_regs.tf_r14, FCN_NULL, NULL }, | | 66 | { "r14", (long *)&ddb_regs.tf_r14, FCN_NULL, NULL }, |
67 | { "r15", (long *)&ddb_regs.tf_r15, FCN_NULL, NULL }, | | 67 | { "r15", (long *)&ddb_regs.tf_r15, FCN_NULL, NULL }, |
68 | { "r16", (long *)&ddb_regs.tf_r16, FCN_NULL, NULL }, | | 68 | { "r16", (long *)&ddb_regs.tf_r16, FCN_NULL, NULL }, |
69 | { "r17", (long *)&ddb_regs.tf_r17, FCN_NULL, NULL }, | | 69 | { "r17", (long *)&ddb_regs.tf_r17, FCN_NULL, NULL }, |
70 | { "r18", (long *)&ddb_regs.tf_r18, FCN_NULL, NULL }, | | 70 | { "r18", (long *)&ddb_regs.tf_r18, FCN_NULL, NULL }, |
71 | { "r19(t4)", (long *)&ddb_regs.tf_t4, FCN_NULL, NULL }, | | 71 | { "r19(t4)", (long *)&ddb_regs.tf_t4, FCN_NULL, NULL }, |
72 | { "r20(t3)", (long *)&ddb_regs.tf_t3, FCN_NULL, NULL }, | | 72 | { "r20(t3)", (long *)&ddb_regs.tf_t3, FCN_NULL, NULL }, |
73 | { "r21(t2)", (long *)&ddb_regs.tf_t2, FCN_NULL, NULL }, | | 73 | { "r21(t2)", (long *)&ddb_regs.tf_t2, FCN_NULL, NULL }, |
74 | { "r22(t1)", (long *)&ddb_regs.tf_t1, FCN_NULL, NULL }, | | 74 | { "r22(t1)", (long *)&ddb_regs.tf_t1, FCN_NULL, NULL }, |
75 | { "r23(arg3)", (long *)&ddb_regs.tf_arg3, FCN_NULL, NULL }, | | 75 | { "r23(arg3)", (long *)&ddb_regs.tf_arg3, FCN_NULL, NULL }, |
76 | { "r24(arg2)", (long *)&ddb_regs.tf_arg2, FCN_NULL, NULL }, | | 76 | { "r24(arg2)", (long *)&ddb_regs.tf_arg2, FCN_NULL, NULL }, |
77 | { "r25(arg1)", (long *)&ddb_regs.tf_arg1, FCN_NULL, NULL }, | | 77 | { "r25(arg1)", (long *)&ddb_regs.tf_arg1, FCN_NULL, NULL }, |
78 | { "r26(arg0)", (long *)&ddb_regs.tf_arg0, FCN_NULL, NULL }, | | 78 | { "r26(arg0)", (long *)&ddb_regs.tf_arg0, FCN_NULL, NULL }, |
79 | { "r27(dp)", (long *)&ddb_regs.tf_dp, FCN_NULL, NULL }, | | 79 | { "r27(dp)", (long *)&ddb_regs.tf_dp, FCN_NULL, NULL }, |
80 | { "r28(ret0)", (long *)&ddb_regs.tf_ret0, FCN_NULL, NULL }, | | 80 | { "r28(ret0)", (long *)&ddb_regs.tf_ret0, FCN_NULL, NULL }, |
81 | { "r29(ret1)", (long *)&ddb_regs.tf_ret1, FCN_NULL, NULL }, | | 81 | { "r29(ret1)", (long *)&ddb_regs.tf_ret1, FCN_NULL, NULL }, |
82 | { "r30(sp)", (long *)&ddb_regs.tf_sp, FCN_NULL, NULL }, | | 82 | { "r30(sp)", (long *)&ddb_regs.tf_sp, FCN_NULL, NULL }, |
83 | { "r31", (long *)&ddb_regs.tf_r31, FCN_NULL, NULL }, | | 83 | { "r31", (long *)&ddb_regs.tf_r31, FCN_NULL, NULL }, |
84 | | | 84 | |
85 | { "sar", (long *)&ddb_regs.tf_sar, FCN_NULL, NULL }, | | 85 | { "sar", (long *)&ddb_regs.tf_sar, FCN_NULL, NULL }, |
86 | | | 86 | |
87 | { "eirr", (long *)&ddb_regs.tf_eirr, FCN_NULL, NULL }, | | 87 | { "eirr", (long *)&ddb_regs.tf_eirr, FCN_NULL, NULL }, |
88 | { "eiem", (long *)&ddb_regs.tf_eiem, FCN_NULL, NULL }, | | 88 | { "eiem", (long *)&ddb_regs.tf_eiem, FCN_NULL, NULL }, |
89 | { "iir", (long *)&ddb_regs.tf_iir, FCN_NULL, NULL }, | | 89 | { "iir", (long *)&ddb_regs.tf_iir, FCN_NULL, NULL }, |
90 | { "isr", (long *)&ddb_regs.tf_isr, FCN_NULL, NULL }, | | 90 | { "isr", (long *)&ddb_regs.tf_isr, FCN_NULL, NULL }, |
91 | { "ior", (long *)&ddb_regs.tf_ior, FCN_NULL, NULL }, | | 91 | { "ior", (long *)&ddb_regs.tf_ior, FCN_NULL, NULL }, |
92 | { "ipsw", (long *)&ddb_regs.tf_ipsw, FCN_NULL, NULL }, | | 92 | { "ipsw", (long *)&ddb_regs.tf_ipsw, FCN_NULL, NULL }, |
93 | { "iisqh", (long *)&ddb_regs.tf_iisq_head, FCN_NULL, NULL }, | | 93 | { "iisqh", (long *)&ddb_regs.tf_iisq_head, FCN_NULL, NULL }, |
94 | { "iioqh", (long *)&ddb_regs.tf_iioq_head, FCN_NULL, NULL }, | | 94 | { "iioqh", (long *)&ddb_regs.tf_iioq_head, FCN_NULL, NULL }, |
95 | { "iisqt", (long *)&ddb_regs.tf_iisq_tail, FCN_NULL, NULL }, | | 95 | { "iisqt", (long *)&ddb_regs.tf_iisq_tail, FCN_NULL, NULL }, |
96 | { "iioqt", (long *)&ddb_regs.tf_iioq_tail, FCN_NULL, NULL }, | | 96 | { "iioqt", (long *)&ddb_regs.tf_iioq_tail, FCN_NULL, NULL }, |
97 | | | 97 | |
98 | { "sr0", (long *)&ddb_regs.tf_sr0, FCN_NULL, NULL }, | | 98 | { "sr0", (long *)&ddb_regs.tf_sr0, FCN_NULL, NULL }, |
99 | { "sr1", (long *)&ddb_regs.tf_sr1, FCN_NULL, NULL }, | | 99 | { "sr1", (long *)&ddb_regs.tf_sr1, FCN_NULL, NULL }, |
100 | { "sr2", (long *)&ddb_regs.tf_sr2, FCN_NULL, NULL }, | | 100 | { "sr2", (long *)&ddb_regs.tf_sr2, FCN_NULL, NULL }, |
101 | { "sr3", (long *)&ddb_regs.tf_sr3, FCN_NULL, NULL }, | | 101 | { "sr3", (long *)&ddb_regs.tf_sr3, FCN_NULL, NULL }, |
102 | { "sr4", (long *)&ddb_regs.tf_sr4, FCN_NULL, NULL }, | | 102 | { "sr4", (long *)&ddb_regs.tf_sr4, FCN_NULL, NULL }, |
103 | { "sr5", (long *)&ddb_regs.tf_sr5, FCN_NULL, NULL }, | | 103 | { "sr5", (long *)&ddb_regs.tf_sr5, FCN_NULL, NULL }, |
104 | { "sr6", (long *)&ddb_regs.tf_sr6, FCN_NULL, NULL }, | | 104 | { "sr6", (long *)&ddb_regs.tf_sr6, FCN_NULL, NULL }, |
105 | { "sr7", (long *)&ddb_regs.tf_sr7, FCN_NULL, NULL }, | | 105 | { "sr7", (long *)&ddb_regs.tf_sr7, FCN_NULL, NULL }, |
106 | | | 106 | |
107 | { "pidr1", (long *)&ddb_regs.tf_pidr1, FCN_NULL, NULL }, | | 107 | { "pidr1", (long *)&ddb_regs.tf_pidr1, FCN_NULL, NULL }, |
108 | { "pidr2", (long *)&ddb_regs.tf_pidr2, FCN_NULL, NULL }, | | 108 | { "pidr2", (long *)&ddb_regs.tf_pidr2, FCN_NULL, NULL }, |
109 | #ifdef pbably_not_worth_it | | 109 | #ifdef pbably_not_worth_it |
110 | { "pidr3", (long *)&ddb_regs.tf_pidr3, FCN_NULL, NULL }, | | 110 | { "pidr3", (long *)&ddb_regs.tf_pidr3, FCN_NULL, NULL }, |
111 | { "pidr4", (long *)&ddb_regs.tf_pidr4, FCN_NULL, NULL }, | | 111 | { "pidr4", (long *)&ddb_regs.tf_pidr4, FCN_NULL, NULL }, |
112 | #endif | | 112 | #endif |
113 | | | 113 | |
114 | { "vtop", (long *)&ddb_regs.tf_vtop, FCN_NULL, NULL }, | | 114 | { "vtop", (long *)&ddb_regs.tf_vtop, FCN_NULL, NULL }, |
115 | { "cr24", (long *)&ddb_regs.tf_cr24, FCN_NULL, NULL }, | | 115 | { "cr24", (long *)&ddb_regs.tf_cr24, FCN_NULL, NULL }, |
116 | { "cr27", (long *)&ddb_regs.tf_cr27, FCN_NULL, NULL }, | | 116 | { "cr27", (long *)&ddb_regs.tf_cr27, FCN_NULL, NULL }, |
117 | { "cr28", (long *)&ddb_regs.tf_cr28, FCN_NULL, NULL }, | | 117 | { "cr28", (long *)&ddb_regs.tf_cr28, FCN_NULL, NULL }, |
118 | { "cr30", (long *)&ddb_regs.tf_cr30, FCN_NULL, NULL }, | | 118 | { "cr30", (long *)&ddb_regs.tf_cr30, FCN_NULL, NULL }, |
119 | }; | | 119 | }; |
120 | const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]); | | 120 | const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]); |
121 | | | 121 | |
122 | const struct db_command db_machine_command_table[] = { | | 122 | const struct db_command db_machine_command_table[] = { |
123 | { DDB_ADD_CMD("frame", db_dump_trap, 0, | | 123 | { DDB_ADD_CMD("frame", db_dump_trap, 0, |
124 | "Displays the contents of a trapframe", | | 124 | "Displays the contents of a trapframe", |
125 | "[/l] [addr]", | | 125 | "[/l] [addr]", |
126 | " addr:\tdisplay this trap frame (current kernel frame otherwise)\n" | | 126 | " addr:\tdisplay this trap frame (current kernel frame otherwise)\n" |
127 | " /l:\tdisplay the trap frame from lwp") }, | | 127 | " /l:\tdisplay the trap frame from lwp") }, |
128 | { DDB_END_CMD }, | | 128 | { DDB_END_CMD }, |
129 | }; | | 129 | }; |
130 | | | 130 | |
131 | void | | 131 | void |
132 | db_dump_trap(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif) | | 132 | db_dump_trap(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif) |
133 | { | | 133 | { |
134 | struct trapframe *tf, *ktf, ltf; | | 134 | struct trapframe *tf, *ktf, ltf; |
135 | const char *cp = modif; | | 135 | const char *cp = modif; |
136 | bool lwpaddr = false; | | 136 | bool lwpaddr = false; |
137 | char c; | | 137 | char c; |
138 | char buf[64]; | | 138 | char buf[64]; |
139 | | | 139 | |
140 | tf = DDB_REGS; | | 140 | tf = DDB_REGS; |
141 | while ((c = *cp++) != 0) { | | 141 | while ((c = *cp++) != 0) { |
142 | if (c == 'l') | | 142 | if (c == 'l') |
143 | lwpaddr = true; | | 143 | lwpaddr = true; |
144 | } | | 144 | } |
145 | | | 145 | |
146 | /* Or an arbitrary trapframe */ | | 146 | /* Or an arbitrary trapframe */ |
147 | if (have_addr) { | | 147 | if (have_addr) { |
148 | if (lwpaddr) { | | 148 | if (lwpaddr) { |
149 | lwp_t l; | | 149 | lwp_t l; |
150 | | | 150 | |
151 | db_read_bytes(addr, sizeof(l), (char *)&l); | | 151 | db_read_bytes(addr, sizeof(l), (char *)&l); |
152 | ktf = (struct trapframe *)l.l_md.md_regs; | | 152 | ktf = (struct trapframe *)l.l_md.md_regs; |
153 | } else { | | 153 | } else { |
154 | ktf = (struct trapframe *)addr; | | 154 | ktf = (struct trapframe *)addr; |
155 | } | | 155 | } |
156 | db_read_bytes((db_addr_t)ktf, sizeof(ltf), (char *)<f); | | 156 | db_read_bytes((db_addr_t)ktf, sizeof(ltf), (char *)<f); |
157 | tf = <f; | | 157 | tf = <f; |
158 | } | | 158 | } |
159 | | | 159 | |
160 | db_printf("General registers\n"); | | 160 | db_printf("General registers\n"); |
161 | db_printf("r00-03 %08x %08x %08x %08x\n", | | 161 | db_printf("r00-03 %08x %08x %08x %08x\n", |
162 | 0, tf->tf_r1, tf->tf_rp, tf->tf_r3); | | 162 | 0, tf->tf_r1, tf->tf_rp, tf->tf_r3); |
163 | db_printf("r04-07 %08x %08x %08x %08x\n", | | 163 | db_printf("r04-07 %08x %08x %08x %08x\n", |
164 | tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7); | | 164 | tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7); |
165 | db_printf("r08-11 %08x %08x %08x %08x\n", | | 165 | db_printf("r08-11 %08x %08x %08x %08x\n", |
166 | tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11); | | 166 | tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11); |
167 | db_printf("r12-15 %08x %08x %08x %08x\n", | | 167 | db_printf("r12-15 %08x %08x %08x %08x\n", |
168 | tf->tf_r12, tf->tf_r13, tf->tf_r14, tf->tf_r15); | | 168 | tf->tf_r12, tf->tf_r13, tf->tf_r14, tf->tf_r15); |
169 | db_printf("r16-19 %08x %08x %08x %08x\n", | | 169 | db_printf("r16-19 %08x %08x %08x %08x\n", |
170 | tf->tf_r16, tf->tf_r17, tf->tf_r18, tf->tf_t4); | | 170 | tf->tf_r16, tf->tf_r17, tf->tf_r18, tf->tf_t4); |
171 | db_printf("r20-23 %08x %08x %08x %08x\n", | | 171 | db_printf("r20-23 %08x %08x %08x %08x\n", |
172 | tf->tf_t3, tf->tf_t2, tf->tf_t1, tf->tf_arg3); | | 172 | tf->tf_t3, tf->tf_t2, tf->tf_t1, tf->tf_arg3); |
173 | db_printf("r24-27 %08x %08x %08x %08x\n", | | 173 | db_printf("r24-27 %08x %08x %08x %08x\n", |
174 | tf->tf_arg2, tf->tf_arg1, tf->tf_arg0, tf->tf_dp); | | 174 | tf->tf_arg2, tf->tf_arg1, tf->tf_arg0, tf->tf_dp); |
175 | db_printf("r28-31 %08x %08x %08x %08x\n", | | 175 | db_printf("r28-31 %08x %08x %08x %08x\n", |
176 | tf->tf_ret0, tf->tf_ret1, tf->tf_sp, tf->tf_r31); | | 176 | tf->tf_ret0, tf->tf_ret1, tf->tf_sp, tf->tf_r31); |
177 | db_printf("\n"); | | 177 | db_printf("\n"); |
178 | db_printf("Space registers\n"); | | 178 | db_printf("Space registers\n"); |
179 | db_printf("s00-03 %08x %08x %08x %08x\n", | | 179 | db_printf("s00-03 %08x %08x %08x %08x\n", |
180 | tf->tf_sr0, tf->tf_sr1, tf->tf_sr2, tf->tf_sr3); | | 180 | tf->tf_sr0, tf->tf_sr1, tf->tf_sr2, tf->tf_sr3); |
181 | db_printf("s04-07 %08x %08x %08x %08x\n", | | 181 | db_printf("s04-07 %08x %08x %08x %08x\n", |
182 | tf->tf_sr4, tf->tf_sr5, tf->tf_sr6, tf->tf_sr7); | | 182 | tf->tf_sr4, tf->tf_sr5, tf->tf_sr6, tf->tf_sr7); |
183 | db_printf("\n"); | | 183 | db_printf("\n"); |
184 | db_printf("Instruction queues\n"); | | 184 | db_printf("Instruction queues\n"); |
185 | db_printf("iisq: %08x %08x\niioq: %08x %08x\n", | | 185 | db_printf("iisq: %08x %08x\niioq: %08x %08x\n", |
186 | tf->tf_iisq_head, tf->tf_iisq_tail, tf->tf_iioq_head, | | 186 | tf->tf_iisq_head, tf->tf_iisq_tail, tf->tf_iioq_head, |
187 | tf->tf_iioq_tail); | | 187 | tf->tf_iioq_tail); |
188 | db_printf("\n"); | | 188 | db_printf("\n"); |
189 | db_printf("Interrupt state\n"); | | 189 | db_printf("Interrupt state\n"); |
190 | db_printf("isr: %08x\nior: %08x\niir: %08x\n", | | 190 | db_printf("isr: %08x\nior: %08x\niir: %08x\n", |
191 | tf->tf_isr, tf->tf_ior, tf->tf_iir); | | 191 | tf->tf_isr, tf->tf_ior, tf->tf_iir); |
192 | db_printf("\n"); | | 192 | db_printf("\n"); |
193 | db_printf("Other state\n"); | | 193 | db_printf("Other state\n"); |
194 | db_printf("eiem: %08x\n", tf->tf_eiem); | | 194 | db_printf("eiem: %08x\n", tf->tf_eiem); |
195 | | | 195 | |
196 | snprintb(buf, sizeof(buf), PSW_BITS, tf->tf_ipsw); | | 196 | snprintb(buf, sizeof(buf), PSW_BITS, tf->tf_ipsw); |
197 | db_printf("ipsw: %s\n", buf); | | 197 | db_printf("ipsw: %s\n", buf); |
198 | db_printf("flags: %08x\n", tf->tf_flags); | | 198 | db_printf("flags: %08x\n", tf->tf_flags); |
199 | db_printf("sar: %08x\n", tf->tf_sar); | | 199 | db_printf("sar: %08x\n", tf->tf_sar); |
200 | db_printf("pidr1: %08x\n", tf->tf_pidr1); /* cr8 */ | | 200 | db_printf("pidr1: %08x\n", tf->tf_pidr1); /* cr8 */ |
201 | db_printf("pidr2: %08x\n", tf->tf_pidr2); /* cr9 */ | | 201 | db_printf("pidr2: %08x\n", tf->tf_pidr2); /* cr9 */ |
202 | #if pbably_not_worth_it | | 202 | #if pbably_not_worth_it |
203 | db_printf("pidr3: %08x\n", tf->tf_pidr3); /* cr12 */ | | 203 | db_printf("pidr3: %08x\n", tf->tf_pidr3); /* cr12 */ |
204 | db_printf("pidr4: %08x\n", tf->tf_pidr4); /* cr13 */ | | 204 | db_printf("pidr4: %08x\n", tf->tf_pidr4); /* cr13 */ |
205 | #endif | | 205 | #endif |
206 | db_printf("rctr: %08x\n", tf->tf_rctr); /* cr0 */ | | 206 | db_printf("rctr: %08x\n", tf->tf_rctr); /* cr0 */ |
207 | db_printf("ccr: %08x\n", tf->tf_ccr); /* cr10 */ | | 207 | db_printf("ccr: %08x\n", tf->tf_ccr); /* cr10 */ |
208 | db_printf("eirr: %08x\n", tf->tf_eirr); /* cr23 - DDB */ | | 208 | db_printf("eirr: %08x\n", tf->tf_eirr); /* cr23 - DDB */ |
209 | db_printf("cr24: %08x\n", tf->tf_cr24); /* cr24 - DDB */ | | 209 | db_printf("cr24: %08x\n", tf->tf_cr24); /* cr24 - DDB */ |
210 | db_printf("vtop: %08x\n", tf->tf_vtop); /* cr25 - DDB */ | | 210 | db_printf("vtop: %08x\n", tf->tf_vtop); /* cr25 - DDB */ |
211 | db_printf("cr27: %08x\n", tf->tf_cr27); /* - DDB */ | | 211 | db_printf("cr27: %08x\n", tf->tf_cr27); /* - DDB */ |
212 | db_printf("cr28: %08x\n", tf->tf_cr28); /* - DDB */ | | 212 | db_printf("cr28: %08x\n", tf->tf_cr28); /* - DDB */ |
213 | db_printf("cr30: %08x\n", tf->tf_cr30); /* uaddr */ | | 213 | db_printf("cr30: %08x\n", tf->tf_cr30); /* uaddr */ |
214 | } | | 214 | } |