Sun Feb 27 14:17:10 2022 UTC ()
alpha: Fix placement of membar for sending ICCB message.

While here, reduce it to membar_exit -- it's obviously not needed for
store-before-load here (although alpha doesn't have anything weaker
than the full sequential consistency `mb'), and although we do need a
store-before-load (and load-before-load) to spin waiting for the CPU
to wake up, that already happens a few lines below with alpha_mb in
the loop anyway.  So no need for membar_sync, which is just `mb'
under the hood -- deleting the membar_sync in this place can't hurt.

The membar_sync had been inserted automatically when converting from
an older style of atomic_ops(3) API.


(riastradh)
diff -r1.104 -r1.105 src/sys/arch/alpha/alpha/cpu.c
cvs diff -r1.104 -r1.105 src/sys/arch/alpha/alpha/cpu.c (expand / switch to context diff)
--- src/sys/arch/alpha/alpha/cpu.c 2021/05/05 03:54:16 1.104
+++ src/sys/arch/alpha/alpha/cpu.c 2022/02/27 14:17:10 1.105
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.104 2021/05/05 03:54:16 thorpej Exp $ */
+/* $NetBSD: cpu.c,v 1.105 2022/02/27 14:17:10 riastradh Exp $ */
 
 /*-
  * Copyright (c) 1998, 1999, 2000, 2001, 2020 The NetBSD Foundation, Inc.
@@ -59,7 +59,7 @@
 
 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.104 2021/05/05 03:54:16 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.105 2022/02/27 14:17:10 riastradh Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -882,12 +882,13 @@
 
 	/*
 	 * Copy the message into the ICCB, and tell the secondary console
-	 * that it's there.
+	 * that it's there.  Ensure the buffer is initialized before we
+	 * set the rxrdy bits, as a store-release.
 	 */
 	strcpy(pcsp->pcs_iccb.iccb_rxbuf, msg);
 	pcsp->pcs_iccb.iccb_rxlen = strlen(msg);
+	membar_exit();
 	atomic_or_ulong(&hwrpb->rpb_rxrdy, cpumask);
-	membar_sync();
 
 	/* Wait for the message to be received. */
 	for (timeout = 10000; timeout != 0; timeout--) {