 @@ -1,1052 +1,1058 @@
-/*	$NetBSD: if_aue.c,v 1.172 2022/03/03 05:50:22 riastradh Exp $	*/
+/*	$NetBSD: if_aue.c,v 1.173 2022/03/03 05:50:57 riastradh Exp $	*/
 /*
  * Copyright (c) 1997, 1998, 1999, 2000
  *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by Bill Paul.
  * 4. Neither the name of the author nor the names of any co-contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
+ *
  * $FreeBSD: src/sys/dev/usb/if_aue.c,v 1.11 2000/01/14 01:36:14 wpaul Exp $
  */
 /*
  * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver.
  * Datasheet is available from http://www.admtek.com.tw.
+ *
  * Written by Bill Paul <wpaul@ee.columbia.edu>
  * Electrical Engineering Department
  * Columbia University, New York City
  */
 /*
  * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet
  * support: the control endpoint for reading/writing registers, burst
  * read endpoint for packet reception, burst write for packet transmission
  * and one for "interrupts." The chip uses the same RX filter scheme
  * as the other ADMtek ethernet parts: one perfect filter entry for the
  * the station address and a 64-bit multicast hash table. The chip supports
  * both MII and HomePNA attachments.
+ *
  * Since the maximum data transfer speed of USB is supposed to be 12Mbps,
  * you're never really going to get 100Mbps speeds from this device. I
  * think the idea is to allow the device to connect to 10 or 100Mbps
  * networks, not necessarily to provide 100Mbps performance. Also, since
  * the controller uses an external PHY chip, it's possible that board
  * designers might simply choose a 10Mbps PHY.
+ *
  * Registers are accessed using usbd_do_request(). Packet transfers are
  * done using usbd_transfer() and friends.
  */
 /*
  * Ported to NetBSD and somewhat rewritten by Lennart Augustsson.
  */
 /*
  * TODO:
  * better error messages from rxstat
  * more error checks
  * investigate short rx problem
  * proper cleanup on errors
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_aue.c,v 1.172 2022/03/03 05:50:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_aue.c,v 1.173 2022/03/03 05:50:57 riastradh Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
 #include "opt_inet.h"
 #endif
 #include <sys/param.h>
 #include <dev/usb/usbnet.h>
 #include <dev/usb/usbhist.h>
 #include <dev/usb/if_auereg.h>
 #ifdef INET
 #include <netinet/in.h>
 #include <netinet/if_inarp.h>
 #endif
 #ifdef USB_DEBUG
 #ifndef AUE_DEBUG
 #define auedebug 0
 #else
 static int auedebug = 10;
 SYSCTL_SETUP(sysctl_hw_aue_setup, "sysctl hw.aue setup")
+{
 	int err;
 	const struct sysctlnode *rnode;
 	const struct sysctlnode *cnode;
 	err = sysctl_createv(clog, 0, NULL, &rnode,
 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "aue",
 	    SYSCTL_DESCR("aue global controls"),
 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
 	if (err)
 		goto fail;
 	/* control debugging printfs */
 	err = sysctl_createv(clog, 0, &rnode, &cnode,
 	    CTLFLAG_PERMANENT | CTLFLAG_READWRITE, CTLTYPE_INT,
 	    "debug", SYSCTL_DESCR("Enable debugging output"),
 	    NULL, 0, &auedebug, sizeof(auedebug), CTL_CREATE, CTL_EOL);
 	if (err)
 		goto fail;
 	return;
 fail:
 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
+}
 #endif /* AUE_DEBUG */
 #endif /* USB_DEBUG */
 #define DPRINTF(FMT,A,B,C,D)	USBHIST_LOGN(auedebug,1,FMT,A,B,C,D)
 #define DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(auedebug,N,FMT,A,B,C,D)
 #define AUEHIST_FUNC()		USBHIST_FUNC()
 #define AUEHIST_CALLED(name)	USBHIST_CALLED(auedebug)
 #define AUEHIST_CALLARGS(FMT,A,B,C,D) \
 				USBHIST_CALLARGS(auedebug,FMT,A,B,C,D)
 #define AUEHIST_CALLARGSN(N,FMT,A,B,C,D) \
 				USBHIST_CALLARGSN(auedebug,N,FMT,A,B,C,D)
 #define AUE_TX_LIST_CNT		1
 #define AUE_RX_LIST_CNT		1
 struct aue_softc {
 	struct usbnet		aue_un;
 	struct usbnet_intr	aue_intr;
 	struct aue_intrpkt	aue_ibuf;
 };
 #define AUE_TIMEOUT		1000
 #define AUE_BUFSZ		1536
 #define AUE_MIN_FRAMELEN	60
 #define AUE_TX_TIMEOUT		10000 /* ms */
 #define AUE_INTR_INTERVAL	100 /* ms */
 /*
  * Various supported device vendors/products.
  */
 struct aue_type {
 	struct usb_devno	aue_dev;
 	uint16_t		aue_flags;
 #define LSYS	0x0001		/* use Linksys reset */
 #define PNA	0x0002		/* has Home PNA */
 #define PII	0x0004		/* Pegasus II chip */
 };
 static const struct aue_type aue_devs[] = {
  {{ USB_VENDOR_3COM,		USB_PRODUCT_3COM_3C460B},	  PII },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX1},	  PNA | PII },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX2},	  PII },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_UFE1000},	  LSYS },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX4},	  PNA },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX5},	  PNA },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX6},	  PII },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX7},	  PII },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX8},	  PII },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX9},	  PNA },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_XX10},	  0 },
  {{ USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_DSB650TX_PNA}, 0 },
  {{ USB_VENDOR_ACCTON,		USB_PRODUCT_ACCTON_USB320_EC},	  0 },
  {{ USB_VENDOR_ACCTON,		USB_PRODUCT_ACCTON_SS1001},	  PII },
  {{ USB_VENDOR_ADMTEK,		USB_PRODUCT_ADMTEK_PEGASUS},	  PNA },
  {{ USB_VENDOR_ADMTEK,		USB_PRODUCT_ADMTEK_PEGASUSII},	  PII },
  {{ USB_VENDOR_ADMTEK,		USB_PRODUCT_ADMTEK_PEGASUSII_2},  PII },
  {{ USB_VENDOR_ADMTEK,		USB_PRODUCT_ADMTEK_PEGASUSII_3},  PII },
  {{ USB_VENDOR_AEI,		USB_PRODUCT_AEI_USBTOLAN},	  PII },
  {{ USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_USB2LAN},	  PII },
  {{ USB_VENDOR_BILLIONTON,	USB_PRODUCT_BILLIONTON_USB100},	  0 },
  {{ USB_VENDOR_BILLIONTON,	USB_PRODUCT_BILLIONTON_USBLP100}, PNA },
  {{ USB_VENDOR_BILLIONTON,	USB_PRODUCT_BILLIONTON_USBEL100}, 0 },
  {{ USB_VENDOR_BILLIONTON,	USB_PRODUCT_BILLIONTON_USBE100},  PII },
  {{ USB_VENDOR_COMPAQ,		USB_PRODUCT_COMPAQ_HNE200},	  PII },
  {{ USB_VENDOR_COREGA,		USB_PRODUCT_COREGA_FETHER_USB_TX}, 0 },
  {{ USB_VENDOR_COREGA,		USB_PRODUCT_COREGA_FETHER_USB_TXS},PII },
  {{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DSB650TX4},	  LSYS | PII },
  {{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DSB650TX1},	  LSYS },
  {{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DSB650TX},	  LSYS },
  {{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DSB650TX_PNA},  PNA },
  {{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DSB650TX3},	  LSYS | PII },
  {{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DSB650TX2},	  LSYS | PII },
  {{ USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DSB650},	  0 },
  {{ USB_VENDOR_ELECOM,		USB_PRODUCT_ELECOM_LDUSBTX0},	  0 },
  {{ USB_VENDOR_ELECOM,		USB_PRODUCT_ELECOM_LDUSBTX1},	  LSYS },
  {{ USB_VENDOR_ELECOM,		USB_PRODUCT_ELECOM_LDUSBTX2},	  0 },
  {{ USB_VENDOR_ELECOM,		USB_PRODUCT_ELECOM_LDUSBTX3},	  LSYS },
  {{ USB_VENDOR_ELECOM,		USB_PRODUCT_ELECOM_LDUSBLTX},	  PII },
  {{ USB_VENDOR_ELSA,		USB_PRODUCT_ELSA_USB2ETHERNET},	  0 },
  {{ USB_VENDOR_HAWKING,		USB_PRODUCT_HAWKING_UF100},	  PII },
  {{ USB_VENDOR_HP,		USB_PRODUCT_HP_HN210E},		  PII },
  {{ USB_VENDOR_IODATA,		USB_PRODUCT_IODATA_USBETTX},	  0 },
  {{ USB_VENDOR_IODATA,		USB_PRODUCT_IODATA_USBETTXS},	  PII },
  {{ USB_VENDOR_IODATA,		USB_PRODUCT_IODATA_ETXUS2},	  PII },
  {{ USB_VENDOR_KINGSTON,	USB_PRODUCT_KINGSTON_KNU101TX},	  0 },
  {{ USB_VENDOR_LINKSYS,		USB_PRODUCT_LINKSYS_USB10TX1},	  LSYS | PII },
  {{ USB_VENDOR_LINKSYS,		USB_PRODUCT_LINKSYS_USB10T},	  LSYS },
  {{ USB_VENDOR_LINKSYS,		USB_PRODUCT_LINKSYS_USB100TX},	  LSYS },
  {{ USB_VENDOR_LINKSYS,		USB_PRODUCT_LINKSYS_USB100H1},	  LSYS | PNA },
  {{ USB_VENDOR_LINKSYS,		USB_PRODUCT_LINKSYS_USB10TA},	  LSYS },
  {{ USB_VENDOR_LINKSYS,		USB_PRODUCT_LINKSYS_USB10TX2},	  LSYS | PII },
  {{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_LUATX1},	  0 },
  {{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_LUATX5},	  0 },
  {{ USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_LUA2TX5},	  PII },
  {{ USB_VENDOR_MICROSOFT,	USB_PRODUCT_MICROSOFT_MN110},	  PII },
  {{ USB_VENDOR_NETGEAR,		USB_PRODUCT_NETGEAR_FA101},	  PII },
  {{ USB_VENDOR_SIEMENS,		USB_PRODUCT_SIEMENS_SPEEDSTREAM}, PII },
  {{ USB_VENDOR_SMARTBRIDGES,	USB_PRODUCT_SMARTBRIDGES_SMARTNIC},PII },
  {{ USB_VENDOR_SMC,		USB_PRODUCT_SMC_2202USB},	  0 },
  {{ USB_VENDOR_SMC,		USB_PRODUCT_SMC_2206USB},	  PII },
  {{ USB_VENDOR_SOHOWARE,	USB_PRODUCT_SOHOWARE_NUB100},	  0 },
 };
 #define aue_lookup(v, p) ((const struct aue_type *)usb_lookup(aue_devs, v, p))
 static int aue_match(device_t, cfdata_t, void *);
 static void aue_attach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(aue, sizeof(struct aue_softc), aue_match, aue_attach,
     usbnet_detach, usbnet_activate);
 static void aue_reset_pegasus_II(struct aue_softc *);
 static void aue_uno_stop(struct ifnet *, int);
 static int aue_uno_ioctl(struct ifnet *, u_long, void *);
 static int aue_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int aue_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static void aue_uno_mii_statchg(struct ifnet *);
 static unsigned aue_uno_tx_prepare(struct usbnet *, struct mbuf *,
 				   struct usbnet_chain *);
 static void aue_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
 static int aue_uno_init(struct ifnet *);
 static void aue_uno_intr(struct usbnet *, usbd_status);
 static const struct usbnet_ops aue_ops = {
 	.uno_stop = aue_uno_stop,
 	.uno_ioctl = aue_uno_ioctl,
 	.uno_read_reg = aue_uno_mii_read_reg,
 	.uno_write_reg = aue_uno_mii_write_reg,
 	.uno_statchg = aue_uno_mii_statchg,
 	.uno_tx_prepare = aue_uno_tx_prepare,
 	.uno_rx_loop = aue_uno_rx_loop,
 	.uno_init = aue_uno_init,
 	.uno_intr = aue_uno_intr,
 };
 static uint32_t aue_crc(void *);
 static void aue_reset(struct aue_softc *);
 static int aue_csr_read_1(struct aue_softc *, int);
 static int aue_csr_write_1(struct aue_softc *, int, int);
 static int aue_csr_read_2(struct aue_softc *, int);
 static int aue_csr_write_2(struct aue_softc *, int, int);
 #define AUE_SETBIT(sc, reg, x)				\
 	aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x))
 #define AUE_CLRBIT(sc, reg, x)				\
 	aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x))
 static int
 aue_csr_read_1(struct aue_softc *sc, int reg)
+{
 	struct usbnet * const	un = &sc->aue_un;
 	usb_device_request_t	req;
 	usbd_status		err;
 	uByte			val = 0;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return 0;
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = AUE_UR_READREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 1);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		AUEHIST_FUNC();
 		AUEHIST_CALLARGS("aue%jd: reg=%#jx err=%jd",
 		    device_unit(un->un_dev), reg, err, 0);
 		return 0;
+	}
 	return val;
+}
 static int
 aue_csr_read_2(struct aue_softc *sc, int reg)
+{
 	struct usbnet * const	un = &sc->aue_un;
 	usb_device_request_t	req;
 	usbd_status		err;
 	uWord			val;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return 0;
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = AUE_UR_READREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 2);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		AUEHIST_FUNC();
 		AUEHIST_CALLARGS("aue%jd: reg=%#jx err=%jd",
 		    device_unit(un->un_dev), reg, err, 0);
 		return 0;
+	}
 	return UGETW(val);
+}
 static int
 aue_csr_write_1(struct aue_softc *sc, int reg, int aval)
+{
 	struct usbnet * const	un = &sc->aue_un;
 	usb_device_request_t	req;
 	usbd_status		err;
 	uByte			val;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return 0;
 	val = aval;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = AUE_UR_WRITEREG;
 	USETW(req.wValue, val);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 1);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		AUEHIST_FUNC();
 		AUEHIST_CALLARGS("aue%jd: reg=%#jx err=%jd",
 		    device_unit(un->un_dev), reg, err, 0);
 		return -1;
+	}
 	return 0;
+}
 static int
 aue_csr_write_2(struct aue_softc *sc, int reg, int aval)
+{
 	struct usbnet * const	un = &sc->aue_un;
 	usb_device_request_t	req;
 	usbd_status		err;
 	uWord			val;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return 0;
 	USETW(val, aval);
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = AUE_UR_WRITEREG;
 	USETW(req.wValue, aval);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 2);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		AUEHIST_FUNC();
 		AUEHIST_CALLARGS("aue%jd: reg=%#jx err=%jd",
 		    device_unit(un->un_dev), reg, err, 0);
 		return -1;
+	}
 	return 0;
+}
 /*
  * Read a word of data stored in the EEPROM at address 'addr.'
  */
 static int
 aue_eeprom_getword(struct aue_softc *sc, int addr)
+{
 	struct usbnet * const	un = &sc->aue_un;
 	int			i;
 	AUEHIST_FUNC(); AUEHIST_CALLED();
 	aue_csr_write_1(sc, AUE_EE_REG, addr);
 	aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ);
 	for (i = 0; i < AUE_TIMEOUT; i++) {
 		if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE)
 			break;
+	}
 	if (i == AUE_TIMEOUT) {
 		printf("%s: EEPROM read timed out\n",
 		    device_xname(un->un_dev));
+	}
 	return aue_csr_read_2(sc, AUE_EE_DATA);
+}
 /*
  * Read the MAC from the EEPROM.  It's at offset 0.
  */
 static void
 aue_read_mac(struct usbnet *un)
+{
 	struct aue_softc	*sc = usbnet_softc(un);
 	int			i;
 	int			off = 0;
 	int			word;
 	usbnet_isowned_core(un);
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGS("aue%jd: enter",
 	    device_unit(un->un_dev), 0, 0, 0);
 	for (i = 0; i < 3; i++) {
 		word = aue_eeprom_getword(sc, off + i);
 		un->un_eaddr[2 * i] =     (u_char)word;
 		un->un_eaddr[2 * i + 1] = (u_char)(word >> 8);
+	}
+}
 static int
 aue_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
+{
 	struct aue_softc	*sc = usbnet_softc(un);
 	int			i;
 	AUEHIST_FUNC();
 #if 0
 	/*
 	 * The Am79C901 HomePNA PHY actually contains
 	 * two transceivers: a 1Mbps HomePNA PHY and a
 	 * 10Mbps full/half duplex ethernet PHY with
 	 * NWAY autoneg. However in the ADMtek adapter,
 	 * only the 1Mbps PHY is actually connected to
 	 * anything, so we ignore the 10Mbps one. It
 	 * happens to be configured for MII address 3,
 	 * so we filter that out.
 	 */
 	if (sc->aue_vendor == USB_VENDOR_ADMTEK &&
 	    sc->aue_product == USB_PRODUCT_ADMTEK_PEGASUS) {
 		if (phy == 3)
 			return EINVAL;
+	}
 #endif
 	aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
 	aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ);
 	for (i = 0; i < AUE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return ENXIO;
 		if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
 			break;
+	}
 	if (i == AUE_TIMEOUT) {
 		AUEHIST_CALLARGS("aue%jd: phy=%#jx reg=%#jx read timed out",
 		    device_unit(un->un_dev), phy, reg, 0);
 		return ETIMEDOUT;
+	}
 	*val = aue_csr_read_2(sc, AUE_PHY_DATA);
 	AUEHIST_CALLARGSN(11, "aue%jd: phy=%#jx reg=%#jx => 0x%04jx",
 	    device_unit(un->un_dev), phy, reg, *val);
 	return 0;
+}
 static int
 aue_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
+{
 	struct aue_softc	*sc = usbnet_softc(un);
 	int			i;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(11, "aue%jd: phy=%jd reg=%jd data=0x%04jx",
 	    device_unit(un->un_dev), phy, reg, val);
 #if 0
 	if (sc->aue_vendor == USB_VENDOR_ADMTEK &&
 	    sc->aue_product == USB_PRODUCT_ADMTEK_PEGASUS) {
 		if (phy == 3)
 			return EINVAL;
+	}
 #endif
 	aue_csr_write_2(sc, AUE_PHY_DATA, val);
 	aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
 	aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE);
 	for (i = 0; i < AUE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return ENXIO;
 		if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
 			break;
+	}
 	if (i == AUE_TIMEOUT) {
 		DPRINTF("aue%jd: phy=%#jx reg=%#jx val=%#jx write timed out",
 		    device_unit(un->un_dev), phy, reg, val);
 		return ETIMEDOUT;
+	}
 	return 0;
+}
 static void
 aue_uno_mii_statchg(struct ifnet *ifp)
+{
 	struct usbnet *un = ifp->if_softc;
 	struct aue_softc *sc = usbnet_softc(un);
 	struct mii_data	*mii = usbnet_mii(un);
 	const bool hadlink __diagused = usbnet_havelink(un);
 	AUEHIST_FUNC(); AUEHIST_CALLED();
 	AUEHIST_CALLARGSN(5, "aue%jd: ifp=%#jx link=%jd",
 	    device_unit(un->un_dev), (uintptr_t)ifp, hadlink, 0);
 	AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
 	if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) {
 		AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
 	} else {
 		AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
+	}
 	if ((mii->mii_media_active & IFM_FDX) != 0)
 		AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
 	else
 		AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
 	AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
 	if (mii->mii_media_status & IFM_ACTIVE &&
 	    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
 		usbnet_set_link(un, true);
+	}
 	/*
 	 * Set the LED modes on the LinkSys adapter.
 	 * This turns on the 'dual link LED' bin in the auxmode
 	 * register of the Broadcom PHY.
 	 */
 	if (!usbnet_isdying(un) && (un->un_flags & LSYS)) {
 		uint16_t auxmode;
 		aue_uno_mii_read_reg(un, 0, 0x1b, &auxmode);
 		aue_uno_mii_write_reg(un, 0, 0x1b, auxmode | 0x04);
+	}
 	if (usbnet_havelink(un) != hadlink) {
 		DPRINTFN(5, "aue%jd: exit link %jd",
 		    device_unit(un->un_dev), usbnet_havelink(un), 0, 0);
+	}
+}
 #define AUE_POLY	0xEDB88320
 #define AUE_BITS	6
 static uint32_t
 aue_crc(void *addrv)
+{
 	uint32_t		idx, bit, data, crc;
 	char *addr = addrv;
 	/* Compute CRC for the address value. */
 	crc = 0xFFFFFFFF; /* initial value */
 	for (idx = 0; idx < 6; idx++) {
 		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
 			crc = (crc >> 1) ^ (((crc ^ data) & 1) ? AUE_POLY : 0);
+	}
 	return crc & ((1 << AUE_BITS) - 1);
+}
 static void
 aue_setiff_locked(struct usbnet *un)
+{
 	struct aue_softc * const sc = usbnet_softc(un);
 	struct ifnet * const	ifp = usbnet_ifp(un);
 	struct ethercom *	ec = usbnet_ec(un);
 	struct ether_multi	*enm;
 	struct ether_multistep	step;
 	uint32_t		h = 0, i;
 	uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(5, "aue%jd: enter", device_unit(un->un_dev), 0, 0, 0);
 	usbnet_isowned_core(un);
 	if (ifp->if_flags & IFF_PROMISC) {
 allmulti:
 		ifp->if_flags |= IFF_ALLMULTI;
 		AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
 		return;
+	}
 	AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
 	/* now program new ones */
 	ETHER_LOCK(ec);
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
 		if (memcmp(enm->enm_addrlo,
 		    enm->enm_addrhi, ETHER_ADDR_LEN) != 0) {
 			ETHER_UNLOCK(ec);
 			goto allmulti;
+		}
 		h = aue_crc(enm->enm_addrlo);
 		hashtbl[h >> 3] |= 1 << (h & 0x7);
 		ETHER_NEXT_MULTI(step, enm);
+	}
 	ETHER_UNLOCK(ec);
 	/* write the hashtable */
 	for (i = 0; i < 8; i++)
 		aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]);
 	ifp->if_flags &= ~IFF_ALLMULTI;
+}
 static void
 aue_reset_pegasus_II(struct aue_softc *sc)
+{
 	/* Magic constants taken from Linux driver. */
 	aue_csr_write_1(sc, AUE_REG_1D, 0);
 	aue_csr_write_1(sc, AUE_REG_7B, 2);
 #if 0
 	if ((un->un_flags & PNA) && mii_mode)
 		aue_csr_write_1(sc, AUE_REG_81, 6);
 	else
 #endif
 		aue_csr_write_1(sc, AUE_REG_81, 2);
+}
 static void
 aue_reset(struct aue_softc *sc)
+{
 	struct usbnet * const un = &sc->aue_un;
 	int		i;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(2, "aue%jd: enter", device_unit(un->un_dev), 0, 0, 0);
 	AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC);
 	for (i = 0; i < AUE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC))
 			break;
+	}
 	if (i == AUE_TIMEOUT)
 		printf("%s: reset failed\n", device_xname(un->un_dev));
 #if 0
 	/* XXX what is mii_mode supposed to be */
 	if (sc->sc_mii_mode && (un->un_flags & PNA))
 		aue_csr_write_1(sc, AUE_GPIO1, 0x34);
 	else
 		aue_csr_write_1(sc, AUE_GPIO1, 0x26);
 #endif
 	/*
 	 * The PHY(s) attached to the Pegasus chip may be held
 	 * in reset until we flip on the GPIO outputs. Make sure
 	 * to set the GPIO pins high so that the PHY(s) will
 	 * be enabled.
+	 *
 	 * Note: We force all of the GPIO pins low first, *then*
 	 * enable the ones we want.
 	 */
 	if (un->un_flags & LSYS) {
 		/* Grrr. LinkSys has to be different from everyone else. */
 		aue_csr_write_1(sc, AUE_GPIO0,
 		    AUE_GPIO_SEL0 | AUE_GPIO_SEL1);
 	} else {
 		aue_csr_write_1(sc, AUE_GPIO0,
 		    AUE_GPIO_OUT0 | AUE_GPIO_SEL0);
+	}
 	aue_csr_write_1(sc, AUE_GPIO0,
 	    AUE_GPIO_OUT0 | AUE_GPIO_SEL0 | AUE_GPIO_SEL1);
 	if (un->un_flags & PII)
 		aue_reset_pegasus_II(sc);
 	/* Wait a little while for the chip to get its brains in order. */
 	delay(10000);	/* XXX */
 	//usbd_delay_ms(un->un_udev, 10);	/* XXX */
 	DPRINTFN(2, "aue%jd: exit", device_unit(un->un_dev), 0, 0, 0);
+}
 /*
  * Probe for a Pegasus chip.
  */
 static int
 aue_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct usb_attach_arg *uaa = aux;
 	/*
 	 * Some manufacturers use the same vendor and product id for
 	 * different devices. We need to sanity check the DeviceClass
 	 * in this case
 	 * Currently known guilty products:
 	 * 0x050d/0x0121 Belkin Bluetooth and USB2LAN
+	 *
 	 * If this turns out to be more common, we could use a quirk
 	 * table.
 	 */
 	if (uaa->uaa_vendor == USB_VENDOR_BELKIN &&
 		uaa->uaa_product == USB_PRODUCT_BELKIN_USB2LAN) {
 		usb_device_descriptor_t *dd;
 		dd = usbd_get_device_descriptor(uaa->uaa_device);
 		if (dd != NULL &&
 			dd->bDeviceClass != UDCLASS_IN_INTERFACE)
 			return UMATCH_NONE;
+	}
 	return aue_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
 		UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
+}
 /*
  * Attach the interface. Allocate softc structures, do ifmedia
  * setup and ethernet/BPF attach.
  */
 static void
 aue_attach(device_t parent, device_t self, void *aux)
+{
 	USBNET_MII_DECL_DEFAULT(unm);
 	struct aue_softc * const sc = device_private(self);
 	struct usbnet * const un = &sc->aue_un;
 	struct usb_attach_arg *uaa = aux;
 	char			*devinfop;
 	struct usbd_device	*dev = uaa->uaa_device;
 	usbd_status		err;
 	usb_interface_descriptor_t	*id;
 	usb_endpoint_descriptor_t	*ed;
 	int			i;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(2, "aue%jd: enter sc=%#jx",
 	    device_unit(self), (uintptr_t)sc, 0, 0);
 	KASSERT((void *)sc == un);
 	aprint_naive("\n");
 	aprint_normal("\n");
 	devinfop = usbd_devinfo_alloc(uaa->uaa_device, 0);
 	aprint_normal_dev(self, "%s\n", devinfop);
 	usbd_devinfo_free(devinfop);
 	un->un_dev = self;
 	un->un_udev = dev;
 	un->un_sc = sc;
 	un->un_ops = &aue_ops;
 	un->un_intr = &sc->aue_intr;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
 	un->un_rx_list_cnt = AUE_RX_LIST_CNT;
 	un->un_tx_list_cnt = AUE_RX_LIST_CNT;
 	un->un_rx_bufsz = AUE_BUFSZ;
 	un->un_tx_bufsz = AUE_BUFSZ;
 	sc->aue_intr.uni_buf = &sc->aue_ibuf;
 	sc->aue_intr.uni_bufsz = sizeof(sc->aue_ibuf);
 	sc->aue_intr.uni_interval = AUE_INTR_INTERVAL;
 	err = usbd_set_config_no(dev, AUE_CONFIG_NO, 1);
 	if (err) {
 		aprint_error_dev(self, "failed to set configuration"
 		    ", err=%s\n", usbd_errstr(err));
 		return;
+	}
 	err = usbd_device2interface_handle(dev, AUE_IFACE_IDX, &un->un_iface);
 	if (err) {
 		aprint_error_dev(self, "getting interface handle failed\n");
 		return;
+	}
 	un->un_flags = aue_lookup(uaa->uaa_vendor, uaa->uaa_product)->aue_flags;
 	id = usbd_get_interface_descriptor(un->un_iface);
 	/* Find endpoints. */
 	for (i = 0; i < id->bNumEndpoints; i++) {
 		ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
 		if (ed == NULL) {
 			aprint_error_dev(self,
 			    "couldn't get endpoint descriptor %d\n", i);
 			return;
+		}
 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
 			un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
+		}
+	}
 	if (un->un_ed[USBNET_ENDPT_RX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_TX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_INTR] == 0) {
 		aprint_error_dev(self, "missing endpoint\n");
 		return;
+	}
 	/* First level attach. */
 	usbnet_attach(un, "auedet");
 	usbnet_lock_core(un);
 	/* Reset the adapter and get station address from the EEPROM.  */
 	aue_reset(sc);
 	aue_read_mac(un);
 	usbnet_unlock_core(un);
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 , &unm);
+}
 static void
 aue_uno_intr(struct usbnet *un, usbd_status status)
+{
 	struct ifnet		*ifp = usbnet_ifp(un);
 	struct aue_softc	*sc = usbnet_softc(un);
 	struct aue_intrpkt	*p = &sc->aue_ibuf;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(20, "aue%jd: enter txstat0 %#jx\n",
 	    device_unit(un->un_dev), p->aue_txstat0, 0, 0);
 	if (p->aue_txstat0)
 		if_statinc(ifp, if_oerrors);
 	if (p->aue_txstat0 & (AUE_TXSTAT0_LATECOLL | AUE_TXSTAT0_EXCESSCOLL))
 		if_statinc(ifp, if_collisions);
+}
 static void
 aue_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
+{
 	struct ifnet		*ifp = usbnet_ifp(un);
 	uint8_t			*buf = c->unc_buf;
 	struct aue_rxpkt	r;
 	uint32_t		pktlen;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(10, "aue%jd: enter len %ju",
 	    device_unit(un->un_dev), total_len, 0, 0);
 	if (total_len <= 4 + ETHER_CRC_LEN) {
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	memcpy(&r, buf + total_len - 4, sizeof(r));
 	/* Turn off all the non-error bits in the rx status word. */
 	r.aue_rxstat &= AUE_RXSTAT_MASK;
 	if (r.aue_rxstat) {
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	/* No errors; receive the packet. */
 	pktlen = total_len - ETHER_CRC_LEN - 4;
 	usbnet_enqueue(un, buf, pktlen, 0, 0, 0);
+}
 static unsigned
 aue_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
+{
 	uint8_t			*buf = c->unc_buf;
 	int			total_len;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(10, "aue%jd: enter pktlen=%jd",
 	    device_unit(un->un_dev), m->m_pkthdr.len, 0, 0);
 	if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - 2)
 		return 0;
 	/*
 	 * Copy the mbuf data into a contiguous buffer, leaving two
 	 * bytes at the beginning to hold the frame length.
 	 */
 	m_copydata(m, 0, m->m_pkthdr.len, buf + 2);
 	/*
 	 * The ADMtek documentation says that the packet length is
 	 * supposed to be specified in the first two bytes of the
 	 * transfer, however it actually seems to ignore this info
 	 * and base the frame size on the bulk transfer length.
 	 */
 	buf[0] = (uint8_t)m->m_pkthdr.len;
 	buf[1] = (uint8_t)(m->m_pkthdr.len >> 8);
 	total_len = m->m_pkthdr.len + 2;
 	DPRINTFN(5, "aue%jd: send %jd bytes",
 	    device_unit(un->un_dev), total_len, 0, 0);
 	return total_len;
+}
 static int
 aue_init_locked(struct ifnet *ifp)
+{
 	struct usbnet * const	un = ifp->if_softc;
 	struct aue_softc	*sc = usbnet_softc(un);
 	int			i, rv;
 	const u_char		*eaddr;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(5, "aue%jd: enter link=%jd",
 	    device_unit(un->un_dev), usbnet_havelink(un), 0, 0);
 	if (usbnet_isdying(un))
 		return EIO;
 	/* Cancel pending I/O */
 	if (ifp->if_flags & IFF_RUNNING)
 		return 0;
 	/* Reset the interface. */
 	aue_reset(sc);
 	eaddr = CLLADDR(ifp->if_sadl);
 	for (i = 0; i < ETHER_ADDR_LEN; i++)
 		aue_csr_write_1(sc, AUE_PAR0 + i, eaddr[i]);
 	 /* If we want promiscuous mode, set the allframes bit. */
 	if (ifp->if_flags & IFF_PROMISC)
 		AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
 	else
 		AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
 	rv = usbnet_init_rx_tx(un);
 	/* Load the multicast filter. */
 	aue_setiff_locked(un);
 	/* Enable RX and TX */
 	aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB);
 	AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB);
 	AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR);
 	//mii_mediachg(mii);
 	return rv;
+}
 static int
 aue_uno_init(struct ifnet *ifp)
+{
 	struct usbnet * const	un = ifp->if_softc;
 	int rv;
 	usbnet_busy(un);
 	rv = aue_init_locked(ifp);
 	usbnet_unbusy(un);
 	return rv;
+}
 static int
 aue_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
 	struct usbnet * const un = ifp->if_softc;
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(5, "aue%jd: enter cmd %#jx data %#jx",
 	    device_unit(((struct usbnet *)(ifp->if_softc))->un_dev),
 	    cmd, (uintptr_t)data, 0);
 	switch (cmd) {
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		usbnet_lock_core(un);
 		aue_uno_init(ifp);
 		usbnet_unlock_core(un);
 		break;
 	default:
 		break;
+	}
 	return 0;
+}
 static void
 aue_uno_stop(struct ifnet *ifp, int disable)
+{
 	struct usbnet * const	un = ifp->if_softc;
 	struct aue_softc * const sc = usbnet_softc(un);
 	AUEHIST_FUNC();
 	AUEHIST_CALLARGSN(5, "aue%jd: enter", device_unit(un->un_dev), 0, 0, 0);
 	aue_csr_write_1(sc, AUE_CTL0, 0);
 	aue_csr_write_1(sc, AUE_CTL1, 0);
 	aue_reset(sc);
+}
 #ifdef _MODULE
 #include "ioconf.c"
 #endif
 USBNET_MODULE(aue)

 @@ -1,799 +1,803 @@
-/*	$NetBSD: if_mos.c,v 1.8 2022/03/03 05:50:22 riastradh Exp $	*/
+/*	$NetBSD: if_mos.c,v 1.9 2022/03/03 05:50:57 riastradh Exp $	*/
 /*	$OpenBSD: if_mos.c,v 1.40 2019/07/07 06:40:10 kevlo Exp $	*/
 /*
  * Copyright (c) 2008 Johann Christian Rode <jcrode@gmx.net>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 /*
  * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 /*
  * Copyright (c) 1997, 1998, 1999, 2000-2003
  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by Bill Paul.
  * 4. Neither the name of the author nor the names of any co-contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Moschip MCS7730/MCS7830/MCS7832 USB to Ethernet controller
  * The datasheet is available at the following URL:
  * http://www.moschip.com/data/products/MCS7830/Data%20Sheet_7830.pdf
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.8 2022/03/03 05:50:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.9 2022/03/03 05:50:57 riastradh Exp $");
 #include <sys/param.h>
 #include <dev/usb/usbnet.h>
 #include <dev/usb/if_mosreg.h>
 #define MOS_PAUSE_REWRITES	3
 #define MOS_TIMEOUT		1000
 #define MOS_RX_LIST_CNT		1
 #define MOS_TX_LIST_CNT		1
 /* Maximum size of a fast ethernet frame plus one byte for the status */
 #define MOS_BUFSZ	 	(ETHER_MAX_LEN+1)
 /*
  * USB endpoints.
  */
 #define MOS_ENDPT_RX		0
 #define MOS_ENDPT_TX		1
 #define MOS_ENDPT_INTR		2
 #define MOS_ENDPT_MAX		3
 /*
  * USB vendor requests.
  */
 #define MOS_UR_READREG		0x0e
 #define MOS_UR_WRITEREG		0x0d
 #define MOS_CONFIG_NO		1
 #define MOS_IFACE_IDX		0
 struct mos_type {
 	struct usb_devno	mos_dev;
 	u_int16_t		mos_flags;
 #define MCS7730	0x0001		/* MCS7730 */
 #define MCS7830	0x0002		/* MCS7830 */
 #define MCS7832	0x0004		/* MCS7832 */
 };
 #define MOS_INC(x, y)           (x) = (x + 1) % y
 #ifdef MOS_DEBUG
 #define DPRINTF(x)      do { if (mosdebug) printf x; } while (0)
 #define DPRINTFN(n,x)   do { if (mosdebug >= (n)) printf x; } while (0)
 int     mosdebug = 0;
 #else
 #define DPRINTF(x)	__nothing
 #define DPRINTFN(n,x)	__nothing
 #endif
 /*
  * Various supported device vendors/products.
  */
 static const struct mos_type mos_devs[] = {
 	{ { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7730 }, MCS7730 },
 	{ { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7830 }, MCS7830 },
 	{ { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7832 }, MCS7832 },
 	{ { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN030 }, MCS7830 },
 };
 #define mos_lookup(v, p) ((const struct mos_type *)usb_lookup(mos_devs, v, p))
 static int mos_match(device_t, cfdata_t, void *);
 static void mos_attach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(mos, sizeof(struct usbnet),
 	mos_match, mos_attach, usbnet_detach, usbnet_activate);
 static void mos_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
 static unsigned mos_uno_tx_prepare(struct usbnet *, struct mbuf *,
 				   struct usbnet_chain *);
 static int mos_uno_ioctl(struct ifnet *, u_long, void *);
 static int mos_uno_init(struct ifnet *);
 static void mos_chip_init(struct usbnet *);
 static void mos_uno_stop(struct ifnet *ifp, int disable);
 static int mos_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int mos_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static void mos_uno_mii_statchg(struct ifnet *);
 static void mos_reset(struct usbnet *);
 static int mos_reg_read_1(struct usbnet *, int);
 static int mos_reg_read_2(struct usbnet *, int);
 static int mos_reg_write_1(struct usbnet *, int, int);
 static int mos_reg_write_2(struct usbnet *, int, int);
 static int mos_readmac(struct usbnet *);
 static int mos_writemac(struct usbnet *);
 static int mos_write_mcast(struct usbnet *, uint8_t *);
 static const struct usbnet_ops mos_ops = {
 	.uno_stop = mos_uno_stop,
 	.uno_ioctl = mos_uno_ioctl,
 	.uno_read_reg = mos_uno_mii_read_reg,
 	.uno_write_reg = mos_uno_mii_write_reg,
 	.uno_statchg = mos_uno_mii_statchg,
 	.uno_tx_prepare = mos_uno_tx_prepare,
 	.uno_rx_loop = mos_uno_rx_loop,
 	.uno_init = mos_uno_init,
 };
 static int
 mos_reg_read_1(struct usbnet *un, int reg)
+{
 	usb_device_request_t	req;
 	usbd_status		err;
 	uByte			val = 0;
 	if (usbnet_isdying(un))
 		return 0;
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = MOS_UR_READREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 1);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		aprint_error_dev(un->un_dev, "read reg %x\n", reg);
 		return 0;
+	}
 	return val;
+}
 static int
 mos_reg_read_2(struct usbnet *un, int reg)
+{
 	usb_device_request_t	req;
 	usbd_status		err;
 	uWord			val;
 	if (usbnet_isdying(un))
 		return 0;
 	USETW(val,0);
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = MOS_UR_READREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 2);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		aprint_error_dev(un->un_dev, "read reg2 %x\n", reg);
 		return 0;
+	}
 	return UGETW(val);
+}
 static int
 mos_reg_write_1(struct usbnet *un, int reg, int aval)
+{
 	usb_device_request_t	req;
 	usbd_status		err;
 	uByte			val;
 	if (usbnet_isdying(un))
 		return 0;
 	val = aval;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = MOS_UR_WRITEREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 1);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err)
 		aprint_error_dev(un->un_dev, "write reg %x <- %x\n",
 		    reg, aval);
 	return 0;
+}
 static int
 mos_reg_write_2(struct usbnet *un, int reg, int aval)
+{
 	usb_device_request_t	req;
 	usbd_status		err;
 	uWord			val;
 	USETW(val, aval);
 	if (usbnet_isdying(un))
 		return EIO;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = MOS_UR_WRITEREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 2);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err)
 		aprint_error_dev(un->un_dev, "write reg2 %x <- %x\n",
 		    reg, aval);
 	return 0;
+}
 static int
 mos_readmac(struct usbnet *un)
+{
 	usb_device_request_t	req;
 	usbd_status		err;
 	if (usbnet_isdying(un))
 		return 0;
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = MOS_UR_READREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, MOS_MAC);
 	USETW(req.wLength, ETHER_ADDR_LEN);
 	err = usbd_do_request(un->un_udev, &req, un->un_eaddr);
 	if (err)
 		aprint_error_dev(un->un_dev, "%s: failed", __func__);
 	return err;
+}
 static int
 mos_writemac(struct usbnet *un)
+{
 	usb_device_request_t	req;
 	usbd_status		err;
 	if (usbnet_isdying(un))
 		return 0;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = MOS_UR_WRITEREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, MOS_MAC);
 	USETW(req.wLength, ETHER_ADDR_LEN);
 	err = usbd_do_request(un->un_udev, &req, un->un_eaddr);
 	if (err)
 		aprint_error_dev(un->un_dev, "%s: failed", __func__);
 	return 0;
+}
 static int
 mos_write_mcast(struct usbnet *un, uint8_t *hashtbl)
+{
 	usb_device_request_t	req;
 	usbd_status		err;
 	if (usbnet_isdying(un))
 		return EIO;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = MOS_UR_WRITEREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, MOS_MCAST_TABLE);
 	USETW(req.wLength, 8);
 	err = usbd_do_request(un->un_udev, &req, hashtbl);
 	if (err) {
 		aprint_error_dev(un->un_dev, "%s: failed", __func__);
 		return(-1);
+	}
 	return 0;
+}
 static int
 mos_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
+{
 	int			i, res;
 	mos_reg_write_2(un, MOS_PHY_DATA, 0);
 	mos_reg_write_1(un, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
 	    MOS_PHYCTL_READ);
 	mos_reg_write_1(un, MOS_PHY_STS, (reg & MOS_PHYSTS_PHYREG) |
 	    MOS_PHYSTS_PENDING);
 	for (i = 0; i < MOS_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return ENXIO;
 		if (mos_reg_read_1(un, MOS_PHY_STS) & MOS_PHYSTS_READY)
 			break;
+	}
 	if (i == MOS_TIMEOUT) {
 		aprint_error_dev(un->un_dev, "read PHY failed\n");
 		return EIO;
+	}
 	res = mos_reg_read_2(un, MOS_PHY_DATA);
 	*val = res;
 	DPRINTFN(10,("%s: %s: phy %d reg %d val %u\n",
 	    device_xname(un->un_dev), __func__, phy, reg, res));
 	return 0;
+}
 static int
 mos_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
+{
 	int			i;
 	DPRINTFN(10,("%s: %s: phy %d reg %d val %u\n",
 	    device_xname(un->un_dev), __func__, phy, reg, val));
 	mos_reg_write_2(un, MOS_PHY_DATA, val);
 	mos_reg_write_1(un, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
 	    MOS_PHYCTL_WRITE);
 	mos_reg_write_1(un, MOS_PHY_STS, (reg & MOS_PHYSTS_PHYREG) |
 	    MOS_PHYSTS_PENDING);
 	for (i = 0; i < MOS_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return ENXIO;
 		if (mos_reg_read_1(un, MOS_PHY_STS) & MOS_PHYSTS_READY)
 			break;
+	}
 	if (i == MOS_TIMEOUT) {
 		aprint_error_dev(un->un_dev, "write PHY failed\n");
 		return EIO;
+	}
 	return 0;
+}
 void
 mos_uno_mii_statchg(struct ifnet *ifp)
+{
 	struct usbnet * const		un = ifp->if_softc;
 	struct mii_data * const		mii = usbnet_mii(un);
 	int				val, err;
 	if (usbnet_isdying(un))
 		return;
 	DPRINTFN(10,("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	/* disable RX, TX prior to changing FDX, SPEEDSEL */
 	val = mos_reg_read_1(un, MOS_CTL);
 	val &= ~(MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
 	mos_reg_write_1(un, MOS_CTL, val);
 	/* reset register which counts dropped frames */
 	mos_reg_write_1(un, MOS_FRAME_DROP_CNT, 0);
 	if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
 		val |= MOS_CTL_FDX_ENB;
 	else
 		val &= ~(MOS_CTL_FDX_ENB);
 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
 	    (IFM_ACTIVE | IFM_AVALID)) {
 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
 		case IFM_100_TX:
 			val |=  MOS_CTL_SPEEDSEL;
 			break;
 		case IFM_10_T:
 			val &= ~(MOS_CTL_SPEEDSEL);
 			break;
+		}
 		usbnet_set_link(un, true);
+	}
 	/* re-enable TX, RX */
 	val |= (MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
 	err = mos_reg_write_1(un, MOS_CTL, val);
 	if (err)
 		aprint_error_dev(un->un_dev, "media change failed\n");
+}
 static void
 mos_rcvfilt_locked(struct usbnet *un)
+{
 	struct ifnet		*ifp = usbnet_ifp(un);
 	struct ethercom		*ec = usbnet_ec(un);
 	struct ether_multi	*enm;
 	struct ether_multistep	step;
 	u_int32_t h = 0;
 	u_int8_t rxmode, mchash[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
 	if (usbnet_isdying(un))
 		return;
 	rxmode = mos_reg_read_1(un, MOS_CTL);
 	rxmode &= ~(MOS_CTL_ALLMULTI | MOS_CTL_RX_PROMISC);
 	ETHER_LOCK(ec);
 	if (ifp->if_flags & IFF_PROMISC) {
 		ec->ec_flags |= ETHER_F_ALLMULTI;
 		ETHER_UNLOCK(ec);
 		/* run promisc. mode */
 		rxmode |= MOS_CTL_ALLMULTI; /* ??? */
 		rxmode |= MOS_CTL_RX_PROMISC;
 		goto update;
+	}
 	ec->ec_flags &= ~ETHER_F_ALLMULTI;
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
 			ec->ec_flags |= ETHER_F_ALLMULTI;
 			ETHER_UNLOCK(ec);
 			memset(mchash, 0, sizeof(mchash)); /* correct ??? */
 			/* accept all multicast frame */
 			rxmode |= MOS_CTL_ALLMULTI;
 			goto update;
+		}
 		h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN);
 		/* 3(31:29) and 3(28:26) sampling to have uint8_t[8] */
 		mchash[h >> 29] |= 1 << ((h >> 26) % 8);
 		ETHER_NEXT_MULTI(step, enm);
+	}
 	ETHER_UNLOCK(ec);
 	/* MOS receive filter is always on */
  update:
 	/*
 	 * The datasheet claims broadcast frames were always accepted
 	 * regardless of filter settings. But the hardware seems to
 	 * filter broadcast frames, so pass them explicitly.
 	 */
 	mchash[7] |= 0x80;
 	mos_write_mcast(un, mchash);
 	mos_reg_write_1(un, MOS_CTL, rxmode);
+}
 static void
 mos_reset(struct usbnet *un)
+{
 	u_int8_t ctl;
 	if (usbnet_isdying(un))
 		return;
 	ctl = mos_reg_read_1(un, MOS_CTL);
 	ctl &= ~(MOS_CTL_RX_PROMISC | MOS_CTL_ALLMULTI | MOS_CTL_TX_ENB |
 	    MOS_CTL_RX_ENB);
 	/* Disable RX, TX, promiscuous and allmulticast mode */
 	mos_reg_write_1(un, MOS_CTL, ctl);
 	/* Reset frame drop counter register to zero */
 	mos_reg_write_1(un, MOS_FRAME_DROP_CNT, 0);
 	/* Wait a little while for the chip to get its brains in order. */
 	DELAY(1000);
+}
 void
 mos_chip_init(struct usbnet *un)
+{
 	int	i;
 	/*
 	 * Rev.C devices have a pause threshold register which needs to be set
 	 * at startup.
 	 */
 	if (mos_reg_read_1(un, MOS_PAUSE_TRHD) != -1) {
 		for (i = 0; i < MOS_PAUSE_REWRITES; i++)
 			mos_reg_write_1(un, MOS_PAUSE_TRHD, 0);
+	}
+}
 /*
  * Probe for a MCS7x30 chip.
  */
 static int
 mos_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct usb_attach_arg *uaa = aux;
 	return (mos_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
 	    UMATCH_VENDOR_PRODUCT : UMATCH_NONE);
+}
 /*
  * Attach the interface.
  */
 static void
 mos_attach(device_t parent, device_t self, void *aux)
+{
 	USBNET_MII_DECL_DEFAULT(unm);
 	struct usbnet *		un = device_private(self);
 	struct usb_attach_arg	*uaa = aux;
 	struct usbd_device	*dev = uaa->uaa_device;
 	usbd_status		err;
 	usb_interface_descriptor_t 	*id;
 	usb_endpoint_descriptor_t 	*ed;
 	char			*devinfop;
 	int			i;
 	aprint_naive("\n");
 	aprint_normal("\n");
 	devinfop = usbd_devinfo_alloc(dev, 0);
 	aprint_normal_dev(self, "%s\n", devinfop);
 	usbd_devinfo_free(devinfop);
 	un->un_dev = self;
 	un->un_udev = dev;
 	un->un_sc = un;
 	un->un_ops = &mos_ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
 	un->un_rx_list_cnt = MOS_RX_LIST_CNT;
 	un->un_tx_list_cnt = MOS_TX_LIST_CNT;
 	un->un_rx_bufsz = un->un_tx_bufsz = MOS_BUFSZ;
 	err = usbd_set_config_no(dev, MOS_CONFIG_NO, 1);
 	if (err) {
 		aprint_error_dev(self, "failed to set configuration"
 		    ", err=%s\n", usbd_errstr(err));
 		return;
+	}
 	err = usbd_device2interface_handle(dev, MOS_IFACE_IDX, &un->un_iface);
 	if (err) {
 		aprint_error_dev(self, "failed getting interface handle"
 		    ", err=%s\n", usbd_errstr(err));
 		return;
+	}
 	un->un_flags = mos_lookup(uaa->uaa_vendor, uaa->uaa_product)->mos_flags;
 	id = usbd_get_interface_descriptor(un->un_iface);
 	/* Find endpoints. */
 	for (i = 0; i < id->bNumEndpoints; i++) {
 		ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
 		if (!ed) {
 			aprint_error_dev(self, "couldn't get ep %d\n", i);
 			return;
+		}
 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
 			un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
+		}
+	}
 	if (un->un_flags & MCS7730)
 		aprint_normal_dev(self, "MCS7730\n");
 	else if (un->un_flags & MCS7830)
 		aprint_normal_dev(self, "MCS7830\n");
 	else if (un->un_flags & MCS7832)
 		aprint_normal_dev(self, "MCS7832\n");
 	/* Set these up now for register access. */
 	usbnet_attach(un, "mosdet");
 	mos_chip_init(un);
 	/*
 	 * Read MAC address, inform the world.
 	 */
 	err = mos_readmac(un);
 	if (err) {
 		aprint_error_dev(self, "couldn't read MAC address\n");
 		return;
+	}
 	struct ifnet *ifp = usbnet_ifp(un);
 	ifp->if_capabilities = ETHERCAP_VLAN_MTU;
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 , &unm);
+}
 /*
  * A frame has been uploaded: pass the resulting mbuf chain up to
  * the higher level protocols.
  */
 void
 mos_uno_rx_loop(struct usbnet * un, struct usbnet_chain *c, uint32_t total_len)
+{
 	struct ifnet		*ifp = usbnet_ifp(un);
 	uint8_t			*buf = c->unc_buf;
 	u_int8_t		rxstat;
 	u_int16_t		pktlen = 0;
 	DPRINTFN(5,("%s: %s: enter len %u\n",
 	    device_xname(un->un_dev), __func__, total_len));
 	if (total_len <= 1)
 		return;
 	/* evaluate status byte at the end */
 	pktlen = total_len - 1;
 	if (pktlen > un->un_rx_bufsz) {
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	rxstat = buf[pktlen] & MOS_RXSTS_MASK;
 	if (rxstat != MOS_RXSTS_VALID) {
 		DPRINTF(("%s: erroneous frame received: ",
 		    device_xname(un->un_dev)));
 		if (rxstat & MOS_RXSTS_SHORT_FRAME)
 			DPRINTF(("frame size less than 64 bytes\n"));
 		if (rxstat & MOS_RXSTS_LARGE_FRAME)
 			DPRINTF(("frame size larger than 1532 bytes\n"));
 		if (rxstat & MOS_RXSTS_CRC_ERROR)
 			DPRINTF(("CRC error\n"));
 		if (rxstat & MOS_RXSTS_ALIGN_ERROR)
 			DPRINTF(("alignment error\n"));
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	if (pktlen < sizeof(struct ether_header) ) {
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	usbnet_enqueue(un, c->unc_buf, pktlen, 0, 0, 0);
+}
 static unsigned
 mos_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
+{
 	int			length;
 	if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz)
 		return 0;
 	m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf);
 	length = m->m_pkthdr.len;
 	DPRINTFN(5,("%s: %s: len %u\n",
 	    device_xname(un->un_dev), __func__, length));
 	return length;
+}
 static int
 mos_init_locked(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	u_int8_t		rxmode;
 	unsigned char		ipgs[2];
 	if (usbnet_isdying(un))
 		return EIO;
 	/* Cancel pending I/O */
 	usbnet_stop(un, ifp, 1);
 	/* Reset the ethernet interface. */
 	mos_reset(un);
 	/* Write MAC address. */
 	mos_writemac(un);
 	/* Read and set transmitter IPG values */
 	ipgs[0] = mos_reg_read_1(un, MOS_IPG0);
 	ipgs[1] = mos_reg_read_1(un, MOS_IPG1);
 	mos_reg_write_1(un, MOS_IPG0, ipgs[0]);
 	mos_reg_write_1(un, MOS_IPG1, ipgs[1]);
 	/* Accept multicast frame or run promisc. mode */
 	mos_rcvfilt_locked(un);
 	/* Enable receiver and transmitter, bridge controls speed/duplex mode */
 	rxmode = mos_reg_read_1(un, MOS_CTL);
 	rxmode |= MOS_CTL_RX_ENB | MOS_CTL_TX_ENB | MOS_CTL_BS_ENB;
 	rxmode &= ~(MOS_CTL_SLEEP);
 	mos_reg_write_1(un, MOS_CTL, rxmode);
 	return usbnet_init_rx_tx(un);
+}
 static int
 mos_uno_init(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_busy(un);
 	int ret = mos_init_locked(ifp);
 	usbnet_unbusy(un);
 	return ret;
+}
 static int
 mos_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 	switch (cmd) {
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		mos_rcvfilt_locked(un);
 		break;
 	default:
 		break;
+	}
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	return 0;
+}
 void
 mos_uno_stop(struct ifnet *ifp, int disable)
+{
 	struct usbnet * const un = ifp->if_softc;
 	mos_reset(un);
+}

 @@ -1,1201 +1,1203 @@
-/*	$NetBSD: if_mue.c,v 1.64 2022/03/03 05:50:22 riastradh Exp $	*/
+/*	$NetBSD: if_mue.c,v 1.65 2022/03/03 05:50:57 riastradh Exp $	*/
 /*	$OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $	*/
 /*
  * Copyright (c) 2018 Kevin Lo <kevlo@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 /* Driver for Microchip LAN7500/LAN7800 chipsets. */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.64 2022/03/03 05:50:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.65 2022/03/03 05:50:57 riastradh Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
 #include "opt_inet.h"
 #endif
 #include <sys/param.h>
 #include <dev/usb/usbnet.h>
 #include <dev/usb/if_muereg.h>
 #include <dev/usb/if_muevar.h>
 #define MUE_PRINTF(un, fmt, args...)					\
 	device_printf((un)->un_dev, "%s: " fmt, __func__, ##args);
 #ifdef USB_DEBUG
 int muedebug = 0;
 #define DPRINTF(un, fmt, args...)					\
 	do {								\
 		if (muedebug)						\
 			MUE_PRINTF(un, fmt, ##args);			\
 	} while (0 /* CONSTCOND */)
 #else
 #define DPRINTF(un, fmt, args...)	__nothing
 #endif
 /*
  * Various supported device vendors/products.
  */
 struct mue_type {
 	struct usb_devno	mue_dev;
 	uint16_t		mue_flags;
 #define LAN7500		0x0001	/* LAN7500 */
 #define LAN7800		0x0002	/* LAN7800 */
 #define LAN7801		0x0004	/* LAN7801 */
 #define LAN7850		0x0008	/* LAN7850 */
 };
 static const struct mue_type mue_devs[] = {
 	{ { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7500 }, LAN7500 },
 	{ { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7505 }, LAN7500 },
 	{ { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7800 }, LAN7800 },
 	{ { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7801 }, LAN7801 },
 	{ { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7850 }, LAN7850 }
 };
 #define MUE_LOOKUP(uaa)	((const struct mue_type *)usb_lookup(mue_devs, \
     uaa->uaa_vendor, uaa->uaa_product))
 #define MUE_ENADDR_LO(enaddr) \
     ((enaddr[3] << 24) | (enaddr[2] << 16) | (enaddr[1] << 8) | enaddr[0])
 #define MUE_ENADDR_HI(enaddr) \
     ((enaddr[5] << 8) | enaddr[4])
 static int	mue_match(device_t, cfdata_t, void *);
 static void	mue_attach(device_t, device_t, void *);
 static uint32_t	mue_csr_read(struct usbnet *, uint32_t);
 static int	mue_csr_write(struct usbnet *, uint32_t, uint32_t);
 static int	mue_wait_for_bits(struct usbnet *, uint32_t, uint32_t,
 		    uint32_t, uint32_t);
 static uint8_t	mue_eeprom_getbyte(struct usbnet *, int, uint8_t *);
 static bool	mue_eeprom_present(struct usbnet *);
 static void	mue_dataport_write(struct usbnet *, uint32_t, uint32_t,
 		    uint32_t, uint32_t *);
 static void	mue_init_ltm(struct usbnet *);
 static int	mue_chip_init(struct usbnet *);
 static void	mue_set_macaddr(struct usbnet *);
 static int	mue_get_macaddr(struct usbnet *, prop_dictionary_t);
 static int	mue_prepare_tso(struct usbnet *, struct mbuf *);
 static void	mue_setiff_locked(struct usbnet *);
 static void	mue_sethwcsum_locked(struct usbnet *);
 static void	mue_setmtu_locked(struct usbnet *);
 static void	mue_reset(struct usbnet *);
 static void	mue_uno_stop(struct ifnet *, int);
 static int	mue_uno_ioctl(struct ifnet *, u_long, void *);
 static int	mue_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int	mue_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static void	mue_uno_mii_statchg(struct ifnet *);
 static void	mue_uno_rx_loop(struct usbnet *, struct usbnet_chain *,
 				uint32_t);
 static unsigned	mue_uno_tx_prepare(struct usbnet *, struct mbuf *,
 				   struct usbnet_chain *);
 static int	mue_uno_init(struct ifnet *);
 static const struct usbnet_ops mue_ops = {
 	.uno_stop = mue_uno_stop,
 	.uno_ioctl = mue_uno_ioctl,
 	.uno_read_reg = mue_uno_mii_read_reg,
 	.uno_write_reg = mue_uno_mii_write_reg,
 	.uno_statchg = mue_uno_mii_statchg,
 	.uno_tx_prepare = mue_uno_tx_prepare,
 	.uno_rx_loop = mue_uno_rx_loop,
 	.uno_init = mue_uno_init,
 };
 #define MUE_SETBIT(un, reg, x)	\
 	mue_csr_write(un, reg, mue_csr_read(un, reg) | (x))
 #define MUE_CLRBIT(un, reg, x)	\
 	mue_csr_write(un, reg, mue_csr_read(un, reg) & ~(x))
 #define MUE_WAIT_SET(un, reg, set, fail)	\
 	mue_wait_for_bits(un, reg, set, ~0, fail)
 #define MUE_WAIT_CLR(un, reg, clear, fail)	\
 	mue_wait_for_bits(un, reg, 0, clear, fail)
 #define ETHER_IS_VALID(addr) \
 	(!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
 #define ETHER_IS_ZERO(addr) \
 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
 CFATTACH_DECL_NEW(mue, sizeof(struct usbnet), mue_match, mue_attach,
     usbnet_detach, usbnet_activate);
 static uint32_t
 mue_csr_read(struct usbnet *un, uint32_t reg)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	uDWord val;
 	if (usbnet_isdying(un))
 		return 0;
 	USETDW(val, 0);
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = MUE_UR_READREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 4);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		MUE_PRINTF(un, "reg = %#x: %s\n", reg, usbd_errstr(err));
 		return 0;
+	}
 	return UGETDW(val);
+}
 static int
 mue_csr_write(struct usbnet *un, uint32_t reg, uint32_t aval)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	uDWord val;
 	if (usbnet_isdying(un))
 		return 0;
 	USETDW(val, aval);
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = MUE_UR_WRITEREG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, reg);
 	USETW(req.wLength, 4);
 	err = usbd_do_request(un->un_udev, &req, &val);
 	if (err) {
 		MUE_PRINTF(un, "reg = %#x: %s\n", reg, usbd_errstr(err));
 		return -1;
+	}
 	return 0;
+}
 static int
 mue_wait_for_bits(struct usbnet *un, uint32_t reg,
     uint32_t set, uint32_t clear, uint32_t fail)
+{
 	uint32_t val;
 	int ntries;
 	for (ntries = 0; ntries < 1000; ntries++) {
 		if (usbnet_isdying(un))
 			return 1;
 		val = mue_csr_read(un, reg);
 		if ((val & set) || !(val & clear))
 			return 0;
 		if (val & fail)
 			return 1;
 		usbd_delay_ms(un->un_udev, 1);
+	}
 	return 1;
+}
 static int
 mue_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
+{
 	uint32_t data;
 	if (un->un_phyno != phy)
 		return EINVAL;
 	if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
 		MUE_PRINTF(un, "not ready\n");
 		return EBUSY;
+	}
 	mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_READ |
 	    MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
 	    MUE_MII_ACCESS_PHYADDR(phy));
 	if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
 		MUE_PRINTF(un, "timed out\n");
 		return ETIMEDOUT;
+	}
 	data = mue_csr_read(un, MUE_MII_DATA);
 	*val = data & 0xffff;
 	return 0;
+}
 static int
 mue_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
+{
 	if (un->un_phyno != phy)
 		return EINVAL;
 	if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
 		MUE_PRINTF(un, "not ready\n");
 		return EBUSY;
+	}
 	mue_csr_write(un, MUE_MII_DATA, val);
 	mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE |
 	    MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
 	    MUE_MII_ACCESS_PHYADDR(phy));
 	if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
 		MUE_PRINTF(un, "timed out\n");
 		return ETIMEDOUT;
+	}
 	return 0;
+}
 static void
 mue_uno_mii_statchg(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	struct mii_data * const mii = usbnet_mii(un);
 	uint32_t flow, threshold;
 	if (usbnet_isdying(un))
 		return;
 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
 	    (IFM_ACTIVE | IFM_AVALID)) {
 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
 		case IFM_10_T:
 		case IFM_100_TX:
 		case IFM_1000_T:
 			usbnet_set_link(un, true);
 			break;
 		default:
 			break;
+		}
+	}
 	/* Lost link, do nothing. */
 	if (!usbnet_havelink(un)) {
 		DPRINTF(un, "mii_media_status = %#x\n", mii->mii_media_status);
 		return;
+	}
 	if (!(un->un_flags & LAN7500)) {
 		if (un->un_udev->ud_speed == USB_SPEED_SUPER) {
 			if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
 				/* Disable U2 and enable U1. */
 				MUE_CLRBIT(un, MUE_USB_CFG1,
 				    MUE_USB_CFG1_DEV_U2_INIT_EN);
 				MUE_SETBIT(un, MUE_USB_CFG1,
 				    MUE_USB_CFG1_DEV_U1_INIT_EN);
 			} else {
 				/* Enable U1 and U2. */
 				MUE_SETBIT(un, MUE_USB_CFG1,
 				    MUE_USB_CFG1_DEV_U1_INIT_EN |
 				    MUE_USB_CFG1_DEV_U2_INIT_EN);
+			}
+		}
+	}
 	flow = 0;
 	/* XXX Linux does not check IFM_FDX flag for 7800. */
 	if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) {
 		if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE)
 			flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME;
 		if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE)
 			flow |= MUE_FLOW_RX_FCEN;
+	}
 	/* XXX Magic numbers taken from Linux driver. */
 	if (un->un_flags & LAN7500)
 		threshold = 0x820;
 	else
 		switch (un->un_udev->ud_speed) {
 		case USB_SPEED_SUPER:
 			threshold = 0x817;
 			break;
 		case USB_SPEED_HIGH:
 			threshold = 0x211;
 			break;
 		default:
 			threshold = 0;
 			break;
+		}
 	/* Threshold value should be set before enabling flow. */
 	mue_csr_write(un, (un->un_flags & LAN7500) ?
 	    MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, threshold);
 	mue_csr_write(un, MUE_FLOW, flow);
 	DPRINTF(un, "done\n");
+}
 static uint8_t
 mue_eeprom_getbyte(struct usbnet *un, int off, uint8_t *dest)
+{
 	uint32_t val;
 	if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY, 0)) {
 		MUE_PRINTF(un, "not ready\n");
 		return ETIMEDOUT;
+	}
 	KASSERT((off & ~MUE_E2P_CMD_ADDR_MASK) == 0);
 	mue_csr_write(un, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY |
 	    off);
 	if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY,
 	    MUE_E2P_CMD_TIMEOUT)) {
 		MUE_PRINTF(un, "timed out\n");
 		return ETIMEDOUT;
+	}
 	val = mue_csr_read(un, MUE_E2P_DATA);
 	*dest = val & 0xff;
 	return 0;
+}
 static int
 mue_read_eeprom(struct usbnet *un, uint8_t *dest, int off, int cnt)
+{
 	uint32_t val = 0; /* XXX gcc */
 	uint8_t byte;
 	int i, err = 0;
 	/*
 	 * EEPROM pins are muxed with the LED function on LAN7800 device.
 	 */
 	if (un->un_flags & LAN7800) {
 		val = mue_csr_read(un, MUE_HW_CFG);
 		mue_csr_write(un, MUE_HW_CFG,
 		    val & ~(MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN));
+	}
 	for (i = 0; i < cnt; i++) {
 		err = mue_eeprom_getbyte(un, off + i, &byte);
 		if (err)
 			break;
 		*(dest + i) = byte;
+	}
 	if (un->un_flags & LAN7800)
 		mue_csr_write(un, MUE_HW_CFG, val);
 	return err ? 1 : 0;
+}
 static bool
 mue_eeprom_present(struct usbnet *un)
+{
 	uint32_t val;
 	uint8_t sig;
 	int ret;
 	if (un->un_flags & LAN7500) {
 		val = mue_csr_read(un, MUE_E2P_CMD);
 		return val & MUE_E2P_CMD_LOADED;
 	} else {
 		ret = mue_read_eeprom(un, &sig, MUE_E2P_IND_OFFSET, 1);
 		return (ret == 0) && (sig == MUE_E2P_IND);
+	}
+}
 static int
 mue_read_otp_raw(struct usbnet *un, uint8_t *dest, int off, int cnt)
+{
 	uint32_t val;
 	int i, err;
 	val = mue_csr_read(un, MUE_OTP_PWR_DN);
 	/* Checking if bit is set. */
 	if (val & MUE_OTP_PWR_DN_PWRDN_N) {
 		/* Clear it, then wait for it to be cleared. */
 		mue_csr_write(un, MUE_OTP_PWR_DN, 0);
 		err = MUE_WAIT_CLR(un, MUE_OTP_PWR_DN, MUE_OTP_PWR_DN_PWRDN_N,
 );
 		if (err) {
 			MUE_PRINTF(un, "not ready\n");
 			return 1;
+		}
+	}
 	/* Start reading the bytes, one at a time. */
 	for (i = 0; i < cnt; i++) {
 		mue_csr_write(un, MUE_OTP_ADDR1,
 		    ((off + i) >> 8) & MUE_OTP_ADDR1_MASK);
 		mue_csr_write(un, MUE_OTP_ADDR2,
 		    ((off + i) & MUE_OTP_ADDR2_MASK));
 		mue_csr_write(un, MUE_OTP_FUNC_CMD, MUE_OTP_FUNC_CMD_READ);
 		mue_csr_write(un, MUE_OTP_CMD_GO, MUE_OTP_CMD_GO_GO);
 		err = MUE_WAIT_CLR(un, MUE_OTP_STATUS, MUE_OTP_STATUS_BUSY, 0);
 		if (err) {
 			MUE_PRINTF(un, "timed out\n");
 			return 1;
+		}
 		val = mue_csr_read(un, MUE_OTP_RD_DATA);
 		*(dest + i) = (uint8_t)(val & 0xff);
+	}
 	return 0;
+}
 static int
 mue_read_otp(struct usbnet *un, uint8_t *dest, int off, int cnt)
+{
 	uint8_t sig;
 	int err;
 	if (un->un_flags & LAN7500)
 		return 1;
 	err = mue_read_otp_raw(un, &sig, MUE_OTP_IND_OFFSET, 1);
 	if (err)
 		return 1;
 	switch (sig) {
 	case MUE_OTP_IND_1:
 		break;
 	case MUE_OTP_IND_2:
 		off += 0x100;
 		break;
 	default:
 		DPRINTF(un, "OTP not found\n");
 		return 1;
+	}
 	err = mue_read_otp_raw(un, dest, off, cnt);
 	return err;
+}
 static void
 mue_dataport_write(struct usbnet *un, uint32_t sel, uint32_t addr,
     uint32_t cnt, uint32_t *data)
+{
 	uint32_t i;
 	if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
 		MUE_PRINTF(un, "not ready\n");
 		return;
+	}
 	mue_csr_write(un, MUE_DP_SEL,
 	    (mue_csr_read(un, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel);
 	for (i = 0; i < cnt; i++) {
 		mue_csr_write(un, MUE_DP_ADDR, addr + i);
 		mue_csr_write(un, MUE_DP_DATA, data[i]);
 		mue_csr_write(un, MUE_DP_CMD, MUE_DP_CMD_WRITE);
 		if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
 			MUE_PRINTF(un, "timed out\n");
 			return;
+		}
+	}
+}
 static void
 mue_init_ltm(struct usbnet *un)
+{
 	uint32_t idx[MUE_NUM_LTM_INDEX] = { 0, 0, 0, 0, 0, 0 };
 	uint8_t temp[2];
 	size_t i;
 	if (mue_csr_read(un, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) {
 		if (mue_eeprom_present(un) &&
 		    (mue_read_eeprom(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0)) {
 			if (temp[0] != sizeof(idx)) {
 				DPRINTF(un, "EEPROM: unexpected size\n");
 				goto done;
+			}
 			if (mue_read_eeprom(un, (uint8_t *)idx, temp[1] << 1,
 				sizeof(idx))) {
 				DPRINTF(un, "EEPROM: failed to read\n");
 				goto done;
+			}
 			DPRINTF(un, "success\n");
 		} else if (mue_read_otp(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0) {
 			if (temp[0] != sizeof(idx)) {
 				DPRINTF(un, "OTP: unexpected size\n");
 				goto done;
+			}
 			if (mue_read_otp(un, (uint8_t *)idx, temp[1] << 1,
 				sizeof(idx))) {
 				DPRINTF(un, "OTP: failed to read\n");
 				goto done;
+			}
 			DPRINTF(un, "success\n");
 		} else
 			DPRINTF(un, "nothing to do\n");
 	} else
 		DPRINTF(un, "nothing to do\n");
 done:
 	for (i = 0; i < __arraycount(idx); i++)
 		mue_csr_write(un, MUE_LTM_INDEX(i), idx[i]);
+}
 static int
 mue_chip_init(struct usbnet *un)
+{
 	uint32_t val;
 	if ((un->un_flags & LAN7500) &&
 	    MUE_WAIT_SET(un, MUE_PMT_CTL, MUE_PMT_CTL_READY, 0)) {
 		MUE_PRINTF(un, "not ready\n");
 			return ETIMEDOUT;
+	}
 	MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_LRST);
 	if (MUE_WAIT_CLR(un, MUE_HW_CFG, MUE_HW_CFG_LRST, 0)) {
 		MUE_PRINTF(un, "timed out\n");
 		return ETIMEDOUT;
+	}
 	/* Respond to the IN token with a NAK. */
 	if (un->un_flags & LAN7500)
 		MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BIR);
 	else
 		MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BIR);
 	if (un->un_flags & LAN7500) {
 		if (un->un_udev->ud_speed == USB_SPEED_HIGH)
 			val = MUE_7500_HS_RX_BUFSIZE /
 			    MUE_HS_USB_PKT_SIZE;
 		else
 			val = MUE_7500_FS_RX_BUFSIZE /
 			    MUE_FS_USB_PKT_SIZE;
 		mue_csr_write(un, MUE_7500_BURST_CAP, val);
 		mue_csr_write(un, MUE_7500_BULKIN_DELAY,
 		    MUE_7500_DEFAULT_BULKIN_DELAY);
 		MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF);
 		/* Set FIFO sizes. */
 		val = (MUE_7500_MAX_RX_FIFO_SIZE - 512) / 512;
 		mue_csr_write(un, MUE_7500_FCT_RX_FIFO_END, val);
 		val = (MUE_7500_MAX_TX_FIFO_SIZE - 512) / 512;
 		mue_csr_write(un, MUE_7500_FCT_TX_FIFO_END, val);
 	} else {
 		/* Init LTM. */
 		mue_init_ltm(un);
 		val = MUE_7800_RX_BUFSIZE;
 		switch (un->un_udev->ud_speed) {
 		case USB_SPEED_SUPER:
 			val /= MUE_SS_USB_PKT_SIZE;
 			break;
 		case USB_SPEED_HIGH:
 			val /= MUE_HS_USB_PKT_SIZE;
 			break;
 		default:
 			val /= MUE_FS_USB_PKT_SIZE;
 			break;
+		}
 		mue_csr_write(un, MUE_7800_BURST_CAP, val);
 		mue_csr_write(un, MUE_7800_BULKIN_DELAY,
 		    MUE_7800_DEFAULT_BULKIN_DELAY);
 		MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_MEF);
 		MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BCE);
 		/*
 		 * Set FCL's RX and TX FIFO sizes: according to data sheet this
 		 * is already the default value. But we initialize it to the
 		 * same value anyways, as that's what the Linux driver does.
 		 */
 		val = (MUE_7800_MAX_RX_FIFO_SIZE - 512) / 512;
 		mue_csr_write(un, MUE_7800_FCT_RX_FIFO_END, val);
 		val = (MUE_7800_MAX_TX_FIFO_SIZE - 512) / 512;
 		mue_csr_write(un, MUE_7800_FCT_TX_FIFO_END, val);
+	}
 	/* Enabling interrupts. */
 	mue_csr_write(un, MUE_INT_STATUS, ~0);
 	mue_csr_write(un, (un->un_flags & LAN7500) ?
 	    MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, 0);
 	mue_csr_write(un, MUE_FLOW, 0);
 	/* Reset PHY. */
 	MUE_SETBIT(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST);
 	if (MUE_WAIT_CLR(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST, 0)) {
 		MUE_PRINTF(un, "PHY not ready\n");
 		return ETIMEDOUT;
+	}
 	/* LAN7801 only has RGMII mode. */
 	if (un->un_flags & LAN7801)
 		MUE_CLRBIT(un, MUE_MAC_CR, MUE_MAC_CR_GMII_EN);
 	if ((un->un_flags & (LAN7500 | LAN7800)) ||
 	    !mue_eeprom_present(un)) {
 		/* Allow MAC to detect speed and duplex from PHY. */
 		MUE_SETBIT(un, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED |
 		    MUE_MAC_CR_AUTO_DUPLEX);
+	}
 	MUE_SETBIT(un, MUE_MAC_TX, MUE_MAC_TX_TXEN);
 	MUE_SETBIT(un, (un->un_flags & LAN7500) ?
 	    MUE_7500_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN);
 	MUE_SETBIT(un, (un->un_flags & LAN7500) ?
 	    MUE_7500_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN);
 	/* Set default GPIO/LED settings only if no EEPROM is detected. */
 	if ((un->un_flags & LAN7500) && !mue_eeprom_present(un)) {
 		MUE_CLRBIT(un, MUE_LED_CFG, MUE_LED_CFG_LED10_FUN_SEL);
 		MUE_SETBIT(un, MUE_LED_CFG,
 		    MUE_LED_CFG_LEDGPIO_EN | MUE_LED_CFG_LED2_FUN_SEL);
+	}
 	/* XXX We assume two LEDs at least when EEPROM is missing. */
 	if (un->un_flags & LAN7800 &&
 	    !mue_eeprom_present(un))
 		MUE_SETBIT(un, MUE_HW_CFG,
 		    MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN);
 	return 0;
+}
 static void
 mue_set_macaddr(struct usbnet *un)
+{
 	struct ifnet * const ifp = usbnet_ifp(un);
 	const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
 	uint32_t lo, hi;
 	lo = MUE_ENADDR_LO(enaddr);
 	hi = MUE_ENADDR_HI(enaddr);
 	mue_csr_write(un, MUE_RX_ADDRL, lo);
 	mue_csr_write(un, MUE_RX_ADDRH, hi);
+}
 static int
 mue_get_macaddr(struct usbnet *un, prop_dictionary_t dict)
+{
 	prop_data_t eaprop;
 	uint32_t low, high;
 	if (!(un->un_flags & LAN7500)) {
 		low  = mue_csr_read(un, MUE_RX_ADDRL);
 		high = mue_csr_read(un, MUE_RX_ADDRH);
 		un->un_eaddr[5] = (uint8_t)((high >> 8) & 0xff);
 		un->un_eaddr[4] = (uint8_t)((high) & 0xff);
 		un->un_eaddr[3] = (uint8_t)((low >> 24) & 0xff);
 		un->un_eaddr[2] = (uint8_t)((low >> 16) & 0xff);
 		un->un_eaddr[1] = (uint8_t)((low >> 8) & 0xff);
 		un->un_eaddr[0] = (uint8_t)((low) & 0xff);
 		if (ETHER_IS_VALID(un->un_eaddr))
 			return 0;
 		else
 			DPRINTF(un, "registers: %s\n",
 			    ether_sprintf(un->un_eaddr));
+	}
 	if (mue_eeprom_present(un) && !mue_read_eeprom(un, un->un_eaddr,
 	    MUE_E2P_MAC_OFFSET, ETHER_ADDR_LEN)) {
 		if (ETHER_IS_VALID(un->un_eaddr))
 			return 0;
 		else
 			DPRINTF(un, "EEPROM: %s\n",
 			    ether_sprintf(un->un_eaddr));
+	}
 	if (mue_read_otp(un, un->un_eaddr, MUE_OTP_MAC_OFFSET,
 	    ETHER_ADDR_LEN) == 0) {
 		if (ETHER_IS_VALID(un->un_eaddr))
 			return 0;
 		else
 			DPRINTF(un, "OTP: %s\n",
 			    ether_sprintf(un->un_eaddr));
+	}
 	/*
 	 * Other MD methods. This should be tried only if other methods fail.
 	 * Otherwise, MAC address for internal device can be assinged to
 	 * external devices on Raspberry Pi, for example.
 	 */
 	eaprop = prop_dictionary_get(dict, "mac-address");
 	if (eaprop != NULL) {
 		KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
 		KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
 		memcpy(un->un_eaddr, prop_data_value(eaprop),
 		    ETHER_ADDR_LEN);
 		if (ETHER_IS_VALID(un->un_eaddr))
 			return 0;
 		else
 			DPRINTF(un, "prop_dictionary_get: %s\n",
 			    ether_sprintf(un->un_eaddr));
+	}
 	return 1;
+}
 /*
  * Probe for a Microchip chip.
  */
 static int
 mue_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct usb_attach_arg *uaa = aux;
 	return (MUE_LOOKUP(uaa) != NULL) ?  UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
+}
 static void
 mue_attach(device_t parent, device_t self, void *aux)
+{
 	USBNET_MII_DECL_DEFAULT(unm);
 	struct usbnet * const un = device_private(self);
 	prop_dictionary_t dict = device_properties(self);
 	struct usb_attach_arg *uaa = aux;
 	struct usbd_device *dev = uaa->uaa_device;
 	usb_interface_descriptor_t *id;
 	usb_endpoint_descriptor_t *ed;
 	char *devinfop;
 	usbd_status err;
 	const char *descr;
 	uint32_t id_rev;
 	uint8_t i;
 	unsigned rx_list_cnt, tx_list_cnt;
 	unsigned rx_bufsz;
 	aprint_naive("\n");
 	aprint_normal("\n");
 	devinfop = usbd_devinfo_alloc(dev, 0);
 	aprint_normal_dev(self, "%s\n", devinfop);
 	usbd_devinfo_free(devinfop);
 	un->un_dev = self;
 	un->un_udev = dev;
 	un->un_sc = un;
 	un->un_ops = &mue_ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
 #define MUE_CONFIG_NO	1
 	err = usbd_set_config_no(dev, MUE_CONFIG_NO, 1);
 	if (err) {
 		aprint_error_dev(self, "failed to set configuration: %s\n",
 		    usbd_errstr(err));
 		return;
+	}
 #define MUE_IFACE_IDX	0
 	err = usbd_device2interface_handle(dev, MUE_IFACE_IDX, &un->un_iface);
 	if (err) {
 		aprint_error_dev(self, "failed to get interface handle: %s\n",
 		    usbd_errstr(err));
 		return;
+	}
 	un->un_flags = MUE_LOOKUP(uaa)->mue_flags;
 	/* Decide on what our bufsize will be. */
 	if (un->un_flags & LAN7500) {
 		rx_bufsz = (un->un_udev->ud_speed == USB_SPEED_HIGH) ?
 		    MUE_7500_HS_RX_BUFSIZE : MUE_7500_FS_RX_BUFSIZE;
 		rx_list_cnt = 1;
 		tx_list_cnt = 1;
 	} else {
 		rx_bufsz = MUE_7800_RX_BUFSIZE;
 		rx_list_cnt = MUE_RX_LIST_CNT;
 		tx_list_cnt = MUE_TX_LIST_CNT;
+	}
 	un->un_rx_list_cnt = rx_list_cnt;
 	un->un_tx_list_cnt = tx_list_cnt;
 	un->un_rx_bufsz = rx_bufsz;
 	un->un_tx_bufsz = MUE_TX_BUFSIZE;
 	/* Find endpoints. */
 	id = usbd_get_interface_descriptor(un->un_iface);
 	for (i = 0; i < id->bNumEndpoints; i++) {
 		ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
 		if (ed == NULL) {
 			aprint_error_dev(self, "failed to get ep %hhd\n", i);
 			return;
+		}
 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
 			un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
+		}
+	}
 	if (un->un_ed[USBNET_ENDPT_RX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_TX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_INTR] == 0) {
 		aprint_error_dev(self, "failed to find endpoints\n");
 		return;
+	}
 	/* Set these up now for mue_cmd().  */
 	usbnet_attach(un, "muedet");
 	un->un_phyno = 1;
 	if (mue_chip_init(un)) {
 		aprint_error_dev(self, "failed to initialize chip\n");
 		return;
+	}
 	/* A Microchip chip was detected.  Inform the world. */
 	id_rev = mue_csr_read(un, MUE_ID_REV);
 	descr = (un->un_flags & LAN7500) ? "LAN7500" : "LAN7800";
 	aprint_normal_dev(self, "%s id %#x rev %#x\n", descr,
 		(unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_ID),
 		(unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_REV));
 	if (mue_get_macaddr(un, dict)) {
 		aprint_error_dev(self, "failed to read MAC address\n");
 		return;
+	}
 	struct ifnet *ifp = usbnet_ifp(un);
 	ifp->if_capabilities = IFCAP_TSOv4 | IFCAP_TSOv6 |
 	    IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
 	    IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
 	    IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
 	    IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_TCPv6_Rx |
 	    IFCAP_CSUM_UDPv6_Tx | IFCAP_CSUM_UDPv6_Rx;
 	struct ethercom *ec = usbnet_ec(un);
 	ec->ec_capabilities = ETHERCAP_VLAN_MTU;
 #if 0 /* XXX not yet */
 	ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
 #endif
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 , &unm);
+}
 static unsigned
 mue_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
+{
 	struct ifnet * const ifp = usbnet_ifp(un);
 	struct mue_txbuf_hdr hdr;
 	uint32_t tx_cmd_a, tx_cmd_b;
 	int csum, len, rv;
 	bool tso, ipe, tpe;
 	if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - sizeof(hdr))
 		return 0;
 	csum = m->m_pkthdr.csum_flags;
 	tso = csum & (M_CSUM_TSOv4 | M_CSUM_TSOv6);
 	ipe = csum & M_CSUM_IPv4;
 	tpe = csum & (M_CSUM_TCPv4 | M_CSUM_UDPv4 |
 		      M_CSUM_TCPv6 | M_CSUM_UDPv6);
 	len = m->m_pkthdr.len;
 	if (__predict_false((!tso && len > (int)MUE_FRAME_LEN(ifp->if_mtu)) ||
 			    ( tso && len > MUE_TSO_FRAME_LEN))) {
 		MUE_PRINTF(un, "packet length %d\n too long", len);
 		return 0;
+	}
 	KASSERT((len & ~MUE_TX_CMD_A_LEN_MASK) == 0);
 	tx_cmd_a = len | MUE_TX_CMD_A_FCS;
 	if (tso) {
 		tx_cmd_a |= MUE_TX_CMD_A_LSO;
 		if (__predict_true(m->m_pkthdr.segsz > MUE_TX_MSS_MIN))
 			tx_cmd_b = m->m_pkthdr.segsz;
 		else
 			tx_cmd_b = MUE_TX_MSS_MIN;
 		tx_cmd_b <<= MUE_TX_CMD_B_MSS_SHIFT;
 		KASSERT((tx_cmd_b & ~MUE_TX_CMD_B_MSS_MASK) == 0);
 		rv = mue_prepare_tso(un, m);
 		if (__predict_false(rv))
 			return 0;
 	} else {
 		if (ipe)
 			tx_cmd_a |= MUE_TX_CMD_A_IPE;
 		if (tpe)
 			tx_cmd_a |= MUE_TX_CMD_A_TPE;
 		tx_cmd_b = 0;
+	}
 	hdr.tx_cmd_a = htole32(tx_cmd_a);
 	hdr.tx_cmd_b = htole32(tx_cmd_b);
 	memcpy(c->unc_buf, &hdr, sizeof(hdr));
 	m_copydata(m, 0, len, c->unc_buf + sizeof(hdr));
 	return len + sizeof(hdr);
+}
 /*
  * L3 length field should be cleared.
  */
 static int
 mue_prepare_tso(struct usbnet *un, struct mbuf *m)
+{
 	struct ether_header *eh;
 	struct ip *ip;
 	struct ip6_hdr *ip6;
 	uint16_t type, len = 0;
 	int off;
 	if (__predict_true(m->m_len >= (int)sizeof(*eh))) {
 		eh = mtod(m, struct ether_header *);
 		type = eh->ether_type;
 	} else
 		m_copydata(m, offsetof(struct ether_header, ether_type),
 		    sizeof(type), &type);
 	switch (type = htons(type)) {
 	case ETHERTYPE_IP:
 	case ETHERTYPE_IPV6:
 		off = ETHER_HDR_LEN;
 		break;
 	case ETHERTYPE_VLAN:
 		off = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
 		break;
 	default:
 		return EINVAL;
+	}
 	if (m->m_pkthdr.csum_flags & M_CSUM_TSOv4) {
 		if (__predict_true(m->m_len >= off + (int)sizeof(*ip))) {
 			ip = (void *)(mtod(m, char *) + off);
 			ip->ip_len = 0;
 		} else
 			m_copyback(m, off + offsetof(struct ip, ip_len),
 			    sizeof(len), &len);
 	} else {
 		if (__predict_true(m->m_len >= off + (int)sizeof(*ip6))) {
 			ip6 = (void *)(mtod(m, char *) + off);
 			ip6->ip6_plen = 0;
 		} else
 			m_copyback(m, off + offsetof(struct ip6_hdr, ip6_plen),
 			    sizeof(len), &len);
+	}
 	return 0;
+}
 static void
 mue_setiff_locked(struct usbnet *un)
+{
 	struct ethercom *ec = usbnet_ec(un);
 	struct ifnet * const ifp = usbnet_ifp(un);
 	const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
 	struct ether_multi *enm;
 	struct ether_multistep step;
 	uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2];
 	uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN];
 	uint32_t reg, rxfilt, h, hireg, loreg;
 	size_t i;
 	if (usbnet_isdying(un))
 		return;
 	/* Clear perfect filter and hash tables. */
 	memset(pfiltbl, 0, sizeof(pfiltbl));
 	memset(hashtbl, 0, sizeof(hashtbl));
 	reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
 	rxfilt = mue_csr_read(un, reg);
 	rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
 	    MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
 	/* Always accept broadcast frames. */
 	rxfilt |= MUE_RFE_CTL_BROADCAST;
 	if (ifp->if_flags & IFF_PROMISC) {
 		rxfilt |= MUE_RFE_CTL_UNICAST;
 allmulti:	rxfilt |= MUE_RFE_CTL_MULTICAST;
 		ifp->if_flags |= IFF_ALLMULTI;
 		if (ifp->if_flags & IFF_PROMISC)
 			DPRINTF(un, "promisc\n");
 		else
 			DPRINTF(un, "allmulti\n");
 	} else {
 		/* Now program new ones. */
 		pfiltbl[0][0] = MUE_ENADDR_HI(enaddr) | MUE_ADDR_FILTX_VALID;
 		pfiltbl[0][1] = MUE_ENADDR_LO(enaddr);
 		i = 1;
 		ETHER_LOCK(ec);
 		ETHER_FIRST_MULTI(step, ec, enm);
 		while (enm != NULL) {
 			if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
 			    ETHER_ADDR_LEN)) {
 				memset(pfiltbl, 0, sizeof(pfiltbl));
 				memset(hashtbl, 0, sizeof(hashtbl));
 				rxfilt &= ~MUE_RFE_CTL_MULTICAST_HASH;
 				ETHER_UNLOCK(ec);
 				goto allmulti;
+			}
 			if (i < MUE_NUM_ADDR_FILTX) {
 				/* Use perfect address table if possible. */
 				pfiltbl[i][0] = MUE_ENADDR_HI(enm->enm_addrlo) |
 				    MUE_ADDR_FILTX_VALID;
 				pfiltbl[i][1] = MUE_ENADDR_LO(enm->enm_addrlo);
 			} else {
 				/* Otherwise, use hash table. */
 				rxfilt |= MUE_RFE_CTL_MULTICAST_HASH;
 				h = (ether_crc32_be(enm->enm_addrlo,
 				    ETHER_ADDR_LEN) >> 23) & 0x1ff;
 				hashtbl[h / 32] |= 1 << (h % 32);
+			}
 			i++;
 			ETHER_NEXT_MULTI(step, enm);
+		}
 		ETHER_UNLOCK(ec);
 		rxfilt |= MUE_RFE_CTL_PERFECT;
 		ifp->if_flags &= ~IFF_ALLMULTI;
 		if (rxfilt & MUE_RFE_CTL_MULTICAST_HASH)
 			DPRINTF(un, "perfect filter and hash tables\n");
 		else
 			DPRINTF(un, "perfect filter\n");
+	}
 	for (i = 0; i < MUE_NUM_ADDR_FILTX; i++) {
 		hireg = (un->un_flags & LAN7500) ?
 		    MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i);
 		loreg = hireg + 4;
 		mue_csr_write(un, hireg, 0);
 		mue_csr_write(un, loreg, pfiltbl[i][1]);
 		mue_csr_write(un, hireg, pfiltbl[i][0]);
+	}
 	mue_dataport_write(un, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN,
 	    MUE_DP_SEL_VHF_HASH_LEN, hashtbl);
 	mue_csr_write(un, reg, rxfilt);
+}
 static void
 mue_sethwcsum_locked(struct usbnet *un)
+{
 	struct ifnet * const ifp = usbnet_ifp(un);
 	uint32_t reg, val;
 	reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
 	val = mue_csr_read(un, reg);
 	if (ifp->if_capenable & IFCAP_CSUM_IPv4_Rx) {
 		DPRINTF(un, "RX IPv4 hwcsum enabled\n");
 		val |= MUE_RFE_CTL_IP_COE;
 	} else {
 		DPRINTF(un, "RX IPv4 hwcsum disabled\n");
 		val &= ~MUE_RFE_CTL_IP_COE;
+	}
 	if (ifp->if_capenable &
 	    (IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
 	     IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx)) {
 		DPRINTF(un, "RX L4 hwcsum enabled\n");
 		val |= MUE_RFE_CTL_TCPUDP_COE;
 	} else {
 		DPRINTF(un, "RX L4 hwcsum disabled\n");
 		val &= ~MUE_RFE_CTL_TCPUDP_COE;
+	}
 	val &= ~MUE_RFE_CTL_VLAN_FILTER;
 	mue_csr_write(un, reg, val);
+}
 static void
 mue_setmtu_locked(struct usbnet *un)
+{
 	struct ifnet * const ifp = usbnet_ifp(un);
 	uint32_t val;
 	/* Set the maximum frame size. */
 	MUE_CLRBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN);
 	val = mue_csr_read(un, MUE_MAC_RX);
 	val &= ~MUE_MAC_RX_MAX_SIZE_MASK;
 	val |= MUE_MAC_RX_MAX_LEN(MUE_FRAME_LEN(ifp->if_mtu));
 	mue_csr_write(un, MUE_MAC_RX, val);
 	MUE_SETBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN);
+}
 static void
 mue_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
+{
 	struct ifnet * const ifp = usbnet_ifp(un);
 	struct mue_rxbuf_hdr *hdrp;
 	uint32_t rx_cmd_a;
 	uint16_t pktlen;
 	int csum;
 	uint8_t *buf = c->unc_buf;
 	bool v6;
 	KASSERTMSG(total_len <= un->un_rx_bufsz, "%u vs %u",
 	    total_len, un->un_rx_bufsz);
 	do {
 		if (__predict_false(total_len < sizeof(*hdrp))) {
 			MUE_PRINTF(un, "packet length %u too short\n", total_len);
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		hdrp = (struct mue_rxbuf_hdr *)buf;
 		rx_cmd_a = le32toh(hdrp->rx_cmd_a);
 		if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ERRORS)) {
 			/*
 			 * We cannot use MUE_RX_CMD_A_RED bit here;
 			 * it is turned on in the cases of L3/L4
 			 * checksum errors which we handle below.
 			 */
 			MUE_PRINTF(un, "rx_cmd_a: %#x\n", rx_cmd_a);
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		pktlen = (uint16_t)(rx_cmd_a & MUE_RX_CMD_A_LEN_MASK);
 		if (un->un_flags & LAN7500)
 			pktlen -= 2;
 		if (__predict_false(pktlen < ETHER_HDR_LEN + ETHER_CRC_LEN ||
 		    pktlen > MCLBYTES - ETHER_ALIGN || /* XXX */
 		    pktlen + sizeof(*hdrp) > total_len)) {
 			MUE_PRINTF(un, "invalid packet length %d\n", pktlen);
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ICSM)) {
 			csum = 0;
 		} else {
 			v6 = rx_cmd_a & MUE_RX_CMD_A_IPV;
 			switch (rx_cmd_a & MUE_RX_CMD_A_PID) {
 			case MUE_RX_CMD_A_PID_TCP:
 				csum = v6 ?
 				    M_CSUM_TCPv6 : M_CSUM_IPv4 | M_CSUM_TCPv4;
 				break;
 			case MUE_RX_CMD_A_PID_UDP:
 				csum = v6 ?
 				    M_CSUM_UDPv6 : M_CSUM_IPv4 | M_CSUM_UDPv4;
 				break;
 			case MUE_RX_CMD_A_PID_IP:
 				csum = v6 ? 0 : M_CSUM_IPv4;
 				break;
 			default:
 				csum = 0;
 				break;
+			}
 			csum &= ifp->if_csum_flags_rx;
 			if (__predict_false((csum & M_CSUM_IPv4) &&

 @@ -1,1091 +1,1093 @@
-/*	$NetBSD: if_smsc.c,v 1.72 2022/03/03 05:50:22 riastradh Exp $	*/
+/*	$NetBSD: if_smsc.c,v 1.73 2022/03/03 05:50:57 riastradh Exp $	*/
 /*	$OpenBSD: if_smsc.c,v 1.4 2012/09/27 12:38:11 jsg Exp $	*/
 /*	$FreeBSD: src/sys/dev/usb/net/if_smsc.c,v 1.1 2012/08/15 04:03:55 gonzo Exp $ */
 /*-
  * Copyright (c) 2012
  *	Ben Gray <bgray@freebsd.org>.
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * SMSC LAN9xxx devices (http://www.smsc.com/)
+ *
  * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
  * support USB 2.0 and 10/100 Mbps Ethernet.
+ *
  * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
  * The driver only covers the Ethernet part, the standard USB hub driver
  * supports the hub part.
+ *
  * This driver is closely modelled on the Linux driver written and copyrighted
  * by SMSC.
+ *
  * H/W TCP & UDP Checksum Offloading
  * ---------------------------------
  * The chip supports both tx and rx offloading of UDP & TCP checksums, this
  * feature can be dynamically enabled/disabled.
+ *
  * RX checksuming is performed across bytes after the IPv4 header to the end of
  * the Ethernet frame, this means if the frame is padded with non-zero values
  * the H/W checksum will be incorrect, however the rx code compensates for this.
+ *
  * TX checksuming is more complicated, the device requires a special header to
  * be prefixed onto the start of the frame which indicates the start and end
  * positions of the UDP or TCP frame.  This requires the driver to manually
  * go through the packet data and decode the headers prior to sending.
  * On Linux they generally provide cues to the location of the csum and the
  * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
  * hence this is not as optimal and therefore h/w TX checksum is currently not
  * implemented.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_smsc.c,v 1.72 2022/03/03 05:50:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_smsc.c,v 1.73 2022/03/03 05:50:57 riastradh Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
 #endif
 #include <sys/param.h>
 #include <dev/usb/usbnet.h>
 #include <dev/usb/usbhist.h>
 #include <dev/usb/if_smscreg.h>
 #include "ioconf.h"
 struct smsc_softc {
 	struct usbnet		smsc_un;
 	/*
 	 * The following stores the settings in the mac control (MAC_CSR)
 	 * register
 	 */
 	uint32_t		sc_mac_csr;
 	uint32_t		sc_rev_id;
 	uint32_t		sc_coe_ctrl;
 };
 #define SMSC_MIN_BUFSZ		2048
 #define SMSC_MAX_BUFSZ		18944
 /*
  * Various supported device vendors/products.
  */
 static const struct usb_devno smsc_devs[] = {
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_LAN89530 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_LAN9530 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_LAN9730 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A_ALT },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A_HAL },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A_SAL10 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500_ALT },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500_SAL10 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505A },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505A_HAL },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505A_SAL10 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505_SAL10 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9512_14 },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9512_14_ALT },
 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9512_14_SAL10 }
 };
 #ifdef USB_DEBUG
 #ifndef USMSC_DEBUG
 #define usmscdebug 0
 #else
 static int usmscdebug = 1;
 SYSCTL_SETUP(sysctl_hw_smsc_setup, "sysctl hw.usmsc setup")
+{
 	int err;
 	const struct sysctlnode *rnode;
 	const struct sysctlnode *cnode;
 	err = sysctl_createv(clog, 0, NULL, &rnode,
 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "usmsc",
 	    SYSCTL_DESCR("usmsc global controls"),
 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
 	if (err)
 		goto fail;
 	/* control debugging printfs */
 	err = sysctl_createv(clog, 0, &rnode, &cnode,
 	    CTLFLAG_PERMANENT | CTLFLAG_READWRITE, CTLTYPE_INT,
 	    "debug", SYSCTL_DESCR("Enable debugging output"),
 	    NULL, 0, &usmscdebug, sizeof(usmscdebug), CTL_CREATE, CTL_EOL);
 	if (err)
 		goto fail;
 	return;
 fail:
 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
+}
 #endif /* SMSC_DEBUG */
 #endif /* USB_DEBUG */
 #define DPRINTF(FMT,A,B,C,D)	USBHIST_LOG(usmscdebug,FMT,A,B,C,D)
 #define DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(usmscdebug,N,FMT,A,B,C,D)
 #define USMSCHIST_FUNC()	USBHIST_FUNC()
 #define USMSCHIST_CALLED()	USBHIST_CALLED(usmscdebug)
 #define smsc_warn_printf(un, fmt, args...) \
 	printf("%s: warning: " fmt, device_xname((un)->un_dev), ##args)
 #define smsc_err_printf(un, fmt, args...) \
 	printf("%s: error: " fmt, device_xname((un)->un_dev), ##args)
 /* Function declarations */
 static int	 smsc_match(device_t, cfdata_t, void *);
 static void	 smsc_attach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(usmsc, sizeof(struct smsc_softc),
     smsc_match, smsc_attach, usbnet_detach, usbnet_activate);
 static int	 smsc_chip_init(struct usbnet *);
 static int	 smsc_setmacaddress(struct usbnet *, const uint8_t *);
 static int	 smsc_uno_init(struct ifnet *);
 static int	 smsc_init_locked(struct ifnet *);
 static void	 smsc_uno_stop(struct ifnet *, int);
 static void	 smsc_reset(struct smsc_softc *);
 static void	 smsc_uno_miibus_statchg(struct ifnet *);
 static int	 smsc_readreg(struct usbnet *, uint32_t, uint32_t *);
 static int	 smsc_writereg(struct usbnet *, uint32_t, uint32_t);
 static int	 smsc_wait_for_bits(struct usbnet *, uint32_t, uint32_t);
 static int	 smsc_uno_miibus_readreg(struct usbnet *, int, int, uint16_t *);
 static int	 smsc_uno_miibus_writereg(struct usbnet *, int, int, uint16_t);
 static int	 smsc_uno_ioctl(struct ifnet *, u_long, void *);
 static unsigned	 smsc_uno_tx_prepare(struct usbnet *, struct mbuf *,
 		     struct usbnet_chain *);
 static void	 smsc_uno_rx_loop(struct usbnet *, struct usbnet_chain *,
 		     uint32_t);
 static const struct usbnet_ops smsc_ops = {
 	.uno_stop = smsc_uno_stop,
 	.uno_ioctl = smsc_uno_ioctl,
 	.uno_read_reg = smsc_uno_miibus_readreg,
 	.uno_write_reg = smsc_uno_miibus_writereg,
 	.uno_statchg = smsc_uno_miibus_statchg,
 	.uno_tx_prepare = smsc_uno_tx_prepare,
 	.uno_rx_loop = smsc_uno_rx_loop,
 	.uno_init = smsc_uno_init,
 };
 static int
 smsc_readreg(struct usbnet *un, uint32_t off, uint32_t *data)
+{
 	usb_device_request_t req;
 	uint32_t buf;
 	usbd_status err;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return 0;
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = SMSC_UR_READ_REG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, off);
 	USETW(req.wLength, 4);
 	err = usbd_do_request(un->un_udev, &req, &buf);
 	if (err != 0)
 		smsc_warn_printf(un, "Failed to read register 0x%0x\n", off);
 	*data = le32toh(buf);
 	return err;
+}
 static int
 smsc_writereg(struct usbnet *un, uint32_t off, uint32_t data)
+{
 	usb_device_request_t req;
 	uint32_t buf;
 	usbd_status err;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return 0;
 	buf = htole32(data);
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = SMSC_UR_WRITE_REG;
 	USETW(req.wValue, 0);
 	USETW(req.wIndex, off);
 	USETW(req.wLength, 4);
 	err = usbd_do_request(un->un_udev, &req, &buf);
 	if (err != 0)
 		smsc_warn_printf(un, "Failed to write register 0x%0x\n", off);
 	return err;
+}
 static int
 smsc_wait_for_bits(struct usbnet *un, uint32_t reg, uint32_t bits)
+{
 	uint32_t val;
 	int err, i;
 	for (i = 0; i < 100; i++) {
 		if (usbnet_isdying(un))
 			return ENXIO;
 		if ((err = smsc_readreg(un, reg, &val)) != 0)
 			return err;
 		if (!(val & bits))
 			return 0;
 		DELAY(5);
+	}
 	return 1;
+}
 static int
 smsc_uno_miibus_readreg(struct usbnet *un, int phy, int reg, uint16_t *val)
+{
 	uint32_t addr;
 	uint32_t data = 0;
 	if (un->un_phyno != phy)
 		return EINVAL;
 	if (smsc_wait_for_bits(un, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
 		smsc_warn_printf(un, "MII is busy\n");
 		return ETIMEDOUT;
+	}
 	addr = (phy << 11) | (reg << 6) | SMSC_MII_READ;
 	smsc_writereg(un, SMSC_MII_ADDR, addr);
 	if (smsc_wait_for_bits(un, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
 		smsc_warn_printf(un, "MII read timeout\n");
 		return ETIMEDOUT;
+	}
 	smsc_readreg(un, SMSC_MII_DATA, &data);
 	*val = data & 0xffff;
 	return 0;
+}
 static int
 smsc_uno_miibus_writereg(struct usbnet *un, int phy, int reg, uint16_t val)
+{
 	uint32_t addr;
 	if (un->un_phyno != phy)
 		return EINVAL;
 	if (smsc_wait_for_bits(un, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
 		smsc_warn_printf(un, "MII is busy\n");
 		return ETIMEDOUT;
+	}
 	smsc_writereg(un, SMSC_MII_DATA, val);
 	addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE;
 	smsc_writereg(un, SMSC_MII_ADDR, addr);
 	if (smsc_wait_for_bits(un, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
 		smsc_warn_printf(un, "MII write timeout\n");
 		return ETIMEDOUT;
+	}
 	return 0;
+}
 static void
 smsc_uno_miibus_statchg(struct ifnet *ifp)
+{
 	USMSCHIST_FUNC(); USMSCHIST_CALLED();
 	struct usbnet * const un = ifp->if_softc;
 	if (usbnet_isdying(un))
 		return;
 	struct smsc_softc * const sc = usbnet_softc(un);
 	struct mii_data * const mii = usbnet_mii(un);
 	uint32_t flow;
 	uint32_t afc_cfg;
 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
 	    (IFM_ACTIVE | IFM_AVALID)) {
 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
 			case IFM_10_T:
 			case IFM_100_TX:
 				usbnet_set_link(un, true);
 				break;
 			case IFM_1000_T:
 				/* Gigabit ethernet not supported by chipset */
 				break;
 			default:
 				break;
+		}
+	}
 	/* Lost link, do nothing. */
 	if (!usbnet_havelink(un))
 		return;
 	int err = smsc_readreg(un, SMSC_AFC_CFG, &afc_cfg);
 	if (err) {
 		smsc_warn_printf(un, "failed to read initial AFC_CFG, "
 		    "error %d\n", err);
 		return;
+	}
 	/* Enable/disable full duplex operation and TX/RX pause */
 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
 		DPRINTF("full duplex operation", 0, 0, 0, 0);
 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
 		sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
 			flow = 0xffff0002;
 		else
 			flow = 0;
 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
 			afc_cfg |= 0xf;
 		else
 			afc_cfg &= ~0xf;
 	} else {
 		DPRINTF("half duplex operation", 0, 0, 0, 0);
 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
 		sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
 		flow = 0;
 		afc_cfg |= 0xf;
+	}
 	err = smsc_writereg(un, SMSC_MAC_CSR, sc->sc_mac_csr);
 	err += smsc_writereg(un, SMSC_FLOW, flow);
 	err += smsc_writereg(un, SMSC_AFC_CFG, afc_cfg);
 	if (err)
 		smsc_warn_printf(un, "media change failed, error %d\n", err);
+}
 static inline uint32_t
 smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
+{
 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
+}
 static void
 smsc_setiff_locked(struct usbnet *un)
+{
 	USMSCHIST_FUNC(); USMSCHIST_CALLED();
 	struct smsc_softc * const sc = usbnet_softc(un);
 	struct ifnet * const ifp = usbnet_ifp(un);
 	struct ethercom *ec = usbnet_ec(un);
 	struct ether_multi *enm;
 	struct ether_multistep step;
 	uint32_t hashtbl[2] = { 0, 0 };
 	uint32_t hash;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return;
 	if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
 allmulti:
 		DPRINTF("receive all multicast enabled", 0, 0, 0, 0);
 		sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
 		smsc_writereg(un, SMSC_MAC_CSR, sc->sc_mac_csr);
 		return;
 	} else {
 		sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
 		sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
+	}
 	ETHER_LOCK(ec);
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
 			ETHER_UNLOCK(ec);
 			goto allmulti;
+		}
 		hash = smsc_hash(enm->enm_addrlo);
 		hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
 		ETHER_NEXT_MULTI(step, enm);
+	}
 	ETHER_UNLOCK(ec);
 	/* Debug */
 	if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) {
 		DPRINTF("receive select group of macs", 0, 0, 0, 0);
 	} else {
 		DPRINTF("receive own packets only", 0, 0, 0, 0);
+	}
 	/* Write the hash table and mac control registers */
 	//XXX should we be doing this?
 	ifp->if_flags &= ~IFF_ALLMULTI;
 	smsc_writereg(un, SMSC_HASHH, hashtbl[1]);
 	smsc_writereg(un, SMSC_HASHL, hashtbl[0]);
 	smsc_writereg(un, SMSC_MAC_CSR, sc->sc_mac_csr);
+}
 static int
 smsc_setoe_locked(struct usbnet *un)
+{
 	struct smsc_softc * const sc = usbnet_softc(un);
 	struct ifnet * const ifp = usbnet_ifp(un);
 	uint32_t val;
 	int err;
 	usbnet_isowned_core(un);
 	err = smsc_readreg(un, SMSC_COE_CTRL, &val);
 	if (err != 0) {
 		smsc_warn_printf(un, "failed to read SMSC_COE_CTRL (err=%d)\n",
 		    err);
 		return err;
+	}
 	/* Enable/disable the Rx checksum */
 	if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx))
 		val |= (SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
 	else
 		val &= ~(SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
 	/* Enable/disable the Tx checksum (currently not supported) */
 	if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_UDPv4_Tx))
 		val |= SMSC_COE_CTRL_TX_EN;
 	else
 		val &= ~SMSC_COE_CTRL_TX_EN;
 	sc->sc_coe_ctrl = val;
 	err = smsc_writereg(un, SMSC_COE_CTRL, val);
 	if (err != 0) {
 		smsc_warn_printf(un, "failed to write SMSC_COE_CTRL (err=%d)\n",
 		    err);
 		return err;
+	}
 	return 0;
+}
 static int
 smsc_setmacaddress(struct usbnet *un, const uint8_t *addr)
+{
 	USMSCHIST_FUNC(); USMSCHIST_CALLED();
 	int err;
 	uint32_t val;
 	DPRINTF("setting mac address to %02jx:%02jx:%02jx:...", addr[0],
 	    addr[1], addr[2], 0);
 	DPRINTF("... %02jx:%02jx:%02jx", addr[3], addr[4], addr[5], 0);
 	val = ((uint32_t)addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8)
 	    | addr[0];
 	if ((err = smsc_writereg(un, SMSC_MAC_ADDRL, val)) != 0)
 		goto done;
 	val = (addr[5] << 8) | addr[4];
 	err = smsc_writereg(un, SMSC_MAC_ADDRH, val);
 done:
 	return err;
+}
 static void
 smsc_reset(struct smsc_softc *sc)
+{
 	struct usbnet * const un = &sc->smsc_un;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return;
 	/* Wait a little while for the chip to get its brains in order. */
 	DELAY(1000);
 	/* Reinitialize controller to achieve full reset. */
 	smsc_chip_init(un);
+}
 static int
 smsc_uno_init(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_busy(un);
 	int ret = smsc_init_locked(ifp);
 	usbnet_unbusy(un);
 	return ret;
+}
 static int
 smsc_init_locked(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	struct smsc_softc * const sc = usbnet_softc(un);
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return EIO;
 	/* Cancel pending I/O */
 	usbnet_stop(un, ifp, 1);
 	/* Reset the ethernet interface. */
 	smsc_reset(sc);
 	/* Load the multicast filter. */
 	smsc_setiff_locked(un);
 	/* TCP/UDP checksum offload engines. */
 	smsc_setoe_locked(un);
 	return usbnet_init_rx_tx(un);
+}
 static void
 smsc_uno_stop(struct ifnet *ifp, int disable)
+{
 	struct usbnet * const un = ifp->if_softc;
 	struct smsc_softc * const sc = usbnet_softc(un);
 	// XXXNH didn't do this before
 	smsc_reset(sc);
+}
 static int
 smsc_chip_init(struct usbnet *un)
+{
 	struct smsc_softc * const sc = usbnet_softc(un);
 	uint32_t reg_val;
 	int burst_cap;
 	int err;
 	usbnet_isowned_core(un);
 	/* Enter H/W config mode */
 	smsc_writereg(un, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
 	if ((err = smsc_wait_for_bits(un, SMSC_HW_CFG,
 	    SMSC_HW_CFG_LRST)) != 0) {
 		smsc_warn_printf(un, "timed-out waiting for reset to "
 		    "complete\n");
 		goto init_failed;
+	}
 	/* Reset the PHY */
 	smsc_writereg(un, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
 	if ((err = smsc_wait_for_bits(un, SMSC_PM_CTRL,
 	    SMSC_PM_CTRL_PHY_RST)) != 0) {
 		smsc_warn_printf(un, "timed-out waiting for phy reset to "
 		    "complete\n");
 		goto init_failed;
+	}
 	usbd_delay_ms(un->un_udev, 40);
 	/* Set the mac address */
 	struct ifnet * const ifp = usbnet_ifp(un);
 	const char *eaddr = CLLADDR(ifp->if_sadl);
 	if ((err = smsc_setmacaddress(un, eaddr)) != 0) {
 		smsc_warn_printf(un, "failed to set the MAC address\n");
 		goto init_failed;
+	}
 	/*
 	 * Don't know what the HW_CFG_BIR bit is, but following the reset
 	 * sequence as used in the Linux driver.
 	 */
 	if ((err = smsc_readreg(un, SMSC_HW_CFG, &reg_val)) != 0) {
 		smsc_warn_printf(un, "failed to read HW_CFG: %d\n", err);
 		goto init_failed;
+	}
 	reg_val |= SMSC_HW_CFG_BIR;
 	smsc_writereg(un, SMSC_HW_CFG, reg_val);
 	/*
 	 * There is a so called 'turbo mode' that the linux driver supports, it
 	 * seems to allow you to jam multiple frames per Rx transaction.
 	 * By default this driver supports that and therefore allows multiple
 	 * frames per USB transfer.
+	 *
 	 * The xfer buffer size needs to reflect this as well, therefore based
 	 * on the calculations in the Linux driver the RX bufsize is set to
 	 * 18944,
 	 *     bufsz = (16 * 1024 + 5 * 512)
+	 *
 	 * Burst capability is the number of URBs that can be in a burst of
 	 * data/ethernet frames.
 	 */
 	if (un->un_udev->ud_speed == USB_SPEED_HIGH)
 		burst_cap = 37;
 	else
 		burst_cap = 128;
 	smsc_writereg(un, SMSC_BURST_CAP, burst_cap);
 	/* Set the default bulk in delay (magic value from Linux driver) */
 	smsc_writereg(un, SMSC_BULK_IN_DLY, 0x00002000);
 	/*
 	 * Initialise the RX interface
 	 */
 	if ((err = smsc_readreg(un, SMSC_HW_CFG, &reg_val)) < 0) {
 		smsc_warn_printf(un, "failed to read HW_CFG: (err = %d)\n",
 		    err);
 		goto init_failed;
+	}
 	/*
 	 * The following settings are used for 'turbo mode', a.k.a multiple
 	 * frames per Rx transaction (again info taken form Linux driver).
 	 */
 	reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
 	/*
 	 * set Rx data offset to ETHER_ALIGN which will make the IP header
 	 * align on a word boundary.
 	 */
 	reg_val |= ETHER_ALIGN << SMSC_HW_CFG_RXDOFF_SHIFT;
 	smsc_writereg(un, SMSC_HW_CFG, reg_val);
 	/* Clear the status register ? */
 	smsc_writereg(un, SMSC_INTR_STATUS, 0xffffffff);
 	/* Read and display the revision register */
 	if ((err = smsc_readreg(un, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
 		smsc_warn_printf(un, "failed to read ID_REV (err = %d)\n", err);
 		goto init_failed;
+	}
 	/* GPIO/LED setup */
 	reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
 	    SMSC_LED_GPIO_CFG_FDX_LED;
 	smsc_writereg(un, SMSC_LED_GPIO_CFG, reg_val);
 	/*
 	 * Initialise the TX interface
 	 */
 	smsc_writereg(un, SMSC_FLOW, 0);
 	smsc_writereg(un, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
 	/* Read the current MAC configuration */
 	if ((err = smsc_readreg(un, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
 		smsc_warn_printf(un, "failed to read MAC_CSR (err=%d)\n", err);
 		goto init_failed;
+	}
 	/* disable pad stripping, collides with checksum offload */
 	sc->sc_mac_csr &= ~SMSC_MAC_CSR_PADSTR;
 	/* Vlan */
 	smsc_writereg(un, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
 	/*
 	 * Start TX
 	 */
 	sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
 	smsc_writereg(un, SMSC_MAC_CSR, sc->sc_mac_csr);
 	smsc_writereg(un, SMSC_TX_CFG, SMSC_TX_CFG_ON);
 	/*
 	 * Start RX
 	 */
 	sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
 	smsc_writereg(un, SMSC_MAC_CSR, sc->sc_mac_csr);
 	return 0;
 init_failed:
 	smsc_err_printf(un, "smsc_chip_init failed (err=%d)\n", err);
 	return err;
+}
 static int
 smsc_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 	switch (cmd) {
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		smsc_setiff_locked(un);
 		break;
 	case SIOCSIFCAP:
 		smsc_setoe_locked(un);
 		break;
 	default:
 		break;
+	}
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	return 0;
+}
 static int
 smsc_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct usb_attach_arg *uaa = aux;
 	return (usb_lookup(smsc_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ?
 	    UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
+}
 static void
 smsc_attach(device_t parent, device_t self, void *aux)
+{
 	USBNET_MII_DECL_DEFAULT(unm);
 	struct smsc_softc * const sc = device_private(self);
 	struct usbnet * const un = &sc->smsc_un;
 	struct usb_attach_arg *uaa = aux;
 	struct usbd_device *dev = uaa->uaa_device;
 	usb_interface_descriptor_t *id;
 	usb_endpoint_descriptor_t *ed;
 	char *devinfop;
 	unsigned bufsz;
 	int err, i;
 	uint32_t mac_h, mac_l;
 	KASSERT((void *)sc == un);
 	aprint_naive("\n");
 	aprint_normal("\n");
 	un->un_dev = self;
 	un->un_udev = dev;
 	un->un_sc = sc;
 	un->un_ops = &smsc_ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
 	un->un_rx_list_cnt = SMSC_RX_LIST_CNT;
 	un->un_tx_list_cnt = SMSC_TX_LIST_CNT;
 	devinfop = usbd_devinfo_alloc(un->un_udev, 0);
 	aprint_normal_dev(self, "%s\n", devinfop);
 	usbd_devinfo_free(devinfop);
 	err = usbd_set_config_no(dev, SMSC_CONFIG_INDEX, 1);
 	if (err) {
 		aprint_error_dev(self, "failed to set configuration"
 		    ", err=%s\n", usbd_errstr(err));
 		return;
+	}
 	/* Setup the endpoints for the SMSC LAN95xx device(s) */
 	err = usbd_device2interface_handle(dev, SMSC_IFACE_IDX, &un->un_iface);
 	if (err) {
 		aprint_error_dev(self, "getting interface handle failed\n");
 		return;
+	}
 	id = usbd_get_interface_descriptor(un->un_iface);
 	if (dev->ud_speed >= USB_SPEED_HIGH) {
 		bufsz = SMSC_MAX_BUFSZ;
 	} else {
 		bufsz = SMSC_MIN_BUFSZ;
+	}
 	un->un_rx_bufsz = bufsz;
 	un->un_tx_bufsz = bufsz;
 	/* Find endpoints. */
 	for (i = 0; i < id->bNumEndpoints; i++) {
 		ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
 		if (!ed) {
 			aprint_error_dev(self, "couldn't get ep %d\n", i);
 			return;
+		}
 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
 #if 0 /* not used yet */
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
 			un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
 #endif
+		}
+	}
 	usbnet_attach(un, "smscdet");
 #ifdef notyet
 	/*
 	 * We can do TCPv4, and UDPv4 checksums in hardware.
 	 */
 	struct ifnet *ifp = usbnet_ifp(un);
 	ifp->if_capabilities |=
 	    /*IFCAP_CSUM_TCPv4_Tx |*/ IFCAP_CSUM_TCPv4_Rx |
 	    /*IFCAP_CSUM_UDPv4_Tx |*/ IFCAP_CSUM_UDPv4_Rx;
 #endif
 	struct ethercom *ec = usbnet_ec(un);
 	ec->ec_capabilities = ETHERCAP_VLAN_MTU;
 	/* Setup some of the basics */
 	un->un_phyno = 1;
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 	/*
 	 * Attempt to get the mac address, if an EEPROM is not attached this
 	 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
 	 * address based on urandom.
 	 */
 	memset(un->un_eaddr, 0xff, ETHER_ADDR_LEN);
 	prop_dictionary_t dict = device_properties(self);
 	prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
 	if (eaprop != NULL) {
 		KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
 		KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
 		memcpy(un->un_eaddr, prop_data_value(eaprop),
 		    ETHER_ADDR_LEN);
 	} else {
 		/* Check if there is already a MAC address in the register */
 		if ((smsc_readreg(un, SMSC_MAC_ADDRL, &mac_l) == 0) &&
 		    (smsc_readreg(un, SMSC_MAC_ADDRH, &mac_h) == 0)) {
 			un->un_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
 			un->un_eaddr[4] = (uint8_t)((mac_h) & 0xff);
 			un->un_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
 			un->un_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
 			un->un_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
 			un->un_eaddr[0] = (uint8_t)((mac_l) & 0xff);
+		}
+	}
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 , &unm);
+}
 static void
 smsc_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
+{
 	USMSCHIST_FUNC(); USMSCHIST_CALLED();
 	struct smsc_softc * const sc = usbnet_softc(un);
 	struct ifnet *ifp = usbnet_ifp(un);
 	uint8_t *buf = c->unc_buf;
 	int count;
 	count = 0;
 	DPRINTF("total_len %jd/%#jx", total_len, total_len, 0, 0);
 	while (total_len != 0) {
 		uint32_t rxhdr;
 		if (total_len < sizeof(rxhdr)) {
 			DPRINTF("total_len %jd < sizeof(rxhdr) %jd",
 			    total_len, sizeof(rxhdr), 0, 0);
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		memcpy(&rxhdr, buf, sizeof(rxhdr));
 		rxhdr = le32toh(rxhdr);
 		buf += sizeof(rxhdr);
 		total_len -= sizeof(rxhdr);
 		if (rxhdr & SMSC_RX_STAT_COLLISION)
 			if_statinc(ifp, if_collisions);
 		if (rxhdr & (SMSC_RX_STAT_ERROR
 			   | SMSC_RX_STAT_LENGTH_ERROR
 			   | SMSC_RX_STAT_MII_ERROR)) {
 			DPRINTF("rx error (hdr 0x%08jx)", rxhdr, 0, 0, 0);
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		uint16_t pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
 		DPRINTF("total_len %jd pktlen %jd rxhdr 0x%08jx", total_len,
 		    pktlen, rxhdr, 0);
 		if (pktlen < ETHER_HDR_LEN) {
 			DPRINTF("pktlen %jd < ETHER_HDR_LEN %jd", pktlen,
 			    ETHER_HDR_LEN, 0, 0);
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		pktlen += ETHER_ALIGN;
 		if (pktlen > MCLBYTES) {
 			DPRINTF("pktlen %jd > MCLBYTES %jd", pktlen, MCLBYTES, 0,
 );
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		if (pktlen > total_len) {
 			DPRINTF("pktlen %jd > total_len %jd", pktlen, total_len,
 , 0);
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		uint8_t *pktbuf = buf + ETHER_ALIGN;
 		size_t buflen = pktlen - ETHER_ALIGN;
 		int mbuf_flags = M_HASFCS;
 		int csum_flags = 0;
 		uint16_t csum_data = 0;
  		KASSERT(pktlen < MCLBYTES);
 		/* Check if RX TCP/UDP checksumming is being offloaded */
 		if (sc->sc_coe_ctrl & SMSC_COE_CTRL_RX_EN) {
 			DPRINTF("RX checksum offload checking", 0, 0, 0, 0);
 			struct ether_header *eh = (struct ether_header *)pktbuf;
 			const size_t cssz = sizeof(csum_data);
 			/* Remove the extra 2 bytes of the csum */
 			buflen -= cssz;
 			/*
 			 * The checksum appears to be simplistically calculated
 			 * over the udp/tcp header and data up to the end of the
 			 * eth frame.  Which means if the eth frame is padded
 			 * the csum calculation is incorrectly performed over
 			 * the padding bytes as well. Therefore to be safe we
 			 * ignore the H/W csum on frames less than or equal to
 			 * 64 bytes.
+			 *
 			 * Ignore H/W csum for non-IPv4 packets.
 			 */
 			DPRINTF("Ethertype %02jx pktlen %02jx",
 			    be16toh(eh->ether_type), pktlen, 0, 0);
 			if (be16toh(eh->ether_type) == ETHERTYPE_IP &&
 			    pktlen > ETHER_MIN_LEN) {
 				csum_flags |=
 				    (M_CSUM_TCPv4 | M_CSUM_UDPv4 | M_CSUM_DATA);
 				/*
 				 * Copy the TCP/UDP checksum from the last 2
 				 * bytes of the transfer and put in the
 				 * csum_data field.
 				 */
 				memcpy(&csum_data, buf + pktlen - cssz, cssz);
 				/*
 				 * The data is copied in network order, but the
 				 * csum algorithm in the kernel expects it to be
 				 * in host network order.
 				 */
 				csum_data = ntohs(csum_data);
 				DPRINTF("RX checksum offloaded (0x%04jx)",
 				    csum_data, 0, 0, 0);
+			}
+		}
 		/* round up to next longword */
 		pktlen = (pktlen + 3) & ~0x3;
 		/* total_len does not include the padding */
 		if (pktlen > total_len)
 			pktlen = total_len;
 		buf += pktlen;
 		total_len -= pktlen;
 		/* push the packet up */
 		usbnet_enqueue(un, pktbuf, buflen, csum_flags, csum_data,
 		    mbuf_flags);
 		count++;
+	}
 	if (count != 0)
 		rnd_add_uint32(usbnet_rndsrc(un), count);
+}
 static unsigned
 smsc_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
+{
 	uint32_t txhdr;
 	uint32_t frm_len = 0;
 	const size_t hdrsz = sizeof(txhdr) * 2;
 	if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - hdrsz)
 		return 0;
 	/*
 	 * Each frame is prefixed with two 32-bit values describing the
 	 * length of the packet and buffer.
 	 */
 	txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
 	    SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
 	txhdr = htole32(txhdr);
 	memcpy(c->unc_buf, &txhdr, sizeof(txhdr));
 	txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
 	txhdr = htole32(txhdr);
 	memcpy(c->unc_buf + sizeof(txhdr), &txhdr, sizeof(txhdr));
 	frm_len += hdrsz;
 	/* Next copy in the actual packet */
 	m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf + frm_len);
 	frm_len += m->m_pkthdr.len;
 	return frm_len;
+}
 #ifdef _MODULE
 #include "ioconf.c"
 #endif
 USBNET_MODULE(smsc)

 @@ -1,865 +1,867 @@
-/*	$NetBSD: if_udav.c,v 1.79 2022/03/03 05:50:22 riastradh Exp $	*/
+/*	$NetBSD: if_udav.c,v 1.80 2022/03/03 05:50:57 riastradh Exp $	*/
 /*	$nabe: if_udav.c,v 1.3 2003/08/21 16:57:19 nabe Exp $	*/
 /*
  * Copyright (c) 2003
  *     Shingo WATANABE <nabe@nabechan.org>.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the author nor the names of any co-contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  */
 /*
  * DM9601(DAVICOM USB to Ethernet MAC Controller with Integrated 10/100 PHY)
  * The spec can be found at the following url.
  *   http://www.davicom.com.tw/big5/download/Data%20Sheet/DM9601-DS-F01-062202s.pdf
  */
 /*
  * TODO:
  *	Interrupt Endpoint support
  *	External PHYs
  *	powerhook() support?
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_udav.c,v 1.79 2022/03/03 05:50:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_udav.c,v 1.80 2022/03/03 05:50:57 riastradh Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
 #endif
 #include <sys/param.h>
 #include <dev/usb/usbnet.h>
 #include <dev/usb/if_udavreg.h>
 /* Function declarations */
 static int	udav_match(device_t, cfdata_t, void *);
 static void	udav_attach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(udav, sizeof(struct usbnet), udav_match, udav_attach,
     usbnet_detach, usbnet_activate);
 static void udav_chip_init(struct usbnet *);
 static unsigned udav_uno_tx_prepare(struct usbnet *, struct mbuf *,
 				    struct usbnet_chain *);
 static void udav_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
 static void udav_uno_stop(struct ifnet *, int);
 static int udav_uno_ioctl(struct ifnet *, u_long, void *);
 static int udav_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int udav_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static void udav_uno_mii_statchg(struct ifnet *);
 static int udav_uno_init(struct ifnet *);
 static void udav_setiff_locked(struct usbnet *);
 static void udav_reset(struct usbnet *);
 static int udav_csr_read(struct usbnet *, int, void *, int);
 static int udav_csr_write(struct usbnet *, int, void *, int);
 static int udav_csr_read1(struct usbnet *, int);
 static int udav_csr_write1(struct usbnet *, int, unsigned char);
 #if 0
 static int udav_mem_read(struct usbnet *, int, void *, int);
 static int udav_mem_write(struct usbnet *, int, void *, int);
 static int udav_mem_write1(struct usbnet *, int, unsigned char);
 #endif
 /* Macros */
 #ifdef UDAV_DEBUG
 #define DPRINTF(x)	if (udavdebug) printf x
 #define DPRINTFN(n, x)	if (udavdebug >= (n)) printf x
 int udavdebug = 0;
 #else
 #define DPRINTF(x)
 #define DPRINTFN(n, x)
 #endif
 #define	UDAV_SETBIT(un, reg, x)	\
 	udav_csr_write1(un, reg, udav_csr_read1(un, reg) | (x))
 #define	UDAV_CLRBIT(un, reg, x)	\
 	udav_csr_write1(un, reg, udav_csr_read1(un, reg) & ~(x))
 static const struct udav_type {
 	struct usb_devno udav_dev;
 	uint16_t udav_flags;
 #define UDAV_EXT_PHY	0x0001
 #define UDAV_NO_PHY	0x0002
 } udav_devs [] = {
 	/* Corega USB-TXC */
 	{{ USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB_TXC }, 0},
 	/* ShanTou ST268 USB NIC */
 	{{ USB_VENDOR_SHANTOU, USB_PRODUCT_SHANTOU_ST268_USB_NIC }, 0},
 	/* ShanTou ADM8515 */
 	{{ USB_VENDOR_SHANTOU, USB_PRODUCT_SHANTOU_ADM8515 }, 0},
 	/* SUNRISING SR9600 */
 	{{ USB_VENDOR_SUNRISING, USB_PRODUCT_SUNRISING_SR9600 }, 0 },
 	/* SUNRISING QF9700 */
 	{{ USB_VENDOR_SUNRISING, USB_PRODUCT_SUNRISING_QF9700 }, UDAV_NO_PHY },
 	/* QUAN DM9601 */
 	{{USB_VENDOR_QUAN, USB_PRODUCT_QUAN_DM9601 }, 0},
 #if 0
 	/* DAVICOM DM9601 Generic? */
 	/*  XXX: The following ids was obtained from the data sheet. */
 	{{ 0x0a46, 0x9601 }, 0},
 #endif
 };
 #define udav_lookup(v, p) ((const struct udav_type *)usb_lookup(udav_devs, v, p))
 static const struct usbnet_ops udav_ops = {
 	.uno_stop = udav_uno_stop,
 	.uno_ioctl = udav_uno_ioctl,
 	.uno_read_reg = udav_uno_mii_read_reg,
 	.uno_write_reg = udav_uno_mii_write_reg,
 	.uno_statchg = udav_uno_mii_statchg,
 	.uno_tx_prepare = udav_uno_tx_prepare,
 	.uno_rx_loop = udav_uno_rx_loop,
 	.uno_init = udav_uno_init,
 };
 /* Probe */
 static int
 udav_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct usb_attach_arg *uaa = aux;
 	return udav_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
 		UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
+}
 /* Attach */
 static void
 udav_attach(device_t parent, device_t self, void *aux)
+{
 	USBNET_MII_DECL_DEFAULT(unm);
 	struct usbnet_mii *unmp;
 	struct usbnet * const un = device_private(self);
 	struct usb_attach_arg *uaa = aux;
 	struct usbd_device *dev = uaa->uaa_device;
 	struct usbd_interface *iface;
 	usbd_status err;
 	usb_interface_descriptor_t *id;
 	usb_endpoint_descriptor_t *ed;
 	char *devinfop;
 	int i;
 	aprint_naive("\n");
 	aprint_normal("\n");
 	devinfop = usbd_devinfo_alloc(dev, 0);
 	aprint_normal_dev(self, "%s\n", devinfop);
 	usbd_devinfo_free(devinfop);
 	un->un_dev = self;
 	un->un_udev = dev;
 	un->un_sc = un;
 	un->un_ops = &udav_ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
 	un->un_rx_list_cnt = UDAV_RX_LIST_CNT;
 	un->un_tx_list_cnt = UDAV_TX_LIST_CNT;
 	un->un_rx_bufsz = UDAV_BUFSZ;
 	un->un_tx_bufsz = UDAV_BUFSZ;
 	/* Move the device into the configured state. */
 	err = usbd_set_config_no(dev, UDAV_CONFIG_NO, 1); /* idx 0 */
 	if (err) {
 		aprint_error_dev(self, "failed to set configuration"
 		    ", err=%s\n", usbd_errstr(err));
 		return;
+	}
 	/* get control interface */
 	err = usbd_device2interface_handle(dev, UDAV_IFACE_INDEX, &iface);
 	if (err) {
 		aprint_error_dev(self, "failed to get interface, err=%s\n",
 		       usbd_errstr(err));
 		return;
+	}
 	un->un_iface = iface;
 	un->un_flags = udav_lookup(uaa->uaa_vendor,
 	    uaa->uaa_product)->udav_flags;
 	/* get interface descriptor */
 	id = usbd_get_interface_descriptor(un->un_iface);
 	/* find endpoints */
 	un->un_ed[USBNET_ENDPT_RX] = un->un_ed[USBNET_ENDPT_TX] =
 	    un->un_ed[USBNET_ENDPT_INTR] = -1;
 	for (i = 0; i < id->bNumEndpoints; i++) {
 		ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
 		if (ed == NULL) {
 			aprint_error_dev(self, "couldn't get endpoint %d\n", i);
 			return;
+		}
 		if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
 		    UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
 			un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT)
 			un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT &&
 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
 			un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
+	}
 	if (un->un_ed[USBNET_ENDPT_RX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_TX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_INTR] == 0) {
 		aprint_error_dev(self, "missing endpoint\n");
 		return;
+	}
 	/* Not supported yet. */
 	un->un_ed[USBNET_ENDPT_INTR] = 0;
 	usbnet_attach(un, "udavdet");
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 // 	/* reset the adapter */
 // 	udav_reset(un);
 	/* Get Ethernet Address */
 	err = udav_csr_read(un, UDAV_PAR, un->un_eaddr, ETHER_ADDR_LEN);
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	if (err) {
 		aprint_error_dev(self, "read MAC address failed\n");
 		return;
+	}
 	if (ISSET(un->un_flags, UDAV_NO_PHY))
 		unmp = NULL;
 	else
 		unmp = &unm;
 	/* initialize interface information */
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 , unmp);
 	return;
+}
 #if 0
 /* read memory */
 static int
 udav_mem_read(struct usbnet *un, int offset, void *buf, int len)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if (usbnet_isdying(un))
 		return 0;
 	offset &= 0xffff;
 	len &= 0xff;
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = UDAV_REQ_MEM_READ;
 	USETW(req.wValue, 0x0000);
 	USETW(req.wIndex, offset);
 	USETW(req.wLength, len);
 	err = usbd_do_request(un->un_udev, &req, buf);
 	if (err) {
 		DPRINTF(("%s: %s: read failed. off=%04x, err=%d\n",
 			 device_xname(un->un_dev), __func__, offset, err));
+	}
 	return err;
+}
 /* write memory */
 static int
 udav_mem_write(struct usbnet *un, int offset, void *buf, int len)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if (usbnet_isdying(un))
 		return 0;
 	offset &= 0xffff;
 	len &= 0xff;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = UDAV_REQ_MEM_WRITE;
 	USETW(req.wValue, 0x0000);
 	USETW(req.wIndex, offset);
 	USETW(req.wLength, len);
 	err = usbd_do_request(un->un_udev, &req, buf);
 	if (err) {
 		DPRINTF(("%s: %s: write failed. off=%04x, err=%d\n",
 			 device_xname(un->un_dev), __func__, offset, err));
+	}
 	return err;
+}
 /* write memory */
 static int
 udav_mem_write1(struct usbnet *un, int offset, unsigned char ch)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if (usbnet_isdying(un))
 		return 0;
 	offset &= 0xffff;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = UDAV_REQ_MEM_WRITE1;
 	USETW(req.wValue, ch);
 	USETW(req.wIndex, offset);
 	USETW(req.wLength, 0x0000);
 	err = usbd_do_request(un->un_udev, &req, NULL);
 	if (err) {
 		DPRINTF(("%s: %s: write failed. off=%04x, err=%d\n",
 			 device_xname(un->un_dev), __func__, offset, err));
+	}
 	return err;
+}
 #endif
 /* read register(s) */
 static int
 udav_csr_read(struct usbnet *un, int offset, void *buf, int len)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	usbnet_isowned_core(un);
 	KASSERT(!usbnet_isdying(un));
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	offset &= 0xff;
 	len &= 0xff;
 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = UDAV_REQ_REG_READ;
 	USETW(req.wValue, 0x0000);
 	USETW(req.wIndex, offset);
 	USETW(req.wLength, len);
 	err = usbd_do_request(un->un_udev, &req, buf);
 	if (err) {
 		DPRINTF(("%s: %s: read failed. off=%04x, err=%d\n",
 			 device_xname(un->un_dev), __func__, offset, err));
+	}
 	return err;
+}
 /* write register(s) */
 static int
 udav_csr_write(struct usbnet *un, int offset, void *buf, int len)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	usbnet_isowned_core(un);
 	KASSERT(!usbnet_isdying(un));
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	offset &= 0xff;
 	len &= 0xff;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = UDAV_REQ_REG_WRITE;
 	USETW(req.wValue, 0x0000);
 	USETW(req.wIndex, offset);
 	USETW(req.wLength, len);
 	err = usbd_do_request(un->un_udev, &req, buf);
 	if (err) {
 		DPRINTF(("%s: %s: write failed. off=%04x, err=%d\n",
 			 device_xname(un->un_dev), __func__, offset, err));
+	}
 	return err;
+}
 static int
 udav_csr_read1(struct usbnet *un, int offset)
+{
 	uint8_t val = 0;
 	usbnet_isowned_core(un);
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if (usbnet_isdying(un))
 		return 0;
 	return udav_csr_read(un, offset, &val, 1) ? 0 : val;
+}
 /* write a register */
 static int
 udav_csr_write1(struct usbnet *un, int offset, unsigned char ch)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	usbnet_isowned_core(un);
 	KASSERT(!usbnet_isdying(un));
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	offset &= 0xff;
 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = UDAV_REQ_REG_WRITE1;
 	USETW(req.wValue, ch);
 	USETW(req.wIndex, offset);
 	USETW(req.wLength, 0x0000);
 	err = usbd_do_request(un->un_udev, &req, NULL);
 	if (err) {
 		DPRINTF(("%s: %s: write failed. off=%04x, err=%d\n",
 			 device_xname(un->un_dev), __func__, offset, err));
+	}
 	return err;
+}
 static int
 udav_uno_init(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	struct mii_data * const mii = usbnet_mii(un);
 	uint8_t eaddr[ETHER_ADDR_LEN];
 	int rc = 0;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if (usbnet_isdying(un)) {
 		return EIO;
+	}
 	/* Cancel pending I/O and free all TX/RX buffers */
 	if (ifp->if_flags & IFF_RUNNING)
 		usbnet_stop(un, ifp, 1);
 	usbnet_busy(un);
 	memcpy(eaddr, CLLADDR(ifp->if_sadl), sizeof(eaddr));
 	udav_csr_write(un, UDAV_PAR, eaddr, ETHER_ADDR_LEN);
 	/* Initialize network control register */
 	/*  Disable loopback  */
 	UDAV_CLRBIT(un, UDAV_NCR, UDAV_NCR_LBK0 | UDAV_NCR_LBK1);
 	/* Initialize RX control register */
 	UDAV_SETBIT(un, UDAV_RCR, UDAV_RCR_DIS_LONG | UDAV_RCR_DIS_CRC);
 	/* If we want promiscuous mode, accept all physical frames. */
 	if (ifp->if_flags & IFF_PROMISC)
 		UDAV_SETBIT(un, UDAV_RCR, UDAV_RCR_ALL | UDAV_RCR_PRMSC);
 	else
 		UDAV_CLRBIT(un, UDAV_RCR, UDAV_RCR_ALL | UDAV_RCR_PRMSC);
 	/* Load the multicast filter */
 	udav_setiff_locked(un);
 	/* Enable RX */
 	UDAV_SETBIT(un, UDAV_RCR, UDAV_RCR_RXEN);
 	/* clear POWER_DOWN state of internal PHY */
 	UDAV_SETBIT(un, UDAV_GPCR, UDAV_GPCR_GEP_CNTL0);
 	UDAV_CLRBIT(un, UDAV_GPR, UDAV_GPR_GEPIO0);
 	if (mii && (rc = mii_mediachg(mii)) == ENXIO)
 		rc = 0;
 	if (rc != 0) {
 		usbnet_unbusy(un);
 		return rc;
+	}
 	if (usbnet_isdying(un))
 		rc = EIO;
 	else
 		rc = usbnet_init_rx_tx(un);
 	usbnet_unbusy(un);
 	return rc;
+}
 static void
 udav_reset(struct usbnet *un)
+{
     	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	udav_chip_init(un);
+}
 static void
 udav_chip_init(struct usbnet *un)
+{
 	usbnet_isowned_core(un);
 	/* Select PHY */
 #if 1
 	/*
 	 * XXX: force select internal phy.
 	 *	external phy routines are not tested.
 	 */
 	UDAV_CLRBIT(un, UDAV_NCR, UDAV_NCR_EXT_PHY);
 #else
 	if (un->un_flags & UDAV_EXT_PHY) {
 		UDAV_SETBIT(un, UDAV_NCR, UDAV_NCR_EXT_PHY);
 	} else {
 		UDAV_CLRBIT(un, UDAV_NCR, UDAV_NCR_EXT_PHY);
+	}
 #endif
 	UDAV_SETBIT(un, UDAV_NCR, UDAV_NCR_RST);
 	for (int i = 0; i < UDAV_TX_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		if (!(udav_csr_read1(un, UDAV_NCR) & UDAV_NCR_RST))
 			break;
 		delay(10);	/* XXX */
+	}
 	delay(10000);		/* XXX */
+}
 #define UDAV_BITS	6
 #define UDAV_CALCHASH(addr) \
 	(ether_crc32_le((addr), ETHER_ADDR_LEN) & ((1 << UDAV_BITS) - 1))
 static void
 udav_setiff_locked(struct usbnet *un)
+{
 	struct ethercom *ec = usbnet_ec(un);
 	struct ifnet * const ifp = usbnet_ifp(un);
 	struct ether_multi *enm;
 	struct ether_multistep step;
 	uint8_t hashes[8];
 	int h = 0;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return;
 	if (ISSET(un->un_flags, UDAV_NO_PHY)) {
 		UDAV_SETBIT(un, UDAV_RCR, UDAV_RCR_ALL);
 		UDAV_SETBIT(un, UDAV_RCR, UDAV_RCR_PRMSC);
 		return;
+	}
 	if (ifp->if_flags & IFF_PROMISC) {
 		UDAV_SETBIT(un, UDAV_RCR, UDAV_RCR_ALL | UDAV_RCR_PRMSC);
 		return;
 	} else if (ifp->if_flags & IFF_ALLMULTI) {
 allmulti:
 		ifp->if_flags |= IFF_ALLMULTI;
 		UDAV_SETBIT(un, UDAV_RCR, UDAV_RCR_ALL);
 		UDAV_CLRBIT(un, UDAV_RCR, UDAV_RCR_PRMSC);
 		return;
+	}
 	/* first, zot all the existing hash bits */
 	memset(hashes, 0x00, sizeof(hashes));
 	hashes[7] |= 0x80;	/* broadcast address */
 	udav_csr_write(un, UDAV_MAR, hashes, sizeof(hashes));
 	/* now program new ones */
 	ETHER_LOCK(ec);
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
 		    ETHER_ADDR_LEN) != 0) {
 			ETHER_UNLOCK(ec);
 			goto allmulti;
+		}
 		h = UDAV_CALCHASH(enm->enm_addrlo);
 		hashes[h>>3] |= 1 << (h & 0x7);
 		ETHER_NEXT_MULTI(step, enm);
+	}
 	ETHER_UNLOCK(ec);
 	/* disable all multicast */
 	ifp->if_flags &= ~IFF_ALLMULTI;
 	UDAV_CLRBIT(un, UDAV_RCR, UDAV_RCR_ALL);
 	/* write hash value to the register */
 	udav_csr_write(un, UDAV_MAR, hashes, sizeof(hashes));
+}
 static unsigned
 udav_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
+{
 	int total_len;
 	uint8_t *buf = c->unc_buf;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - 2)
 		return 0;
 	/* Copy the mbuf data into a contiguous buffer */
 	m_copydata(m, 0, m->m_pkthdr.len, buf + 2);
 	total_len = m->m_pkthdr.len;
 	if (total_len < UDAV_MIN_FRAME_LEN) {
 		memset(buf + 2 + total_len, 0,
 		    UDAV_MIN_FRAME_LEN - total_len);
 		total_len = UDAV_MIN_FRAME_LEN;
+	}
 	/* Frame length is specified in the first 2bytes of the buffer */
 	buf[0] = (uint8_t)total_len;
 	buf[1] = (uint8_t)(total_len >> 8);
 	total_len += 2;
 	DPRINTF(("%s: %s: send %d bytes\n", device_xname(un->un_dev),
 	    __func__, total_len));
 	return total_len;
+}
 static void
 udav_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
+{
 	struct ifnet *ifp = usbnet_ifp(un);
 	uint8_t *buf = c->unc_buf;
 	uint16_t pkt_len;
 	uint8_t pktstat;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	/* first byte in received data */
 	pktstat = *buf;
 	total_len -= sizeof(pktstat);
 	buf += sizeof(pktstat);
 	DPRINTF(("%s: RX Status: 0x%02x\n", device_xname(un->un_dev), pktstat));
 	pkt_len = UGETW(buf);
  	total_len -= sizeof(pkt_len);
 	buf += sizeof(pkt_len);
 	DPRINTF(("%s: RX Length: 0x%02x\n", device_xname(un->un_dev), pkt_len));
 	if (pktstat & UDAV_RSR_LCS) {
 		if_statinc(ifp, if_collisions);
 		return;
+	}
 	if (pkt_len < sizeof(struct ether_header) ||
 	    pkt_len > total_len ||
 	    (pktstat & UDAV_RSR_ERR)) {
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	pkt_len -= ETHER_CRC_LEN;
 	DPRINTF(("%s: Rx deliver: 0x%02x\n", device_xname(un->un_dev), pkt_len));
 	usbnet_enqueue(un, buf, pkt_len, 0, 0, 0);
+}
 static int
 udav_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 	switch (cmd) {
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		udav_setiff_locked(un);
 		break;
 	default:
 		break;
+	}
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	return 0;
+}
 /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */
 static void
 udav_uno_stop(struct ifnet *ifp, int disable)
+{
 	struct usbnet * const un = ifp->if_softc;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	udav_reset(un);
+}
 static int
 udav_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
+{
 	uint8_t data[2];
 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n",
 		 device_xname(un->un_dev), __func__, phy, reg));
 	if (usbnet_isdying(un)) {
 #ifdef DIAGNOSTIC
 		printf("%s: %s: dying\n", device_xname(un->un_dev),
 		       __func__);
 #endif
 		return EINVAL;
+	}
 	/* XXX: one PHY only for the internal PHY */
 	if (phy != 0) {
 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
 			 device_xname(un->un_dev), __func__, phy));
 		return EINVAL;
+	}
 	/* select internal PHY and set PHY register address */
 	udav_csr_write1(un, UDAV_EPAR,
 			UDAV_EPAR_PHY_ADR0 | (reg & UDAV_EPAR_EROA_MASK));
 	/* select PHY operation and start read command */
 	udav_csr_write1(un, UDAV_EPCR, UDAV_EPCR_EPOS | UDAV_EPCR_ERPRR);
 	/* XXX: should be wait? */
 	/* end read command */
 	UDAV_CLRBIT(un, UDAV_EPCR, UDAV_EPCR_ERPRR);
 	/* retrieve the result from data registers */
 	udav_csr_read(un, UDAV_EPDRL, data, 2);
 	*val = data[0] | (data[1] << 8);
 	DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04hx\n",
 		device_xname(un->un_dev), __func__, phy, reg, *val));
 	return 0;
+}
 static int
 udav_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
+{
 	uint8_t data[2];
 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x val=0x%04hx\n",
 		 device_xname(un->un_dev), __func__, phy, reg, val));
 	if (usbnet_isdying(un)) {
 #ifdef DIAGNOSTIC
 		printf("%s: %s: dying\n", device_xname(un->un_dev),
 		       __func__);
 #endif
 		return EIO;
+	}
 	/* XXX: one PHY only for the internal PHY */
 	if (phy != 0) {
 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
 			 device_xname(un->un_dev), __func__, phy));
 		return EIO;
+	}
 	/* select internal PHY and set PHY register address */
 	udav_csr_write1(un, UDAV_EPAR,
 			UDAV_EPAR_PHY_ADR0 | (reg & UDAV_EPAR_EROA_MASK));
 	/* put the value to the data registers */
 	data[0] = val & 0xff;
 	data[1] = (val >> 8) & 0xff;
 	udav_csr_write(un, UDAV_EPDRL, data, 2);
 	/* select PHY operation and start write command */
 	udav_csr_write1(un, UDAV_EPCR, UDAV_EPCR_EPOS | UDAV_EPCR_ERPRW);
 	/* XXX: should be wait? */
 	/* end write command */
 	UDAV_CLRBIT(un, UDAV_EPCR, UDAV_EPCR_ERPRW);
 	return 0;
+}
 static void
 udav_uno_mii_statchg(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	struct mii_data * const mii = usbnet_mii(un);
 	DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__));
 	if (usbnet_isdying(un))
 		return;
 	if ((mii->mii_media_status & IFM_ACTIVE) &&
 	    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
 		DPRINTF(("%s: %s: got link\n",
 			 device_xname(un->un_dev), __func__));
 		usbnet_set_link(un, true);
+	}
+}
 #ifdef _MODULE
 #include "ioconf.c"
 #endif
 USBNET_MODULE(udav)

 @@ -1,774 +1,776 @@
-/*	$NetBSD: if_url.c,v 1.79 2022/03/03 05:50:22 riastradh Exp $	*/
+/*	$NetBSD: if_url.c,v 1.80 2022/03/03 05:50:57 riastradh Exp $	*/
 /*
  * Copyright (c) 2001, 2002
  *     Shingo WATANABE <nabe@nabechan.org>.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the author nor the names of any co-contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  */
 /*
  * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at
  *   ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf
  *   ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf
  */
 /*
  * TODO:
  *	Interrupt Endpoint support
  *	External PHYs
  *	powerhook() support?
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.79 2022/03/03 05:50:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.80 2022/03/03 05:50:57 riastradh Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_inet.h"
 #include "opt_usb.h"
 #endif
 #include <sys/param.h>
 #include <net/if_ether.h>
 #ifdef INET
 #include <netinet/in.h>
 #include <netinet/if_inarp.h>
 #endif
 #include <dev/mii/urlphyreg.h>
 #include <dev/usb/usbnet.h>
 #include <dev/usb/if_urlreg.h>
 /* Function declarations */
 static int	url_match(device_t, cfdata_t, void *);
 static void	url_attach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(url, sizeof(struct usbnet), url_match, url_attach,
     usbnet_detach, usbnet_activate);
 static unsigned	url_uno_tx_prepare(struct usbnet *, struct mbuf *,
 				   struct usbnet_chain *);
 static void url_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
 static int url_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int url_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static int url_uno_ioctl(struct ifnet *, u_long, void *);
 static void url_uno_stop(struct ifnet *, int);
 static void url_uno_mii_statchg(struct ifnet *);
 static int url_uno_init(struct ifnet *);
 static void url_rcvfilt_locked(struct usbnet *);
 static void url_reset(struct usbnet *);
 static int url_csr_read_1(struct usbnet *, int);
 static int url_csr_read_2(struct usbnet *, int);
 static int url_csr_write_1(struct usbnet *, int, int);
 static int url_csr_write_2(struct usbnet *, int, int);
 static int url_csr_write_4(struct usbnet *, int, int);
 static int url_mem(struct usbnet *, int, int, void *, int);
 static const struct usbnet_ops url_ops = {
 	.uno_stop = url_uno_stop,
 	.uno_ioctl = url_uno_ioctl,
 	.uno_read_reg = url_uno_mii_read_reg,
 	.uno_write_reg = url_uno_mii_write_reg,
 	.uno_statchg = url_uno_mii_statchg,
 	.uno_tx_prepare = url_uno_tx_prepare,
 	.uno_rx_loop = url_uno_rx_loop,
 	.uno_init = url_uno_init,
 };
 /* Macros */
 #ifdef URL_DEBUG
 #define DPRINTF(x)	if (urldebug) printf x
 #define DPRINTFN(n, x)	if (urldebug >= (n)) printf x
 int urldebug = 0;
 #else
 #define DPRINTF(x)
 #define DPRINTFN(n, x)
 #endif
 #define	URL_SETBIT(un, reg, x)	\
 	url_csr_write_1(un, reg, url_csr_read_1(un, reg) | (x))
 #define	URL_SETBIT2(un, reg, x)	\
 	url_csr_write_2(un, reg, url_csr_read_2(un, reg) | (x))
 #define	URL_CLRBIT(un, reg, x)	\
 	url_csr_write_1(un, reg, url_csr_read_1(un, reg) & ~(x))
 #define	URL_CLRBIT2(un, reg, x)	\
 	url_csr_write_2(un, reg, url_csr_read_2(un, reg) & ~(x))
 static const struct url_type {
 	struct usb_devno url_dev;
 	uint16_t url_flags;
 #define URL_EXT_PHY	0x0001
 } url_devs [] = {
 	/* MELCO LUA-KTX */
 	{{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0},
 	/* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */
 	{{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0},
 	/* Longshine LCS-8138TX */
 	{{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0},
 	/* Micronet SP128AR */
 	{{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0},
 	/* OQO model 01 */
 	{{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0},
 };
 #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p))
 /* Probe */
 static int
 url_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct usb_attach_arg *uaa = aux;
 	return url_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
 		UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
+}
 /* Attach */
 static void
 url_attach(device_t parent, device_t self, void *aux)
+{
 	USBNET_MII_DECL_DEFAULT(unm);
 	struct usbnet * const un = device_private(self);
 	struct usb_attach_arg *uaa = aux;
 	struct usbd_device *dev = uaa->uaa_device;
 	struct usbd_interface *iface;
 	usbd_status err;
 	usb_interface_descriptor_t *id;
 	usb_endpoint_descriptor_t *ed;
 	char *devinfop;
 	int i;
 	aprint_naive("\n");
 	aprint_normal("\n");
 	devinfop = usbd_devinfo_alloc(dev, 0);
 	aprint_normal_dev(self, "%s\n", devinfop);
 	usbd_devinfo_free(devinfop);
 	un->un_dev = self;
 	un->un_udev = dev;
 	un->un_sc = un;
 	un->un_ops = &url_ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
 	un->un_rx_list_cnt = URL_RX_LIST_CNT;
 	un->un_tx_list_cnt = URL_TX_LIST_CNT;
 	un->un_rx_bufsz = URL_BUFSZ;
 	un->un_tx_bufsz = URL_BUFSZ;
 	/* Move the device into the configured state. */
 	err = usbd_set_config_no(dev, URL_CONFIG_NO, 1);
 	if (err) {
 		aprint_error_dev(self, "failed to set configuration"
 		    ", err=%s\n", usbd_errstr(err));
 		return;
+	}
 	/* get control interface */
 	err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface);
 	if (err) {
 		aprint_error_dev(self, "failed to get interface, err=%s\n",
 		       usbd_errstr(err));
 		return;
+	}
 	un->un_iface = iface;
 	un->un_flags = url_lookup(uaa->uaa_vendor, uaa->uaa_product)->url_flags;
 #if 0
 	if (un->un_flags & URL_EXT_PHY) {
 		un->un_read_reg_cb = url_ext_mii_read_reg;
 		un->un_write_reg_cb = url_ext_mii_write_reg;
+	}
 #endif
 	/* get interface descriptor */
 	id = usbd_get_interface_descriptor(un->un_iface);
 	/* find endpoints */
 	un->un_ed[USBNET_ENDPT_RX] = un->un_ed[USBNET_ENDPT_TX] =
 	    un->un_ed[USBNET_ENDPT_INTR] = 0;
 	for (i = 0; i < id->bNumEndpoints; i++) {
 		ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
 		if (ed == NULL) {
 			aprint_error_dev(self,
 			    "couldn't get endpoint %d\n", i);
 			return;
+		}
 		if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
 		    UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
 			un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT)
 			un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT &&
 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
 			un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
+	}
 	if (un->un_ed[USBNET_ENDPT_RX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_TX] == 0 ||
 	    un->un_ed[USBNET_ENDPT_INTR] == 0) {
 		aprint_error_dev(self, "missing endpoint\n");
 		return;
+	}
 	/* Set these up now for url_mem().  */
 	usbnet_attach(un, "urldet");
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 	/* reset the adapter */
 	url_reset(un);
 	/* Get Ethernet Address */
 	err = url_mem(un, URL_CMD_READMEM, URL_IDR0, (void *)un->un_eaddr,
 		      ETHER_ADDR_LEN);
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	if (err) {
 		aprint_error_dev(self, "read MAC address failed\n");
 		return;
+	}
 	/* initialize interface information */
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 , &unm);
+}
 /* read/write memory */
 static int
 url_mem(struct usbnet *un, int cmd, int offset, void *buf, int len)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	usbnet_isowned_core(un);
 	DPRINTFN(0x200,
 		("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if (usbnet_isdying(un))
 		return 0;
 	if (cmd == URL_CMD_READMEM)
 		req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	else
 		req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	req.bRequest = URL_REQ_MEM;
 	USETW(req.wValue, offset);
 	USETW(req.wIndex, 0x0000);
 	USETW(req.wLength, len);
 	err = usbd_do_request(un->un_udev, &req, buf);
 	if (err) {
 		DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n",
 			 device_xname(un->un_dev),
 			 cmd == URL_CMD_READMEM ? "read" : "write",
 			 offset, err));
+	}
 	return err;
+}
 /* read 1byte from register */
 static int
 url_csr_read_1(struct usbnet *un, int reg)
+{
 	uint8_t val = 0;
 	DPRINTFN(0x100,
 		 ("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	return url_mem(un, URL_CMD_READMEM, reg, &val, 1) ? 0 : val;
+}
 /* read 2bytes from register */
 static int
 url_csr_read_2(struct usbnet *un, int reg)
+{
 	uWord val;
 	DPRINTFN(0x100,
 		 ("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	USETW(val, 0);
 	return url_mem(un, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val);
+}
 /* write 1byte to register */
 static int
 url_csr_write_1(struct usbnet *un, int reg, int aval)
+{
 	uint8_t val = aval;
 	DPRINTFN(0x100,
 		 ("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0;
+}
 /* write 2bytes to register */
 static int
 url_csr_write_2(struct usbnet *un, int reg, int aval)
+{
 	uWord val;
 	DPRINTFN(0x100,
 		 ("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	USETW(val, aval);
 	return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0;
+}
 /* write 4bytes to register */
 static int
 url_csr_write_4(struct usbnet *un, int reg, int aval)
+{
 	uDWord val;
 	DPRINTFN(0x100,
 		 ("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	USETDW(val, aval);
 	return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0;
+}
 static int
 url_init_locked(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	const u_char *eaddr;
 	int i;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return EIO;
 	/* Cancel pending I/O and free all TX/RX buffers */
 	usbnet_stop(un, ifp, 1);
 	eaddr = CLLADDR(ifp->if_sadl);
 	for (i = 0; i < ETHER_ADDR_LEN; i++)
 		url_csr_write_1(un, URL_IDR0 + i, eaddr[i]);
 	/* Init transmission control register */
 	URL_CLRBIT(un, URL_TCR,
 		   URL_TCR_TXRR1 | URL_TCR_TXRR0 |
 		   URL_TCR_IFG1 | URL_TCR_IFG0 |
 		   URL_TCR_NOCRC);
 	/* Init receive control register */
 	URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD | URL_RCR_AB);
 	/* Accept multicast frame or run promisc. mode */
 	url_rcvfilt_locked(un);
 	/* Enable RX and TX */
 	URL_SETBIT(un, URL_CR, URL_CR_TE | URL_CR_RE);
 	return usbnet_init_rx_tx(un);
+}
 static int
 url_uno_init(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_busy(un);
 	int ret = url_init_locked(ifp);
 	usbnet_unbusy(un);
 	return ret;
+}
 static void
 url_reset(struct usbnet *un)
+{
 	int i;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	if (usbnet_isdying(un))
 		return;
 	URL_SETBIT(un, URL_CR, URL_CR_SOFT_RST);
 	for (i = 0; i < URL_TX_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		if (!(url_csr_read_1(un, URL_CR) & URL_CR_SOFT_RST))
 			break;
 		delay(10);	/* XXX */
+	}
 	delay(10000);		/* XXX */
+}
 static void
 url_rcvfilt_locked(struct usbnet *un)
+{
 	struct ifnet * const ifp = usbnet_ifp(un);
 	struct ethercom *ec = usbnet_ec(un);
 	struct ether_multi *enm;
 	struct ether_multistep step;
 	uint32_t mchash[2] = { 0, 0 };
 	int h = 0, rcr;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return;
 	rcr = url_csr_read_2(un, URL_RCR);
 	rcr &= ~(URL_RCR_AAP | URL_RCR_AAM | URL_RCR_AM);
 	ETHER_LOCK(ec);
 	if (ifp->if_flags & IFF_PROMISC) {
 		ec->ec_flags |= ETHER_F_ALLMULTI;
 		ETHER_UNLOCK(ec);
 		/* run promisc. mode */
 		rcr |= URL_RCR_AAM; /* ??? */
 		rcr |= URL_RCR_AAP;
 		goto update;
+	}
 	ec->ec_flags &= ~ETHER_F_ALLMULTI;
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
 			ec->ec_flags |= ETHER_F_ALLMULTI;
 			ETHER_UNLOCK(ec);
 			/* accept all multicast frames */
 			rcr |= URL_RCR_AAM;
 			goto update;
+		}
 		h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN);
 		/* 1(31) and 5(30:26) bit sampling */
 		mchash[h >> 31] |= 1 << ((h >> 26) & 0x1f);
 		ETHER_NEXT_MULTI(step, enm);
+	}
 	ETHER_UNLOCK(ec);
 	if (h != 0)
 		rcr |= URL_RCR_AM;	/* activate mcast hash filter */
 	url_csr_write_4(un, URL_MAR0, mchash[0]);
 	url_csr_write_4(un, URL_MAR4, mchash[1]);
  update:
 	url_csr_write_2(un, URL_RCR, rcr);
+}
 static unsigned
 url_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
+{
 	int total_len;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__));
 	KASSERT(un->un_tx_bufsz >= URL_MIN_FRAME_LEN);
 	if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz)
 		return 0;
 	/* Copy the mbuf data into a contiguous buffer */
 	m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf);
 	total_len = m->m_pkthdr.len;
 	if (total_len < URL_MIN_FRAME_LEN) {
 		memset(c->unc_buf + total_len, 0,
 		    URL_MIN_FRAME_LEN - total_len);
 		total_len = URL_MIN_FRAME_LEN;
+	}
 	DPRINTF(("%s: %s: send %d bytes\n", device_xname(un->un_dev),
 		 __func__, total_len));
 	return total_len;
+}
 static void
 url_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
+{
 	struct ifnet *ifp = usbnet_ifp(un);
 	url_rxhdr_t rxhdr;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__));
 	if (total_len <= ETHER_CRC_LEN || total_len <= sizeof(rxhdr)) {
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	memcpy(&rxhdr, c->unc_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr));
 	DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n",
 		 device_xname(un->un_dev),
 		 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK,
 		 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "",
 		 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "",
 		 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "",
 		 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : ""));
 	if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) {
 		if_statinc(ifp, if_ierrors);
 		return;
+	}
 	total_len -= ETHER_CRC_LEN;
 	DPRINTF(("%s: %s: deliver %d\n", device_xname(un->un_dev),
 		 __func__, total_len));
 	usbnet_enqueue(un, c->unc_buf, total_len, 0, 0, 0);
+}
 #if 0
 static void url_intr(void)
+{
+}
 #endif
 static int
 url_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 	switch (cmd) {
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		url_rcvfilt_locked(un);
 		break;
 	default:
 		break;
+	}
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	return 0;
+}
 /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */
 static void
 url_uno_stop(struct ifnet *ifp, int disable)
+{
 	struct usbnet * const un = ifp->if_softc;
 	DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
 	url_reset(un);
+}
 static int
 url_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
+{
 	uint16_t data;
 	usbd_status err = USBD_NORMAL_COMPLETION;
 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n",
 		 device_xname(un->un_dev), __func__, phy, reg));
 	/* XXX: one PHY only for the RTL8150 internal PHY */
 	if (phy != 0) {
 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
 			 device_xname(un->un_dev), __func__, phy));
 		return EINVAL;
+	}
 	switch (reg) {
 	case MII_BMCR:		/* Control Register */
 		reg = URL_BMCR;
 		break;
 	case MII_BMSR:		/* Status Register */
 		reg = URL_BMSR;
 		break;
 	case MII_PHYIDR1:
 	case MII_PHYIDR2:
 		*val = 0;
 		goto R_DONE;
 		break;
 	case MII_ANAR:		/* Autonegotiation advertisement */
 		reg = URL_ANAR;
 		break;
 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
 		reg = URL_ANLP;
 		break;
 	case URLPHY_MSR:	/* Media Status Register */
 		reg = URL_MSR;
 		break;
 	default:
 		printf("%s: %s: bad register %04x\n",
 		       device_xname(un->un_dev), __func__, reg);
 		return EINVAL;
+	}
 	if (reg == URL_MSR)
 		data = url_csr_read_1(un, reg);
 	else
 		data = url_csr_read_2(un, reg);
 	*val = data;
  R_DONE:
 	DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04hx\n",
 		 device_xname(un->un_dev), __func__, phy, reg, *val));
 	return err;
+}
 static int
 url_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
+{
 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x val=0x%04hx\n",
 		 device_xname(un->un_dev), __func__, phy, reg, val));
 	/* XXX: one PHY only for the RTL8150 internal PHY */
 	if (phy != 0) {
 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
 			 device_xname(un->un_dev), __func__, phy));
 		return EINVAL;
+	}
 	switch (reg) {
 	case MII_BMCR:		/* Control Register */
 		reg = URL_BMCR;
 		break;
 	case MII_BMSR:		/* Status Register */
 		reg = URL_BMSR;
 		break;
 	case MII_PHYIDR1:
 	case MII_PHYIDR2:
 		return 0;
 	case MII_ANAR:		/* Autonegotiation advertisement */
 		reg = URL_ANAR;
 		break;
 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
 		reg = URL_ANLP;
 		break;
 	case URLPHY_MSR:	/* Media Status Register */
 		reg = URL_MSR;
 		break;
 	default:
 		printf("%s: %s: bad register %04x\n",
 		       device_xname(un->un_dev), __func__, reg);
 		return EINVAL;
+	}
 	if (reg == URL_MSR)
 		url_csr_write_1(un, reg, val);
 	else
 		url_csr_write_2(un, reg, val);
 	return 0;
+}
 static void
 url_uno_mii_statchg(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__));
 	/* XXX */
 	usbnet_set_link(un, true);
+}
 #if 0
 /*
  * external PHYs support, but not test.
  */
 static usbd_status
 url_ext_mii_read_reg(struct usbnet *un, int phy, int reg)
+{
 	uint16_t val;
 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n",
 		 device_xname(un->un_dev), __func__, phy, reg));
 	url_csr_write_1(un, URL_PHYADD, phy & URL_PHYADD_MASK);
 	/*
 	 * RTL8150L will initiate a MII management data transaction
 	 * if PHYCNT_OWN bit is set 1 by software. After transaction,
 	 * this bit is auto cleared by TRL8150L.
 	 */
 	url_csr_write_1(un, URL_PHYCNT,
 			(reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR);
 	for (i = 0; i < URL_TIMEOUT; i++) {
 		if ((url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0)
 			break;
+	}
 	if (i == URL_TIMEOUT) {
 		printf("%s: MII read timed out\n", device_xname(un->un_dev));
+	}
 	val = url_csr_read_2(un, URL_PHYDAT);
 	DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
 		 device_xname(un->un_dev), __func__, phy, reg, val));
 	return USBD_NORMAL_COMPLETION;
+}
 static usbd_status
 url_ext_mii_write_reg(struct usbnet *un, int phy, int reg, int data)
+{
 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
 		 device_xname(un->un_dev), __func__, phy, reg, data));
 	url_csr_write_2(un, URL_PHYDAT, data);
 	url_csr_write_1(un, URL_PHYADD, phy);
 	url_csr_write_1(un, URL_PHYCNT, reg | URL_PHYCNT_RWCR);	/* Write */
 	for (i=0; i < URL_TIMEOUT; i++) {
 		if (url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN)
 			break;
+	}
 	if (i == URL_TIMEOUT) {
 		printf("%s: MII write timed out\n",
 		       device_xname(un->un_dev));
 		return USBD_TIMEOUT;
+	}
 	return USBD_NORMAL_COMPLETION;
+}
 #endif
 #ifdef _MODULE
 #include "ioconf.c"
 #endif
 USBNET_MODULE(url)

 @@ -1,1163 +1,1173 @@
-/*	$NetBSD: if_ure.c,v 1.41 2022/03/03 05:50:22 riastradh Exp $	*/
+/*	$NetBSD: if_ure.c,v 1.42 2022/03/03 05:50:57 riastradh Exp $	*/
 /*	$OpenBSD: if_ure.c,v 1.10 2018/11/02 21:32:30 jcs Exp $	*/
 /*-
  * Copyright (c) 2015-2016 Kevin Lo <kevlo@FreeBSD.org>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 /* RealTek RTL8152/RTL8153 10/100/Gigabit USB Ethernet device */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_ure.c,v 1.41 2022/03/03 05:50:22 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_ure.c,v 1.42 2022/03/03 05:50:57 riastradh Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
 #include "opt_inet.h"
 #endif
 #include <sys/param.h>
 #include <sys/cprng.h>
 #include <net/route.h>
 #include <dev/usb/usbnet.h>
 #include <netinet/in_offload.h>		/* XXX for in_undefer_cksum() */
 #ifdef INET6
 #include <netinet/in.h>
 #include <netinet6/in6_offload.h>	/* XXX for in6_undefer_cksum() */
 #endif
 #include <dev/ic/rtl81x9reg.h>		/* XXX for RTK_GMEDIASTAT */
 #include <dev/usb/if_urereg.h>
 #include <dev/usb/if_urevar.h>
 #define URE_PRINTF(un, fmt, args...) \
 	device_printf((un)->un_dev, "%s: " fmt, __func__, ##args);
 #define URE_DEBUG
 #ifdef URE_DEBUG
 #define DPRINTF(x)	do { if (uredebug) printf x; } while (0)
 #define DPRINTFN(n, x)	do { if (uredebug >= (n)) printf x; } while (0)
 int	uredebug = 0;
 #else
 #define DPRINTF(x)
 #define DPRINTFN(n, x)
 #endif
 #define ETHER_IS_ZERO(addr) \
 	(!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
 static const struct usb_devno ure_devs[] = {
 	{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8152 },
 	{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8153 }
 };
 #define URE_BUFSZ	(16 * 1024)
 static void	ure_reset(struct usbnet *);
 static uint32_t	ure_txcsum(struct mbuf *);
 static int	ure_rxcsum(struct ifnet *, struct ure_rxpkt *);
 static void	ure_rtl8152_init(struct usbnet *);
 static void	ure_rtl8153_init(struct usbnet *);
 static void	ure_disable_teredo(struct usbnet *);
 static void	ure_init_fifo(struct usbnet *);
 static void	ure_uno_stop(struct ifnet *, int);
 static int	ure_uno_ioctl(struct ifnet *, u_long, void *);
 static int	ure_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
 static int	ure_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
 static void	ure_uno_miibus_statchg(struct ifnet *);
 static unsigned ure_uno_tx_prepare(struct usbnet *, struct mbuf *,
 				   struct usbnet_chain *);
 static void	ure_uno_rx_loop(struct usbnet *, struct usbnet_chain *,
 				uint32_t);
 static int	ure_uno_init(struct ifnet *);
 static int	ure_match(device_t, cfdata_t, void *);
 static void	ure_attach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(ure, sizeof(struct usbnet), ure_match, ure_attach,
     usbnet_detach, usbnet_activate);
 static const struct usbnet_ops ure_ops = {
 	.uno_stop = ure_uno_stop,
 	.uno_ioctl = ure_uno_ioctl,
 	.uno_read_reg = ure_uno_mii_read_reg,
 	.uno_write_reg = ure_uno_mii_write_reg,
 	.uno_statchg = ure_uno_miibus_statchg,
 	.uno_tx_prepare = ure_uno_tx_prepare,
 	.uno_rx_loop = ure_uno_rx_loop,
 	.uno_init = ure_uno_init,
 };
 static int
 ure_ctl(struct usbnet *un, uint8_t rw, uint16_t val, uint16_t index,
     void *buf, int len)
+{
 	usb_device_request_t req;
 	usbd_status err;
 	if (usbnet_isdying(un))
 		return 0;
 	if (rw == URE_CTL_WRITE)
 		req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
 	else
 		req.bmRequestType = UT_READ_VENDOR_DEVICE;
 	req.bRequest = UR_SET_ADDRESS;
 	USETW(req.wValue, val);
 	USETW(req.wIndex, index);
 	USETW(req.wLength, len);
 	DPRINTFN(5, ("ure_ctl: rw %d, val %04hu, index %04hu, len %d\n",
 	    rw, val, index, len));
 	err = usbd_do_request(un->un_udev, &req, buf);
 	if (err) {
 		DPRINTF(("ure_ctl: error %d\n", err));
 		return -1;
+	}
 	return 0;
+}
 static int
 ure_read_mem(struct usbnet *un, uint16_t addr, uint16_t index,
     void *buf, int len)
+{
 	return ure_ctl(un, URE_CTL_READ, addr, index, buf, len);
+}
 static int
 ure_write_mem(struct usbnet *un, uint16_t addr, uint16_t index,
     void *buf, int len)
+{
 	return ure_ctl(un, URE_CTL_WRITE, addr, index, buf, len);
+}
 static uint8_t
 ure_read_1(struct usbnet *un, uint16_t reg, uint16_t index)
+{
 	uint32_t val;
 	uint8_t temp[4];
 	uint8_t shift;
 	shift = (reg & 3) << 3;
 	reg &= ~3;
 	ure_read_mem(un, reg, index, &temp, 4);
 	val = UGETDW(temp);
 	val >>= shift;
 	return val & 0xff;
+}
 static uint16_t
 ure_read_2(struct usbnet *un, uint16_t reg, uint16_t index)
+{
 	uint32_t val;
 	uint8_t temp[4];
 	uint8_t shift;
 	shift = (reg & 2) << 3;
 	reg &= ~3;
 	ure_read_mem(un, reg, index, &temp, 4);
 	val = UGETDW(temp);
 	val >>= shift;
 	return val & 0xffff;
+}
 static uint32_t
 ure_read_4(struct usbnet *un, uint16_t reg, uint16_t index)
+{
 	uint8_t temp[4];
 	ure_read_mem(un, reg, index, &temp, 4);
 	return UGETDW(temp);
+}
 static int
 ure_write_1(struct usbnet *un, uint16_t reg, uint16_t index, uint32_t val)
+{
 	uint16_t byen;
 	uint8_t temp[4];
 	uint8_t shift;
 	byen = URE_BYTE_EN_BYTE;
 	shift = reg & 3;
 	val &= 0xff;
 	if (reg & 3) {
 		byen <<= shift;
 		val <<= (shift << 3);
 		reg &= ~3;
+	}
 	USETDW(temp, val);
 	return ure_write_mem(un, reg, index | byen, &temp, 4);
+}
 static int
 ure_write_2(struct usbnet *un, uint16_t reg, uint16_t index, uint32_t val)
+{
 	uint16_t byen;
 	uint8_t temp[4];
 	uint8_t shift;
 	byen = URE_BYTE_EN_WORD;
 	shift = reg & 2;
 	val &= 0xffff;
 	if (reg & 2) {
 		byen <<= shift;
 		val <<= (shift << 3);
 		reg &= ~3;
+	}
 	USETDW(temp, val);
 	return ure_write_mem(un, reg, index | byen, &temp, 4);
+}
 static int
 ure_write_4(struct usbnet *un, uint16_t reg, uint16_t index, uint32_t val)
+{
 	uint8_t temp[4];
 	USETDW(temp, val);
 	return ure_write_mem(un, reg, index | URE_BYTE_EN_DWORD, &temp, 4);
+}
 static uint16_t
 ure_ocp_reg_read(struct usbnet *un, uint16_t addr)
+{
 	uint16_t reg;
 	ure_write_2(un, URE_PLA_OCP_GPHY_BASE, URE_MCU_TYPE_PLA, addr & 0xf000);
 	reg = (addr & 0x0fff) | 0xb000;
 	return ure_read_2(un, reg, URE_MCU_TYPE_PLA);
+}
 static void
 ure_ocp_reg_write(struct usbnet *un, uint16_t addr, uint16_t data)
+{
 	uint16_t reg;
 	ure_write_2(un, URE_PLA_OCP_GPHY_BASE, URE_MCU_TYPE_PLA, addr & 0xf000);
 	reg = (addr & 0x0fff) | 0xb000;
 	ure_write_2(un, reg, URE_MCU_TYPE_PLA, data);
+}
 static int
 ure_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
+{
 	if (un->un_phyno != phy)
 		return EINVAL;
 	/* Let the rgephy driver read the URE_PLA_PHYSTATUS register. */
 	if (reg == RTK_GMEDIASTAT) {
 		*val = ure_read_1(un, URE_PLA_PHYSTATUS, URE_MCU_TYPE_PLA);
 		return USBD_NORMAL_COMPLETION;
+	}
 	*val = ure_ocp_reg_read(un, URE_OCP_BASE_MII + reg * 2);
 	return 0;
+}
 static int
 ure_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
+{
 	if (un->un_phyno != phy)
 		return EINVAL;
 	ure_ocp_reg_write(un, URE_OCP_BASE_MII + reg * 2, val);
 	return 0;
+}
 static void
 ure_uno_miibus_statchg(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	struct mii_data * const mii = usbnet_mii(un);
 	if (usbnet_isdying(un))
 		return;
 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
 	    (IFM_ACTIVE | IFM_AVALID)) {
 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
 		case IFM_10_T:
 		case IFM_100_TX:
 			usbnet_set_link(un, true);
 			break;
 		case IFM_1000_T:
 			if ((un->un_flags & URE_FLAG_8152) != 0)
 				break;
 			usbnet_set_link(un, true);
 			break;
 		default:
 			break;
+		}
+	}
+}
 static void
 ure_rcvfilt_locked(struct usbnet *un)
+{
 	struct ethercom *ec = usbnet_ec(un);
 	struct ifnet *ifp = usbnet_ifp(un);
 	struct ether_multi *enm;
 	struct ether_multistep step;
 	uint32_t mchash[2] = { 0, 0 };
 	uint32_t h = 0, rxmode;
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return;
 	rxmode = ure_read_4(un, URE_PLA_RCR, URE_MCU_TYPE_PLA);
 	rxmode &= ~(URE_RCR_AAP | URE_RCR_AM);
 	/* continue to accept my own DA and bcast frames */
 	ETHER_LOCK(ec);
 	if (ifp->if_flags & IFF_PROMISC) {
 		ec->ec_flags |= ETHER_F_ALLMULTI;
 		ETHER_UNLOCK(ec);
 		/* run promisc. mode */
 		rxmode |= URE_RCR_AM;	/* ??? */
 		rxmode |= URE_RCR_AAP;
 		goto update;
+	}
 	ec->ec_flags &= ~ETHER_F_ALLMULTI;
 	ETHER_FIRST_MULTI(step, ec, enm);
 	while (enm != NULL) {
 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
 			ec->ec_flags |= ETHER_F_ALLMULTI;
 			ETHER_UNLOCK(ec);
 			/* accept all mcast frames */
 			rxmode |= URE_RCR_AM;
 			mchash[0] = mchash[1] = ~0U; /* necessary ?? */
 			goto update;
+		}
 		h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN);
 		mchash[h >> 31] |= 1 << ((h >> 26) & 0x1f);
 		ETHER_NEXT_MULTI(step, enm);
+	}
 	ETHER_UNLOCK(ec);
 	if (h != 0) {
 		rxmode |= URE_RCR_AM;	/* activate mcast hash filter */
 		h = bswap32(mchash[0]);
 		mchash[0] = bswap32(mchash[1]);
 		mchash[1] = h;
+	}
  update:
 	ure_write_4(un, URE_PLA_MAR0, URE_MCU_TYPE_PLA, mchash[0]);
 	ure_write_4(un, URE_PLA_MAR4, URE_MCU_TYPE_PLA, mchash[1]);
 	ure_write_4(un, URE_PLA_RCR, URE_MCU_TYPE_PLA, rxmode);
+}
 static void
 ure_reset(struct usbnet *un)
+{
 	int i;
 	usbnet_isowned_core(un);
 	ure_write_1(un, URE_PLA_CR, URE_MCU_TYPE_PLA, URE_CR_RST);
 	for (i = 0; i < URE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		if (!(ure_read_1(un, URE_PLA_CR, URE_MCU_TYPE_PLA) &
 		    URE_CR_RST))
 			break;
 		usbd_delay_ms(un->un_udev, 10);
+	}
 	if (i == URE_TIMEOUT)
 		URE_PRINTF(un, "reset never completed\n");
+}
 static int
 ure_init_locked(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	uint8_t eaddr[8];
 	usbnet_isowned_core(un);
 	if (usbnet_isdying(un))
 		return EIO;
 	/* Cancel pending I/O. */
 	if (ifp->if_flags & IFF_RUNNING)
 		usbnet_stop(un, ifp, 1);
 	/* Set MAC address. */
 	memset(eaddr, 0, sizeof(eaddr));
 	memcpy(eaddr, CLLADDR(ifp->if_sadl), ETHER_ADDR_LEN);
 	ure_write_1(un, URE_PLA_CRWECR, URE_MCU_TYPE_PLA, URE_CRWECR_CONFIG);
 	ure_write_mem(un, URE_PLA_IDR, URE_MCU_TYPE_PLA | URE_BYTE_EN_SIX_BYTES,
 	    eaddr, 8);
 	ure_write_1(un, URE_PLA_CRWECR, URE_MCU_TYPE_PLA, URE_CRWECR_NORAML);
 	/* Reset the packet filter. */
 	ure_write_2(un, URE_PLA_FMC, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_FMC, URE_MCU_TYPE_PLA) &
 	    ~URE_FMC_FCR_MCU_EN);
 	ure_write_2(un, URE_PLA_FMC, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_FMC, URE_MCU_TYPE_PLA) |
 	    URE_FMC_FCR_MCU_EN);
 	/* Enable transmit and receive. */
 	ure_write_1(un, URE_PLA_CR, URE_MCU_TYPE_PLA,
 	    ure_read_1(un, URE_PLA_CR, URE_MCU_TYPE_PLA) | URE_CR_RE |
 	    URE_CR_TE);
 	ure_write_2(un, URE_PLA_MISC_1, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_MISC_1, URE_MCU_TYPE_PLA) &
 	    ~URE_RXDY_GATED_EN);
 	/* Accept multicast frame or run promisc. mode. */
 	ure_rcvfilt_locked(un);
 	return usbnet_init_rx_tx(un);
+}
 static int
 ure_uno_init(struct ifnet *ifp)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_busy(un);
 	int ret = ure_init_locked(ifp);
 	usbnet_unbusy(un);
 	return ret;
+}
 static void
 ure_uno_stop(struct ifnet *ifp, int disable __unused)
+{
 	struct usbnet * const un = ifp->if_softc;
 	ure_reset(un);
+}
 static void
 ure_rtl8152_init(struct usbnet *un)
+{
 	uint32_t pwrctrl;
 	/* Disable ALDPS. */
 	ure_ocp_reg_write(un, URE_OCP_ALDPS_CONFIG, URE_ENPDNPS | URE_LINKENA |
 	    URE_DIS_SDSAVE);
 	usbd_delay_ms(un->un_udev, 20);
 	if (un->un_flags & URE_FLAG_VER_4C00) {
 		ure_write_2(un, URE_PLA_LED_FEATURE, URE_MCU_TYPE_PLA,
 		    ure_read_2(un, URE_PLA_LED_FEATURE, URE_MCU_TYPE_PLA) &
 		    ~URE_LED_MODE_MASK);
+	}
 	ure_write_2(un, URE_USB_UPS_CTRL, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_UPS_CTRL, URE_MCU_TYPE_USB) &
 	    ~URE_POWER_CUT);
 	ure_write_2(un, URE_USB_PM_CTRL_STATUS, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_PM_CTRL_STATUS, URE_MCU_TYPE_USB) &
 	    ~URE_RESUME_INDICATE);
 	ure_write_2(un, URE_PLA_PHY_PWR, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_PHY_PWR, URE_MCU_TYPE_PLA) |
 	    URE_TX_10M_IDLE_EN | URE_PFM_PWM_SWITCH);
 	pwrctrl = ure_read_4(un, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA);
 	pwrctrl &= ~URE_MCU_CLK_RATIO_MASK;
 	pwrctrl |= URE_MCU_CLK_RATIO | URE_D3_CLK_GATED_EN;
 	ure_write_4(un, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA, pwrctrl);
 	ure_write_2(un, URE_PLA_GPHY_INTR_IMR, URE_MCU_TYPE_PLA,
 	    URE_GPHY_STS_MSK | URE_SPEED_DOWN_MSK | URE_SPDWN_RXDV_MSK |
 	    URE_SPDWN_LINKCHG_MSK);
 	/* Enable Rx aggregation. */
 	ure_write_2(un, URE_USB_USB_CTRL, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_USB_CTRL, URE_MCU_TYPE_USB) &
 	    ~URE_RX_AGG_DISABLE);
 	/* Disable ALDPS. */
 	ure_ocp_reg_write(un, URE_OCP_ALDPS_CONFIG, URE_ENPDNPS | URE_LINKENA |
 	    URE_DIS_SDSAVE);
 	usbd_delay_ms(un->un_udev, 20);
 	ure_init_fifo(un);
 	ure_write_1(un, URE_USB_TX_AGG, URE_MCU_TYPE_USB,
 	    URE_TX_AGG_MAX_THRESHOLD);
 	ure_write_4(un, URE_USB_RX_BUF_TH, URE_MCU_TYPE_USB, URE_RX_THR_HIGH);
 	ure_write_4(un, URE_USB_TX_DMA, URE_MCU_TYPE_USB,
 	    URE_TEST_MODE_DISABLE | URE_TX_SIZE_ADJUST1);
+}
 static void
 ure_rtl8153_init(struct usbnet *un)
+{
 	uint16_t val;
 	uint8_t u1u2[8];
 	int i;
 	/* Disable ALDPS. */
 	ure_ocp_reg_write(un, URE_OCP_POWER_CFG,
 	    ure_ocp_reg_read(un, URE_OCP_POWER_CFG) & ~URE_EN_ALDPS);
 	usbd_delay_ms(un->un_udev, 20);
 	memset(u1u2, 0x00, sizeof(u1u2));
 	ure_write_mem(un, URE_USB_TOLERANCE,
 	    URE_MCU_TYPE_USB | URE_BYTE_EN_SIX_BYTES, u1u2, sizeof(u1u2));
 	for (i = 0; i < URE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		if (ure_read_2(un, URE_PLA_BOOT_CTRL, URE_MCU_TYPE_PLA) &
 		    URE_AUTOLOAD_DONE)
 			break;
 		usbd_delay_ms(un->un_udev, 10);
+	}
 	if (i == URE_TIMEOUT)
 		URE_PRINTF(un, "timeout waiting for chip autoload\n");
 	for (i = 0; i < URE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		val = ure_ocp_reg_read(un, URE_OCP_PHY_STATUS) &
 		    URE_PHY_STAT_MASK;
 		if (val == URE_PHY_STAT_LAN_ON || val == URE_PHY_STAT_PWRDN)
 			break;
 		usbd_delay_ms(un->un_udev, 10);
+	}
 	if (i == URE_TIMEOUT)
 		URE_PRINTF(un, "timeout waiting for phy to stabilize\n");
 	ure_write_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB) &
 	    ~URE_U2P3_ENABLE);
 	if (un->un_flags & URE_FLAG_VER_5C10) {
 		val = ure_read_2(un, URE_USB_SSPHYLINK2, URE_MCU_TYPE_USB);
 		val &= ~URE_PWD_DN_SCALE_MASK;
 		val |= URE_PWD_DN_SCALE(96);
 		ure_write_2(un, URE_USB_SSPHYLINK2, URE_MCU_TYPE_USB, val);
 		ure_write_1(un, URE_USB_USB2PHY, URE_MCU_TYPE_USB,
 		    ure_read_1(un, URE_USB_USB2PHY, URE_MCU_TYPE_USB) |
 		    URE_USB2PHY_L1 | URE_USB2PHY_SUSPEND);
 	} else if (un->un_flags & URE_FLAG_VER_5C20) {
 		ure_write_1(un, URE_PLA_DMY_REG0, URE_MCU_TYPE_PLA,
 		    ure_read_1(un, URE_PLA_DMY_REG0, URE_MCU_TYPE_PLA) &
 		    ~URE_ECM_ALDPS);
+	}
 	if (un->un_flags & (URE_FLAG_VER_5C20 | URE_FLAG_VER_5C30)) {
 		val = ure_read_1(un, URE_USB_CSR_DUMMY1, URE_MCU_TYPE_USB);
 		if (ure_read_2(un, URE_USB_BURST_SIZE, URE_MCU_TYPE_USB) ==
 )
 			val &= ~URE_DYNAMIC_BURST;
 		else
 			val |= URE_DYNAMIC_BURST;
 		ure_write_1(un, URE_USB_CSR_DUMMY1, URE_MCU_TYPE_USB, val);
+	}
 	ure_write_1(un, URE_USB_CSR_DUMMY2, URE_MCU_TYPE_USB,
 	    ure_read_1(un, URE_USB_CSR_DUMMY2, URE_MCU_TYPE_USB) |
 	    URE_EP4_FULL_FC);
 	ure_write_2(un, URE_USB_WDT11_CTRL, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_WDT11_CTRL, URE_MCU_TYPE_USB) &
 	    ~URE_TIMER11_EN);
 	ure_write_2(un, URE_PLA_LED_FEATURE, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_LED_FEATURE, URE_MCU_TYPE_PLA) &
 	    ~URE_LED_MODE_MASK);
 	if ((un->un_flags & URE_FLAG_VER_5C10) &&
 	    un->un_udev->ud_speed != USB_SPEED_SUPER)
 		val = URE_LPM_TIMER_500MS;
 	else
 		val = URE_LPM_TIMER_500US;
 	ure_write_1(un, URE_USB_LPM_CTRL, URE_MCU_TYPE_USB,
 	    val | URE_FIFO_EMPTY_1FB | URE_ROK_EXIT_LPM);
 	val = ure_read_2(un, URE_USB_AFE_CTRL2, URE_MCU_TYPE_USB);
 	val &= ~URE_SEN_VAL_MASK;
 	val |= URE_SEN_VAL_NORMAL | URE_SEL_RXIDLE;
 	ure_write_2(un, URE_USB_AFE_CTRL2, URE_MCU_TYPE_USB, val);
 	ure_write_2(un, URE_USB_CONNECT_TIMER, URE_MCU_TYPE_USB, 0x0001);
 	ure_write_2(un, URE_USB_POWER_CUT, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_POWER_CUT, URE_MCU_TYPE_USB) &
 	    ~(URE_PWR_EN | URE_PHASE2_EN));
 	ure_write_2(un, URE_USB_MISC_0, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_MISC_0, URE_MCU_TYPE_USB) &
 	    ~URE_PCUT_STATUS);
 	memset(u1u2, 0xff, sizeof(u1u2));
 	ure_write_mem(un, URE_USB_TOLERANCE,
 	    URE_MCU_TYPE_USB | URE_BYTE_EN_SIX_BYTES, u1u2, sizeof(u1u2));
 	ure_write_2(un, URE_PLA_MAC_PWR_CTRL, URE_MCU_TYPE_PLA,
 	    URE_ALDPS_SPDWN_RATIO);
 	ure_write_2(un, URE_PLA_MAC_PWR_CTRL2, URE_MCU_TYPE_PLA,
 	    URE_EEE_SPDWN_RATIO);
 	ure_write_2(un, URE_PLA_MAC_PWR_CTRL3, URE_MCU_TYPE_PLA,
 	    URE_PKT_AVAIL_SPDWN_EN | URE_SUSPEND_SPDWN_EN |
 	    URE_U1U2_SPDWN_EN | URE_L1_SPDWN_EN);
 	ure_write_2(un, URE_PLA_MAC_PWR_CTRL4, URE_MCU_TYPE_PLA,
 	    URE_PWRSAVE_SPDWN_EN | URE_RXDV_SPDWN_EN | URE_TX10MIDLE_EN |
 	    URE_TP100_SPDWN_EN | URE_TP500_SPDWN_EN | URE_TP1000_SPDWN_EN |
 	    URE_EEE_SPDWN_EN);
 	val = ure_read_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB);
 	if (!(un->un_flags & (URE_FLAG_VER_5C00 | URE_FLAG_VER_5C10)))
 		val |= URE_U2P3_ENABLE;
 	else
 		val &= ~URE_U2P3_ENABLE;
 	ure_write_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val);
 	memset(u1u2, 0x00, sizeof(u1u2));
 	ure_write_mem(un, URE_USB_TOLERANCE,
 	    URE_MCU_TYPE_USB | URE_BYTE_EN_SIX_BYTES, u1u2, sizeof(u1u2));
 	/* Disable ALDPS. */
 	ure_ocp_reg_write(un, URE_OCP_POWER_CFG,
 	    ure_ocp_reg_read(un, URE_OCP_POWER_CFG) & ~URE_EN_ALDPS);
 	usbd_delay_ms(un->un_udev, 20);
 	ure_init_fifo(un);
 	/* Enable Rx aggregation. */
 	ure_write_2(un, URE_USB_USB_CTRL, URE_MCU_TYPE_USB,
 	    ure_read_2(un, URE_USB_USB_CTRL, URE_MCU_TYPE_USB) &
 	    ~URE_RX_AGG_DISABLE);
 	val = ure_read_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB);
 	if (!(un->un_flags & (URE_FLAG_VER_5C00 | URE_FLAG_VER_5C10)))
 		val |= URE_U2P3_ENABLE;
 	else
 		val &= ~URE_U2P3_ENABLE;
 	ure_write_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val);
 	memset(u1u2, 0xff, sizeof(u1u2));
 	ure_write_mem(un, URE_USB_TOLERANCE,
 	    URE_MCU_TYPE_USB | URE_BYTE_EN_SIX_BYTES, u1u2, sizeof(u1u2));
+}
 static void
 ure_disable_teredo(struct usbnet *un)
+{
 	ure_write_4(un, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA,
 	    ure_read_4(un, URE_PLA_TEREDO_CFG, URE_MCU_TYPE_PLA) &
 	    ~(URE_TEREDO_SEL | URE_TEREDO_RS_EVENT_MASK | URE_OOB_TEREDO_EN));
 	ure_write_2(un, URE_PLA_WDT6_CTRL, URE_MCU_TYPE_PLA,
 	    URE_WDT6_SET_MODE);
 	ure_write_2(un, URE_PLA_REALWOW_TIMER, URE_MCU_TYPE_PLA, 0);
 	ure_write_4(un, URE_PLA_TEREDO_TIMER, URE_MCU_TYPE_PLA, 0);
+}
 static void
 ure_init_fifo(struct usbnet *un)
+{
 	uint32_t rxmode, rx_fifo1, rx_fifo2;
 	int i;
 	ure_write_2(un, URE_PLA_MISC_1, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_MISC_1, URE_MCU_TYPE_PLA) |
 	    URE_RXDY_GATED_EN);
 	ure_disable_teredo(un);
 	rxmode = ure_read_4(un, URE_PLA_RCR, URE_MCU_TYPE_PLA);
 	rxmode &= ~URE_RCR_ACPT_ALL;
 	rxmode |= URE_RCR_APM | URE_RCR_AB; /* accept my own DA and bcast */
 	ure_write_4(un, URE_PLA_RCR, URE_MCU_TYPE_PLA, rxmode);
 	if (!(un->un_flags & URE_FLAG_8152)) {
 		if (un->un_flags & (URE_FLAG_VER_5C00 | URE_FLAG_VER_5C10 |
 		    URE_FLAG_VER_5C20))
 			ure_ocp_reg_write(un, URE_OCP_ADC_CFG,
 			    URE_CKADSEL_L | URE_ADC_EN | URE_EN_EMI_L);
 		if (un->un_flags & URE_FLAG_VER_5C00)
 			ure_ocp_reg_write(un, URE_OCP_EEE_CFG,
 			    ure_ocp_reg_read(un, URE_OCP_EEE_CFG) &
 			    ~URE_CTAP_SHORT_EN);
 		ure_ocp_reg_write(un, URE_OCP_POWER_CFG,
 		    ure_ocp_reg_read(un, URE_OCP_POWER_CFG) |
 		    URE_EEE_CLKDIV_EN);
 		ure_ocp_reg_write(un, URE_OCP_DOWN_SPEED,
 		    ure_ocp_reg_read(un, URE_OCP_DOWN_SPEED) |
 		    URE_EN_10M_BGOFF);
 		ure_ocp_reg_write(un, URE_OCP_POWER_CFG,
 		    ure_ocp_reg_read(un, URE_OCP_POWER_CFG) |
 		    URE_EN_10M_PLLOFF);
 		ure_ocp_reg_write(un, URE_OCP_SRAM_ADDR, URE_SRAM_IMPEDANCE);
 		ure_ocp_reg_write(un, URE_OCP_SRAM_DATA, 0x0b13);
 		ure_write_2(un, URE_PLA_PHY_PWR, URE_MCU_TYPE_PLA,
 		    ure_read_2(un, URE_PLA_PHY_PWR, URE_MCU_TYPE_PLA) |
 		    URE_PFM_PWM_SWITCH);
 		/* Enable LPF corner auto tune. */
 		ure_ocp_reg_write(un, URE_OCP_SRAM_ADDR, URE_SRAM_LPF_CFG);
 		ure_ocp_reg_write(un, URE_OCP_SRAM_DATA, 0xf70f);
 		/* Adjust 10M amplitude. */
 		ure_ocp_reg_write(un, URE_OCP_SRAM_ADDR, URE_SRAM_10M_AMP1);
 		ure_ocp_reg_write(un, URE_OCP_SRAM_DATA, 0x00af);
 		ure_ocp_reg_write(un, URE_OCP_SRAM_ADDR, URE_SRAM_10M_AMP2);
 		ure_ocp_reg_write(un, URE_OCP_SRAM_DATA, 0x0208);
+	}
 	ure_reset(un);
 	ure_write_1(un, URE_PLA_CR, URE_MCU_TYPE_PLA, 0);
 	ure_write_1(un, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA,
 	    ure_read_1(un, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA) &
 	    ~URE_NOW_IS_OOB);
 	ure_write_2(un, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA) &
 	    ~URE_MCU_BORW_EN);
 	for (i = 0; i < URE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		if (ure_read_1(un, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA) &
 		    URE_LINK_LIST_READY)
 			break;
 		usbd_delay_ms(un->un_udev, 10);
+	}
 	if (i == URE_TIMEOUT)
 		URE_PRINTF(un, "timeout waiting for OOB control\n");
 	ure_write_2(un, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_SFF_STS_7, URE_MCU_TYPE_PLA) |
 	    URE_RE_INIT_LL);
 	for (i = 0; i < URE_TIMEOUT; i++) {
 		if (usbnet_isdying(un))
 			return;
 		if (ure_read_1(un, URE_PLA_OOB_CTRL, URE_MCU_TYPE_PLA) &
 		    URE_LINK_LIST_READY)
 			break;
 		usbd_delay_ms(un->un_udev, 10);
+	}
 	if (i == URE_TIMEOUT)
 		URE_PRINTF(un, "timeout waiting for OOB control\n");
 	ure_write_2(un, URE_PLA_CPCR, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_CPCR, URE_MCU_TYPE_PLA) &
 	    ~URE_CPCR_RX_VLAN);
 	ure_write_2(un, URE_PLA_TCR0, URE_MCU_TYPE_PLA,
 	    ure_read_2(un, URE_PLA_TCR0, URE_MCU_TYPE_PLA) |
 	    URE_TCR0_AUTO_FIFO);
 	/* Configure Rx FIFO threshold and coalescing. */
 	ure_write_4(un, URE_PLA_RXFIFO_CTRL0, URE_MCU_TYPE_PLA,
 	    URE_RXFIFO_THR1_NORMAL);
 	if (un->un_udev->ud_speed == USB_SPEED_FULL) {
 		rx_fifo1 = URE_RXFIFO_THR2_FULL;
 		rx_fifo2 = URE_RXFIFO_THR3_FULL;
 	} else {
 		rx_fifo1 = URE_RXFIFO_THR2_HIGH;
 		rx_fifo2 = URE_RXFIFO_THR3_HIGH;
+	}
 	ure_write_4(un, URE_PLA_RXFIFO_CTRL1, URE_MCU_TYPE_PLA, rx_fifo1);
 	ure_write_4(un, URE_PLA_RXFIFO_CTRL2, URE_MCU_TYPE_PLA, rx_fifo2);
 	/* Configure Tx FIFO threshold. */
 	ure_write_4(un, URE_PLA_TXFIFO_CTRL, URE_MCU_TYPE_PLA,
 	    URE_TXFIFO_THR_NORMAL);
+}
 static int
 ure_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
+{
 	struct usbnet * const un = ifp->if_softc;
 	usbnet_lock_core(un);
 	usbnet_busy(un);
 	switch (cmd) {
 	case SIOCADDMULTI:
 	case SIOCDELMULTI:
 		ure_rcvfilt_locked(un);
 		break;
 	default:
 		break;
+	}
 	usbnet_unbusy(un);
 	usbnet_unlock_core(un);
 	return 0;
+}
 static int
 ure_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct usb_attach_arg *uaa = aux;
 	return usb_lookup(ure_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL ?
 	    UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
+}
 static void
 ure_attach(device_t parent, device_t self, void *aux)
+{
 	USBNET_MII_DECL_DEFAULT(unm);
 	struct usbnet * const un = device_private(self);
 	struct usb_attach_arg *uaa = aux;
 	struct usbd_device *dev = uaa->uaa_device;
 	usb_interface_descriptor_t *id;
 	usb_endpoint_descriptor_t *ed;
 	int error, i;
 	uint16_t ver;
 	uint8_t eaddr[8]; /* 2byte padded */
 	char *devinfop;
 	uint32_t maclo, machi;
 	aprint_naive("\n");
 	aprint_normal("\n");
 	devinfop = usbd_devinfo_alloc(dev, 0);
 	aprint_normal_dev(self, "%s\n", devinfop);
 	usbd_devinfo_free(devinfop);
 	un->un_dev = self;
 	un->un_udev = dev;
 	un->un_sc = un;
 	un->un_ops = &ure_ops;
 	un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
 	un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
 	un->un_rx_list_cnt = URE_RX_LIST_CNT;
 	un->un_tx_list_cnt = URE_TX_LIST_CNT;
 	un->un_rx_bufsz = URE_BUFSZ;
 	un->un_tx_bufsz = URE_BUFSZ;
 #define URE_CONFIG_NO	1 /* XXX */
 	error = usbd_set_config_no(dev, URE_CONFIG_NO, 1);
 	if (error) {
 		aprint_error_dev(self, "failed to set configuration: %s\n",
 		    usbd_errstr(error));
 		return; /* XXX */
+	}
 	if (uaa->uaa_product == USB_PRODUCT_REALTEK_RTL8152)
 		un->un_flags |= URE_FLAG_8152;
 #define URE_IFACE_IDX  0 /* XXX */
 	error = usbd_device2interface_handle(dev, URE_IFACE_IDX, &un->un_iface);
 	if (error) {
 		aprint_error_dev(self, "failed to get interface handle: %s\n",
 		    usbd_errstr(error));
 		return; /* XXX */
+	}
 	id = usbd_get_interface_descriptor(un->un_iface);
 	for (i = 0; i < id->bNumEndpoints; i++) {
 		ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
 		if (ed == NULL) {
 			aprint_error_dev(self, "couldn't get ep %d\n", i);
 			return; /* XXX */
+		}
 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
 			un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
+		}
+	}
 	/* Set these up now for ure_ctl().  */
 	usbnet_attach(un, "uredet");
 	un->un_phyno = 0;
 	ver = ure_read_2(un, URE_PLA_TCR1, URE_MCU_TYPE_PLA) & URE_VERSION_MASK;
 	switch (ver) {
 	case 0x4c00:
 		un->un_flags |= URE_FLAG_VER_4C00;
 		break;
 	case 0x4c10:
 		un->un_flags |= URE_FLAG_VER_4C10;
 		break;
 	case 0x5c00:
 		un->un_flags |= URE_FLAG_VER_5C00;
 		break;
 	case 0x5c10:
 		un->un_flags |= URE_FLAG_VER_5C10;
 		break;
 	case 0x5c20:
 		un->un_flags |= URE_FLAG_VER_5C20;
 		break;
 	case 0x5c30:
 		un->un_flags |= URE_FLAG_VER_5C30;
 		break;
 	default:
 		/* fake addr?  or just fail? */
 		break;
+	}
 	aprint_normal_dev(self, "RTL%d %sver %04x\n",
 	    (un->un_flags & URE_FLAG_8152) ? 8152 : 8153,
 	    (un->un_flags != 0) ? "" : "unknown ",
 	    ver);
 	usbnet_lock_core(un);
 	if (un->un_flags & URE_FLAG_8152)
 		ure_rtl8152_init(un);
 	else
 		ure_rtl8153_init(un);
 	if ((un->un_flags & URE_FLAG_VER_4C00) ||
 	    (un->un_flags & URE_FLAG_VER_4C10))
 		ure_read_mem(un, URE_PLA_IDR, URE_MCU_TYPE_PLA, eaddr,
 		    sizeof(eaddr));
 	else
 		ure_read_mem(un, URE_PLA_BACKUP, URE_MCU_TYPE_PLA, eaddr,
 		    sizeof(eaddr));
 	usbnet_unlock_core(un);
 	if (ETHER_IS_ZERO(eaddr)) {
 		maclo = 0x00f2 | (cprng_strong32() & 0xffff0000);
 		machi = cprng_strong32() & 0xffff;
 		eaddr[0] = maclo & 0xff;
 		eaddr[1] = (maclo >> 8) & 0xff;
 		eaddr[2] = (maclo >> 16) & 0xff;
 		eaddr[3] = (maclo >> 24) & 0xff;
 		eaddr[4] = machi & 0xff;
 		eaddr[5] = (machi >> 8) & 0xff;
+	}
 	memcpy(un->un_eaddr, eaddr, sizeof(un->un_eaddr));
 	struct ifnet *ifp = usbnet_ifp(un);
 	/*
 	 * We don't support TSOv4 and v6 for now, that are required to
 	 * be handled in software for some cases.
 	 */
 	ifp->if_capabilities = IFCAP_CSUM_IPv4_Tx |
 	    IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_UDPv4_Tx;
 #ifdef INET6
 	ifp->if_capabilities |= IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_UDPv6_Tx;
 #endif
 	if (un->un_flags & ~URE_FLAG_VER_4C00) {
 		ifp->if_capabilities |= IFCAP_CSUM_IPv4_Rx |
 		    IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
 		    IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx;
+	}
 	struct ethercom *ec = usbnet_ec(un);
 	ec->ec_capabilities = ETHERCAP_VLAN_MTU;
 #ifdef notyet
 	ec->ec_capabilities |= ETHERCAP_JUMBO_MTU;
 #endif
 	unm.un_mii_phyloc = un->un_phyno;
 	usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
 , &unm);
+}
 static void
 ure_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
+{
 	struct ifnet *ifp = usbnet_ifp(un);
 	uint8_t *buf = c->unc_buf;
 	uint16_t pkt_len = 0;
 	uint16_t pkt_count = 0;
 	struct ure_rxpkt rxhdr;
 	do {
 		if (total_len < sizeof(rxhdr)) {
 			DPRINTF(("too few bytes left for a packet header\n"));
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		buf += roundup(pkt_len, 8);
 		memcpy(&rxhdr, buf, sizeof(rxhdr));
 		total_len -= sizeof(rxhdr);
 		pkt_len = le32toh(rxhdr.ure_pktlen) & URE_RXPKT_LEN_MASK;
 		DPRINTFN(4, ("next packet is %d bytes\n", pkt_len));
 		if (pkt_len > total_len) {
 			DPRINTF(("not enough bytes left for next packet\n"));
 			if_statinc(ifp, if_ierrors);
 			return;
+		}
 		total_len -= roundup(pkt_len, 8);
 		buf += sizeof(rxhdr);
 		usbnet_enqueue(un, buf, pkt_len - ETHER_CRC_LEN,
 			       ure_rxcsum(ifp, &rxhdr), 0, 0);
 		pkt_count++;
 	} while (total_len > 0);
 	if (pkt_count)
 		rnd_add_uint32(usbnet_rndsrc(un), pkt_count);
+}
 static int
 ure_rxcsum(struct ifnet *ifp, struct ure_rxpkt *rp)
+{
 	int enabled = ifp->if_csum_flags_rx, flags = 0;
 	uint32_t csum, misc;
 	if (enabled == 0)
 		return 0;
 	csum = le32toh(rp->ure_csum);
 	misc = le32toh(rp->ure_misc);
 	if (csum & URE_RXPKT_IPV4_CS) {
 		flags |= M_CSUM_IPv4;
 		if (csum & URE_RXPKT_TCP_CS)
 			flags |= M_CSUM_TCPv4;
 		if (csum & URE_RXPKT_UDP_CS)
 			flags |= M_CSUM_UDPv4;
 	} else if (csum & URE_RXPKT_IPV6_CS) {
 		flags = 0;
 		if (csum & URE_RXPKT_TCP_CS)
 			flags |= M_CSUM_TCPv6;
 		if (csum & URE_RXPKT_UDP_CS)
 			flags |= M_CSUM_UDPv6;
+	}
 	flags &= enabled;
 	if (__predict_false((flags & M_CSUM_IPv4) &&
 	    (misc & URE_RXPKT_IP_F)))
 		flags |= M_CSUM_IPv4_BAD;
 	if (__predict_false(
 	   ((flags & (M_CSUM_TCPv4 | M_CSUM_TCPv6)) && (misc & URE_RXPKT_TCP_F))
 	|| ((flags & (M_CSUM_UDPv4 | M_CSUM_UDPv6)) && (misc & URE_RXPKT_UDP_F))
 	))
 		flags |= M_CSUM_TCP_UDP_BAD;
 	return flags;
+}
 static unsigned
 ure_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
+{
 	struct ure_txpkt txhdr;
 	uint32_t frm_len = 0;
 	uint8_t *buf = c->unc_buf;
 	if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - sizeof(txhdr))
 		return 0;
 	/* header */
 	txhdr.ure_pktlen = htole32(m->m_pkthdr.len | URE_TXPKT_TX_FS |
 	    URE_TXPKT_TX_LS);
 	txhdr.ure_csum = htole32(ure_txcsum(m));
 	memcpy(buf, &txhdr, sizeof(txhdr));
 	buf += sizeof(txhdr);
 	frm_len = sizeof(txhdr);
 	/* packet */
 	m_copydata(m, 0, m->m_pkthdr.len, buf);
 	frm_len += m->m_pkthdr.len;
 	DPRINTFN(2, ("tx %d bytes\n", frm_len));
 	return frm_len;
+}
 /*
  * We need to calculate L4 checksum in software, if the offset of
  * L4 header is larger than 0x7ff = 2047.
  */
 static uint32_t
 ure_txcsum(struct mbuf *m)
+{
 	struct ether_header *eh;
 	int flags = m->m_pkthdr.csum_flags;
 	uint32_t data = m->m_pkthdr.csum_data;
 	uint32_t reg = 0;
 	int l3off, l4off;
 	uint16_t type;
 	if (flags == 0)
 		return 0;
 	if (__predict_true(m->m_len >= (int)sizeof(*eh))) {
 		eh = mtod(m, struct ether_header *);
 		type = eh->ether_type;
 	} else
 		m_copydata(m, offsetof(struct ether_header, ether_type),
 		    sizeof(type), &type);
 	switch (type = htons(type)) {
 	case ETHERTYPE_IP:
 	case ETHERTYPE_IPV6:
 		l3off = ETHER_HDR_LEN;
 		break;
 	case ETHERTYPE_VLAN:
 		l3off = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
 		break;
 	default:
 		return 0;
+	}
 	if (flags & (M_CSUM_TCPv4 | M_CSUM_UDPv4)) {
 		l4off = l3off + M_CSUM_DATA_IPv4_IPHL(data);
 		if (__predict_false(l4off > URE_L4_OFFSET_MAX)) {
 			in_undefer_cksum(m, l3off, flags);
 			return 0;
+		}
 		reg |= URE_TXPKT_IPV4_CS;
 		if (flags & M_CSUM_TCPv4)
 			reg |= URE_TXPKT_TCP_CS;
 		else
 			reg |= URE_TXPKT_UDP_CS;
 		reg |= l4off << URE_L4_OFFSET_SHIFT;
+	}
 #ifdef INET6
 	else if (flags & (M_CSUM_TCPv6 | M_CSUM_UDPv6)) {
 		l4off = l3off + M_CSUM_DATA_IPv6_IPHL(data);
 		if (__predict_false(l4off > URE_L4_OFFSET_MAX)) {
 			in6_undefer_cksum(m, l3off, flags);
 			return 0;
+		}
 		reg |= URE_TXPKT_IPV6_CS;
 		if (flags & M_CSUM_TCPv6)
 			reg |= URE_TXPKT_TCP_CS;
 		else
 			reg |= URE_TXPKT_UDP_CS;
 		reg |= l4off << URE_L4_OFFSET_SHIFT;
+	}
 #endif
 	else if (flags & M_CSUM_IPv4)
 		reg |= URE_TXPKT_IPV4_CS;
 	return reg;
+}
 #ifdef _MODULE
 #include "ioconf.c"
 #endif
 USBNET_MODULE(ure)