Thu Mar 3 06:27:41 2022 UTC ()
mips: Carefully use device_set_private for cpuN.

But don't do it in cpu_attach_common because the callers aren't set
up right -- instead leave a comment about what's wrong, to be dealt
with later.


(riastradh)
diff -r1.5 -r1.6 src/sys/arch/evbmips/evbmips/cpu.c
diff -r1.4 -r1.5 src/sys/arch/evbmips/ingenic/cpu.c
diff -r1.21 -r1.22 src/sys/arch/mips/cavium/octeon_cpunode.c
diff -r1.59 -r1.60 src/sys/arch/mips/mips/cpu_subr.c

cvs diff -r1.5 -r1.6 src/sys/arch/evbmips/evbmips/cpu.c (expand / switch to unified diff)

--- src/sys/arch/evbmips/evbmips/cpu.c 2015/06/26 21:57:25 1.5
+++ src/sys/arch/evbmips/evbmips/cpu.c 2022/03/03 06:27:40 1.6
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.c,v 1.5 2015/06/26 21:57:25 matt Exp $ */ 1/* $NetBSD: cpu.c,v 1.6 2022/03/03 06:27:40 riastradh Exp $ */
2 2
3/* 3/*
4 * Copyright 2002 Wasabi Systems, Inc. 4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Simon Burge for Wasabi Systems, Inc. 7 * Written by Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -26,27 +26,27 @@ @@ -26,27 +26,27 @@
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38#include <sys/cdefs.h> 38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.5 2015/06/26 21:57:25 matt Exp $"); 39__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.6 2022/03/03 06:27:40 riastradh Exp $");
40 40
41#include <sys/param.h> 41#include <sys/param.h>
42#include <sys/device.h> 42#include <sys/device.h>
43#include <sys/systm.h> 43#include <sys/systm.h>
44#include <sys/cpu.h> 44#include <sys/cpu.h>
45 45
46#include <mips/locore.h> 46#include <mips/locore.h>
47 47
48static int cpu_match(device_t, cfdata_t, void *); 48static int cpu_match(device_t, cfdata_t, void *);
49static void cpu_attach(device_t, device_t, void *); 49static void cpu_attach(device_t, device_t, void *);
50 50
51CFATTACH_DECL_NEW(cpu, 0, 51CFATTACH_DECL_NEW(cpu, 0,
52 cpu_match, cpu_attach, NULL, NULL); 52 cpu_match, cpu_attach, NULL, NULL);
@@ -54,24 +54,24 @@ CFATTACH_DECL_NEW(cpu, 0, @@ -54,24 +54,24 @@ CFATTACH_DECL_NEW(cpu, 0,
54static int 54static int
55cpu_match(device_t parent, cfdata_t match, void *aux) 55cpu_match(device_t parent, cfdata_t match, void *aux)
56{ 56{
57 57
58 return 1; 58 return 1;
59} 59}
60 60
61static void 61static void
62cpu_attach(device_t parent, device_t self, void *aux) 62cpu_attach(device_t parent, device_t self, void *aux)
63{ 63{
64 struct cpu_info * const ci = curcpu(); 64 struct cpu_info * const ci = curcpu();
65 65
66 ci->ci_dev = self; 66 ci->ci_dev = self;
67 self->dv_private = ci; 67 device_set_private(self, ci);
68 68
69 aprint_normal(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n", 69 aprint_normal(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n",
70 ci->ci_cpu_freq / 1000000, 70 ci->ci_cpu_freq / 1000000,
71 (ci->ci_cpu_freq % 1000000) / 10000, 71 (ci->ci_cpu_freq % 1000000) / 10000,
72 ci->ci_cycles_per_hz, ci->ci_divisor_delay); 72 ci->ci_cycles_per_hz, ci->ci_divisor_delay);
73 73
74 aprint_normal("%s: ", device_xname(self)); 74 aprint_normal("%s: ", device_xname(self));
75 cpu_identify(self); 75 cpu_identify(self);
76 cpu_attach_common(self, ci); 76 cpu_attach_common(self, ci);
77} 77}

cvs diff -r1.4 -r1.5 src/sys/arch/evbmips/ingenic/cpu.c (expand / switch to unified diff)

--- src/sys/arch/evbmips/ingenic/cpu.c 2017/05/21 06:49:12 1.4
+++ src/sys/arch/evbmips/ingenic/cpu.c 2022/03/03 06:27:40 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.c,v 1.4 2017/05/21 06:49:12 skrll Exp $ */ 1/* $NetBSD: cpu.c,v 1.5 2022/03/03 06:27:40 riastradh Exp $ */
2 2
3/* 3/*
4 * Copyright 2002 Wasabi Systems, Inc. 4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Simon Burge for Wasabi Systems, Inc. 7 * Written by Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -26,27 +26,27 @@ @@ -26,27 +26,27 @@
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38#include <sys/cdefs.h> 38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.4 2017/05/21 06:49:12 skrll Exp $"); 39__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.5 2022/03/03 06:27:40 riastradh Exp $");
40 40
41#include "opt_ingenic.h" 41#include "opt_ingenic.h"
42#include "opt_multiprocessor.h" 42#include "opt_multiprocessor.h"
43 43
44#include <sys/param.h> 44#include <sys/param.h>
45#include <sys/device.h> 45#include <sys/device.h>
46#include <sys/systm.h> 46#include <sys/systm.h>
47#include <sys/cpu.h> 47#include <sys/cpu.h>
48 48
49#include <mips/locore.h> 49#include <mips/locore.h>
50#include <mips/ingenic/ingenic_coreregs.h> 50#include <mips/ingenic/ingenic_coreregs.h>
51#include <mips/ingenic/ingenic_regs.h> 51#include <mips/ingenic/ingenic_regs.h>
52#include <mips/ingenic/ingenic_var.h> 52#include <mips/ingenic/ingenic_var.h>
@@ -103,24 +103,24 @@ cpu_attach(device_t parent, device_t sel @@ -103,24 +103,24 @@ cpu_attach(device_t parent, device_t sel
103 if (!kcpuset_isset(cpus_hatched, cpu_index(startup_cpu_info))) { 103 if (!kcpuset_isset(cpus_hatched, cpu_index(startup_cpu_info))) {
104 aprint_error_dev(self, "did not hatch\n"); 104 aprint_error_dev(self, "did not hatch\n");
105 return; 105 return;
106 } 106 }
107#else 107#else
108 aprint_normal_dev(self, 108 aprint_normal_dev(self,
109 "processor off-line; " 109 "processor off-line; "
110 "multiprocessor support not present in kernel\n"); 110 "multiprocessor support not present in kernel\n");
111 return; 111 return;
112#endif 112#endif
113 113
114 } 114 }
115 ci->ci_dev = self; 115 ci->ci_dev = self;
116 self->dv_private = ci; 116 device_set_private(self, ci);
117 117
118 aprint_normal(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n", 118 aprint_normal(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n",
119 ci->ci_cpu_freq / 1000000, 119 ci->ci_cpu_freq / 1000000,
120 (ci->ci_cpu_freq % 1000000) / 10000, 120 (ci->ci_cpu_freq % 1000000) / 10000,
121 ci->ci_cycles_per_hz, ci->ci_divisor_delay); 121 ci->ci_cycles_per_hz, ci->ci_divisor_delay);
122 122
123 aprint_normal_dev(self, ""); 123 aprint_normal_dev(self, "");
124 cpu_identify(self); 124 cpu_identify(self);
125 cpu_attach_common(self, ci); 125 cpu_attach_common(self, ci);
126} 126}

cvs diff -r1.21 -r1.22 src/sys/arch/mips/cavium/octeon_cpunode.c (expand / switch to unified diff)

--- src/sys/arch/mips/cavium/octeon_cpunode.c 2021/08/07 16:18:59 1.21
+++ src/sys/arch/mips/cavium/octeon_cpunode.c 2022/03/03 06:27:41 1.22
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: octeon_cpunode.c,v 1.21 2021/08/07 16:18:59 thorpej Exp $ */ 1/* $NetBSD: octeon_cpunode.c,v 1.22 2022/03/03 06:27:41 riastradh Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 4 * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry. 8 * by Matt Thomas of 3am Software Foundry.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31#define __INTR_PRIVATE 31#define __INTR_PRIVATE
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33 33
34__KERNEL_RCSID(0, "$NetBSD: octeon_cpunode.c,v 1.21 2021/08/07 16:18:59 thorpej Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: octeon_cpunode.c,v 1.22 2022/03/03 06:27:41 riastradh Exp $");
35 35
36#include "locators.h" 36#include "locators.h"
37#include "cpunode.h" 37#include "cpunode.h"
38#include "opt_multiprocessor.h" 38#include "opt_multiprocessor.h"
39#include "opt_ddb.h" 39#include "opt_ddb.h"
40 40
41#include <sys/param.h> 41#include <sys/param.h>
42#include <sys/atomic.h> 42#include <sys/atomic.h>
43#include <sys/cpu.h> 43#include <sys/cpu.h>
44#include <sys/device.h> 44#include <sys/device.h>
45#include <sys/lwp.h> 45#include <sys/lwp.h>
46#include <sys/reboot.h> 46#include <sys/reboot.h>
47#include <sys/wdog.h> 47#include <sys/wdog.h>
@@ -242,27 +242,27 @@ octeon_cpu_run(struct cpu_info *ci) @@ -242,27 +242,27 @@ octeon_cpu_run(struct cpu_info *ci)
242 KASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE); 242 KASSERT(mips_cp0_status_read() & MIPS_SR_INT_IE);
243 243
244 aprint_normal("%s: ", device_xname(ci->ci_dev)); 244 aprint_normal("%s: ", device_xname(ci->ci_dev));
245 cpu_identify(ci->ci_dev); 245 cpu_identify(ci->ci_dev);
246} 246}
247#endif /* MULTIPROCESSOR */ 247#endif /* MULTIPROCESSOR */
248 248
249static void 249static void
250cpu_cpunode_attach_common(device_t self, struct cpu_info *ci) 250cpu_cpunode_attach_common(device_t self, struct cpu_info *ci)
251{ 251{
252 struct cpu_softc * const cpu __diagused = ci->ci_softc; 252 struct cpu_softc * const cpu __diagused = ci->ci_softc;
253 253
254 ci->ci_dev = self; 254 ci->ci_dev = self;
255 self->dv_private = ci; 255 device_set_private(self, ci);
256 256
257 KASSERTMSG(cpu != NULL, "ci %p index %d", ci, cpu_index(ci)); 257 KASSERTMSG(cpu != NULL, "ci %p index %d", ci, cpu_index(ci));
258 258
259#if NWDOG > 0 || defined(DDB) 259#if NWDOG > 0 || defined(DDB)
260 /* XXXXXX __mips_n32 and MIPS_PHYS_TO_XKPHYS_CACHED needed here?????? */ 260 /* XXXXXX __mips_n32 and MIPS_PHYS_TO_XKPHYS_CACHED needed here?????? */
261 void **nmi_vector = (void *)MIPS_PHYS_TO_KSEG0(0x800 + 32*ci->ci_cpuid); 261 void **nmi_vector = (void *)MIPS_PHYS_TO_KSEG0(0x800 + 32*ci->ci_cpuid);
262 *nmi_vector = octeon_reset_vector; 262 *nmi_vector = octeon_reset_vector;
263 263
264 struct vm_page * const pg = PMAP_ALLOC_POOLPAGE(UVM_PGA_ZERO); 264 struct vm_page * const pg = PMAP_ALLOC_POOLPAGE(UVM_PGA_ZERO);
265 KASSERT(pg != NULL); 265 KASSERT(pg != NULL);
266 const vaddr_t kva = PMAP_MAP_POOLPAGE(VM_PAGE_TO_PHYS(pg)); 266 const vaddr_t kva = PMAP_MAP_POOLPAGE(VM_PAGE_TO_PHYS(pg));
267 KASSERT(kva != 0); 267 KASSERT(kva != 0);
268 ci->ci_nmi_stack = (void *)(kva + PAGE_SIZE - sizeof(struct kernframe)); 268 ci->ci_nmi_stack = (void *)(kva + PAGE_SIZE - sizeof(struct kernframe));

cvs diff -r1.59 -r1.60 src/sys/arch/mips/mips/cpu_subr.c (expand / switch to unified diff)

--- src/sys/arch/mips/mips/cpu_subr.c 2021/11/16 06:11:52 1.59
+++ src/sys/arch/mips/mips/cpu_subr.c 2022/03/03 06:27:41 1.60
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu_subr.c,v 1.59 2021/11/16 06:11:52 simonb Exp $ */ 1/* $NetBSD: cpu_subr.c,v 1.60 2022/03/03 06:27:41 riastradh Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2010, 2019 The NetBSD Foundation, Inc. 4 * Copyright (c) 2010, 2019 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry. 8 * by Matt Thomas of 3am Software Foundry.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.59 2021/11/16 06:11:52 simonb Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.60 2022/03/03 06:27:41 riastradh Exp $");
34 34
35#include "opt_cputype.h" 35#include "opt_cputype.h"
36#include "opt_ddb.h" 36#include "opt_ddb.h"
37#include "opt_modular.h" 37#include "opt_modular.h"
38#include "opt_multiprocessor.h" 38#include "opt_multiprocessor.h"
39 39
40#include <sys/param.h> 40#include <sys/param.h>
41#include <sys/atomic.h> 41#include <sys/atomic.h>
42#include <sys/bitops.h> 42#include <sys/bitops.h>
43#include <sys/cpu.h> 43#include <sys/cpu.h>
44#include <sys/device.h> 44#include <sys/device.h>
45#include <sys/idle.h> 45#include <sys/idle.h>
46#include <sys/intr.h> 46#include <sys/intr.h>
@@ -226,26 +226,31 @@ cpu_hwrena_setup(void) @@ -226,26 +226,31 @@ cpu_hwrena_setup(void)
226 mipsNN_cp0_userlocal_write(curlwp->l_private); 226 mipsNN_cp0_userlocal_write(curlwp->l_private);
227 } 227 }
228 } 228 }
229#endif 229#endif
230} 230}
231 231
232void 232void
233cpu_attach_common(device_t self, struct cpu_info *ci) 233cpu_attach_common(device_t self, struct cpu_info *ci)
234{ 234{
235 const char * const xname = device_xname(self); 235 const char * const xname = device_xname(self);
236 236
237 /* 237 /*
238 * Cross link cpu_info and its device together 238 * Cross link cpu_info and its device together
 239 *
 240 * XXX autoconf abuse: Can't use device_set_private here
 241 * because some callers already do so -- and some callers
 242 * (sbmips cpu_attach) already have a softc allocated by
 243 * autoconf.
239 */ 244 */
240 ci->ci_dev = self; 245 ci->ci_dev = self;
241 self->dv_private = ci; 246 self->dv_private = ci;
242 KASSERT(ci->ci_idepth == 0); 247 KASSERT(ci->ci_idepth == 0);
243 248
244 evcnt_attach_dynamic(&ci->ci_ev_count_compare, 249 evcnt_attach_dynamic(&ci->ci_ev_count_compare,
245 EVCNT_TYPE_INTR, NULL, xname, 250 EVCNT_TYPE_INTR, NULL, xname,
246 "int 5 (clock)"); 251 "int 5 (clock)");
247 evcnt_attach_dynamic(&ci->ci_ev_count_compare_missed, 252 evcnt_attach_dynamic(&ci->ci_ev_count_compare_missed,
248 EVCNT_TYPE_INTR, NULL, xname, 253 EVCNT_TYPE_INTR, NULL, xname,
249 "int 5 (clock) missed"); 254 "int 5 (clock) missed");
250 evcnt_attach_dynamic(&ci->ci_ev_fpu_loads, 255 evcnt_attach_dynamic(&ci->ci_ev_fpu_loads,
251 EVCNT_TYPE_MISC, NULL, xname, 256 EVCNT_TYPE_MISC, NULL, xname,