 @@ -1,14 +1,14 @@
-/*	$NetBSD: pmap.c,v 1.119 2022/05/03 20:52:31 andvar Exp $	*/
+/*	$NetBSD: pmap.c,v 1.120 2022/05/04 07:48:34 andvar Exp $	*/
 /*-
  * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jeremy Cooper.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -95,27 +95,27 @@
  * affected by the change.  These instances are documented in the code at
  * various points.
  */
 /*** A Note About the Note About the 68851 Address Translation Cache
  * 4 months into this code I discovered that the sun3x does not have
  * a MC68851 chip. Instead, it has a version of this MMU that is part of the
  * the 68030 CPU.
  * All though it behaves very similarly to the 68851, it only has 1 task
  * alias and a 22 entry cache.  So sadly (or happily), the first paragraph
  * of the previous note does not apply to the sun3x pmap.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.119 2022/05/03 20:52:31 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.120 2022/05/04 07:48:34 andvar Exp $");
 #include "opt_ddb.h"
 #include "opt_pmap_debug.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/proc.h>
 #include <sys/malloc.h>
 #include <sys/pool.h>
 #include <sys/queue.h>
 #include <sys/kcore.h>
 #include <sys/atomic.h>
 @@ -212,27 +212,27 @@ int pmap_debug = 0;
  * tmgrCbase -> +-------------------------------------------------------+
  *              |  TMGR C level table structures                        |
  * pvbase    -> +-------------------------------------------------------+
  *              |  Physical to Virtual mapping table (list heads)       |
  * pvebase   -> +-------------------------------------------------------+
  *              |  Physical to Virtual mapping table (list elements)    |
  *              |                                                       |
  *              +-------------------------------------------------------+
  *      towards higher memory
+ *
  * For every A table in the MMU A area, there will be a corresponding
  * a_tmgr structure in the TMGR A area.  The same will be true for
  * the B and C tables.  This arrangement will make it easy to find the
- * controling tmgr structure for any table in the system by use of
+ * controlling tmgr structure for any table in the system by use of
  * (relatively) simple macros.
  */
 /*
  * Global variables for storing the base addresses for the areas
  * labeled above.
  */
 static vaddr_t  	kernAphys;
 static mmu_long_dte_t	*kernAbase;
 static mmu_short_dte_t	*kernBbase;
 static mmu_short_pte_t	*kernCbase;
 static mmu_short_pte_t	*mmuCbase;
 static mmu_short_dte_t	*mmuBbase;
 @@ -283,27 +283,27 @@ vaddr_t virtual_contig_end;
 paddr_t avail_next;
 /* These are used by pmap_copy_page(), etc. */
 vaddr_t tmp_vpages[2];
 /* memory pool for pmap structures */
 struct pool	pmap_pmap_pool;
 /*
  * The 3/80 is the only member of the sun3x family that has non-contiguous
  * physical memory.  Memory is divided into 4 banks which are physically
  * locatable on the system board.  Although the size of these banks varies
  * with the size of memory they contain, their base addresses are
- * permenently fixed.  The following structure, which describes these
+ * permanently fixed.  The following structure, which describes these
  * banks, is initialized by pmap_bootstrap() after it reads from a similar
  * structure provided by the ROM Monitor.
+ *
  * For the other machines in the sun3x architecture which do have contiguous
  * RAM, this list will have only one entry, which will describe the entire
  * range of available memory.
  */
 struct pmap_physmem_struct avail_mem[SUN3X_NPHYS_RAM_SEGS];
 u_int total_phys_mem;
 /*************************************************************************/
 /*
 @@ -1208,27 +1208,27 @@ pmap_init_pv(void)
 		pvbase[i].pv_flags = 0;		/* Zero out page flags  */
+	}
+}
 /* is_managed				INTERNAL
  **
  * Determine if the given physical address is managed by the PV system.
  * Note that this logic assumes that no one will ask for the status of
  * addresses which lie in-between the memory banks on the 3/80.  If they
  * do so, it will falsely report that it is managed.
+ *
  * Note: A "managed" address is one that was reported to the VM system as
  * a "usable page" during system startup.  As such, the VM system expects the
- * pmap module to keep an accurate track of the useage of those pages.
+ * pmap module to keep an accurate track of the usage of those pages.
  * Any page not given to the VM system at startup does not exist (as far as
  * the VM system is concerned) and is therefore "unmanaged."  Examples are
  * those pages which belong to the ROM monitor and the memory allocated before
  * the VM system was started.
  */
 static INLINE bool
 is_managed(paddr_t pa)
+{
 	if (pa >= avail_start && pa < avail_end)
 		return true;
 	else
 		return false;
+}
 @@ -1694,27 +1694,27 @@ pmap_enter(pmap_t pmap, vaddr_t va, padd
 	 * system, parts of the architecture-dependent section of the sun3x
 	 * kernel pass their own flags in the lower, unused bits of the
 	 * physical address supplied to this function.  These flags are
 	 * extracted and stored in the temporary variable 'mapflags'.
+	 *
 	 * Extract sun3x specific flags from the physical address.
 	 */
 	mapflags = (pa & ~MMU_PAGE_MASK);
 	pa &= MMU_PAGE_MASK;
 	/*
 	 * Determine if the physical address being mapped is on-board RAM.
 	 * Any other area of the address space is likely to belong to a
-	 * device and hence it would be disasterous to cache its contents.
+	 * device and hence it would be disastrous to cache its contents.
 	 */
 	if ((managed = is_managed(pa)) == false)
 		mapflags |= PMAP_NC;
 	/*
 	 * For user mappings we walk along the MMU tables of the given
 	 * pmap, reaching a PTE which describes the virtual page being
 	 * mapped or changed.  If any level of the walk ends in an invalid
 	 * entry, a table must be allocated and the entry must be updated
 	 * to point to it.
 	 * There is a bit of confusion as to whether this code must be
 	 * re-entrant.  For now we will assume it is.  To support
 	 * re-entrancy we must unlink tables from the table pool before
 @@ -2054,27 +2054,27 @@ pmap_enter(pmap_t pmap, vaddr_t va, padd
+}
 /* pmap_enter_kernel			INTERNAL
  **
  * Map the given virtual address to the given physical address within the
  * kernel address space.  This function exists because the kernel map does
  * not do dynamic table allocation.  It consists of a contiguous array of ptes
  * and can be edited directly without the need to walk through any tables.
+ *
  * XXX: "Danger, Will Robinson!"
  * Note that the kernel should never take a fault on any page
  * between [ KERNBASE .. virtual_avail ] and this is checked in
  * trap.c for kernel-mode MMU faults.  This means that mappings
- * created in that range must be implicily wired. -gwr
+ * created in that range must be implicitly wired. -gwr
  */
 void
 pmap_enter_kernel(vaddr_t va, paddr_t pa, vm_prot_t prot)
+{
 	bool       was_valid, insert;
 	u_short         pte_idx;
 	int             flags;
 	mmu_short_pte_t *pte;
 	pv_t            *pv;
 	paddr_t     old_pa;
 	flags = (pa & ~MMU_PAGE_MASK);
 	pa &= MMU_PAGE_MASK;
 @@ -3016,27 +3016,27 @@ pmap_remove(pmap_t pmap, vaddr_t sva, va
 		if (kernel_crp.rp_addr == pmap->pm_a_phys) {
 			kernel_crp.rp_addr = kernAphys;
 			loadcrp(&kernel_crp);
 			/* will do TLB flush below */
+		}
 		pmap->pm_a_tmgr = NULL;
 		pmap->pm_a_phys = kernAphys;
+	}
 	/*
 	 * If we just modified the current address space,
 	 * make sure to flush the MMU cache.
+	 *
-	 * XXX - this could be an unecessarily large flush.
+	 * XXX - this could be an unnecessarily large flush.
 	 * XXX - Could decide, based on the size of the VA range
 	 * to be removed, whether to flush "by pages" or "all".
 	 */
 	if (pmap == current_pmap())
 		TBIAU();
+}
 /* pmap_remove_a			INTERNAL
  **
  * This is function number one in a set of three that removes a range
  * of memory in the most efficient manner by removing the highest possible
  * tables from the memory space.  This particular function attempts to remove
  * as many B tables as it can, delegating the remaining fragmented ranges to
 @@ -3050,44 +3050,44 @@ pmap_remove(pmap_t pmap, vaddr_t sva, va
 bool
 pmap_remove_a(a_tmgr_t *a_tbl, vaddr_t sva, vaddr_t eva)
+{
 	bool empty;
 	int idx;
 	vaddr_t nstart, nend;
 	b_tmgr_t *b_tbl;
 	mmu_long_dte_t  *a_dte;
 	mmu_short_dte_t *b_dte;
 	uint8_t at_wired, bt_wired;
 	/*
 	 * The following code works with what I call a 'granularity
-	 * reduction algorithim'.  A range of addresses will always have
+	 * reduction algorithm'.  A range of addresses will always have
 	 * the following properties, which are classified according to
 	 * how the range relates to the size of the current granularity
 	 * - an A table entry:
+	 *
 	 *            1 2       3 4
 	 * -+---+---+---+---+---+---+---+-
 	 * -+---+---+---+---+---+---+---+-
+	 *
 	 * A range will always start on a granularity boundary, illustrated
 	 * by '+' signs in the table above, or it will start at some point
-	 * inbetween a granularity boundary, as illustrated by point 1.
+	 * in-between a granularity boundary, as illustrated by point 1.
 	 * The first step in removing a range of addresses is to remove the
 	 * range between 1 and 2, the nearest granularity boundary.  This
 	 * job is handled by the section of code governed by the
 	 * 'if (start < nstart)' statement.
+	 *
-	 * A range will always encompass zero or more intergral granules,
+	 * A range will always encompass zero or more integral granules,
 	 * illustrated by points 2 and 3.  Integral granules are easy to
 	 * remove.  The removal of these granules is the second step, and
 	 * is handled by the code block 'if (nstart < nend)'.
+	 *
 	 * Lastly, a range will always end on a granularity boundary,
 	 * ill. by point 3, or it will fall just beyond one, ill. by point
 	 * 4.  The last step involves removing this range and is handled by
 	 * the code block 'if (nend < end)'.
 	 */
 	nstart = MMU_ROUND_UP_A(sva);
 	nend = MMU_ROUND_A(eva);
 	at_wired = a_tbl->at_wcnt;
 @@ -3582,27 +3582,27 @@ pmap_kcore_hdr(struct sun3x_kcore_hdr *s
 		spa = avail_mem[i].pmem_start;
 		spa = m68k_trunc_page(spa);
 		len = avail_mem[i].pmem_end - spa;
 		len = m68k_round_page(len);
 		sh->ram_segs[i].start = spa;
 		sh->ram_segs[i].size  = len;
+	}
+}
 /* pmap_virtual_space			INTERFACE
  **
  * Return the current available range of virtual addresses in the
- * arguuments provided.  Only really called once.
+ * arguments provided.  Only really called once.
  */
 void
 pmap_virtual_space(vaddr_t *vstart, vaddr_t *vend)
+{
 	*vstart = virtual_avail;
 	*vend = virtual_end;
+}
 /*
  * Provide memory to the VM system.
+ *
  * Assume avail_start is always in the
 @@ -3639,27 +3639,27 @@ pmap_page_upload(void)
  * map statistics.
  */
 segsz_t
 pmap_count(pmap_t pmap, int type)
+{
 	u_int     count;
 	int       a_idx, b_idx;
 	a_tmgr_t *a_tbl;
 	b_tmgr_t *b_tbl;
 	c_tmgr_t *c_tbl;
 	/*
 	 * If the pmap does not have its own A table manager, it has no
-	 * valid entires.
+	 * valid entries.
 	 */
 	if (pmap->pm_a_tmgr == NULL)
 		return 0;
 	a_tbl = pmap->pm_a_tmgr;
 	count = 0;
 	for (a_idx = 0; a_idx < MMU_TIA(KERNBASE3X); a_idx++) {
 	    if (MMU_VALID_DT(a_tbl->at_dtbl[a_idx])) {
 	        b_tbl = mmuB2tmgr(mmu_ptov(a_tbl->at_dtbl[a_idx].addr.raw));
 	        for (b_idx = 0; b_idx < MMU_B_TBL_SIZE; b_idx++) {
 	            if (MMU_VALID_DT(b_tbl->bt_dtbl[b_idx])) {
 	                c_tbl = mmuC2tmgr(

 @@ -1,14 +1,14 @@
-/*	$NetBSD: mha.c,v 1.56 2021/08/07 16:19:07 thorpej Exp $	*/
+/*	$NetBSD: mha.c,v 1.57 2022/05/04 07:48:34 andvar Exp $	*/
 /*-
  * Copyright (c) 1996-1999 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Charles M. Hannum, Masaru Oki, Takumi Nakamura, Masanobu Saitoh and
  * Minoura Makoto.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -49,27 +49,27 @@
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mha.c,v 1.56 2021/08/07 16:19:07 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mha.c,v 1.57 2022/05/04 07:48:34 andvar Exp $");
 #include "opt_ddb.h"
 /* Synchronous data transfers? */
 #define SPC_USE_SYNCHRONOUS	0
 #define SPC_SYNC_REQ_ACK_OFS 	8
 /* Default DMA mode? */
 #define MHA_DMA_LIMIT_XFER	1
 #define MHA_DMA_BURST_XFER	1
 #define MHA_DMA_SHORT_BUS_CYCLE	1
 #define MHA_DMA_DATAIN	(0 | (MHA_DMA_LIMIT_XFER << 1)		\
 @@ -802,27 +802,27 @@ mha_poll(struct mha_softc *sc, struct ac
  */
 /*
  * Set synchronous transfer offset and period.
  */
 inline void
 mha_setsync(struct mha_softc *sc, struct spc_tinfo *ti)
+{
+}
 /*
  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
  * handler so that we may call it from mha_scsi_cmd and mha_done.  This may
- * save us an unecessary interrupt just to get things going.  Should only be
+ * save us an unnecessary interrupt just to get things going.  Should only be
  * called when state == SPC_IDLE and at bio pl.
  */
 void
 mha_sched(struct mha_softc *sc)
+{
 	struct scsipi_periph *periph;
 	struct acb *acb;
 	int t;
 	SPC_TRACE(("[mha_sched] "));
 	if (sc->sc_state != SPC_IDLE)
 		panic("mha_sched: not IDLE (state=%d)", sc->sc_state);

 @@ -1,14 +1,14 @@
-/*	$NetBSD: iopsp.c,v 1.40 2021/08/07 16:19:11 thorpej Exp $	*/
+/*	$NetBSD: iopsp.c,v 1.41 2022/05/04 07:48:34 andvar Exp $	*/
 /*-
  * Copyright (c) 2000, 2001, 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Andrew Doran.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -25,27 +25,27 @@
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Raw SCSI device support for I2O.  IOPs present SCSI devices individually;
  * we group them by controlling port.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iopsp.c,v 1.40 2021/08/07 16:19:11 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: iopsp.c,v 1.41 2022/05/04 07:48:34 andvar Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/device.h>
 #include <sys/queue.h>
 #include <sys/proc.h>
 #include <sys/buf.h>
 #include <sys/endian.h>
 #include <sys/malloc.h>
 #include <sys/scsiio.h>
 #include <sys/bswap.h>
 @@ -136,27 +136,27 @@ iopsp_attach(device_t parent, device_t s
 	sc->sc_ii.ii_tid = ia->ia_tid;
 	sc->sc_ii.ii_reconfig = iopsp_reconfig;
 	sc->sc_ii.ii_adjqparam = iopsp_adjqparam;
 	iop_initiator_register(iop, &sc->sc_ii);
 	rv = iop_field_get_all(iop, ia->ia_tid, I2O_PARAM_HBA_CTLR_INFO,
 	    &param, sizeof(param), NULL);
 	if (rv != 0)
 		goto bad;
 	fc = (param.p.ci.bustype == I2O_HBA_BUS_FCA);
 	/*
-	 * Say what the device is.  If we can find out what the controling
+	 * Say what the device is.  If we can find out what the controlling
 	 * device is, say what that is too.
 	 */
 	aprint_normal(": SCSI port");
 	iop_print_ident(iop, ia->ia_tid);
 	aprint_normal("\n");
 	rv = iop_field_get_all(iop, ia->ia_tid, I2O_PARAM_HBA_SCSI_CTLR_INFO,
 	    &param, sizeof(param), NULL);
 	if (rv != 0)
 		goto bad;
 	aprint_normal_dev(sc->sc_dev, "");
 	if (fc)

 @@ -1,14 +1,14 @@
-/*	$NetBSD: stp4020.c,v 1.71 2021/08/07 16:19:15 thorpej Exp $ */
+/*	$NetBSD: stp4020.c,v 1.72 2022/05/04 07:48:35 andvar Exp $ */
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Paul Kranenburg.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -24,27 +24,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * STP4020: SBus/PCMCIA bridge supporting two Type-3 PCMCIA cards.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: stp4020.c,v 1.71 2021/08/07 16:19:15 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: stp4020.c,v 1.72 2022/05/04 07:48:35 andvar Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/errno.h>
 #include <sys/malloc.h>
 #include <sys/extent.h>
 #include <sys/proc.h>
 #include <sys/kernel.h>
 #include <sys/kthread.h>
 #include <sys/device.h>
 #include <sys/intr.h>
 #include <dev/pcmcia/pcmciareg.h>
 @@ -972,34 +972,34 @@ stp4020_chip_socket_settype(pcmcia_chips
 	 */
 	v = stp4020_rd_sockctl(h, STP4020_ICR0_IDX);
 	v &= ~(STP4020_ICR0_IOIE | STP4020_ICR0_IOILVL | STP4020_ICR0_IFTYPE |
 	    STP4020_ICR0_SPKREN);
 	if (type == PCMCIA_IFTYPE_IO) {
 		v |= STP4020_ICR0_IFTYPE_IO|STP4020_ICR0_IOIE
 		    |STP4020_ICR0_SPKREN;
 		v |= h->sbus_intno ? STP4020_ICR0_IOILVL_SB1
 				   : STP4020_ICR0_IOILVL_SB0;
 #ifndef SUN4U
 		h->int_enable = v;
 		h->int_disable = v & ~STP4020_ICR0_IOIE;
 #endif
-		DPRINTF(("%s: configuring card for IO useage\n", device_xname(h->sc->sc_dev)));
+		DPRINTF(("%s: configuring card for IO usage\n", device_xname(h->sc->sc_dev)));
 	} else {
 		v |= STP4020_ICR0_IFTYPE_MEM;
 #ifndef SUN4U
 		h->int_enable = h->int_disable = v;
 #endif
-		DPRINTF(("%s: configuring card for IO useage\n", device_xname(h->sc->sc_dev)));
+		DPRINTF(("%s: configuring card for IO usage\n", device_xname(h->sc->sc_dev)));
-		DPRINTF(("%s: configuring card for MEM ONLY useage\n", device_xname(h->sc->sc_dev)));
+		DPRINTF(("%s: configuring card for MEM ONLY usage\n", device_xname(h->sc->sc_dev)));
+	}
 	stp4020_wr_sockctl(h, STP4020_ICR0_IDX, v);
+}
 void
 stp4020_chip_socket_disable(pcmcia_chipset_handle_t pch)
+{
 	struct stp4020_socket *h = (struct stp4020_socket *)pch;
 	int v;
 	/*
 	 * Disable socket I/O interrupts.
 	 */

 @@ -1,14 +1,14 @@
-/*	$NetBSD: ppp_tty.c,v 1.69 2021/12/13 02:53:43 msaitoh Exp $	*/
+/*	$NetBSD: ppp_tty.c,v 1.70 2022/05/04 07:48:35 andvar Exp $	*/
 /*	Id: ppp_tty.c,v 1.3 1996/07/01 01:04:11 paulus Exp 	*/
 /*
  * ppp_tty.c - Point-to-Point Protocol (PPP) driver for asynchronous
  * 	       tty devices.
+ *
  * Copyright (c) 1984-2000 Carnegie Mellon University. All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
+ *
  * 1. Redistributions of source code must retain the above copyright
 @@ -83,27 +83,27 @@
  * caused system crashes and packet corruption.  Changed pppstart
  * so that it doesn't just give up with a "collision" if the whole
  * packet doesn't fit in the output ring buffer.
+ *
  * Added priority queueing for interactive IP packets, following
  * the model of if_sl.c, plus hooks for bpf.
  * Paul Mackerras (paulus@cs.anu.edu.au).
  */
 /* from if_sl.c,v 1.11 84/10/04 12:54:47 rick Exp */
 /* from NetBSD: if_ppp.c,v 1.15.2.2 1994/07/28 05:17:58 cgd Exp */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ppp_tty.c,v 1.69 2021/12/13 02:53:43 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ppp_tty.c,v 1.70 2022/05/04 07:48:35 andvar Exp $");
 #ifdef _KERNEL_OPT
 #include "ppp.h"
 #include "opt_ppp.h"
 #endif
 #define VJC
 #define PPP_COMPRESS
 #include <sys/param.h>
 #include <sys/proc.h>
 #include <sys/mbuf.h>
 #include <sys/dkstat.h>
 #include <sys/socket.h>
 @@ -303,27 +303,27 @@ pppasyncrelinq(struct ppp_softc *sc)
 /*
  * Line specific (tty) read routine.
  */
 static int
 pppread(struct tty *tp, struct uio *uio, int flag)
+{
     struct ppp_softc *sc = (struct ppp_softc *)tp->t_sc;
     struct mbuf *m, *m0;
     int error = 0;
     if (sc == NULL)
 	return 0;
     /*
-     * Loop waiting for input, checking that nothing disasterous
+     * Loop waiting for input, checking that nothing disastrous
      * happens in the meantime.
      */
     mutex_spin_enter(&tty_lock);
     for (;;) {
 	if (tp != (struct tty *) sc->sc_devp ||
 	    tp->t_linesw != &ppp_disc) {
 	    mutex_spin_exit(&tty_lock);
 	    return 0;
+	}
 	if (sc->sc_inq.ifq_head != NULL)
 	    break;
 	if ((tp->t_state & TS_CARR_ON) == 0 && (tp->t_cflag & CLOCAL) == 0
 	    && (tp->t_state & TS_ISOPEN)) {