Sun Aug 7 09:37:47 2022 UTC ()
fix typos in comments.


(andvar)
diff -r1.83 -r1.84 src/sys/arch/powerpc/oea/oea_machdep.c
diff -r1.98 -r1.99 src/sys/dev/pci/ixgbe/ix_txrx.c

cvs diff -r1.83 -r1.84 src/sys/arch/powerpc/oea/oea_machdep.c (expand / switch to unified diff)

--- src/sys/arch/powerpc/oea/oea_machdep.c 2021/12/05 07:53:57 1.83
+++ src/sys/arch/powerpc/oea/oea_machdep.c 2022/08/07 09:37:46 1.84
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: oea_machdep.c,v 1.83 2021/12/05 07:53:57 msaitoh Exp $ */ 1/* $NetBSD: oea_machdep.c,v 1.84 2022/08/07 09:37:46 andvar Exp $ */
2 2
3/* 3/*
4 * Copyright (C) 2002 Matt Thomas 4 * Copyright (C) 2002 Matt Thomas
5 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * Copyright (C) 1995, 1996 TooLs GmbH.
7 * All rights reserved. 7 * All rights reserved.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -23,27 +23,27 @@ @@ -23,27 +23,27 @@
23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.83 2021/12/05 07:53:57 msaitoh Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.84 2022/08/07 09:37:46 andvar Exp $");
37 37
38#ifdef _KERNEL_OPT 38#ifdef _KERNEL_OPT
39#include "opt_altivec.h" 39#include "opt_altivec.h"
40#include "opt_ddb.h" 40#include "opt_ddb.h"
41#include "opt_kgdb.h" 41#include "opt_kgdb.h"
42#include "opt_multiprocessor.h" 42#include "opt_multiprocessor.h"
43#include "opt_ppcarch.h" 43#include "opt_ppcarch.h"
44#endif 44#endif
45 45
46#include <sys/param.h> 46#include <sys/param.h>
47#include <sys/buf.h> 47#include <sys/buf.h>
48#include <sys/boot_flag.h> 48#include <sys/boot_flag.h>
49#include <sys/exec.h> 49#include <sys/exec.h>
@@ -410,27 +410,27 @@ oea_init(void (*handler)(void)) @@ -410,27 +410,27 @@ oea_init(void (*handler)(void))
410 410
411 /* 411 /*
412 * Sync the changed instructions. 412 * Sync the changed instructions.
413 */ 413 */
414 __syncicache((void *) trapstart, 414 __syncicache((void *) trapstart,
415 (uintptr_t) trapend - (uintptr_t) trapstart); 415 (uintptr_t) trapend - (uintptr_t) trapstart);
416 __syncicache(dsitrap_fix_dbat4, 16); 416 __syncicache(dsitrap_fix_dbat4, 16);
417 __syncicache(dsitrap_fix_dbat7, 8); 417 __syncicache(dsitrap_fix_dbat7, 8);
418#ifdef PPC_OEA601 418#ifdef PPC_OEA601
419 419
420 /* 420 /*
421 * If we are on a MPC601 processor, we need to zap any tlbsync 421 * If we are on a MPC601 processor, we need to zap any tlbsync
422 * instructions into sync. This differs from the above in 422 * instructions into sync. This differs from the above in
423 * examing all kernel text, as opposed to just the exception handling. 423 * examining all kernel text, as opposed to just the exception handling.
424 * We sync the icache on every instruction found since there are 424 * We sync the icache on every instruction found since there are
425 * only very few of them. 425 * only very few of them.
426 */ 426 */
427 if (cpuvers == MPC601) { 427 if (cpuvers == MPC601) {
428 extern int kernel_text[], etext[]; 428 extern int kernel_text[], etext[];
429 int *ip; 429 int *ip;
430 430
431 for (ip = kernel_text; ip < etext; ip++) { 431 for (ip = kernel_text; ip < etext; ip++) {
432 if (*ip == TLBSYNC) { 432 if (*ip == TLBSYNC) {
433 *ip = SYNC; 433 *ip = SYNC;
434 __syncicache(ip, sizeof(*ip)); 434 __syncicache(ip, sizeof(*ip));
435 } 435 }
436 } 436 }

cvs diff -r1.98 -r1.99 src/sys/dev/pci/ixgbe/ix_txrx.c (expand / switch to unified diff)

--- src/sys/dev/pci/ixgbe/ix_txrx.c 2022/05/11 17:22:20 1.98
+++ src/sys/dev/pci/ixgbe/ix_txrx.c 2022/08/07 09:37:47 1.99
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ix_txrx.c,v 1.98 2022/05/11 17:22:20 bouyer Exp $ */ 1/* $NetBSD: ix_txrx.c,v 1.99 2022/08/07 09:37:47 andvar Exp $ */
2 2
3/****************************************************************************** 3/******************************************************************************
4 4
5 Copyright (c) 2001-2017, Intel Corporation 5 Copyright (c) 2001-2017, Intel Corporation
6 All rights reserved. 6 All rights reserved.
7 7
8 Redistribution and use in source and binary forms, with or without 8 Redistribution and use in source and binary forms, with or without
9 modification, are permitted provided that the following conditions are met: 9 modification, are permitted provided that the following conditions are met:
10 10
11 1. Redistributions of source code must retain the above copyright notice, 11 1. Redistributions of source code must retain the above copyright notice,
12 this list of conditions and the following disclaimer. 12 this list of conditions and the following disclaimer.
13 13
14 2. Redistributions in binary form must reproduce the above copyright 14 2. Redistributions in binary form must reproduce the above copyright
@@ -54,27 +54,27 @@ @@ -54,27 +54,27 @@
54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
63 * POSSIBILITY OF SUCH DAMAGE. 63 * POSSIBILITY OF SUCH DAMAGE.
64 */ 64 */
65 65
66#include <sys/cdefs.h> 66#include <sys/cdefs.h>
67__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.98 2022/05/11 17:22:20 bouyer Exp $"); 67__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.99 2022/08/07 09:37:47 andvar Exp $");
68 68
69#include "opt_inet.h" 69#include "opt_inet.h"
70#include "opt_inet6.h" 70#include "opt_inet6.h"
71 71
72#include "ixgbe.h" 72#include "ixgbe.h"
73 73
74/* 74/*
75 * HW RSC control: 75 * HW RSC control:
76 * this feature only works with 76 * this feature only works with
77 * IPv4, and only on 82599 and later. 77 * IPv4, and only on 82599 and later.
78 * Also this will cause IP forwarding to 78 * Also this will cause IP forwarding to
79 * fail and that can't be controlled by 79 * fail and that can't be controlled by
80 * the stack as LRO can. For all these 80 * the stack as LRO can. For all these
@@ -306,27 +306,27 @@ ixgbe_mq_start_locked(struct ifnet *ifp, @@ -306,27 +306,27 @@ ixgbe_mq_start_locked(struct ifnet *ifp,
306 return (ENETDOWN); 306 return (ENETDOWN);
307 307
308 /* Process the queue */ 308 /* Process the queue */
309 while ((next = pcq_get(txr->txr_interq)) != NULL) { 309 while ((next = pcq_get(txr->txr_interq)) != NULL) {
310 if ((err = ixgbe_xmit(txr, next)) != 0) { 310 if ((err = ixgbe_xmit(txr, next)) != 0) {
311 m_freem(next); 311 m_freem(next);
312 /* All errors are counted in ixgbe_xmit() */ 312 /* All errors are counted in ixgbe_xmit() */
313 break; 313 break;
314 } 314 }
315 enqueued++; 315 enqueued++;
316#if __FreeBSD_version >= 1100036 316#if __FreeBSD_version >= 1100036
317 /* 317 /*
318 * Since we're looking at the tx ring, we can check 318 * Since we're looking at the tx ring, we can check
319 * to see if we're a VF by examing our tail register 319 * to see if we're a VF by examining our tail register
320 * address. 320 * address.
321 */ 321 */
322 if ((txr->adapter->feat_en & IXGBE_FEATURE_VF) && 322 if ((txr->adapter->feat_en & IXGBE_FEATURE_VF) &&
323 (next->m_flags & M_MCAST)) 323 (next->m_flags & M_MCAST))
324 if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1); 324 if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1);
325#endif 325#endif
326 /* Send a copy of the frame to the BPF listener */ 326 /* Send a copy of the frame to the BPF listener */
327 bpf_mtap(ifp, next, BPF_D_OUT); 327 bpf_mtap(ifp, next, BPF_D_OUT);
328 if ((ifp->if_flags & IFF_RUNNING) == 0) 328 if ((ifp->if_flags & IFF_RUNNING) == 0)
329 break; 329 break;
330 } 330 }
331 331
332 if (txr->tx_avail < IXGBE_TX_CLEANUP_THRESHOLD(txr->adapter)) 332 if (txr->tx_avail < IXGBE_TX_CLEANUP_THRESHOLD(txr->adapter))
@@ -1954,27 +1954,27 @@ ixgbe_rxeof(struct ix_queue *que) @@ -1954,27 +1954,27 @@ ixgbe_rxeof(struct ix_queue *que)
1954 goto next_desc; 1954 goto next_desc;
1955 } 1955 }
1956 discard_multidesc = false; 1956 discard_multidesc = false;
1957 1957
1958 bus_dmamap_sync(rxr->ptag->dt_dmat, rbuf->pmap, 0, 1958 bus_dmamap_sync(rxr->ptag->dt_dmat, rbuf->pmap, 0,
1959 rbuf->buf->m_pkthdr.len, BUS_DMASYNC_POSTREAD); 1959 rbuf->buf->m_pkthdr.len, BUS_DMASYNC_POSTREAD);
1960 1960
1961 /* 1961 /*
1962 * On 82599 which supports a hardware 1962 * On 82599 which supports a hardware
1963 * LRO (called HW RSC), packets need 1963 * LRO (called HW RSC), packets need
1964 * not be fragmented across sequential 1964 * not be fragmented across sequential
1965 * descriptors, rather the next descriptor 1965 * descriptors, rather the next descriptor
1966 * is indicated in bits of the descriptor. 1966 * is indicated in bits of the descriptor.
1967 * This also means that we might proceses 1967 * This also means that we might process
1968 * more than one packet at a time, something 1968 * more than one packet at a time, something
1969 * that has never been true before, it 1969 * that has never been true before, it
1970 * required eliminating global chain pointers 1970 * required eliminating global chain pointers
1971 * in favor of what we are doing here. -jfv 1971 * in favor of what we are doing here. -jfv
1972 */ 1972 */
1973 if (!eop) { 1973 if (!eop) {
1974 /* 1974 /*
1975 * Figure out the next descriptor 1975 * Figure out the next descriptor
1976 * of this frame. 1976 * of this frame.
1977 */ 1977 */
1978 if (rxr->hw_rsc == TRUE) { 1978 if (rxr->hw_rsc == TRUE) {
1979 rsc = ixgbe_rsc_count(cur); 1979 rsc = ixgbe_rsc_count(cur);
1980 rxr->rsc_num += (rsc - 1); 1980 rxr->rsc_num += (rsc - 1);