Fix priority for NaN propagation: frA > frB > frC.diff -r1.6 -r1.7 src/sys/arch/powerpc/fpu/fpu_add.c
(rin)
--- src/sys/arch/powerpc/fpu/fpu_add.c 2022/09/01 06:10:58 1.6
+++ src/sys/arch/powerpc/fpu/fpu_add.c 2022/09/06 23:04:08 1.7
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: fpu_add.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */ | 1 | /* $NetBSD: fpu_add.c,v 1.7 2022/09/06 23:04:08 rin Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 1992, 1993 | 4 | * Copyright (c) 1992, 1993 | |
5 | * The Regents of the University of California. All rights reserved. | 5 | * The Regents of the University of California. All rights reserved. | |
6 | * | 6 | * | |
7 | * This software was developed by the Computer Systems Engineering group | 7 | * This software was developed by the Computer Systems Engineering group | |
8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | 8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | |
9 | * contributed to Berkeley. | 9 | * contributed to Berkeley. | |
10 | * | 10 | * | |
11 | * All advertising materials mentioning features or use of this software | 11 | * All advertising materials mentioning features or use of this software | |
12 | * must display the following acknowledgement: | 12 | * must display the following acknowledgement: | |
13 | * This product includes software developed by the University of | 13 | * This product includes software developed by the University of | |
14 | * California, Lawrence Berkeley Laboratory. | 14 | * California, Lawrence Berkeley Laboratory. | |
@@ -37,27 +37,27 @@ | @@ -37,27 +37,27 @@ | |||
37 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 37 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
38 | * SUCH DAMAGE. | 38 | * SUCH DAMAGE. | |
39 | * | 39 | * | |
40 | * @(#)fpu_add.c 8.1 (Berkeley) 6/11/93 | 40 | * @(#)fpu_add.c 8.1 (Berkeley) 6/11/93 | |
41 | */ | 41 | */ | |
42 | 42 | |||
43 | /* | 43 | /* | |
44 | * Perform an FPU add (return x + y). | 44 | * Perform an FPU add (return x + y). | |
45 | * | 45 | * | |
46 | * To subtract, negate y and call add. | 46 | * To subtract, negate y and call add. | |
47 | */ | 47 | */ | |
48 | 48 | |||
49 | #include <sys/cdefs.h> | 49 | #include <sys/cdefs.h> | |
50 | __KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.6 2022/09/01 06:10:58 rin Exp $"); | 50 | __KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.7 2022/09/06 23:04:08 rin Exp $"); | |
51 | 51 | |||
52 | #include <sys/types.h> | 52 | #include <sys/types.h> | |
53 | #if defined(DIAGNOSTIC)||defined(DEBUG) | 53 | #if defined(DIAGNOSTIC)||defined(DEBUG) | |
54 | #include <sys/systm.h> | 54 | #include <sys/systm.h> | |
55 | #endif | 55 | #endif | |
56 | 56 | |||
57 | #include <powerpc/instr.h> | 57 | #include <powerpc/instr.h> | |
58 | #include <machine/fpu.h> | 58 | #include <machine/fpu.h> | |
59 | #include <machine/reg.h> | 59 | #include <machine/reg.h> | |
60 | 60 | |||
61 | #include <powerpc/fpu/fpu_arith.h> | 61 | #include <powerpc/fpu/fpu_arith.h> | |
62 | #include <powerpc/fpu/fpu_emu.h> | 62 | #include <powerpc/fpu/fpu_emu.h> | |
63 | #include <powerpc/fpu/fpu_extern.h> | 63 | #include <powerpc/fpu/fpu_extern.h> | |
@@ -83,33 +83,35 @@ fpu_add(struct fpemu *fe) | @@ -83,33 +83,35 @@ fpu_add(struct fpemu *fe) | |||
83 | * - y is 0. Implied: x = 0. | 83 | * - y is 0. Implied: x = 0. | |
84 | * If x and y differ in sign (one positive, one negative), | 84 | * If x and y differ in sign (one positive, one negative), | |
85 | * the result is +0 except when rounding to -Inf. If same: | 85 | * the result is +0 except when rounding to -Inf. If same: | |
86 | * +0 + +0 = +0; -0 + -0 = -0. | 86 | * +0 + +0 = +0; -0 + -0 = -0. | |
87 | * - x is 0. Implied: y != 0. | 87 | * - x is 0. Implied: y != 0. | |
88 | * Result is y. | 88 | * Result is y. | |
89 | * - other. Implied: both x and y are numbers. | 89 | * - other. Implied: both x and y are numbers. | |
90 | * Do addition a la Hennessey & Patterson. | 90 | * Do addition a la Hennessey & Patterson. | |
91 | */ | 91 | */ | |
92 | DPRINTF(FPE_REG, ("fpu_add:\n")); | 92 | DPRINTF(FPE_REG, ("fpu_add:\n")); | |
93 | DUMPFPN(FPE_REG, x); | 93 | DUMPFPN(FPE_REG, x); | |
94 | DUMPFPN(FPE_REG, y); | 94 | DUMPFPN(FPE_REG, y); | |
95 | DPRINTF(FPE_REG, ("=>\n")); | 95 | DPRINTF(FPE_REG, ("=>\n")); | |
96 | ORDER(x, y); | 96 | if (ISNAN(x) || ISNAN(y)) { | |
97 | if (ISNAN(y)) { | 97 | if (ISSNAN(x) || ISSNAN(y)) | |
98 | if (ISSNAN(y)) | |||
99 | fe->fe_cx |= FPSCR_VXSNAN; | 98 | fe->fe_cx |= FPSCR_VXSNAN; | |
99 | if (ISNAN(x)) | |||
100 | y = x; | |||
100 | DUMPFPN(FPE_REG, y); | 101 | DUMPFPN(FPE_REG, y); | |
101 | return (y); | 102 | return (y); | |
102 | } | 103 | } | |
104 | ORDER(x, y); | |||
103 | if (ISINF(y)) { | 105 | if (ISINF(y)) { | |
104 | if (ISINF(x) && x->fp_sign != y->fp_sign) { | 106 | if (ISINF(x) && x->fp_sign != y->fp_sign) { | |
105 | fe->fe_cx |= FPSCR_VXISI; | 107 | fe->fe_cx |= FPSCR_VXISI; | |
106 | return (fpu_newnan(fe)); | 108 | return (fpu_newnan(fe)); | |
107 | } | 109 | } | |
108 | DUMPFPN(FPE_REG, y); | 110 | DUMPFPN(FPE_REG, y); | |
109 | return (y); | 111 | return (y); | |
110 | } | 112 | } | |
111 | rd = ((fe->fe_fpscr) & FPSCR_RN); | 113 | rd = ((fe->fe_fpscr) & FPSCR_RN); | |
112 | if (ISZERO(y)) { | 114 | if (ISZERO(y)) { | |
113 | if (rd != FSR_RD_RM) /* only -0 + -0 gives -0 */ | 115 | if (rd != FSR_RD_RM) /* only -0 + -0 gives -0 */ | |
114 | y->fp_sign &= x->fp_sign; | 116 | y->fp_sign &= x->fp_sign; | |
115 | else /* any -0 operand gives -0 */ | 117 | else /* any -0 operand gives -0 */ |
--- src/sys/arch/powerpc/fpu/fpu_mul.c 2022/09/01 06:10:58 1.6
+++ src/sys/arch/powerpc/fpu/fpu_mul.c 2022/09/06 23:04:08 1.7
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: fpu_mul.c,v 1.6 2022/09/01 06:10:58 rin Exp $ */ | 1 | /* $NetBSD: fpu_mul.c,v 1.7 2022/09/06 23:04:08 rin Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 1992, 1993 | 4 | * Copyright (c) 1992, 1993 | |
5 | * The Regents of the University of California. All rights reserved. | 5 | * The Regents of the University of California. All rights reserved. | |
6 | * | 6 | * | |
7 | * This software was developed by the Computer Systems Engineering group | 7 | * This software was developed by the Computer Systems Engineering group | |
8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | 8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | |
9 | * contributed to Berkeley. | 9 | * contributed to Berkeley. | |
10 | * | 10 | * | |
11 | * All advertising materials mentioning features or use of this software | 11 | * All advertising materials mentioning features or use of this software | |
12 | * must display the following acknowledgement: | 12 | * must display the following acknowledgement: | |
13 | * This product includes software developed by the University of | 13 | * This product includes software developed by the University of | |
14 | * California, Lawrence Berkeley Laboratory. | 14 | * California, Lawrence Berkeley Laboratory. | |
@@ -35,27 +35,27 @@ | @@ -35,27 +35,27 @@ | |||
35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
37 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 37 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
38 | * SUCH DAMAGE. | 38 | * SUCH DAMAGE. | |
39 | * | 39 | * | |
40 | * @(#)fpu_mul.c 8.1 (Berkeley) 6/11/93 | 40 | * @(#)fpu_mul.c 8.1 (Berkeley) 6/11/93 | |
41 | */ | 41 | */ | |
42 | 42 | |||
43 | /* | 43 | /* | |
44 | * Perform an FPU multiply (return x * y). | 44 | * Perform an FPU multiply (return x * y). | |
45 | */ | 45 | */ | |
46 | 46 | |||
47 | #include <sys/cdefs.h> | 47 | #include <sys/cdefs.h> | |
48 | __KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.6 2022/09/01 06:10:58 rin Exp $"); | 48 | __KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.7 2022/09/06 23:04:08 rin Exp $"); | |
49 | 49 | |||
50 | #include <sys/types.h> | 50 | #include <sys/types.h> | |
51 | #if defined(DIAGNOSTIC)||defined(DEBUG) | 51 | #if defined(DIAGNOSTIC)||defined(DEBUG) | |
52 | #include <sys/systm.h> | 52 | #include <sys/systm.h> | |
53 | #endif | 53 | #endif | |
54 | 54 | |||
55 | #include <machine/fpu.h> | 55 | #include <machine/fpu.h> | |
56 | #include <machine/reg.h> | 56 | #include <machine/reg.h> | |
57 | 57 | |||
58 | #include <powerpc/fpu/fpu_arith.h> | 58 | #include <powerpc/fpu/fpu_arith.h> | |
59 | #include <powerpc/fpu/fpu_emu.h> | 59 | #include <powerpc/fpu/fpu_emu.h> | |
60 | 60 | |||
61 | /* | 61 | /* | |
@@ -121,34 +121,36 @@ fpu_mul(struct fpemu *fe) | @@ -121,34 +121,36 @@ fpu_mul(struct fpemu *fe) | |||
121 | * case was taken care of earlier). | 121 | * case was taken care of earlier). | |
122 | * If x = 0, the result is NaN. Otherwise the result | 122 | * If x = 0, the result is NaN. Otherwise the result | |
123 | * is y, with its sign reversed if x is negative. | 123 | * is y, with its sign reversed if x is negative. | |
124 | * - x = 0. Implied: y is 0 or number. | 124 | * - x = 0. Implied: y is 0 or number. | |
125 | * The result is 0 (with XORed sign as usual). | 125 | * The result is 0 (with XORed sign as usual). | |
126 | * - other. Implied: both x and y are numbers. | 126 | * - other. Implied: both x and y are numbers. | |
127 | * The result is x * y (XOR sign, multiply bits, add exponents). | 127 | * The result is x * y (XOR sign, multiply bits, add exponents). | |
128 | */ | 128 | */ | |
129 | DPRINTF(FPE_REG, ("fpu_mul:\n")); | 129 | DPRINTF(FPE_REG, ("fpu_mul:\n")); | |
130 | DUMPFPN(FPE_REG, x); | 130 | DUMPFPN(FPE_REG, x); | |
131 | DUMPFPN(FPE_REG, y); | 131 | DUMPFPN(FPE_REG, y); | |
132 | DPRINTF(FPE_REG, ("=>\n")); | 132 | DPRINTF(FPE_REG, ("=>\n")); | |
133 | 133 | |||
134 | ORDER(x, y); | 134 | if (ISNAN(x) || ISNAN(y)) { | |
135 | if (ISNAN(y)) { | 135 | if (ISSNAN(x) || ISSNAN(y)) | |
136 | y->fp_sign ^= x->fp_sign; | |||
137 | if (ISSNAN(y)) | |||
138 | fe->fe_cx |= FPSCR_VXSNAN; | 136 | fe->fe_cx |= FPSCR_VXSNAN; | |
137 | if (ISNAN(x)) | |||
138 | SWAP(x, y); | |||
139 | y->fp_sign ^= x->fp_sign; | |||
139 | DUMPFPN(FPE_REG, y); | 140 | DUMPFPN(FPE_REG, y); | |
140 | return (y); | 141 | return (y); | |
141 | } | 142 | } | |
143 | ORDER(x, y); | |||
142 | if (ISINF(y)) { | 144 | if (ISINF(y)) { | |
143 | if (ISZERO(x)) { | 145 | if (ISZERO(x)) { | |
144 | fe->fe_cx |= FPSCR_VXIMZ; | 146 | fe->fe_cx |= FPSCR_VXIMZ; | |
145 | return (fpu_newnan(fe)); | 147 | return (fpu_newnan(fe)); | |
146 | } | 148 | } | |
147 | y->fp_sign ^= x->fp_sign; | 149 | y->fp_sign ^= x->fp_sign; | |
148 | DUMPFPN(FPE_REG, y); | 150 | DUMPFPN(FPE_REG, y); | |
149 | return (y); | 151 | return (y); | |
150 | } | 152 | } | |
151 | if (ISZERO(x)) { | 153 | if (ISZERO(x)) { | |
152 | x->fp_sign ^= y->fp_sign; | 154 | x->fp_sign ^= y->fp_sign; | |
153 | DUMPFPN(FPE_REG, x); | 155 | DUMPFPN(FPE_REG, x); | |
154 | return (x); | 156 | return (x); |
--- src/sys/arch/powerpc/fpu/fpu_div.c 2022/09/04 13:32:14 1.8
+++ src/sys/arch/powerpc/fpu/fpu_div.c 2022/09/06 23:04:08 1.9
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $ */ | 1 | /* $NetBSD: fpu_div.c,v 1.9 2022/09/06 23:04:08 rin Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 1992, 1993 | 4 | * Copyright (c) 1992, 1993 | |
5 | * The Regents of the University of California. All rights reserved. | 5 | * The Regents of the University of California. All rights reserved. | |
6 | * | 6 | * | |
7 | * This software was developed by the Computer Systems Engineering group | 7 | * This software was developed by the Computer Systems Engineering group | |
8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | 8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | |
9 | * contributed to Berkeley. | 9 | * contributed to Berkeley. | |
10 | * | 10 | * | |
11 | * All advertising materials mentioning features or use of this software | 11 | * All advertising materials mentioning features or use of this software | |
12 | * must display the following acknowledgement: | 12 | * must display the following acknowledgement: | |
13 | * This product includes software developed by the University of | 13 | * This product includes software developed by the University of | |
14 | * California, Lawrence Berkeley Laboratory. | 14 | * California, Lawrence Berkeley Laboratory. | |
@@ -35,27 +35,27 @@ | @@ -35,27 +35,27 @@ | |||
35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
37 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 37 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
38 | * SUCH DAMAGE. | 38 | * SUCH DAMAGE. | |
39 | * | 39 | * | |
40 | * @(#)fpu_div.c 8.1 (Berkeley) 6/11/93 | 40 | * @(#)fpu_div.c 8.1 (Berkeley) 6/11/93 | |
41 | */ | 41 | */ | |
42 | 42 | |||
43 | /* | 43 | /* | |
44 | * Perform an FPU divide (return x / y). | 44 | * Perform an FPU divide (return x / y). | |
45 | */ | 45 | */ | |
46 | 46 | |||
47 | #include <sys/cdefs.h> | 47 | #include <sys/cdefs.h> | |
48 | __KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.8 2022/09/04 13:32:14 rin Exp $"); | 48 | __KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.9 2022/09/06 23:04:08 rin Exp $"); | |
49 | 49 | |||
50 | #include <sys/types.h> | 50 | #include <sys/types.h> | |
51 | #if defined(DIAGNOSTIC)||defined(DEBUG) | 51 | #if defined(DIAGNOSTIC)||defined(DEBUG) | |
52 | #include <sys/systm.h> | 52 | #include <sys/systm.h> | |
53 | #endif | 53 | #endif | |
54 | 54 | |||
55 | #include <machine/fpu.h> | 55 | #include <machine/fpu.h> | |
56 | #include <machine/reg.h> | 56 | #include <machine/reg.h> | |
57 | 57 | |||
58 | #include <powerpc/fpu/fpu_arith.h> | 58 | #include <powerpc/fpu/fpu_arith.h> | |
59 | #include <powerpc/fpu/fpu_emu.h> | 59 | #include <powerpc/fpu/fpu_emu.h> | |
60 | 60 | |||
61 | /* | 61 | /* | |
@@ -172,29 +172,30 @@ fpu_div(struct fpemu *fe) | @@ -172,29 +172,30 @@ fpu_div(struct fpemu *fe) | |||
172 | * Inf / 0 = Inf [i.e., return x] | 172 | * Inf / 0 = Inf [i.e., return x] | |
173 | * 0 / Inf = 0 [i.e., return x] | 173 | * 0 / Inf = 0 [i.e., return x] | |
174 | * 0 / num = 0 [i.e., return x] | 174 | * 0 / num = 0 [i.e., return x] | |
175 | * 0 / 0 = NaN, plus NV exception | 175 | * 0 / 0 = NaN, plus NV exception | |
176 | * num / Inf = 0 | 176 | * num / Inf = 0 | |
177 | * num / num = num (do the divide) | 177 | * num / num = num (do the divide) | |
178 | * num / 0 = Inf, plus DZ exception | 178 | * num / 0 = Inf, plus DZ exception | |
179 | */ | 179 | */ | |
180 | DPRINTF(FPE_REG, ("fpu_div:\n")); | 180 | DPRINTF(FPE_REG, ("fpu_div:\n")); | |
181 | DUMPFPN(FPE_REG, x); | 181 | DUMPFPN(FPE_REG, x); | |
182 | DUMPFPN(FPE_REG, y); | 182 | DUMPFPN(FPE_REG, y); | |
183 | DPRINTF(FPE_REG, ("=>\n")); | 183 | DPRINTF(FPE_REG, ("=>\n")); | |
184 | if (ISNAN(x) || ISNAN(y)) { | 184 | if (ISNAN(x) || ISNAN(y)) { | |
185 | ORDER(x, y); | |||
186 | if (ISSNAN(x) || ISSNAN(y)) | 185 | if (ISSNAN(x) || ISSNAN(y)) | |
187 | fe->fe_cx |= FPSCR_VXSNAN; | 186 | fe->fe_cx |= FPSCR_VXSNAN; | |
187 | if (ISNAN(x)) | |||
188 | y = x; | |||
188 | DUMPFPN(FPE_REG, y); | 189 | DUMPFPN(FPE_REG, y); | |
189 | return (y); | 190 | return (y); | |
190 | } | 191 | } | |
191 | /* | 192 | /* | |
192 | * Need to split the following out cause they generate different | 193 | * Need to split the following out cause they generate different | |
193 | * exceptions. | 194 | * exceptions. | |
194 | */ | 195 | */ | |
195 | if (ISINF(x)) { | 196 | if (ISINF(x)) { | |
196 | if (x->fp_class == y->fp_class) { | 197 | if (x->fp_class == y->fp_class) { | |
197 | fe->fe_cx |= FPSCR_VXIDI; | 198 | fe->fe_cx |= FPSCR_VXIDI; | |
198 | return (fpu_newnan(fe)); | 199 | return (fpu_newnan(fe)); | |
199 | } | 200 | } | |
200 | DUMPFPN(FPE_REG, x); | 201 | DUMPFPN(FPE_REG, x); |