| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: intr.h,v 1.12 2019/11/23 19:40:36 ad Exp $ */ | | 1 | /* $NetBSD: intr.h,v 1.13 2022/09/12 08:14:55 rin Exp $ */ |
2 | /*- | | 2 | /*- |
3 | * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. | | 3 | * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. |
4 | * All rights reserved. | | 4 | * All rights reserved. |
5 | * | | 5 | * |
6 | * This code is derived from software contributed to The NetBSD Foundation | | 6 | * This code is derived from software contributed to The NetBSD Foundation |
7 | * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects | | 7 | * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects |
8 | * Agency and which was developed by Matt Thomas of 3am Software Foundry. | | 8 | * Agency and which was developed by Matt Thomas of 3am Software Foundry. |
9 | * | | 9 | * |
10 | * This material is based upon work supported by the Defense Advanced Research | | 10 | * This material is based upon work supported by the Defense Advanced Research |
11 | * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under | | 11 | * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under |
12 | * Contract No. N66001-09-C-2073. | | 12 | * Contract No. N66001-09-C-2073. |
13 | * Approved for Public Release, Distribution Unlimited | | 13 | * Approved for Public Release, Distribution Unlimited |
14 | * | | 14 | * |
| @@ -67,27 +67,29 @@ | | | @@ -67,27 +67,29 @@ |
67 | | | 67 | |
68 | #define IPI_DST_ALL ((cpuid_t)-2) | | 68 | #define IPI_DST_ALL ((cpuid_t)-2) |
69 | #define IPI_DST_NOTME ((cpuid_t)-1) | | 69 | #define IPI_DST_NOTME ((cpuid_t)-1) |
70 | | | 70 | |
71 | #define IPI_NOMESG 0x0000 | | 71 | #define IPI_NOMESG 0x0000 |
72 | #define IPI_HALT 0x0001 | | 72 | #define IPI_HALT 0x0001 |
73 | #define IPI_XCALL 0x0002 | | 73 | #define IPI_XCALL 0x0002 |
74 | #define IPI_KPREEMPT 0x0004 | | 74 | #define IPI_KPREEMPT 0x0004 |
75 | #define IPI_TLB1SYNC 0x0008 | | 75 | #define IPI_TLB1SYNC 0x0008 |
76 | #define IPI_GENERIC 0x0010 | | 76 | #define IPI_GENERIC 0x0010 |
77 | #define IPI_SUSPEND 0x0020 | | 77 | #define IPI_SUSPEND 0x0020 |
78 | #define IPI_AST 0x0040 | | 78 | #define IPI_AST 0x0040 |
79 | | | 79 | |
| | | 80 | #if 0 /* PR port-powerpc/56922: fast softints are broken on powerpc */ |
80 | #define __HAVE_FAST_SOFTINTS 1 | | 81 | #define __HAVE_FAST_SOFTINTS 1 |
| | | 82 | #endif |
81 | #define SOFTINT_KPREEMPT SOFTINT_COUNT | | 83 | #define SOFTINT_KPREEMPT SOFTINT_COUNT |
82 | | | 84 | |
83 | #ifndef _LOCORE | | 85 | #ifndef _LOCORE |
84 | | | 86 | |
85 | struct cpu_info; | | 87 | struct cpu_info; |
86 | | | 88 | |
87 | void *intr_establish(int, int, int, int (*)(void *), void *); | | 89 | void *intr_establish(int, int, int, int (*)(void *), void *); |
88 | void *intr_establish_xname(int, int, int, int (*)(void *), void *, | | 90 | void *intr_establish_xname(int, int, int, int (*)(void *), void *, |
89 | const char *); | | 91 | const char *); |
90 | void intr_disestablish(void *); | | 92 | void intr_disestablish(void *); |
91 | void intr_cpu_attach(struct cpu_info *); | | 93 | void intr_cpu_attach(struct cpu_info *); |
92 | void intr_cpu_hatch(struct cpu_info *); | | 94 | void intr_cpu_hatch(struct cpu_info *); |
93 | void intr_init(void); | | 95 | void intr_init(void); |