Tue Sep 20 12:25:01 2022 UTC ()
Typo in comment. No binary changes.


(rin)
diff -r1.59 -r1.60 src/sys/arch/powerpc/fpu/fpu_emu.c
cvs diff -r1.59 -r1.60 src/sys/arch/powerpc/fpu/fpu_emu.c (expand / switch to unified diff)

--- src/sys/arch/powerpc/fpu/fpu_emu.c 2022/09/20 12:12:42 1.59
+++ src/sys/arch/powerpc/fpu/fpu_emu.c 2022/09/20 12:25:01 1.60
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: fpu_emu.c,v 1.59 2022/09/20 12:12:42 rin Exp $ */ 1/* $NetBSD: fpu_emu.c,v 1.60 2022/09/20 12:25:01 rin Exp $ */
2 2
3/* 3/*
4 * Copyright 2001 Wasabi Systems, Inc. 4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -66,27 +66,27 @@ @@ -66,27 +66,27 @@
66 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 66 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
67 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
68 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
69 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
70 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
71 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
72 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
73 * SUCH DAMAGE. 73 * SUCH DAMAGE.
74 * 74 *
75 * @(#)fpu.c 8.1 (Berkeley) 6/11/93 75 * @(#)fpu.c 8.1 (Berkeley) 6/11/93
76 */ 76 */
77 77
78#include <sys/cdefs.h> 78#include <sys/cdefs.h>
79__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.59 2022/09/20 12:12:42 rin Exp $"); 79__KERNEL_RCSID(0, "$NetBSD: fpu_emu.c,v 1.60 2022/09/20 12:25:01 rin Exp $");
80 80
81#ifdef _KERNEL_OPT 81#ifdef _KERNEL_OPT
82#include "opt_ddb.h" 82#include "opt_ddb.h"
83#endif 83#endif
84 84
85#include <sys/param.h> 85#include <sys/param.h>
86#include <sys/systm.h> 86#include <sys/systm.h>
87#include <sys/evcnt.h> 87#include <sys/evcnt.h>
88#include <sys/proc.h> 88#include <sys/proc.h>
89#include <sys/siginfo.h> 89#include <sys/siginfo.h>
90#include <sys/signal.h> 90#include <sys/signal.h>
91#include <sys/signalvar.h> 91#include <sys/signalvar.h>
92#include <sys/syslog.h> 92#include <sys/syslog.h>
@@ -288,27 +288,27 @@ success: @@ -288,27 +288,27 @@ success:
288 * Single-precision (float) data is internally represented in 288 * Single-precision (float) data is internally represented in
289 * double-precision (double) format in floating-point registers (FRs). 289 * double-precision (double) format in floating-point registers (FRs).
290 * Even though double value cannot be translated into float format in 290 * Even though double value cannot be translated into float format in
291 * general, Power ISA (2.0.3--3.1) specify conversion algorithm when 291 * general, Power ISA (2.0.3--3.1) specify conversion algorithm when
292 * stored to memory (see Sec. 4.6.3): 292 * stored to memory (see Sec. 4.6.3):
293 * 293 *
294 * - Extra fraction bits are truncated regardless of rounding mode. 294 * - Extra fraction bits are truncated regardless of rounding mode.
295 * - When magnitude is larger than the maximum number in float format, 295 * - When magnitude is larger than the maximum number in float format,
296 * bits 63--62 and 58--29 are mechanically copied into bits 31--0. 296 * bits 63--62 and 58--29 are mechanically copied into bits 31--0.
297 * - When magnitude is representable as denormalized number in float 297 * - When magnitude is representable as denormalized number in float
298 * format, it is stored as normalized double value in FRs; 298 * format, it is stored as normalized double value in FRs;
299 * denormalization is required in this case. 299 * denormalization is required in this case.
300 * - When magnitude is smaller than the minimum denormalized number in 300 * - When magnitude is smaller than the minimum denormalized number in
301 * float format, the result is undefined. For G5 (790MP Rev 1.1), 301 * float format, the result is undefined. For G5 (970MP Rev 1.1),
302 * (sign | 0) seems to be stored. For G4 and prior, some ``random'' 302 * (sign | 0) seems to be stored. For G4 and prior, some ``random''
303 * garbage is stored in exponent. We mimic G5 for now. 303 * garbage is stored in exponent. We mimic G5 for now.
304 */ 304 */
305static uint32_t 305static uint32_t
306fpu_to_single(uint64_t reg) 306fpu_to_single(uint64_t reg)
307{ 307{
308 uint32_t sign, frac, word; 308 uint32_t sign, frac, word;
309 int exp, shift; 309 int exp, shift;
310 310
311 sign = (reg & __BIT(63)) >> 32; 311 sign = (reg & __BIT(63)) >> 32;
312 exp = __SHIFTOUT(reg, __BITS(62, 52)) - 1023; 312 exp = __SHIFTOUT(reg, __BITS(62, 52)) - 1023;
313 if (exp > -127 || (reg & ~__BIT(63)) == 0) { 313 if (exp > -127 || (reg & ~__BIT(63)) == 0) {
314 /* 314 /*