| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: arasan_sdhc_fdt.c,v 1.10 2022/10/26 10:55:23 jmcneill Exp $ */ | | 1 | /* $NetBSD: arasan_sdhc_fdt.c,v 1.11 2022/10/26 20:54:52 jmcneill Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca> | | 4 | * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca> |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | | 7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions | | 8 | * modification, are permitted provided that the following conditions |
9 | * are met: | | 9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright | | 10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. | | 11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright | | 12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the | | 13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. | | 14 | * documentation and/or other materials provided with the distribution. |
| @@ -17,27 +17,27 @@ | | | @@ -17,27 +17,27 @@ |
17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | | 17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | | 19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | | 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | | 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | | 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | | 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
26 | * SUCH DAMAGE. | | 26 | * SUCH DAMAGE. |
27 | */ | | 27 | */ |
28 | | | 28 | |
29 | #include <sys/cdefs.h> | | 29 | #include <sys/cdefs.h> |
30 | __KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.10 2022/10/26 10:55:23 jmcneill Exp $"); | | 30 | __KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.11 2022/10/26 20:54:52 jmcneill Exp $"); |
31 | | | 31 | |
32 | #include <sys/param.h> | | 32 | #include <sys/param.h> |
33 | #include <sys/bus.h> | | 33 | #include <sys/bus.h> |
34 | #include <sys/device.h> | | 34 | #include <sys/device.h> |
35 | #include <sys/systm.h> | | 35 | #include <sys/systm.h> |
36 | #include <sys/sysctl.h> | | 36 | #include <sys/sysctl.h> |
37 | #include <sys/kmem.h> | | 37 | #include <sys/kmem.h> |
38 | | | 38 | |
39 | #include <dev/sdmmc/sdhcreg.h> | | 39 | #include <dev/sdmmc/sdhcreg.h> |
40 | #include <dev/sdmmc/sdhcvar.h> | | 40 | #include <dev/sdmmc/sdhcvar.h> |
41 | #include <dev/sdmmc/sdmmcvar.h> | | 41 | #include <dev/sdmmc/sdmmcvar.h> |
42 | | | 42 | |
43 | #include <dev/clk/clk_backend.h> | | 43 | #include <dev/clk/clk_backend.h> |
| @@ -224,27 +224,26 @@ arasan_sdhc_match(device_t parent, cfdat | | | @@ -224,27 +224,26 @@ arasan_sdhc_match(device_t parent, cfdat |
224 | } | | 224 | } |
225 | | | 225 | |
226 | static void | | 226 | static void |
227 | arasan_sdhc_attach(device_t parent, device_t self, void *aux) | | 227 | arasan_sdhc_attach(device_t parent, device_t self, void *aux) |
228 | { | | 228 | { |
229 | struct arasan_sdhc_softc * const sc = device_private(self); | | 229 | struct arasan_sdhc_softc * const sc = device_private(self); |
230 | struct fdt_attach_args * const faa = aux; | | 230 | struct fdt_attach_args * const faa = aux; |
231 | const int phandle = faa->faa_phandle; | | 231 | const int phandle = faa->faa_phandle; |
232 | char intrstr[128]; | | 232 | char intrstr[128]; |
233 | const char *clkname; | | 233 | const char *clkname; |
234 | bus_addr_t addr; | | 234 | bus_addr_t addr; |
235 | bus_size_t size; | | 235 | bus_size_t size; |
236 | u_int bus_width; | | 236 | u_int bus_width; |
237 | int error; | | | |
238 | void *ih; | | 237 | void *ih; |
239 | | | 238 | |
240 | fdtbus_clock_assign(phandle); | | 239 | fdtbus_clock_assign(phandle); |
241 | | | 240 | |
242 | if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { | | 241 | if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { |
243 | aprint_error(": couldn't get registers\n"); | | 242 | aprint_error(": couldn't get registers\n"); |
244 | return; | | 243 | return; |
245 | } | | 244 | } |
246 | | | 245 | |
247 | if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { | | 246 | if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { |
248 | aprint_error(": couldn't decode interrupt\n"); | | 247 | aprint_error(": couldn't decode interrupt\n"); |
249 | return; | | 248 | return; |
250 | } | | 249 | } |
| @@ -264,37 +263,41 @@ arasan_sdhc_attach(device_t parent, devi | | | @@ -264,37 +263,41 @@ arasan_sdhc_attach(device_t parent, devi |
264 | | | 263 | |
265 | if (of_getprop_uint32(phandle, "bus-width", &bus_width) != 0) | | 264 | if (of_getprop_uint32(phandle, "bus-width", &bus_width) != 0) |
266 | bus_width = 4; | | 265 | bus_width = 4; |
267 | | | 266 | |
268 | sc->sc_phandle = phandle; | | 267 | sc->sc_phandle = phandle; |
269 | sc->sc_bst = faa->faa_bst; | | 268 | sc->sc_bst = faa->faa_bst; |
270 | if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { | | 269 | if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { |
271 | aprint_error(": couldn't map registers\n"); | | 270 | aprint_error(": couldn't map registers\n"); |
272 | return; | | 271 | return; |
273 | } | | 272 | } |
274 | sc->sc_bsz = size; | | 273 | sc->sc_bsz = size; |
275 | sc->sc_type = of_compatible_lookup(phandle, compat_data)->value; | | 274 | sc->sc_type = of_compatible_lookup(phandle, compat_data)->value; |
276 | | | 275 | |
| | | 276 | #ifdef _LP64 |
277 | const uint32_t caps = bus_space_read_4(sc->sc_bst, sc->sc_bsh, SDHC_CAPABILITIES); | | 277 | const uint32_t caps = bus_space_read_4(sc->sc_bst, sc->sc_bsh, SDHC_CAPABILITIES); |
278 | if ((caps & (SDHC_ADMA2_SUPP|SDHC_64BIT_SYS_BUS)) == SDHC_ADMA2_SUPP) { | | 278 | if ((caps & (SDHC_ADMA2_SUPP|SDHC_64BIT_SYS_BUS)) == SDHC_ADMA2_SUPP) { |
279 | error = bus_dmatag_subregion(faa->faa_dmat, 0, __MASK(32), | | 279 | int error = bus_dmatag_subregion(faa->faa_dmat, 0, __MASK(32), |
280 | &sc->sc_base.sc_dmat, BUS_DMA_WAITOK); | | 280 | &sc->sc_base.sc_dmat, BUS_DMA_WAITOK); |
281 | if (error != 0) { | | 281 | if (error != 0) { |
282 | aprint_error(": couldn't create DMA tag: %d\n", error); | | 282 | aprint_error(": couldn't create DMA tag: %d\n", error); |
283 | return; | | 283 | return; |
284 | } | | 284 | } |
285 | } else { | | 285 | } else { |
286 | sc->sc_base.sc_dmat = faa->faa_dmat; | | 286 | sc->sc_base.sc_dmat = faa->faa_dmat; |
287 | } | | 287 | } |
| | | 288 | #else |
| | | 289 | sc->sc_base.sc_dmat = faa->faa_dmat; |
| | | 290 | #endif |
288 | | | 291 | |
289 | sc->sc_base.sc_dev = self; | | 292 | sc->sc_base.sc_dev = self; |
290 | sc->sc_base.sc_host = sc->sc_host; | | 293 | sc->sc_base.sc_host = sc->sc_host; |
291 | sc->sc_base.sc_flags = SDHC_FLAG_NO_CLKBASE | | | 294 | sc->sc_base.sc_flags = SDHC_FLAG_NO_CLKBASE | |
292 | SDHC_FLAG_SINGLE_POWER_WRITE | | | 295 | SDHC_FLAG_SINGLE_POWER_WRITE | |
293 | SDHC_FLAG_32BIT_ACCESS | | | 296 | SDHC_FLAG_32BIT_ACCESS | |
294 | SDHC_FLAG_USE_DMA | | | 297 | SDHC_FLAG_USE_DMA | |
295 | SDHC_FLAG_STOP_WITH_TC; | | 298 | SDHC_FLAG_STOP_WITH_TC; |
296 | if (bus_width == 8) | | 299 | if (bus_width == 8) |
297 | sc->sc_base.sc_flags |= SDHC_FLAG_8BIT_MODE; | | 300 | sc->sc_base.sc_flags |= SDHC_FLAG_8BIT_MODE; |
298 | sc->sc_base.sc_clkbase = clk_get_rate(sc->sc_clk_xin) / 1000; | | 301 | sc->sc_base.sc_clkbase = clk_get_rate(sc->sc_clk_xin) / 1000; |
299 | sc->sc_base.sc_vendor_bus_clock = arasan_sdhc_bus_clock_pre; | | 302 | sc->sc_base.sc_vendor_bus_clock = arasan_sdhc_bus_clock_pre; |
300 | sc->sc_base.sc_vendor_bus_clock_post = arasan_sdhc_bus_clock_post; | | 303 | sc->sc_base.sc_vendor_bus_clock_post = arasan_sdhc_bus_clock_post; |