Sat Nov 19 09:55:11 2022 UTC ()
Fix CONSADDR and save a label


(skrll)
diff -r1.39 -r1.40 src/sys/arch/riscv/riscv/locore.S
cvs diff -r1.39 -r1.40 src/sys/arch/riscv/riscv/locore.S (expand / switch to unified diff)

--- src/sys/arch/riscv/riscv/locore.S 2022/10/16 06:14:53 1.39
+++ src/sys/arch/riscv/riscv/locore.S 2022/11/19 09:55:11 1.40
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: locore.S,v 1.39 2022/10/16 06:14:53 skrll Exp $ */ 1/* $NetBSD: locore.S,v 1.40 2022/11/19 09:55:11 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2014, 2022 The NetBSD Foundation, Inc. 4 * Copyright (c) 2014, 2022 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry, and by Nick Hudson. 8 * by Matt Thomas of 3am Software Foundry, and by Nick Hudson.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -282,68 +282,70 @@ ENTRY_NP(start) @@ -282,68 +282,70 @@ ENTRY_NP(start)
282 282
283#ifdef CONSADDR 283#ifdef CONSADDR
284 li t1, ((VM_KERNEL_IO_BASE >> SEGSHIFT) & (NPDEPG - 1)) * SZREG 284 li t1, ((VM_KERNEL_IO_BASE >> SEGSHIFT) & (NPDEPG - 1)) * SZREG
285 add s9, s2, t1 285 add s9, s2, t1
286 286
287 // Fill in the PDE for CONSADDR. 287 // Fill in the PDE for CONSADDR.
288 ld t0, .Lconsaddr 288 ld t0, .Lconsaddr
289 mv s0, t0 289 mv s0, t0
290 srli s0, s0, SEGSHIFT // round down to NBSEG, and shift in 290 srli s0, s0, SEGSHIFT // round down to NBSEG, and shift in
291 slli s0, s0, (SEGSHIFT - PGSHIFT + PTE_PPN_SHIFT) // ... to PPN 291 slli s0, s0, (SEGSHIFT - PGSHIFT + PTE_PPN_SHIFT) // ... to PPN
292 or s0, s0, s7 292 or s0, s0, s7
293 293
294 VPRINTS("cons: ") 294 VPRINTS("cons: ")
295 VPRINTX(s2) 295 VPRINTX(s9)
296 VPRINTS(": ") 296 VPRINTS(": ")
297 VPRINTXNL(s0) 297 VPRINTXNL(s0)
298 298
299 REG_S s0, 0(s9) 299 REG_S s0, 0(s9)
300#endif 300#endif
301 301
302 li a0, 'P' 302 li a0, 'P'
303 call _C_LABEL(uartputc) 303 call _C_LABEL(uartputc)
304 304
305 /* Set supervisor trap vector base register */ 305 /* Set supervisor trap vector base register */
306 PTR_LA t0, .Lmmu_on 306 PTR_LA t0, vstart
307 add t0, t0, s8 307 add t0, t0, s8
308 csrw stvec, t0 308 csrw stvec, t0
309 309
310 /* Set supervisor address translation and protection register */ 310 /* Set supervisor address translation and protection register */
311 srli t1, s4, PGSHIFT 311 srli t1, s4, PGSHIFT
312#ifdef _LP64 312#ifdef _LP64
313 li t0, SATP_MODE_SV39 313 li t0, SATP_MODE_SV39
314#else 314#else
315 li t0, SATP_MODE_SV32 315 li t0, SATP_MODE_SV32
316#endif 316#endif
317 or t0, t0, t1 317 or t0, t0, t1
318 sfence.vma 318 sfence.vma
319 csrw satp, t0 319 csrw satp, t0
320 320
321 .align 2 321 .align 2
322.Lmmu_on: 322 .global vstart
 323vstart:
323 // MMU is on! 324 // MMU is on!
324 csrw sscratch, zero // zero in sscratch to mark kernel 325 csrw sscratch, zero // zero in sscratch to mark kernel
325 326
 327#ifdef CONSADDR
 328 add sp, sp, s8
 329#endif
326 li a0, 'M' 330 li a0, 'M'
327 call _C_LABEL(uartputc) // uartputs doesn't use stack 331 call _C_LABEL(uartputc) // uartputs doesn't use stack
328 li a0, '\n' 332 li a0, '\n'
329 call _C_LABEL(uartputc) // uartputs doesn't use stack 333 call _C_LABEL(uartputc) // uartputs doesn't use stack
330 li a0, '\r' 334 li a0, '\r'
331 call _C_LABEL(uartputc) // uartputs doesn't use stack 335 call _C_LABEL(uartputc) // uartputs doesn't use stack
332 336
333 PTR_LA tp, _C_LABEL(lwp0) // put curlwp in tp 337 PTR_LA tp, _C_LABEL(lwp0) // put curlwp in tp
334 338
335 .global vstart 
336vstart: 
337 339
338 /* Set supervisor trap vector base register */ 340 /* Set supervisor trap vector base register */
339 PTR_LA a0, _C_LABEL(cpu_exception_handler) 341 PTR_LA a0, _C_LABEL(cpu_exception_handler)
340 csrw stvec, a0 342 csrw stvec, a0
341 343
342 PTR_LA t0, bootstk // top of lwp0uspace 344 PTR_LA t0, bootstk // top of lwp0uspace
343 PTR_S t0, L_PCB(tp) // set uarea of lwp (already zeroed) 345 PTR_S t0, L_PCB(tp) // set uarea of lwp (already zeroed)
344 addi sp, t0, -TF_LEN // switch to new stack 346 addi sp, t0, -TF_LEN // switch to new stack
345 PTR_S sp, L_MD_UTF(tp) // store pointer to empty trapframe 347 PTR_S sp, L_MD_UTF(tp) // store pointer to empty trapframe
346 348
347 PTR_LA t1, _C_LABEL(kernel_pmap_store) 349 PTR_LA t1, _C_LABEL(kernel_pmap_store)
348 add t2, s4, s8 // PA -> VA 350 add t2, s4, s8 // PA -> VA
349 srli t3, s4, PGSHIFT 351 srli t3, s4, PGSHIFT