Wed Apr 12 19:47:41 2023 UTC ()
powerpc/ddb: Use db_read_bytes, not direct pointer access.

Mark some powerpc-variant ifdefs with XXX crash(8), not sure yet what
to do about them.

XXX pullup-8
XXX pullup-9
XXX pullup-10


(riastradh)
diff -r1.30 -r1.31 src/sys/arch/powerpc/powerpc/db_disasm.c
diff -r1.61 -r1.62 src/sys/arch/powerpc/powerpc/db_trace.c
cvs diff -r1.30 -r1.31 src/sys/arch/powerpc/powerpc/db_disasm.c (switch to unified diff)

--- src/sys/arch/powerpc/powerpc/db_disasm.c 2023/04/12 17:53:32 1.30
+++ src/sys/arch/powerpc/powerpc/db_disasm.c 2023/04/12 19:47:41 1.31
@@ -1,1081 +1,1082 @@ @@ -1,1081 +1,1082 @@
1/* $NetBSD: db_disasm.c,v 1.30 2023/04/12 17:53:32 riastradh Exp $ */ 1/* $NetBSD: db_disasm.c,v 1.31 2023/04/12 19:47:41 riastradh Exp $ */
2/* $OpenBSD: db_disasm.c,v 1.2 1996/12/28 06:21:48 rahnds Exp $ */ 2/* $OpenBSD: db_disasm.c,v 1.2 1996/12/28 06:21:48 rahnds Exp $ */
3 3
4#include <sys/cdefs.h> 4#include <sys/cdefs.h>
5__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.30 2023/04/12 17:53:32 riastradh Exp $"); 5__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.31 2023/04/12 19:47:41 riastradh Exp $");
6 6
7#ifdef _KERNEL_OPT 7#ifdef _KERNEL_OPT
8#include "opt_ppcarch.h" 8#include "opt_ppcarch.h"
9#endif 9#endif
10 10
11#include <sys/param.h> 11#include <sys/param.h>
12#include <sys/types.h> 12#include <sys/types.h>
13 13
14#include <sys/proc.h> 14#include <sys/proc.h>
15#include <sys/systm.h> 15#include <sys/systm.h>
16 16
17#include <machine/db_machdep.h> 17#include <machine/db_machdep.h>
18 18
19#include <ddb/db_access.h> 19#include <ddb/db_access.h>
20#include <ddb/db_sym.h> 20#include <ddb/db_sym.h>
21#include <ddb/db_variables.h> 21#include <ddb/db_variables.h>
22#include <ddb/db_interface.h> 22#include <ddb/db_interface.h>
23#include <ddb/db_output.h> 23#include <ddb/db_output.h>
24 24
25enum function_mask { 25enum function_mask {
26 Op_A = 0x00000001, 26 Op_A = 0x00000001,
27 Op_B = 0x00000002, 27 Op_B = 0x00000002,
28 Op_BI = 0x00000004, 28 Op_BI = 0x00000004,
29 Op_BO = 0x00000008, 29 Op_BO = 0x00000008,
30 Op_BC = Op_BI | Op_BO, 30 Op_BC = Op_BI | Op_BO,
31 Op_CRM = 0x00000010, 31 Op_CRM = 0x00000010,
32 Op_D = 0x00000020, 32 Op_D = 0x00000020,
33 Op_ST = 0x00000020, /* Op_S for store-operations, same as D */ 33 Op_ST = 0x00000020, /* Op_S for store-operations, same as D */
34 Op_S = 0x00000040, /* S-field is swapped with A-field */ 34 Op_S = 0x00000040, /* S-field is swapped with A-field */
35 Op_FM = Op_D | Op_S, /* kludge (reduce Op_s) */ 35 Op_FM = Op_D | Op_S, /* kludge (reduce Op_s) */
36 Op_dA = 0x00000080, 36 Op_dA = 0x00000080,
37 Op_LK = 0x00000100, 37 Op_LK = 0x00000100,
38 Op_Rc = 0x00000200, 38 Op_Rc = 0x00000200,
39 Op_AA = Op_LK | Op_Rc, /* kludge (reduce Op_s) */ 39 Op_AA = Op_LK | Op_Rc, /* kludge (reduce Op_s) */
40 Op_LKM = Op_AA, 40 Op_LKM = Op_AA,
41 Op_RcM = Op_AA, 41 Op_RcM = Op_AA,
42 Op_OE = 0x00000400, 42 Op_OE = 0x00000400,
43 Op_SR = 0x00000800, 43 Op_SR = 0x00000800,
44 Op_TO = 0x00001000, 44 Op_TO = 0x00001000,
45 Op_sign = 0x00002000, 45 Op_sign = 0x00002000,
46 Op_const = 0x00004000, 46 Op_const = 0x00004000,
47 Op_SIMM = Op_const | Op_sign, 47 Op_SIMM = Op_const | Op_sign,
48 Op_UIMM = Op_const, 48 Op_UIMM = Op_const,
49 Op_crbA = 0x00008000, 49 Op_crbA = 0x00008000,
50 Op_crbB = 0x00010000, 50 Op_crbB = 0x00010000,
51 Op_WS = Op_crbB, /* kludge, same field as crbB */ 51 Op_WS = Op_crbB, /* kludge, same field as crbB */
52 Op_rSH = Op_crbB, /* kludge, same field as crbB */ 52 Op_rSH = Op_crbB, /* kludge, same field as crbB */
53 Op_crbD = 0x00020000, 53 Op_crbD = 0x00020000,
54 Op_crfD = 0x00040000, 54 Op_crfD = 0x00040000,
55 Op_crfS = 0x00080000, 55 Op_crfS = 0x00080000,
56 Op_ds = 0x00100000, 56 Op_ds = 0x00100000,
57 Op_me = 0x00200000, 57 Op_me = 0x00200000,
58 Op_spr = 0x00400000, 58 Op_spr = 0x00400000,
59 Op_dcr = Op_spr, /* out of bits - cheat with Op_spr */ 59 Op_dcr = Op_spr, /* out of bits - cheat with Op_spr */
60 Op_tbr = 0x00800000, 60 Op_tbr = 0x00800000,
61 61
62 Op_BP = 0x01000000, 62 Op_BP = 0x01000000,
63 Op_BD = 0x02000000, 63 Op_BD = 0x02000000,
64 Op_LI = 0x04000000, 64 Op_LI = 0x04000000,
65 Op_C = 0x08000000, 65 Op_C = 0x08000000,
66 66
67 Op_NB = 0x10000000, 67 Op_NB = 0x10000000,
68 68
69 Op_sh_mb_sh = 0x20000000, 69 Op_sh_mb_sh = 0x20000000,
70 Op_sh = 0x40000000, 70 Op_sh = 0x40000000,
71 Op_SH = Op_sh | Op_sh_mb_sh, 71 Op_SH = Op_sh | Op_sh_mb_sh,
72 Op_mb = 0x80000000, 72 Op_mb = 0x80000000,
73 Op_MB = Op_mb | Op_sh_mb_sh, 73 Op_MB = Op_mb | Op_sh_mb_sh,
74 Op_ME = Op_MB, 74 Op_ME = Op_MB,
75 75
76}; 76};
77 77
78struct opcode { 78struct opcode {
79 const char *name; 79 const char *name;
80 u_int32_t mask; 80 u_int32_t mask;
81 u_int32_t code; 81 u_int32_t code;
82 enum function_mask func; 82 enum function_mask func;
83}; 83};
84 84
85typedef u_int32_t instr_t; 85typedef u_int32_t instr_t;
86typedef void (op_class_func) (instr_t, vaddr_t); 86typedef void (op_class_func) (instr_t, vaddr_t);
87 87
88u_int32_t extract_field(u_int32_t value, u_int32_t base, u_int32_t width); 88u_int32_t extract_field(u_int32_t value, u_int32_t base, u_int32_t width);
89void disasm_fields(const struct opcode *popcode, instr_t instr, vaddr_t loc); 89void disasm_fields(const struct opcode *popcode, instr_t instr, vaddr_t loc);
90void dis_ppc(const struct opcode *opcodeset, instr_t instr, vaddr_t loc); 90void dis_ppc(const struct opcode *opcodeset, instr_t instr, vaddr_t loc);
91 91
92op_class_func op_ill, op_base; 92op_class_func op_ill, op_base;
93op_class_func op_cl_x13, op_cl_x1e, op_cl_x1f; 93op_class_func op_cl_x13, op_cl_x1e, op_cl_x1f;
94op_class_func op_cl_x3a, op_cl_x3b; 94op_class_func op_cl_x3a, op_cl_x3b;
95op_class_func op_cl_x3e, op_cl_x3f; 95op_class_func op_cl_x3e, op_cl_x3f;
96 96
97op_class_func *opcodes_base[] = { 97op_class_func *opcodes_base[] = {
98/*x00*/ op_ill, op_ill, op_base, op_ill, 98/*x00*/ op_ill, op_ill, op_base, op_ill,
99/*x04*/ op_ill, op_ill, op_ill, op_base, 99/*x04*/ op_ill, op_ill, op_ill, op_base,
100/*x08*/ op_base, op_base, op_base, op_base, 100/*x08*/ op_base, op_base, op_base, op_base,
101/*x0C*/ op_base, op_base, op_base/*XXX*/, op_base/*XXX*/, 101/*x0C*/ op_base, op_base, op_base/*XXX*/, op_base/*XXX*/,
102/*x10*/ op_base, op_base, op_base, op_cl_x13, 102/*x10*/ op_base, op_base, op_base, op_cl_x13,
103/*x14*/ op_base, op_base, op_ill, op_base, 103/*x14*/ op_base, op_base, op_ill, op_base,
104/*x18*/ op_base, op_base, op_base, op_base, 104/*x18*/ op_base, op_base, op_base, op_base,
105/*x1C*/ op_base, op_base, op_cl_x1e, op_cl_x1f, 105/*x1C*/ op_base, op_base, op_cl_x1e, op_cl_x1f,
106/*x20*/ op_base, op_base, op_base, op_base, 106/*x20*/ op_base, op_base, op_base, op_base,
107/*x24*/ op_base, op_base, op_base, op_base, 107/*x24*/ op_base, op_base, op_base, op_base,
108/*x28*/ op_base, op_base, op_base, op_base, 108/*x28*/ op_base, op_base, op_base, op_base,
109/*x2C*/ op_base, op_base, op_base, op_base, 109/*x2C*/ op_base, op_base, op_base, op_base,
110/*x30*/ op_base, op_base, op_base, op_base, 110/*x30*/ op_base, op_base, op_base, op_base,
111/*x34*/ op_base, op_base, op_base, op_base, 111/*x34*/ op_base, op_base, op_base, op_base,
112/*x38*/ op_ill, op_ill, op_cl_x3a, op_cl_x3b, 112/*x38*/ op_ill, op_ill, op_cl_x3a, op_cl_x3b,
113/*x3C*/ op_ill, op_ill, op_cl_x3e, op_cl_x3f 113/*x3C*/ op_ill, op_ill, op_cl_x3e, op_cl_x3f
114}; 114};
115 115
116 116
117/* This table could be modified to make significant the "reserved" fields 117/* This table could be modified to make significant the "reserved" fields
118 * of the opcodes, But I didn't feel like it when typing in the table, 118 * of the opcodes, But I didn't feel like it when typing in the table,
119 * I would recommend that this table be looked over for errors,  119 * I would recommend that this table be looked over for errors,
120 * This was derived from the table in Appendix A.2 of (Mot part # MPCFPE/AD) 120 * This was derived from the table in Appendix A.2 of (Mot part # MPCFPE/AD)
121 * PowerPC Microprocessor Family: The Programming Environments 121 * PowerPC Microprocessor Family: The Programming Environments
122 */ 122 */
123  123
124const struct opcode opcodes[] = { 124const struct opcode opcodes[] = {
125 { "tdi", 0xfc000000, 0x08000000, Op_TO | Op_A | Op_SIMM }, 125 { "tdi", 0xfc000000, 0x08000000, Op_TO | Op_A | Op_SIMM },
126 { "twi", 0xfc000000, 0x0c000000, Op_TO | Op_A | Op_SIMM }, 126 { "twi", 0xfc000000, 0x0c000000, Op_TO | Op_A | Op_SIMM },
127 { "mulli", 0xfc000000, 0x1c000000, Op_D | Op_A | Op_SIMM }, 127 { "mulli", 0xfc000000, 0x1c000000, Op_D | Op_A | Op_SIMM },
128 { "subfic", 0xfc000000, 0x20000000, Op_D | Op_A | Op_SIMM }, 128 { "subfic", 0xfc000000, 0x20000000, Op_D | Op_A | Op_SIMM },
129 { "cmplwi", 0xfc200000, 0x28000000, Op_crfD | Op_A | Op_SIMM }, 129 { "cmplwi", 0xfc200000, 0x28000000, Op_crfD | Op_A | Op_SIMM },
130 { "cmpldi", 0xfc200000, 0x28200000, Op_crfD | Op_A | Op_SIMM }, 130 { "cmpldi", 0xfc200000, 0x28200000, Op_crfD | Op_A | Op_SIMM },
131 { "cmpwi", 0xfc200000, 0x2c000000, Op_crfD | Op_A | Op_SIMM }, 131 { "cmpwi", 0xfc200000, 0x2c000000, Op_crfD | Op_A | Op_SIMM },
132 { "cmpdi", 0xfc200000, 0x2c200000, Op_crfD | Op_A | Op_SIMM }, 132 { "cmpdi", 0xfc200000, 0x2c200000, Op_crfD | Op_A | Op_SIMM },
133 { "addic", 0xfc000000, 0x30000000, Op_D | Op_A | Op_SIMM }, 133 { "addic", 0xfc000000, 0x30000000, Op_D | Op_A | Op_SIMM },
134 { "addic.", 0xfc000000, 0x34000000, Op_D | Op_A | Op_SIMM }, 134 { "addic.", 0xfc000000, 0x34000000, Op_D | Op_A | Op_SIMM },
135 { "addi", 0xfc000000, 0x38000000, Op_D | Op_A | Op_SIMM }, 135 { "addi", 0xfc000000, 0x38000000, Op_D | Op_A | Op_SIMM },
136 { "addis", 0xfc000000, 0x3c000000, Op_D | Op_A | Op_SIMM }, 136 { "addis", 0xfc000000, 0x3c000000, Op_D | Op_A | Op_SIMM },
137 { "b", 0xfc000000, 0x40000000, Op_BC | Op_BD | Op_AA | Op_LK }, /* bc */ 137 { "b", 0xfc000000, 0x40000000, Op_BC | Op_BD | Op_AA | Op_LK }, /* bc */
138 { "sc", 0xffffffff, 0x44000002, 0 }, 138 { "sc", 0xffffffff, 0x44000002, 0 },
139 { "b", 0xfc000000, 0x48000000, Op_LI | Op_AA | Op_LK }, 139 { "b", 0xfc000000, 0x48000000, Op_LI | Op_AA | Op_LK },
140 140
141 { "rlwimi", 0xfc000000, 0x50000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc }, 141 { "rlwimi", 0xfc000000, 0x50000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc },
142 { "rlwinm", 0xfc000000, 0x54000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc }, 142 { "rlwinm", 0xfc000000, 0x54000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc },
143 { "rlwnm", 0xfc000000, 0x5c000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc }, 143 { "rlwnm", 0xfc000000, 0x5c000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc },
144 144
145 { "ori", 0xfc000000, 0x60000000, Op_S | Op_A | Op_UIMM }, 145 { "ori", 0xfc000000, 0x60000000, Op_S | Op_A | Op_UIMM },
146 { "oris", 0xfc000000, 0x64000000, Op_S | Op_A | Op_UIMM }, 146 { "oris", 0xfc000000, 0x64000000, Op_S | Op_A | Op_UIMM },
147 { "xori", 0xfc000000, 0x68000000, Op_S | Op_A | Op_UIMM }, 147 { "xori", 0xfc000000, 0x68000000, Op_S | Op_A | Op_UIMM },
148 { "xoris", 0xfc000000, 0x6c000000, Op_S | Op_A | Op_UIMM }, 148 { "xoris", 0xfc000000, 0x6c000000, Op_S | Op_A | Op_UIMM },
149 149
150 { "andi.", 0xfc000000, 0x70000000, Op_S | Op_A | Op_UIMM }, 150 { "andi.", 0xfc000000, 0x70000000, Op_S | Op_A | Op_UIMM },
151 { "andis.", 0xfc000000, 0x74000000, Op_S | Op_A | Op_UIMM }, 151 { "andis.", 0xfc000000, 0x74000000, Op_S | Op_A | Op_UIMM },
152 152
153 { "lwz", 0xfc000000, 0x80000000, Op_D | Op_dA }, 153 { "lwz", 0xfc000000, 0x80000000, Op_D | Op_dA },
154 { "lwzu", 0xfc000000, 0x84000000, Op_D | Op_dA }, 154 { "lwzu", 0xfc000000, 0x84000000, Op_D | Op_dA },
155 { "lbz", 0xfc000000, 0x88000000, Op_D | Op_dA }, 155 { "lbz", 0xfc000000, 0x88000000, Op_D | Op_dA },
156 { "lbzu", 0xfc000000, 0x8c000000, Op_D | Op_dA }, 156 { "lbzu", 0xfc000000, 0x8c000000, Op_D | Op_dA },
157 { "stw", 0xfc000000, 0x90000000, Op_ST | Op_dA }, 157 { "stw", 0xfc000000, 0x90000000, Op_ST | Op_dA },
158 { "stwu", 0xfc000000, 0x94000000, Op_ST | Op_dA }, 158 { "stwu", 0xfc000000, 0x94000000, Op_ST | Op_dA },
159 { "stb", 0xfc000000, 0x98000000, Op_ST | Op_dA }, 159 { "stb", 0xfc000000, 0x98000000, Op_ST | Op_dA },
160 { "stbu", 0xfc000000, 0x9c000000, Op_ST | Op_dA }, 160 { "stbu", 0xfc000000, 0x9c000000, Op_ST | Op_dA },
161 161
162 { "lhz", 0xfc000000, 0xa0000000, Op_D | Op_dA }, 162 { "lhz", 0xfc000000, 0xa0000000, Op_D | Op_dA },
163 { "lhzu", 0xfc000000, 0xa4000000, Op_D | Op_dA }, 163 { "lhzu", 0xfc000000, 0xa4000000, Op_D | Op_dA },
164 { "lha", 0xfc000000, 0xa8000000, Op_D | Op_dA }, 164 { "lha", 0xfc000000, 0xa8000000, Op_D | Op_dA },
165 { "lhau", 0xfc000000, 0xac000000, Op_D | Op_dA }, 165 { "lhau", 0xfc000000, 0xac000000, Op_D | Op_dA },
166 { "sth", 0xfc000000, 0xb0000000, Op_ST | Op_dA }, 166 { "sth", 0xfc000000, 0xb0000000, Op_ST | Op_dA },
167 { "sthu", 0xfc000000, 0xb4000000, Op_ST | Op_dA }, 167 { "sthu", 0xfc000000, 0xb4000000, Op_ST | Op_dA },
168 { "lmw", 0xfc000000, 0xb8000000, Op_D | Op_dA }, 168 { "lmw", 0xfc000000, 0xb8000000, Op_D | Op_dA },
169 { "stmw", 0xfc000000, 0xbc000000, Op_ST | Op_dA }, 169 { "stmw", 0xfc000000, 0xbc000000, Op_ST | Op_dA },
170 170
171 { "lfs", 0xfc000000, 0xc0000000, Op_D | Op_dA }, 171 { "lfs", 0xfc000000, 0xc0000000, Op_D | Op_dA },
172 { "lfsu", 0xfc000000, 0xc4000000, Op_D | Op_dA }, 172 { "lfsu", 0xfc000000, 0xc4000000, Op_D | Op_dA },
173 { "lfd", 0xfc000000, 0xc8000000, Op_D | Op_dA }, 173 { "lfd", 0xfc000000, 0xc8000000, Op_D | Op_dA },
174 { "lfdu", 0xfc000000, 0xcc000000, Op_D | Op_dA }, 174 { "lfdu", 0xfc000000, 0xcc000000, Op_D | Op_dA },
175 175
176 { "stfs", 0xfc000000, 0xd0000000, Op_ST | Op_dA }, 176 { "stfs", 0xfc000000, 0xd0000000, Op_ST | Op_dA },
177 { "stfsu", 0xfc000000, 0xd4000000, Op_ST | Op_dA }, 177 { "stfsu", 0xfc000000, 0xd4000000, Op_ST | Op_dA },
178 { "stfd", 0xfc000000, 0xd8000000, Op_ST | Op_dA }, 178 { "stfd", 0xfc000000, 0xd8000000, Op_ST | Op_dA },
179 { "stfdu", 0xfc000000, 0xdc000000, Op_ST | Op_dA }, 179 { "stfdu", 0xfc000000, 0xdc000000, Op_ST | Op_dA },
180 { "", 0x0, 0x0, 0 } 180 { "", 0x0, 0x0, 0 }
181 181
182}; 182};
183/* 13 * 4 = 4c */ 183/* 13 * 4 = 4c */
184const struct opcode opcodes_13[] = { 184const struct opcode opcodes_13[] = {
185/* 0x13 << 2 */ 185/* 0x13 << 2 */
186 { "mcrf", 0xfc0007fe, 0x4c000000, Op_crfD | Op_crfS }, 186 { "mcrf", 0xfc0007fe, 0x4c000000, Op_crfD | Op_crfS },
187 { "b", 0xfc0007fe, 0x4c000020, Op_BC | Op_LK }, /* bclr */ 187 { "b", 0xfc0007fe, 0x4c000020, Op_BC | Op_LK }, /* bclr */
188 { "crnor", 0xfc0007fe, 0x4c000042, Op_crbD | Op_crbA | Op_crbB }, 188 { "crnor", 0xfc0007fe, 0x4c000042, Op_crbD | Op_crbA | Op_crbB },
189 { "rfi", 0xfc0007fe, 0x4c000064, 0 }, 189 { "rfi", 0xfc0007fe, 0x4c000064, 0 },
190 { "crandc", 0xfc0007fe, 0x4c000102, Op_crbD | Op_crbA | Op_crbB }, 190 { "crandc", 0xfc0007fe, 0x4c000102, Op_crbD | Op_crbA | Op_crbB },
191 { "isync", 0xfc0007fe, 0x4c00012c, 0 }, 191 { "isync", 0xfc0007fe, 0x4c00012c, 0 },
192 { "crxor", 0xfc0007fe, 0x4c000182, Op_crbD | Op_crbA | Op_crbB }, 192 { "crxor", 0xfc0007fe, 0x4c000182, Op_crbD | Op_crbA | Op_crbB },
193 { "crnand", 0xfc0007fe, 0x4c0001c2, Op_crbD | Op_crbA | Op_crbB }, 193 { "crnand", 0xfc0007fe, 0x4c0001c2, Op_crbD | Op_crbA | Op_crbB },
194 { "crand", 0xfc0007fe, 0x4c000202, Op_crbD | Op_crbA | Op_crbB }, 194 { "crand", 0xfc0007fe, 0x4c000202, Op_crbD | Op_crbA | Op_crbB },
195 { "creqv", 0xfc0007fe, 0x4c000242, Op_crbD | Op_crbA | Op_crbB }, 195 { "creqv", 0xfc0007fe, 0x4c000242, Op_crbD | Op_crbA | Op_crbB },
196 { "crorc", 0xfc0007fe, 0x4c000342, Op_crbD | Op_crbA | Op_crbB }, 196 { "crorc", 0xfc0007fe, 0x4c000342, Op_crbD | Op_crbA | Op_crbB },
197 { "cror", 0xfc0007fe, 0x4c000382, Op_crbD | Op_crbA | Op_crbB }, 197 { "cror", 0xfc0007fe, 0x4c000382, Op_crbD | Op_crbA | Op_crbB },
198 { "b", 0xfc0007fe, 0x4c000420, Op_BC | Op_LK }, /* bcctr */ 198 { "b", 0xfc0007fe, 0x4c000420, Op_BC | Op_LK }, /* bcctr */
199 { "", 0x0, 0x0, 0 } 199 { "", 0x0, 0x0, 0 }
200}; 200};
201 201
202/* 1e * 4 = 78 */ 202/* 1e * 4 = 78 */
203const struct opcode opcodes_1e[] = { 203const struct opcode opcodes_1e[] = {
204 { "rldicl", 0xfc00001c, 0x78000000, Op_S | Op_A | Op_sh | Op_mb | Op_Rc }, 204 { "rldicl", 0xfc00001c, 0x78000000, Op_S | Op_A | Op_sh | Op_mb | Op_Rc },
205 { "rldicr", 0xfc00001c, 0x78000004, Op_S | Op_A | Op_sh | Op_me | Op_Rc }, 205 { "rldicr", 0xfc00001c, 0x78000004, Op_S | Op_A | Op_sh | Op_me | Op_Rc },
206 { "rldic", 0xfc00001c, 0x78000008, Op_S | Op_A | Op_sh | Op_mb | Op_Rc }, 206 { "rldic", 0xfc00001c, 0x78000008, Op_S | Op_A | Op_sh | Op_mb | Op_Rc },
207 { "rldimi", 0xfc00001c, 0x7800000c, Op_S | Op_A | Op_sh | Op_mb | Op_Rc }, 207 { "rldimi", 0xfc00001c, 0x7800000c, Op_S | Op_A | Op_sh | Op_mb | Op_Rc },
208 { "rldcl", 0xfc00003e, 0x78000010, Op_S | Op_A | Op_B | Op_mb | Op_Rc }, 208 { "rldcl", 0xfc00003e, 0x78000010, Op_S | Op_A | Op_B | Op_mb | Op_Rc },
209 { "rldcr", 0xfc00003e, 0x78000012, Op_S | Op_A | Op_B | Op_me | Op_Rc }, 209 { "rldcr", 0xfc00003e, 0x78000012, Op_S | Op_A | Op_B | Op_me | Op_Rc },
210 { "", 0x0, 0x0, 0 } 210 { "", 0x0, 0x0, 0 }
211}; 211};
212 212
213/* 1f * 4 = 7c */ 213/* 1f * 4 = 7c */
214const struct opcode opcodes_1f[] = { 214const struct opcode opcodes_1f[] = {
215/* 1f << 2 */ 215/* 1f << 2 */
216 { "cmpw", 0xfc2007fe, 0x7c000000, Op_crfD | Op_A | Op_B }, 216 { "cmpw", 0xfc2007fe, 0x7c000000, Op_crfD | Op_A | Op_B },
217 { "cmpd", 0xfc2007fe, 0x7c200000, Op_crfD | Op_A | Op_B }, 217 { "cmpd", 0xfc2007fe, 0x7c200000, Op_crfD | Op_A | Op_B },
218 { "tw", 0xfc0007fe, 0x7c000008, Op_TO | Op_A | Op_B }, 218 { "tw", 0xfc0007fe, 0x7c000008, Op_TO | Op_A | Op_B },
219 { "subfc", 0xfc0003fe, 0x7c000010, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 219 { "subfc", 0xfc0003fe, 0x7c000010, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
220 { "mulhdu", 0xfc0007fe, 0x7c000012, Op_D | Op_A | Op_B | Op_Rc }, 220 { "mulhdu", 0xfc0007fe, 0x7c000012, Op_D | Op_A | Op_B | Op_Rc },
221 { "addc", 0xfc0003fe, 0x7c000014, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 221 { "addc", 0xfc0003fe, 0x7c000014, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
222 { "mulhwu", 0xfc0007fe, 0x7c000016, Op_D | Op_A | Op_B | Op_Rc }, 222 { "mulhwu", 0xfc0007fe, 0x7c000016, Op_D | Op_A | Op_B | Op_Rc },
223 { "isellt", 0xfc0007ff, 0x7c00001e, Op_D | Op_A | Op_B }, 223 { "isellt", 0xfc0007ff, 0x7c00001e, Op_D | Op_A | Op_B },
224 { "iselgt", 0xfc0007ff, 0x7c00005e, Op_D | Op_A | Op_B }, 224 { "iselgt", 0xfc0007ff, 0x7c00005e, Op_D | Op_A | Op_B },
225 { "iseleq", 0xfc0007ff, 0x7c00009e, Op_D | Op_A | Op_B }, 225 { "iseleq", 0xfc0007ff, 0x7c00009e, Op_D | Op_A | Op_B },
226 226
227 { "mfcr", 0xfc0007fe, 0x7c000026, Op_D }, 227 { "mfcr", 0xfc0007fe, 0x7c000026, Op_D },
228 { "lwarx", 0xfc0007fe, 0x7c000028, Op_D | Op_A | Op_B }, 228 { "lwarx", 0xfc0007fe, 0x7c000028, Op_D | Op_A | Op_B },
229 { "ldx", 0xfc0007fe, 0x7c00002a, Op_D | Op_A | Op_B }, 229 { "ldx", 0xfc0007fe, 0x7c00002a, Op_D | Op_A | Op_B },
230 { "lwzx", 0xfc0007fe, 0x7c00002e, Op_D | Op_A | Op_B }, 230 { "lwzx", 0xfc0007fe, 0x7c00002e, Op_D | Op_A | Op_B },
231 { "slw", 0xfc0007fe, 0x7c000030, Op_D | Op_A | Op_B | Op_Rc }, 231 { "slw", 0xfc0007fe, 0x7c000030, Op_D | Op_A | Op_B | Op_Rc },
232 { "cntlzw", 0xfc0007fe, 0x7c000034, Op_D | Op_A | Op_Rc }, 232 { "cntlzw", 0xfc0007fe, 0x7c000034, Op_D | Op_A | Op_Rc },
233 { "sld", 0xfc0007fe, 0x7c000036, Op_D | Op_A | Op_B | Op_Rc }, 233 { "sld", 0xfc0007fe, 0x7c000036, Op_D | Op_A | Op_B | Op_Rc },
234 { "and", 0xfc0007fe, 0x7c000038, Op_D | Op_A | Op_B | Op_Rc }, 234 { "and", 0xfc0007fe, 0x7c000038, Op_D | Op_A | Op_B | Op_Rc },
235 { "cmplw", 0xfc2007fe, 0x7c000040, Op_crfD | Op_A | Op_B }, 235 { "cmplw", 0xfc2007fe, 0x7c000040, Op_crfD | Op_A | Op_B },
236 { "cmpld", 0xfc2007fe, 0x7c200040, Op_crfD | Op_A | Op_B }, 236 { "cmpld", 0xfc2007fe, 0x7c200040, Op_crfD | Op_A | Op_B },
237 { "subf", 0xfc0003fe, 0x7c000050, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 237 { "subf", 0xfc0003fe, 0x7c000050, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
238 { "ldux", 0xfc0007fe, 0x7c00006a, Op_D | Op_A | Op_B }, 238 { "ldux", 0xfc0007fe, 0x7c00006a, Op_D | Op_A | Op_B },
239 { "dcbst", 0xfc0007fe, 0x7c00006c, Op_A | Op_B }, 239 { "dcbst", 0xfc0007fe, 0x7c00006c, Op_A | Op_B },
240 { "lwzux", 0xfc0007fe, 0x7c00006e, Op_D | Op_A | Op_B }, 240 { "lwzux", 0xfc0007fe, 0x7c00006e, Op_D | Op_A | Op_B },
241 { "cntlzd", 0xfc0007fe, 0x7c000074, Op_S | Op_A | Op_Rc }, 241 { "cntlzd", 0xfc0007fe, 0x7c000074, Op_S | Op_A | Op_Rc },
242 { "andc", 0xfc0007fe, 0x7c000078, Op_S | Op_A | Op_B | Op_Rc }, 242 { "andc", 0xfc0007fe, 0x7c000078, Op_S | Op_A | Op_B | Op_Rc },
243 { "td", 0xfc0007fe, 0x7c000088, Op_TO | Op_A | Op_B }, 243 { "td", 0xfc0007fe, 0x7c000088, Op_TO | Op_A | Op_B },
244 { "mulhd", 0xfc0007fe, 0x7c000092, Op_D | Op_A | Op_B | Op_Rc }, 244 { "mulhd", 0xfc0007fe, 0x7c000092, Op_D | Op_A | Op_B | Op_Rc },
245 { "mulhw", 0xfc0007fe, 0x7c000096, Op_D | Op_A | Op_B | Op_Rc }, 245 { "mulhw", 0xfc0007fe, 0x7c000096, Op_D | Op_A | Op_B | Op_Rc },
246 { "mfmsr", 0xfc0007fe, 0x7c0000a6, Op_D }, 246 { "mfmsr", 0xfc0007fe, 0x7c0000a6, Op_D },
247 { "ldarx", 0xfc0007fe, 0x7c0000a8, Op_D | Op_A | Op_B }, 247 { "ldarx", 0xfc0007fe, 0x7c0000a8, Op_D | Op_A | Op_B },
248 { "dcbf", 0xfc0007fe, 0x7c0000ac, Op_A | Op_B }, 248 { "dcbf", 0xfc0007fe, 0x7c0000ac, Op_A | Op_B },
249 { "lbzx", 0xfc0007fe, 0x7c0000ae, Op_D | Op_A | Op_B }, 249 { "lbzx", 0xfc0007fe, 0x7c0000ae, Op_D | Op_A | Op_B },
250 { "neg", 0xfc0003fe, 0x7c0000d0, Op_D | Op_A | Op_OE | Op_Rc }, 250 { "neg", 0xfc0003fe, 0x7c0000d0, Op_D | Op_A | Op_OE | Op_Rc },
251 { "lbzux", 0xfc0007fe, 0x7c0000ee, Op_D | Op_A | Op_B }, 251 { "lbzux", 0xfc0007fe, 0x7c0000ee, Op_D | Op_A | Op_B },
252 { "nor", 0xfc0007fe, 0x7c0000f8, Op_S | Op_A | Op_B | Op_Rc }, 252 { "nor", 0xfc0007fe, 0x7c0000f8, Op_S | Op_A | Op_B | Op_Rc },
253 { "wrtee", 0xfc0003ff, 0x7c000106, Op_S }, 253 { "wrtee", 0xfc0003ff, 0x7c000106, Op_S },
254 { "subfe", 0xfc0003fe, 0x7c000110, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 254 { "subfe", 0xfc0003fe, 0x7c000110, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
255 { "adde", 0xfc0003fe, 0x7c000114, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 255 { "adde", 0xfc0003fe, 0x7c000114, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
256 { "mtcrf", 0xfc0007fe, 0x7c000120, Op_S | Op_CRM }, 256 { "mtcrf", 0xfc0007fe, 0x7c000120, Op_S | Op_CRM },
257 { "mtmsr", 0xfc0007fe, 0x7c000124, Op_S }, 257 { "mtmsr", 0xfc0007fe, 0x7c000124, Op_S },
258 { "stdx", 0xfc0007fe, 0x7c00012a, Op_ST | Op_A | Op_B }, 258 { "stdx", 0xfc0007fe, 0x7c00012a, Op_ST | Op_A | Op_B },
259 { "stwcx.", 0xfc0007ff, 0x7c00012d, Op_ST | Op_A | Op_B }, 259 { "stwcx.", 0xfc0007ff, 0x7c00012d, Op_ST | Op_A | Op_B },
260 { "stwx", 0xfc0007fe, 0x7c00012e, Op_ST | Op_A | Op_B }, 260 { "stwx", 0xfc0007fe, 0x7c00012e, Op_ST | Op_A | Op_B },
261 { "wrteei", 0xfc0003fe, 0x7c000146, 0 }, /* XXX: out of flags! */ 261 { "wrteei", 0xfc0003fe, 0x7c000146, 0 }, /* XXX: out of flags! */
262 { "stdux", 0xfc0007fe, 0x7c00016a, Op_ST | Op_A | Op_B }, 262 { "stdux", 0xfc0007fe, 0x7c00016a, Op_ST | Op_A | Op_B },
263 { "stwux", 0xfc0007fe, 0x7c00016e, Op_ST | Op_A | Op_B }, 263 { "stwux", 0xfc0007fe, 0x7c00016e, Op_ST | Op_A | Op_B },
264 { "subfze", 0xfc0003fe, 0x7c000190, Op_D | Op_A | Op_OE | Op_Rc }, 264 { "subfze", 0xfc0003fe, 0x7c000190, Op_D | Op_A | Op_OE | Op_Rc },
265 { "addze", 0xfc0003fe, 0x7c000194, Op_D | Op_A | Op_OE | Op_Rc }, 265 { "addze", 0xfc0003fe, 0x7c000194, Op_D | Op_A | Op_OE | Op_Rc },
266 { "mtsr", 0xfc0007fe, 0x7c0001a4, Op_S | Op_SR }, 266 { "mtsr", 0xfc0007fe, 0x7c0001a4, Op_S | Op_SR },
267 { "stdcx.", 0xfc0007ff, 0x7c0001ad, Op_ST | Op_A | Op_B }, 267 { "stdcx.", 0xfc0007ff, 0x7c0001ad, Op_ST | Op_A | Op_B },
268 { "stbx", 0xfc0007fe, 0x7c0001ae, Op_ST | Op_A | Op_B }, 268 { "stbx", 0xfc0007fe, 0x7c0001ae, Op_ST | Op_A | Op_B },
269 { "subfme", 0xfc0003fe, 0x7c0001d0, Op_D | Op_A | Op_OE | Op_Rc }, 269 { "subfme", 0xfc0003fe, 0x7c0001d0, Op_D | Op_A | Op_OE | Op_Rc },
270 { "mulld", 0xfc0003fe, 0x7c0001d2, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 270 { "mulld", 0xfc0003fe, 0x7c0001d2, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
271 { "addme", 0xfc0003fe, 0x7c0001d4, Op_D | Op_A | Op_OE | Op_Rc }, 271 { "addme", 0xfc0003fe, 0x7c0001d4, Op_D | Op_A | Op_OE | Op_Rc },
272 { "mullw", 0xfc0003fe, 0x7c0001d6, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 272 { "mullw", 0xfc0003fe, 0x7c0001d6, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
273 { "mtsrin", 0xfc0007fe, 0x7c0001e4, Op_S | Op_B }, 273 { "mtsrin", 0xfc0007fe, 0x7c0001e4, Op_S | Op_B },
274 { "dcbtst", 0xfc0007fe, 0x7c0001ec, Op_A | Op_B }, 274 { "dcbtst", 0xfc0007fe, 0x7c0001ec, Op_A | Op_B },
275 { "stbux", 0xfc0007fe, 0x7c0001ee, Op_ST | Op_A | Op_B }, 275 { "stbux", 0xfc0007fe, 0x7c0001ee, Op_ST | Op_A | Op_B },
276 { "add", 0xfc0003fe, 0x7c000214, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 276 { "add", 0xfc0003fe, 0x7c000214, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
277 { "dcbt", 0xfc0007fe, 0x7c00022c, Op_A | Op_B }, 277 { "dcbt", 0xfc0007fe, 0x7c00022c, Op_A | Op_B },
278 { "lhzx", 0xfc0007ff, 0x7c00022e, Op_D | Op_A | Op_B }, 278 { "lhzx", 0xfc0007ff, 0x7c00022e, Op_D | Op_A | Op_B },
279 { "eqv", 0xfc0007fe, 0x7c000238, Op_S | Op_A | Op_B | Op_Rc }, 279 { "eqv", 0xfc0007fe, 0x7c000238, Op_S | Op_A | Op_B | Op_Rc },
280 { "tlbie", 0xfc0007fe, 0x7c000264, Op_B }, 280 { "tlbie", 0xfc0007fe, 0x7c000264, Op_B },
281 { "eciwx", 0xfc0007fe, 0x7c00026c, Op_D | Op_A | Op_B }, 281 { "eciwx", 0xfc0007fe, 0x7c00026c, Op_D | Op_A | Op_B },
282 { "lhzux", 0xfc0007fe, 0x7c00026e, Op_D | Op_A | Op_B }, 282 { "lhzux", 0xfc0007fe, 0x7c00026e, Op_D | Op_A | Op_B },
283 { "xor", 0xfc0007fe, 0x7c000278, Op_S | Op_A | Op_B | Op_Rc }, 283 { "xor", 0xfc0007fe, 0x7c000278, Op_S | Op_A | Op_B | Op_Rc },
284 { "mfdcr", 0xfc0007fe, 0x7c000286, Op_D | Op_dcr }, 284 { "mfdcr", 0xfc0007fe, 0x7c000286, Op_D | Op_dcr },
285 { "mfspr", 0xfc0007fe, 0x7c0002a6, Op_D | Op_spr }, 285 { "mfspr", 0xfc0007fe, 0x7c0002a6, Op_D | Op_spr },
286 { "lwax", 0xfc0007fe, 0x7c0002aa, Op_D | Op_A | Op_B }, 286 { "lwax", 0xfc0007fe, 0x7c0002aa, Op_D | Op_A | Op_B },
287 { "lhax", 0xfc0007fe, 0x7c0002ae, Op_D | Op_A | Op_B }, 287 { "lhax", 0xfc0007fe, 0x7c0002ae, Op_D | Op_A | Op_B },
288 { "tlbia", 0xfc0007fe, 0x7c0002e4, 0 }, 288 { "tlbia", 0xfc0007fe, 0x7c0002e4, 0 },
289 { "mftb", 0xfc0007fe, 0x7c0002e6, Op_D | Op_tbr }, 289 { "mftb", 0xfc0007fe, 0x7c0002e6, Op_D | Op_tbr },
290 { "lwaux", 0xfc0007fe, 0x7c0002ea, Op_D | Op_A | Op_B }, 290 { "lwaux", 0xfc0007fe, 0x7c0002ea, Op_D | Op_A | Op_B },
291 { "lhaux", 0xfc0007fe, 0x7c0002ee, Op_D | Op_A | Op_B }, 291 { "lhaux", 0xfc0007fe, 0x7c0002ee, Op_D | Op_A | Op_B },
292 { "sthx", 0xfc0007fe, 0x7c00032e, Op_ST | Op_A | Op_B }, 292 { "sthx", 0xfc0007fe, 0x7c00032e, Op_ST | Op_A | Op_B },
293 { "orc", 0xfc0007fe, 0x7c000338, Op_S | Op_A | Op_B | Op_Rc }, 293 { "orc", 0xfc0007fe, 0x7c000338, Op_S | Op_A | Op_B | Op_Rc },
294 { "ecowx", 0xfc0007fe, 0x7c00036c, Op_ST | Op_A | Op_B | Op_Rc }, 294 { "ecowx", 0xfc0007fe, 0x7c00036c, Op_ST | Op_A | Op_B | Op_Rc },
295 { "slbie", 0xfc0007fc, 0x7c000364, Op_B }, 295 { "slbie", 0xfc0007fc, 0x7c000364, Op_B },
296 { "sthux", 0xfc0007fe, 0x7c00036e, Op_ST | Op_A | Op_B }, 296 { "sthux", 0xfc0007fe, 0x7c00036e, Op_ST | Op_A | Op_B },
297 { "or", 0xfc0007fe, 0x7c000378, Op_S | Op_A | Op_B | Op_Rc }, 297 { "or", 0xfc0007fe, 0x7c000378, Op_S | Op_A | Op_B | Op_Rc },
298 { "mtdcr", 0xfc0007fe, 0x7c000386, Op_S | Op_dcr }, 298 { "mtdcr", 0xfc0007fe, 0x7c000386, Op_S | Op_dcr },
299 { "divdu", 0xfc0003fe, 0x7c000392, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 299 { "divdu", 0xfc0003fe, 0x7c000392, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
300 { "divwu", 0xfc0003fe, 0x7c000396, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, 300 { "divwu", 0xfc0003fe, 0x7c000396, Op_D | Op_A | Op_B | Op_OE | Op_Rc },
301 { "mtspr", 0xfc0007fe, 0x7c0003a6, Op_S | Op_spr }, 301 { "mtspr", 0xfc0007fe, 0x7c0003a6, Op_S | Op_spr },
302 { "dcbi", 0xfc0007fe, 0x7c0003ac, Op_A | Op_B }, 302 { "dcbi", 0xfc0007fe, 0x7c0003ac, Op_A | Op_B },
303 { "nand", 0xfc0007fe, 0x7c0003b8, Op_S | Op_A | Op_B | Op_Rc }, 303 { "nand", 0xfc0007fe, 0x7c0003b8, Op_S | Op_A | Op_B | Op_Rc },
304 { "dcread", 0xfc0007fe, 0x7c0003cc, Op_D | Op_A | Op_B }, 304 { "dcread", 0xfc0007fe, 0x7c0003cc, Op_D | Op_A | Op_B },
305 { "divd", 0xfc0003fe, 0x7c0003d2, Op_S | Op_A | Op_B | Op_OE | Op_Rc }, 305 { "divd", 0xfc0003fe, 0x7c0003d2, Op_S | Op_A | Op_B | Op_OE | Op_Rc },
306 { "divw", 0xfc0003fe, 0x7c0003d6, Op_S | Op_A | Op_B | Op_OE | Op_Rc }, 306 { "divw", 0xfc0003fe, 0x7c0003d6, Op_S | Op_A | Op_B | Op_OE | Op_Rc },
307 { "slbia", 0xfc0003fe, 0x7c0003e4, Op_S | Op_A | Op_B | Op_OE | Op_Rc }, 307 { "slbia", 0xfc0003fe, 0x7c0003e4, Op_S | Op_A | Op_B | Op_OE | Op_Rc },
308 { "mcrxr", 0xfc0007fe, 0x7c000400, Op_crfD }, 308 { "mcrxr", 0xfc0007fe, 0x7c000400, Op_crfD },
309 { "lswx", 0xfc0007fe, 0x7c00042a, Op_D | Op_A | Op_B }, 309 { "lswx", 0xfc0007fe, 0x7c00042a, Op_D | Op_A | Op_B },
310 { "lwbrx", 0xfc0007fe, 0x7c00042c, Op_D | Op_A | Op_B }, 310 { "lwbrx", 0xfc0007fe, 0x7c00042c, Op_D | Op_A | Op_B },
311 { "lfsx", 0xfc0007fe, 0x7c00042e, Op_D | Op_A | Op_B }, 311 { "lfsx", 0xfc0007fe, 0x7c00042e, Op_D | Op_A | Op_B },
312 { "srw", 0xfc0007fe, 0x7c000430, Op_S | Op_A | Op_B | Op_Rc }, 312 { "srw", 0xfc0007fe, 0x7c000430, Op_S | Op_A | Op_B | Op_Rc },
313 { "srd", 0xfc0007fe, 0x7c000436, Op_S | Op_A | Op_B | Op_Rc }, 313 { "srd", 0xfc0007fe, 0x7c000436, Op_S | Op_A | Op_B | Op_Rc },
314 { "tlbsync", 0xfc0007fe, 0x7c00046c, 0 }, 314 { "tlbsync", 0xfc0007fe, 0x7c00046c, 0 },
315 { "lfsux", 0xfc0007fe, 0x7c00046e, Op_D | Op_A | Op_B }, 315 { "lfsux", 0xfc0007fe, 0x7c00046e, Op_D | Op_A | Op_B },
316 { "mfsr", 0xfc0007fe, 0x7c0004a6, Op_D | Op_SR }, 316 { "mfsr", 0xfc0007fe, 0x7c0004a6, Op_D | Op_SR },
317 { "lswi", 0xfc0007fe, 0x7c0004aa, Op_D | Op_A | Op_NB }, 317 { "lswi", 0xfc0007fe, 0x7c0004aa, Op_D | Op_A | Op_NB },
318 { "sync", 0xfc0007fe, 0x7c0004ac, 0 }, 318 { "sync", 0xfc0007fe, 0x7c0004ac, 0 },
319 { "lfdx", 0xfc0007fe, 0x7c0004ae, Op_D | Op_A | Op_B }, 319 { "lfdx", 0xfc0007fe, 0x7c0004ae, Op_D | Op_A | Op_B },
320 { "lfdux", 0xfc0007fe, 0x7c0004ee, Op_D | Op_A | Op_B }, 320 { "lfdux", 0xfc0007fe, 0x7c0004ee, Op_D | Op_A | Op_B },
321 { "mfsrin", 0xfc0007fe, 0x7c000526, Op_D | Op_B }, 321 { "mfsrin", 0xfc0007fe, 0x7c000526, Op_D | Op_B },
322 { "stswx", 0xfc0007fe, 0x7c00052a, Op_ST | Op_A | Op_B }, 322 { "stswx", 0xfc0007fe, 0x7c00052a, Op_ST | Op_A | Op_B },
323 { "stwbrx", 0xfc0007fe, 0x7c00052c, Op_ST | Op_A | Op_B }, 323 { "stwbrx", 0xfc0007fe, 0x7c00052c, Op_ST | Op_A | Op_B },
324 { "stfsx", 0xfc0007fe, 0x7c00052e, Op_ST | Op_A | Op_B }, 324 { "stfsx", 0xfc0007fe, 0x7c00052e, Op_ST | Op_A | Op_B },
325 { "stfsux", 0xfc0007fe, 0x7c00056e, Op_ST | Op_A | Op_B }, 325 { "stfsux", 0xfc0007fe, 0x7c00056e, Op_ST | Op_A | Op_B },
326 { "stswi", 0xfc0007fe, 0x7c0005aa, Op_ST | Op_A | Op_NB }, 326 { "stswi", 0xfc0007fe, 0x7c0005aa, Op_ST | Op_A | Op_NB },
327 { "stfdx", 0xfc0007fe, 0x7c0005ae, Op_ST | Op_A | Op_B }, 327 { "stfdx", 0xfc0007fe, 0x7c0005ae, Op_ST | Op_A | Op_B },
328 { "stfdux", 0xfc0007fe, 0x7c0005ee, Op_ST | Op_A | Op_B }, 328 { "stfdux", 0xfc0007fe, 0x7c0005ee, Op_ST | Op_A | Op_B },
329 { "lhbrx", 0xfc0007fe, 0x7c00062c, Op_D | Op_A | Op_B }, 329 { "lhbrx", 0xfc0007fe, 0x7c00062c, Op_D | Op_A | Op_B },
330 { "sraw", 0xfc0007fe, 0x7c000630, Op_S | Op_A | Op_B }, 330 { "sraw", 0xfc0007fe, 0x7c000630, Op_S | Op_A | Op_B },
331 { "srad", 0xfc0007fe, 0x7c000634, Op_S | Op_A | Op_B | Op_Rc }, 331 { "srad", 0xfc0007fe, 0x7c000634, Op_S | Op_A | Op_B | Op_Rc },
332 { "srawi", 0xfc0007fe, 0x7c000670, Op_S | Op_A | Op_rSH | Op_Rc }, 332 { "srawi", 0xfc0007fe, 0x7c000670, Op_S | Op_A | Op_rSH | Op_Rc },
333 { "sradi", 0xfc0007fc, 0x7c000674, Op_S | Op_A | Op_sh }, 333 { "sradi", 0xfc0007fc, 0x7c000674, Op_S | Op_A | Op_sh },
334 { "eieio", 0xfc0007fe, 0x7c0006ac, 0 }, 334 { "eieio", 0xfc0007fe, 0x7c0006ac, 0 },
335 { "tlbsx", 0xfc0007fe, 0x7c000724, Op_S | Op_A | Op_B | Op_Rc }, 335 { "tlbsx", 0xfc0007fe, 0x7c000724, Op_S | Op_A | Op_B | Op_Rc },
336 { "sthbrx", 0xfc0007fe, 0x7c00072c, Op_ST | Op_A | Op_B }, 336 { "sthbrx", 0xfc0007fe, 0x7c00072c, Op_ST | Op_A | Op_B },
337 { "extsh", 0xfc0007fe, 0x7c000734, Op_S | Op_A | Op_Rc }, 337 { "extsh", 0xfc0007fe, 0x7c000734, Op_S | Op_A | Op_Rc },
338 { "tlbre", 0xfc0007fe, 0x7c000764, Op_D | Op_A | Op_WS }, 338 { "tlbre", 0xfc0007fe, 0x7c000764, Op_D | Op_A | Op_WS },
339 { "extsb", 0xfc0007fe, 0x7c000774, Op_S | Op_A | Op_Rc }, 339 { "extsb", 0xfc0007fe, 0x7c000774, Op_S | Op_A | Op_Rc },
340 { "icbi", 0xfc0007fe, 0x7c0007ac, Op_A | Op_B }, 340 { "icbi", 0xfc0007fe, 0x7c0007ac, Op_A | Op_B },
341 { "tlbwe", 0xfc0007fe, 0x7c0007a4, Op_S | Op_A | Op_WS }, 341 { "tlbwe", 0xfc0007fe, 0x7c0007a4, Op_S | Op_A | Op_WS },
342 { "stfiwx", 0xfc0007fe, 0x7c0007ae, Op_ST | Op_A | Op_B }, 342 { "stfiwx", 0xfc0007fe, 0x7c0007ae, Op_ST | Op_A | Op_B },
343 { "extsw", 0xfc0007fe, 0x7c0007b4, Op_S | Op_A | Op_Rc }, 343 { "extsw", 0xfc0007fe, 0x7c0007b4, Op_S | Op_A | Op_Rc },
344 { "dcbz", 0xfc0007fe, 0x7c0007ec, Op_A | Op_B }, 344 { "dcbz", 0xfc0007fe, 0x7c0007ec, Op_A | Op_B },
345 { "", 0x0, 0x0, 0 } 345 { "", 0x0, 0x0, 0 }
346}; 346};
347 347
348/* 3a * 4 = e8 */ 348/* 3a * 4 = e8 */
349const struct opcode opcodes_3a[] = { 349const struct opcode opcodes_3a[] = {
350 { "ld", 0xfc000003, 0xe8000000, Op_D | Op_A | Op_ds }, 350 { "ld", 0xfc000003, 0xe8000000, Op_D | Op_A | Op_ds },
351 { "ldu", 0xfc000003, 0xe8000001, Op_D | Op_A | Op_ds }, 351 { "ldu", 0xfc000003, 0xe8000001, Op_D | Op_A | Op_ds },
352 { "lwa", 0xfc000003, 0xe8000002, Op_D | Op_A | Op_ds }, 352 { "lwa", 0xfc000003, 0xe8000002, Op_D | Op_A | Op_ds },
353 { "", 0x0, 0x0, 0 } 353 { "", 0x0, 0x0, 0 }
354}; 354};
355/* 3b * 4 = ec */ 355/* 3b * 4 = ec */
356const struct opcode opcodes_3b[] = { 356const struct opcode opcodes_3b[] = {
357 { "fdivs", 0xfc00003e, 0xec000024, Op_D | Op_A | Op_B | Op_Rc }, 357 { "fdivs", 0xfc00003e, 0xec000024, Op_D | Op_A | Op_B | Op_Rc },
358 { "fsubs", 0xfc00003e, 0xec000028, Op_D | Op_A | Op_B | Op_Rc }, 358 { "fsubs", 0xfc00003e, 0xec000028, Op_D | Op_A | Op_B | Op_Rc },
359 359
360 { "fadds", 0xfc00003e, 0xec00002a, Op_D | Op_A | Op_B | Op_Rc }, 360 { "fadds", 0xfc00003e, 0xec00002a, Op_D | Op_A | Op_B | Op_Rc },
361 { "fsqrts", 0xfc00003e, 0xec00002c, Op_D | Op_B | Op_Rc }, 361 { "fsqrts", 0xfc00003e, 0xec00002c, Op_D | Op_B | Op_Rc },
362 { "fres", 0xfc00003e, 0xec000030, Op_D | Op_B | Op_Rc }, 362 { "fres", 0xfc00003e, 0xec000030, Op_D | Op_B | Op_Rc },
363 { "fmuls", 0xfc00003e, 0xec000032, Op_D | Op_A | Op_C | Op_Rc }, 363 { "fmuls", 0xfc00003e, 0xec000032, Op_D | Op_A | Op_C | Op_Rc },
364 { "fmsubs", 0xfc00003e, 0xec000038, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 364 { "fmsubs", 0xfc00003e, 0xec000038, Op_D | Op_A | Op_B | Op_C | Op_Rc },
365 { "fmadds", 0xfc00003e, 0xec00003a, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 365 { "fmadds", 0xfc00003e, 0xec00003a, Op_D | Op_A | Op_B | Op_C | Op_Rc },
366 { "fnmsubs", 0xfc00003e, 0xec00003c, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 366 { "fnmsubs", 0xfc00003e, 0xec00003c, Op_D | Op_A | Op_B | Op_C | Op_Rc },
367 { "fnmadds", 0xfc00003e, 0xec00003e, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 367 { "fnmadds", 0xfc00003e, 0xec00003e, Op_D | Op_A | Op_B | Op_C | Op_Rc },
368 { "", 0x0, 0x0, 0 } 368 { "", 0x0, 0x0, 0 }
369}; 369};
370/* 3e * 4 = f8 */ 370/* 3e * 4 = f8 */
371const struct opcode opcodes_3e[] = { 371const struct opcode opcodes_3e[] = {
372 { "std", 0xfc000003, 0xf8000000, Op_ST | Op_A | Op_ds }, 372 { "std", 0xfc000003, 0xf8000000, Op_ST | Op_A | Op_ds },
373 { "stdu", 0xfc000003, 0xf8000001, Op_ST | Op_A | Op_ds }, 373 { "stdu", 0xfc000003, 0xf8000001, Op_ST | Op_A | Op_ds },
374 { "", 0x0, 0x0, 0 } 374 { "", 0x0, 0x0, 0 }
375}; 375};
376 376
377/* 3f * 4 = fc */ 377/* 3f * 4 = fc */
378const struct opcode opcodes_3f[] = { 378const struct opcode opcodes_3f[] = {
379 { "fcmpu", 0xfc0007fe, 0xfc000000, Op_crfD | Op_A | Op_B }, 379 { "fcmpu", 0xfc0007fe, 0xfc000000, Op_crfD | Op_A | Op_B },
380 { "frsp", 0xfc0007fe, 0xfc000018, Op_D | Op_B | Op_Rc }, 380 { "frsp", 0xfc0007fe, 0xfc000018, Op_D | Op_B | Op_Rc },
381 { "fctiw", 0xfc0007fe, 0xfc00001c, Op_D | Op_B | Op_Rc }, 381 { "fctiw", 0xfc0007fe, 0xfc00001c, Op_D | Op_B | Op_Rc },
382 { "fctiwz", 0xfc0007fe, 0xfc00001e, Op_D | Op_B | Op_Rc }, 382 { "fctiwz", 0xfc0007fe, 0xfc00001e, Op_D | Op_B | Op_Rc },
383 383
384 { "fdiv", 0xfc00003e, 0xfc000024, Op_D | Op_A | Op_B | Op_Rc }, 384 { "fdiv", 0xfc00003e, 0xfc000024, Op_D | Op_A | Op_B | Op_Rc },
385 { "fsub", 0xfc00003e, 0xfc000028, Op_D | Op_A | Op_B | Op_Rc }, 385 { "fsub", 0xfc00003e, 0xfc000028, Op_D | Op_A | Op_B | Op_Rc },
386 { "fadd", 0xfc00003e, 0xfc00002a, Op_D | Op_A | Op_B | Op_Rc }, 386 { "fadd", 0xfc00003e, 0xfc00002a, Op_D | Op_A | Op_B | Op_Rc },
387 { "fsqrt", 0xfc00003e, 0xfc00002c, Op_D | Op_B | Op_Rc }, 387 { "fsqrt", 0xfc00003e, 0xfc00002c, Op_D | Op_B | Op_Rc },
388 { "fsel", 0xfc00003e, 0xfc00002e, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 388 { "fsel", 0xfc00003e, 0xfc00002e, Op_D | Op_A | Op_B | Op_C | Op_Rc },
389 { "fmul", 0xfc00003e, 0xfc000032, Op_D | Op_A | Op_C | Op_Rc }, 389 { "fmul", 0xfc00003e, 0xfc000032, Op_D | Op_A | Op_C | Op_Rc },
390 { "frsqrte", 0xfc00003e, 0xfc000034, Op_D | Op_B | Op_Rc }, 390 { "frsqrte", 0xfc00003e, 0xfc000034, Op_D | Op_B | Op_Rc },
391 { "fmsub", 0xfc00003e, 0xfc000038, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 391 { "fmsub", 0xfc00003e, 0xfc000038, Op_D | Op_A | Op_B | Op_C | Op_Rc },
392 { "fmadd", 0xfc00003e, 0xfc00003a, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 392 { "fmadd", 0xfc00003e, 0xfc00003a, Op_D | Op_A | Op_B | Op_C | Op_Rc },
393 { "fnmsub", 0xfc00003e, 0xfc00003c, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 393 { "fnmsub", 0xfc00003e, 0xfc00003c, Op_D | Op_A | Op_B | Op_C | Op_Rc },
394 { "fnmadd", 0xfc00003e, 0xfc00003e, Op_D | Op_A | Op_B | Op_C | Op_Rc }, 394 { "fnmadd", 0xfc00003e, 0xfc00003e, Op_D | Op_A | Op_B | Op_C | Op_Rc },
395 395
396 { "fcmpo", 0xfc0007fe, 0xfc000040, Op_crfD | Op_A | Op_B }, 396 { "fcmpo", 0xfc0007fe, 0xfc000040, Op_crfD | Op_A | Op_B },
397 { "mtfsb1", 0xfc0007fe, 0xfc00004c, Op_crfD | Op_Rc }, 397 { "mtfsb1", 0xfc0007fe, 0xfc00004c, Op_crfD | Op_Rc },
398 { "fneg", 0xfc0007fe, 0xfc000050, Op_D | Op_B | Op_Rc }, 398 { "fneg", 0xfc0007fe, 0xfc000050, Op_D | Op_B | Op_Rc },
399 { "mcrfs", 0xfc0007fe, 0xfc000080, Op_D | Op_B | Op_Rc }, 399 { "mcrfs", 0xfc0007fe, 0xfc000080, Op_D | Op_B | Op_Rc },
400 { "mtfsb0", 0xfc0007fe, 0xfc00008c, Op_crfD | Op_Rc }, 400 { "mtfsb0", 0xfc0007fe, 0xfc00008c, Op_crfD | Op_Rc },
401 { "fmr", 0xfc0007fe, 0xfc000090, Op_D | Op_B | Op_Rc }, 401 { "fmr", 0xfc0007fe, 0xfc000090, Op_D | Op_B | Op_Rc },
402 { "mtfsfi", 0xfc0007fe, 0xfc00010c, 0 }, /* XXX: out of flags! */ 402 { "mtfsfi", 0xfc0007fe, 0xfc00010c, 0 }, /* XXX: out of flags! */
403 403
404 { "fnabs", 0xfc0007fe, 0xfc000110, Op_D | Op_B | Op_Rc }, 404 { "fnabs", 0xfc0007fe, 0xfc000110, Op_D | Op_B | Op_Rc },
405 { "fabs", 0xfc0007fe, 0xfc000210, Op_D | Op_B | Op_Rc }, 405 { "fabs", 0xfc0007fe, 0xfc000210, Op_D | Op_B | Op_Rc },
406 { "mffs", 0xfc0007fe, 0xfc00048e, Op_D | Op_B | Op_Rc }, 406 { "mffs", 0xfc0007fe, 0xfc00048e, Op_D | Op_B | Op_Rc },
407 { "mtfsf", 0xfc0007fe, 0xfc00058e, Op_FM | Op_B | Op_Rc }, 407 { "mtfsf", 0xfc0007fe, 0xfc00058e, Op_FM | Op_B | Op_Rc },
408 { "fctid", 0xfc0007fe, 0xfc00065c, Op_D | Op_B | Op_Rc }, 408 { "fctid", 0xfc0007fe, 0xfc00065c, Op_D | Op_B | Op_Rc },
409 { "fctidz", 0xfc0007fe, 0xfc00065e, Op_D | Op_B | Op_Rc }, 409 { "fctidz", 0xfc0007fe, 0xfc00065e, Op_D | Op_B | Op_Rc },
410 { "fcfid", 0xfc0007fe, 0xfc00069c, Op_D | Op_B | Op_Rc }, 410 { "fcfid", 0xfc0007fe, 0xfc00069c, Op_D | Op_B | Op_Rc },
411 { "", 0x0, 0x0, 0 } 411 { "", 0x0, 0x0, 0 }
412}; 412};
413 413
414 414
415struct specialreg { 415struct specialreg {
416 unsigned reg; 416 unsigned reg;
417 const char *name; 417 const char *name;
418}; 418};
419 419
420const struct specialreg sprregs[] = { 420const struct specialreg sprregs[] = {
421 { 0x000, "mq" }, 421 { 0x000, "mq" },
422 { 0x001, "xer" }, 422 { 0x001, "xer" },
423 { 0x008, "lr" }, 423 { 0x008, "lr" },
424 { 0x009, "ctr" }, 424 { 0x009, "ctr" },
425 { 0x012, "dsisr" }, 425 { 0x012, "dsisr" },
426 { 0x013, "dar" }, 426 { 0x013, "dar" },
427 { 0x016, "dec" }, 427 { 0x016, "dec" },
428 { 0x019, "sdr1" }, 428 { 0x019, "sdr1" },
429 { 0x01a, "srr0" }, 429 { 0x01a, "srr0" },
430 { 0x01b, "srr1" }, 430 { 0x01b, "srr1" },
431#ifdef PPC_IBM4XX 431#ifdef PPC_IBM4XX
432 { 0x100, "usprg0" }, 432 { 0x100, "usprg0" },
433#else 433#else
434 { 0x100, "vrsave" }, 434 { 0x100, "vrsave" },
435#endif 435#endif
436 { 0x110, "sprg0" }, 436 { 0x110, "sprg0" },
437 { 0x111, "sprg1" }, 437 { 0x111, "sprg1" },
438 { 0x112, "sprg2" }, 438 { 0x112, "sprg2" },
439 { 0x113, "sprg3" }, 439 { 0x113, "sprg3" },
440 { 0x114, "sprg4" }, 440 { 0x114, "sprg4" },
441 { 0x115, "sprg5" }, 441 { 0x115, "sprg5" },
442 { 0x116, "sprg6" }, 442 { 0x116, "sprg6" },
443 { 0x117, "sprg7" }, 443 { 0x117, "sprg7" },
444 { 0x118, "asr" }, 444 { 0x118, "asr" },
445 { 0x11a, "aer" }, 445 { 0x11a, "aer" },
446 { 0x11c, "tbl" }, 446 { 0x11c, "tbl" },
447 { 0x11d, "tbu" }, 447 { 0x11d, "tbu" },
448 { 0x11f, "pvr" }, 448 { 0x11f, "pvr" },
449 { 0x210, "ibat0u" }, 449 { 0x210, "ibat0u" },
450 { 0x211, "ibat0l" }, 450 { 0x211, "ibat0l" },
451 { 0x212, "ibat1u" }, 451 { 0x212, "ibat1u" },
452 { 0x213, "ibat1l" }, 452 { 0x213, "ibat1l" },
453 { 0x214, "ibat2u" }, 453 { 0x214, "ibat2u" },
454 { 0x215, "ibat2l" }, 454 { 0x215, "ibat2l" },
455 { 0x216, "ibat3u" }, 455 { 0x216, "ibat3u" },
456 { 0x217, "ibat3l" }, 456 { 0x217, "ibat3l" },
457 { 0x218, "dbat0u" }, 457 { 0x218, "dbat0u" },
458 { 0x219, "dbat0l" }, 458 { 0x219, "dbat0l" },
459 { 0x21a, "dbat1u" }, 459 { 0x21a, "dbat1u" },
460 { 0x21b, "dbat1l" }, 460 { 0x21b, "dbat1l" },
461 { 0x21c, "dbat2u" }, 461 { 0x21c, "dbat2u" },
462 { 0x21d, "dbat2l" }, 462 { 0x21d, "dbat2l" },
463 { 0x21e, "dbat3u" }, 463 { 0x21e, "dbat3u" },
464 { 0x21f, "dbat3l" }, 464 { 0x21f, "dbat3l" },
465 { 0x230, "ibat4u" }, 465 { 0x230, "ibat4u" },
466 { 0x231, "ibat4l" }, 466 { 0x231, "ibat4l" },
467 { 0x232, "ibat5u" }, 467 { 0x232, "ibat5u" },
468 { 0x233, "ibat5l" }, 468 { 0x233, "ibat5l" },
469 { 0x234, "ibat6u" }, 469 { 0x234, "ibat6u" },
470 { 0x235, "ibat6l" }, 470 { 0x235, "ibat6l" },
471 { 0x236, "ibat7u" }, 471 { 0x236, "ibat7u" },
472 { 0x237, "ibat7l" }, 472 { 0x237, "ibat7l" },
473 { 0x238, "dbat4u" }, 473 { 0x238, "dbat4u" },
474 { 0x239, "dbat4l" }, 474 { 0x239, "dbat4l" },
475 { 0x23a, "dbat5u" }, 475 { 0x23a, "dbat5u" },
476 { 0x23b, "dbat5l" }, 476 { 0x23b, "dbat5l" },
477 { 0x23c, "dbat6u" }, 477 { 0x23c, "dbat6u" },
478 { 0x23d, "dbat6l" }, 478 { 0x23d, "dbat6l" },
479 { 0x23e, "dbat7u" }, 479 { 0x23e, "dbat7u" },
480 { 0x23f, "dbat7l" }, 480 { 0x23f, "dbat7l" },
481 { 0x3b0, "zpr" }, 481 { 0x3b0, "zpr" },
482 { 0x3b1, "pid" }, 482 { 0x3b1, "pid" },
483 { 0x3b3, "ccr0" }, 483 { 0x3b3, "ccr0" },
484 { 0x3b4, "iac3" }, 484 { 0x3b4, "iac3" },
485 { 0x3b5, "iac4" }, 485 { 0x3b5, "iac4" },
486 { 0x3b6, "dvc1" }, 486 { 0x3b6, "dvc1" },
487 { 0x3b7, "dvc2" }, 487 { 0x3b7, "dvc2" },
488 { 0x3b9, "sgr" }, 488 { 0x3b9, "sgr" },
489 { 0x3ba, "dcwr" }, 489 { 0x3ba, "dcwr" },
490 { 0x3bb, "sler" }, 490 { 0x3bb, "sler" },
491 { 0x3bc, "su0r" }, 491 { 0x3bc, "su0r" },
492 { 0x3bd, "dbcr1" }, 492 { 0x3bd, "dbcr1" },
493 { 0x3d3, "icdbdr" }, 493 { 0x3d3, "icdbdr" },
494 { 0x3d4, "esr" }, 494 { 0x3d4, "esr" },
495 { 0x3d5, "dear" }, 495 { 0x3d5, "dear" },
496 { 0x3d6, "evpr" }, 496 { 0x3d6, "evpr" },
497 { 0x3d8, "tsr" }, 497 { 0x3d8, "tsr" },
498 { 0x3da, "tcr" }, 498 { 0x3da, "tcr" },
499 { 0x3db, "pit" }, 499 { 0x3db, "pit" },
500 { 0x3de, "srr2" }, 500 { 0x3de, "srr2" },
501 { 0x3df, "srr3" }, 501 { 0x3df, "srr3" },
502#ifdef PPC_IBM4XX 502#ifdef PPC_IBM4XX
503 { 0x3f0, "dbsr" }, 503 { 0x3f0, "dbsr" },
504 { 0x3f2, "dbcr0" }, 504 { 0x3f2, "dbcr0" },
505 { 0x3f4, "iac1" }, 505 { 0x3f4, "iac1" },
506 { 0x3f5, "iac2" }, 506 { 0x3f5, "iac2" },
507 { 0x3f6, "dac1" }, 507 { 0x3f6, "dac1" },
508 { 0x3f7, "dac2" }, 508 { 0x3f7, "dac2" },
509#else 509#else
510 { 0x3f0, "hid0" }, 510 { 0x3f0, "hid0" },
511 { 0x3f1, "hid1" }, 511 { 0x3f1, "hid1" },
512 { 0x3f2, "iabr" }, 512 { 0x3f2, "iabr" },
513 { 0x3f3, "hid2" }, 513 { 0x3f3, "hid2" },
514 { 0x3f5, "dabr" }, 514 { 0x3f5, "dabr" },
515 { 0x3f6, "msscr0" }, 515 { 0x3f6, "msscr0" },
516 { 0x3f7, "msscr1" }, 516 { 0x3f7, "msscr1" },
517#endif 517#endif
518 { 0x3f9, "l2cr" }, 518 { 0x3f9, "l2cr" },
519 { 0x3fa, "dccr" }, 519 { 0x3fa, "dccr" },
520 { 0x3fb, "iccr" }, 520 { 0x3fb, "iccr" },
521 { 0x3ff, "pir" }, 521 { 0x3ff, "pir" },
522 { 0, NULL } 522 { 0, NULL }
523}; 523};
524 524
525const struct specialreg dcrregs[] = { 525const struct specialreg dcrregs[] = {
526 { 0x010, "sdram0_cfgaddr" }, 526 { 0x010, "sdram0_cfgaddr" },
527 { 0x011, "sdram0_cfgdata" }, 527 { 0x011, "sdram0_cfgdata" },
528 { 0x012, "ebc0_cfgaddr" }, 528 { 0x012, "ebc0_cfgaddr" },
529 { 0x013, "ebc0_cfgdata" }, 529 { 0x013, "ebc0_cfgdata" },
530 { 0x014, "dcp0_cfgaddr" }, 530 { 0x014, "dcp0_cfgaddr" },
531 { 0x015, "dcp0_cfgdata" }, 531 { 0x015, "dcp0_cfgdata" },
532 { 0x018, "ocm0_isarc" }, 532 { 0x018, "ocm0_isarc" },
533 { 0x019, "ocm0_iscntl" }, 533 { 0x019, "ocm0_iscntl" },
534 { 0x01a, "ocm0_dsarc" }, 534 { 0x01a, "ocm0_dsarc" },
535 { 0x01b, "ocm0_dscntl" }, 535 { 0x01b, "ocm0_dscntl" },
536 { 0x084, "plb0_besr" }, 536 { 0x084, "plb0_besr" },
537 { 0x086, "plb0_bear" }, 537 { 0x086, "plb0_bear" },
538 { 0x087, "plb0_acr" }, 538 { 0x087, "plb0_acr" },
539 { 0x0a0, "pob0_besr0" }, 539 { 0x0a0, "pob0_besr0" },
540 { 0x0a2, "pob0_bear" }, 540 { 0x0a2, "pob0_bear" },
541 { 0x0a4, "pob0_besr1" }, 541 { 0x0a4, "pob0_besr1" },
542 { 0x0b0, "cpc0_pllmr" }, 542 { 0x0b0, "cpc0_pllmr" },
543 { 0x0b1, "cpc0_cr0" }, 543 { 0x0b1, "cpc0_cr0" },
544 { 0x0b2, "cpc0_cr1" }, 544 { 0x0b2, "cpc0_cr1" },
545 { 0x0b4, "cpc0_psr" }, 545 { 0x0b4, "cpc0_psr" },
546 { 0x0b5, "cpc0_jtagid" }, 546 { 0x0b5, "cpc0_jtagid" },
547 { 0x0b8, "cpc0_sr" }, 547 { 0x0b8, "cpc0_sr" },
548 { 0x0b9, "cpc0_er" }, 548 { 0x0b9, "cpc0_er" },
549 { 0x0ba, "cpc0_fr" }, 549 { 0x0ba, "cpc0_fr" },
550 { 0x0c0, "uic0_sr" }, 550 { 0x0c0, "uic0_sr" },
551 { 0x0c2, "uic0_er" }, 551 { 0x0c2, "uic0_er" },
552 { 0x0c3, "uic0_cr" }, 552 { 0x0c3, "uic0_cr" },
553 { 0x0c4, "uic0_pr" }, 553 { 0x0c4, "uic0_pr" },
554 { 0x0c5, "uic0_tr" }, 554 { 0x0c5, "uic0_tr" },
555 { 0x0c6, "uic0_msr" }, 555 { 0x0c6, "uic0_msr" },
556 { 0x0c7, "uic0_vr" }, 556 { 0x0c7, "uic0_vr" },
557 { 0x0c8, "uic0_vcr" }, 557 { 0x0c8, "uic0_vcr" },
558 { 0x100, "dma0_cr0" }, 558 { 0x100, "dma0_cr0" },
559 { 0x101, "dma0_ct0" }, 559 { 0x101, "dma0_ct0" },
560 { 0x102, "dma0_da0" }, 560 { 0x102, "dma0_da0" },
561 { 0x103, "dma0_sa0" }, 561 { 0x103, "dma0_sa0" },
562 { 0x104, "dma0_sg0" }, 562 { 0x104, "dma0_sg0" },
563 { 0x108, "dma0_cr1" }, 563 { 0x108, "dma0_cr1" },
564 { 0x109, "dma0_ct1" }, 564 { 0x109, "dma0_ct1" },
565 { 0x10a, "dma0_da1" }, 565 { 0x10a, "dma0_da1" },
566 { 0x10b, "dma0_sa1" }, 566 { 0x10b, "dma0_sa1" },
567 { 0x10c, "dma0_sg1" }, 567 { 0x10c, "dma0_sg1" },
568 { 0x110, "dma0_cr2" }, 568 { 0x110, "dma0_cr2" },
569 { 0x111, "dma0_ct2" }, 569 { 0x111, "dma0_ct2" },
570 { 0x112, "dma0_da2" }, 570 { 0x112, "dma0_da2" },
571 { 0x113, "dma0_sa2" }, 571 { 0x113, "dma0_sa2" },
572 { 0x114, "dma0_sg2" }, 572 { 0x114, "dma0_sg2" },
573 { 0x118, "dma0_cr3" }, 573 { 0x118, "dma0_cr3" },
574 { 0x119, "dma0_ct3" }, 574 { 0x119, "dma0_ct3" },
575 { 0x11a, "dma0_da3" }, 575 { 0x11a, "dma0_da3" },
576 { 0x11b, "dma0_sa3" }, 576 { 0x11b, "dma0_sa3" },
577 { 0x11c, "dma0_sg3" }, 577 { 0x11c, "dma0_sg3" },
578 { 0x120, "dma0_sr" }, 578 { 0x120, "dma0_sr" },
579 { 0x123, "dma0_sgc" }, 579 { 0x123, "dma0_sgc" },
580 { 0x125, "dma0_slp" }, 580 { 0x125, "dma0_slp" },
581 { 0x126, "dma0_pol" }, 581 { 0x126, "dma0_pol" },
582 { 0x180, "mal0_cfg" }, 582 { 0x180, "mal0_cfg" },
583 { 0x181, "mal0_esr" }, 583 { 0x181, "mal0_esr" },
584 { 0x182, "mal0_ier" }, 584 { 0x182, "mal0_ier" },
585 { 0x184, "mal0_txcasr" }, 585 { 0x184, "mal0_txcasr" },
586 { 0x185, "mal0_txcarr" }, 586 { 0x185, "mal0_txcarr" },
587 { 0x186, "mal0_txeobisr" }, 587 { 0x186, "mal0_txeobisr" },
588 { 0x187, "mal0_txdeir" }, 588 { 0x187, "mal0_txdeir" },
589 { 0x190, "mal0_rxcasr" }, 589 { 0x190, "mal0_rxcasr" },
590 { 0x191, "mal0_rxcarr" }, 590 { 0x191, "mal0_rxcarr" },
591 { 0x192, "mal0_rxeobisr" }, 591 { 0x192, "mal0_rxeobisr" },
592 { 0x193, "mal0_rxdeir" }, 592 { 0x193, "mal0_rxdeir" },
593 { 0x1a0, "mal0_txctp0r" }, 593 { 0x1a0, "mal0_txctp0r" },
594 { 0x1a1, "mal0_txctp1r" }, 594 { 0x1a1, "mal0_txctp1r" },
595 { 0x1a2, "mal0_txctp2r" }, 595 { 0x1a2, "mal0_txctp2r" },
596 { 0x1a3, "mal0_txctp3r" }, 596 { 0x1a3, "mal0_txctp3r" },
597 { 0x1c0, "mal0_rxctp0r" }, 597 { 0x1c0, "mal0_rxctp0r" },
598 { 0x1e0, "mal0_rcbs0" }, 598 { 0x1e0, "mal0_rcbs0" },
599 { 0, NULL } 599 { 0, NULL }
600}; 600};
601 601
602static const char *condstr[8] = { 602static const char *condstr[8] = {
603 "ge", "le", "ne", "ns", "lt", "gt", "eq", "so" 603 "ge", "le", "ne", "ns", "lt", "gt", "eq", "so"
604}; 604};
605 605
606 606
607void 607void
608op_ill(instr_t instr, vaddr_t loc) 608op_ill(instr_t instr, vaddr_t loc)
609{ 609{
610 db_printf("illegal instruction %x\n", instr); 610 db_printf("illegal instruction %x\n", instr);
611} 611}
612 612
613u_int32_t 613u_int32_t
614extract_field(u_int32_t value, u_int32_t base, u_int32_t width) 614extract_field(u_int32_t value, u_int32_t base, u_int32_t width)
615{ 615{
616 u_int32_t mask = (1 << width) - 1; 616 u_int32_t mask = (1 << width) - 1;
617 return ((value >> base) & mask); 617 return ((value >> base) & mask);
618} 618}
619 619
620const struct opcode * search_op(const struct opcode *); 620const struct opcode * search_op(const struct opcode *);
621 621
622void 622void
623disasm_fields(const struct opcode *popcode, instr_t instr, vaddr_t loc) 623disasm_fields(const struct opcode *popcode, instr_t instr, vaddr_t loc)
624{ 624{
625 enum function_mask func; 625 enum function_mask func;
626 626
627 func = popcode->func; 627 func = popcode->func;
628 if (func & Op_BC) { 628 if (func & Op_BC) {
629 u_int BO, BI; 629 u_int BO, BI;
630 BO = extract_field(instr, 31 - 10, 5); 630 BO = extract_field(instr, 31 - 10, 5);
631 BI = extract_field(instr, 31 - 15, 5); 631 BI = extract_field(instr, 31 - 15, 5);
632 func &= ~Op_BC; 632 func &= ~Op_BC;
633 if (BO & 4) { 633 if (BO & 4) {
634 /* standard, no decrement */ 634 /* standard, no decrement */
635 if (BO & 16) { 635 if (BO & 16) {
636 if (popcode->code == 0x40000000) { 636 if (popcode->code == 0x40000000) {
637 db_printf("c"); 637 db_printf("c");
638 func |= Op_BO | Op_BI; 638 func |= Op_BO | Op_BI;
639 } 639 }
640 } 640 }
641 else { 641 else {
642 db_printf("%s", 642 db_printf("%s",
643 condstr[((BO & 8) >> 1) + (BI & 3)]); 643 condstr[((BO & 8) >> 1) + (BI & 3)]);
644 if (BI >= 4) 644 if (BI >= 4)
645 func |= Op_crfS; 645 func |= Op_crfS;
646 } 646 }
647 } 647 }
648 else { 648 else {
649 /* decrement and branch */ 649 /* decrement and branch */
650 if (BO & 2) 650 if (BO & 2)
651 db_printf("dz"); 651 db_printf("dz");
652 else 652 else
653 db_printf("dnz"); 653 db_printf("dnz");
654 if ((BO & 24) == 0) 654 if ((BO & 24) == 0)
655 db_printf("f"); 655 db_printf("f");
656 else if ((BO & 24) == 8) 656 else if ((BO & 24) == 8)
657 db_printf("t"); 657 db_printf("t");
658 else 658 else
659 func |= Op_BI; 659 func |= Op_BI;
660 } 660 }
661 if (popcode->code == 0x4c000020) 661 if (popcode->code == 0x4c000020)
662 db_printf("lr"); 662 db_printf("lr");
663 else if (popcode->code == 0x4c000420) 663 else if (popcode->code == 0x4c000420)
664 db_printf("ctr"); 664 db_printf("ctr");
665 if ((BO & 20) != 20 && (func & Op_BO) == 0) 665 if ((BO & 20) != 20 && (func & Op_BO) == 0)
666 func |= Op_BP; /* branch prediction hint */ 666 func |= Op_BP; /* branch prediction hint */
667 } 667 }
668 if (func & Op_OE) { 668 if (func & Op_OE) {
669 u_int OE; 669 u_int OE;
670 OE = extract_field(instr, 31 - 21, 1); 670 OE = extract_field(instr, 31 - 21, 1);
671 if (OE) { 671 if (OE) {
672 db_printf("o"); 672 db_printf("o");
673 } 673 }
674 func &= ~Op_OE; 674 func &= ~Op_OE;
675 } 675 }
676 switch (func & Op_LKM) { 676 switch (func & Op_LKM) {
677 case Op_Rc: 677 case Op_Rc:
678 if (instr & 0x1) 678 if (instr & 0x1)
679 db_printf("."); 679 db_printf(".");
680 break; 680 break;
681 case Op_AA: 681 case Op_AA:
682 if (instr & 0x1) 682 if (instr & 0x1)
683 db_printf("l"); 683 db_printf("l");
684 if (instr & 0x2) { 684 if (instr & 0x2) {
685 db_printf("a"); 685 db_printf("a");
686 loc = 0; /* Absolute address */ 686 loc = 0; /* Absolute address */
687 } 687 }
688 break; 688 break;
689 case Op_LK: 689 case Op_LK:
690 if (instr & 0x1) 690 if (instr & 0x1)
691 db_printf("l"); 691 db_printf("l");
692 break; 692 break;
693 default: 693 default:
694 func &= ~Op_LKM; 694 func &= ~Op_LKM;
695 } 695 }
696 if (func & Op_BP) { 696 if (func & Op_BP) {
697 int y; 697 int y;
698 y = (instr & 0x200000) != 0; 698 y = (instr & 0x200000) != 0;
699 if (popcode->code == 0x40000000) { 699 if (popcode->code == 0x40000000) {
700 int BD; 700 int BD;
701 BD = extract_field(instr, 31 - 29, 14); 701 BD = extract_field(instr, 31 - 29, 14);
702 BD = BD << 18; 702 BD = BD << 18;
703 BD = BD >> 16; 703 BD = BD >> 16;
704 BD += loc; 704 BD += loc;
705 if ((vaddr_t)BD < loc) 705 if ((vaddr_t)BD < loc)
706 y ^= 1; 706 y ^= 1;
707 } 707 }
708 db_printf("%c", y ? '+' : '-'); 708 db_printf("%c", y ? '+' : '-');
709 func &= ~Op_BP; 709 func &= ~Op_BP;
710 } 710 }
711 db_printf("\t"); 711 db_printf("\t");
712 712
713 /* XXX: special cases here, out of flags in a 32bit word. */ 713 /* XXX: special cases here, out of flags in a 32bit word. */
714 if (strcmp(popcode->name, "wrteei") == 0) { 714 if (strcmp(popcode->name, "wrteei") == 0) {
715 int E; 715 int E;
716 E = extract_field(instr, 31 - 16, 5); 716 E = extract_field(instr, 31 - 16, 5);
717 db_printf("%d", E); 717 db_printf("%d", E);
718 return; 718 return;
719 } 719 }
720 else if (strcmp(popcode->name, "mtfsfi") == 0) { 720 else if (strcmp(popcode->name, "mtfsfi") == 0) {
721 u_int UI; 721 u_int UI;
722 UI = extract_field(instr, 31 - 8, 3); 722 UI = extract_field(instr, 31 - 8, 3);
723 db_printf("crf%u, ", UI); 723 db_printf("crf%u, ", UI);
724 UI = extract_field(instr, 31 - 19, 4); 724 UI = extract_field(instr, 31 - 19, 4);
725 db_printf("0x%x", UI); 725 db_printf("0x%x", UI);
726 } 726 }
727 /* XXX: end of special cases here. */ 727 /* XXX: end of special cases here. */
728 728
729 if ((func & Op_FM) == Op_FM) { 729 if ((func & Op_FM) == Op_FM) {
730 u_int FM; 730 u_int FM;
731 FM = extract_field(instr, 31 - 14, 8); 731 FM = extract_field(instr, 31 - 14, 8);
732 db_printf("0x%x, ", FM); 732 db_printf("0x%x, ", FM);
733 func &= ~Op_FM; 733 func &= ~Op_FM;
734 } 734 }
735 if (func & Op_D) { /* Op_ST is the same */ 735 if (func & Op_D) { /* Op_ST is the same */
736 u_int D; 736 u_int D;
737 D = extract_field(instr, 31 - 10, 5); 737 D = extract_field(instr, 31 - 10, 5);
738 db_printf("r%d, ", D); 738 db_printf("r%d, ", D);
739 func &= ~Op_D; 739 func &= ~Op_D;
740 } 740 }
741 if (func & Op_crbD) { 741 if (func & Op_crbD) {
742 u_int crbD; 742 u_int crbD;
743 crbD = extract_field(instr, 31 - 10, 5); 743 crbD = extract_field(instr, 31 - 10, 5);
744 db_printf("crb%d, ", crbD); 744 db_printf("crb%d, ", crbD);
745 func &= ~Op_crbD; 745 func &= ~Op_crbD;
746 } 746 }
747 if (func & Op_crfD) { 747 if (func & Op_crfD) {
748 u_int crfD; 748 u_int crfD;
749 crfD = extract_field(instr, 31 - 8, 3); 749 crfD = extract_field(instr, 31 - 8, 3);
750 db_printf("crf%d, ", crfD); 750 db_printf("crf%d, ", crfD);
751 func &= ~Op_crfD; 751 func &= ~Op_crfD;
752 } 752 }
753 if (func & Op_TO) { 753 if (func & Op_TO) {
754 u_int TO; 754 u_int TO;
755 TO = extract_field(instr, 31 - 10, 1); 755 TO = extract_field(instr, 31 - 10, 1);
756 db_printf("%d, ", TO); 756 db_printf("%d, ", TO);
757 func &= ~Op_TO; 757 func &= ~Op_TO;
758 } 758 }
759 if (func & Op_crfS) { 759 if (func & Op_crfS) {
760 u_int crfS; 760 u_int crfS;
761 crfS = extract_field(instr, 31 - 13, 3); 761 crfS = extract_field(instr, 31 - 13, 3);
762 db_printf("crf%d, ", crfS); 762 db_printf("crf%d, ", crfS);
763 func &= ~Op_crfS; 763 func &= ~Op_crfS;
764 } 764 }
765 if (func & Op_CRM) { 765 if (func & Op_CRM) {
766 u_int CRM; 766 u_int CRM;
767 CRM = extract_field(instr, 31 - 19, 8); 767 CRM = extract_field(instr, 31 - 19, 8);
768 db_printf("0x%x, ", CRM); 768 db_printf("0x%x, ", CRM);
769 func &= ~Op_CRM; 769 func &= ~Op_CRM;
770 } 770 }
771 if (func & Op_BO) { 771 if (func & Op_BO) {
772 u_int BO; 772 u_int BO;
773 BO = extract_field(instr, 31 - 10, 5); 773 BO = extract_field(instr, 31 - 10, 5);
774 db_printf("%d, ", BO); 774 db_printf("%d, ", BO);
775 func &= ~Op_BO; 775 func &= ~Op_BO;
776 } 776 }
777 if (func & Op_BI) { 777 if (func & Op_BI) {
778 u_int BI; 778 u_int BI;
779 BI = extract_field(instr, 31 - 15, 5); 779 BI = extract_field(instr, 31 - 15, 5);
780 db_printf("%d, ", BI); 780 db_printf("%d, ", BI);
781 func &= ~Op_BI; 781 func &= ~Op_BI;
782 } 782 }
783 if (func & Op_dA) { /* register A indirect with displacement */ 783 if (func & Op_dA) { /* register A indirect with displacement */
784 u_int A; 784 u_int A;
785 A = extract_field(instr, 31 - 31, 16); 785 A = extract_field(instr, 31 - 31, 16);
786 if (A & 0x8000) { 786 if (A & 0x8000) {
787 db_printf("-"); 787 db_printf("-");
788 A = 0x10000-A; 788 A = 0x10000-A;
789 } 789 }
790 db_printf("0x%x", A); 790 db_printf("0x%x", A);
791 A = extract_field(instr, 31 - 15, 5); 791 A = extract_field(instr, 31 - 15, 5);
792 db_printf("(r%d)", A); 792 db_printf("(r%d)", A);
793 func &= ~Op_dA; 793 func &= ~Op_dA;
794 } 794 }
795 if (func & Op_spr) { 795 if (func & Op_spr) {
796 u_int spr; 796 u_int spr;
797 u_int sprl; 797 u_int sprl;
798 u_int sprh; 798 u_int sprh;
799 const struct specialreg *regs; 799 const struct specialreg *regs;
800 int i; 800 int i;
801 sprl = extract_field(instr, 31 - 15, 5); 801 sprl = extract_field(instr, 31 - 15, 5);
802 sprh = extract_field(instr, 31 - 20, 5); 802 sprh = extract_field(instr, 31 - 20, 5);
803 spr = sprh << 5 | sprl; 803 spr = sprh << 5 | sprl;
804 804
805 /* ugly hack - out of bitfields in the function mask */ 805 /* ugly hack - out of bitfields in the function mask */
806 if (popcode->name[2] == 'd') /* m.Dcr */ 806 if (popcode->name[2] == 'd') /* m.Dcr */
807 regs = dcrregs; 807 regs = dcrregs;
808 else 808 else
809 regs = sprregs; 809 regs = sprregs;
810 for (i = 0; regs[i].name != NULL; i++) 810 for (i = 0; regs[i].name != NULL; i++)
811 if (spr == regs[i].reg) 811 if (spr == regs[i].reg)
812 break; 812 break;
813 if (regs[i].name == NULL) 813 if (regs[i].name == NULL)
814 db_printf("[unknown special reg (%d)]", spr); 814 db_printf("[unknown special reg (%d)]", spr);
815 else 815 else
816 db_printf("%s", regs[i].name); 816 db_printf("%s", regs[i].name);
817 817
818 if (popcode->name[1] == 't') /* spr is destination */ 818 if (popcode->name[1] == 't') /* spr is destination */
819 db_printf(", "); 819 db_printf(", ");
820 func &= ~Op_spr; 820 func &= ~Op_spr;
821 } 821 }
822 if (func & Op_SR) { 822 if (func & Op_SR) {
823 u_int SR; 823 u_int SR;
824 SR = extract_field(instr, 31 - 15, 3); 824 SR = extract_field(instr, 31 - 15, 3);
825 db_printf("sr%d", SR); 825 db_printf("sr%d", SR);
826 if (popcode->name[1] == 't') /* SR is destination */ 826 if (popcode->name[1] == 't') /* SR is destination */
827 db_printf(", "); 827 db_printf(", ");
828 func &= ~Op_SR; 828 func &= ~Op_SR;
829 } 829 }
830 if (func & Op_A) { 830 if (func & Op_A) {
831 u_int A; 831 u_int A;
832 A = extract_field(instr, 31 - 15, 5); 832 A = extract_field(instr, 31 - 15, 5);
833 db_printf("r%d, ", A); 833 db_printf("r%d, ", A);
834 func &= ~Op_A; 834 func &= ~Op_A;
835 } 835 }
836 if (func & Op_S) { 836 if (func & Op_S) {
837 u_int D; 837 u_int D;
838 D = extract_field(instr, 31 - 10, 5); 838 D = extract_field(instr, 31 - 10, 5);
839 db_printf("r%d, ", D); 839 db_printf("r%d, ", D);
840 func &= ~Op_S; 840 func &= ~Op_S;
841 } 841 }
842 if (func & Op_C) { 842 if (func & Op_C) {
843 u_int C; 843 u_int C;
844 C = extract_field(instr, 31 - 25, 5); 844 C = extract_field(instr, 31 - 25, 5);
845 db_printf("r%d, ", C); 845 db_printf("r%d, ", C);
846 func &= ~Op_C; 846 func &= ~Op_C;
847 } 847 }
848 if (func & Op_B) { 848 if (func & Op_B) {
849 u_int B; 849 u_int B;
850 B = extract_field(instr, 31 - 20, 5); 850 B = extract_field(instr, 31 - 20, 5);
851 db_printf("r%d", B); 851 db_printf("r%d", B);
852 func &= ~Op_B; 852 func &= ~Op_B;
853 } 853 }
854 if (func & Op_crbA) { 854 if (func & Op_crbA) {
855 u_int crbA; 855 u_int crbA;
856 crbA = extract_field(instr, 31 - 15, 5); 856 crbA = extract_field(instr, 31 - 15, 5);
857 db_printf("%d, ", crbA); 857 db_printf("%d, ", crbA);
858 func &= ~Op_crbA; 858 func &= ~Op_crbA;
859 } 859 }
860 if (func & Op_crbB) { 860 if (func & Op_crbB) {
861 u_int crbB; 861 u_int crbB;
862 crbB = extract_field(instr, 31 - 20, 5); 862 crbB = extract_field(instr, 31 - 20, 5);
863 db_printf("%d, ", crbB); 863 db_printf("%d, ", crbB);
864 func &= ~Op_crbB; 864 func &= ~Op_crbB;
865 } 865 }
866 if (func & Op_LI) { 866 if (func & Op_LI) {
867 int LI; 867 int LI;
868 LI = extract_field(instr, 31 - 29, 24); 868 LI = extract_field(instr, 31 - 29, 24);
869 /* Need to sign extend and shift up 2, then add addr */ 869 /* Need to sign extend and shift up 2, then add addr */
870 LI = LI << 8; 870 LI = LI << 8;
871 LI = LI >> 6; 871 LI = LI >> 6;
872 LI += loc; 872 LI += loc;
873 db_printsym(LI, DB_STGY_ANY, db_printf); 873 db_printsym(LI, DB_STGY_ANY, db_printf);
874 func &= ~Op_LI; 874 func &= ~Op_LI;
875 } 875 }
876 switch (func & Op_SIMM) { 876 switch (func & Op_SIMM) {
877 u_int IMM; 877 u_int IMM;
878 case Op_SIMM: /* same as Op_d */ 878 case Op_SIMM: /* same as Op_d */
879 IMM = extract_field(instr, 31 - 31, 16); 879 IMM = extract_field(instr, 31 - 31, 16);
880 if (IMM & 0x8000) { 880 if (IMM & 0x8000) {
881 db_printf("-"); 881 db_printf("-");
882 IMM = 0x10000-IMM; 882 IMM = 0x10000-IMM;
883 } 883 }
884 func &= ~Op_SIMM; 884 func &= ~Op_SIMM;
885 goto common; 885 goto common;
886 case Op_UIMM: 886 case Op_UIMM:
887 IMM = extract_field(instr, 31 - 31, 16); 887 IMM = extract_field(instr, 31 - 31, 16);
888 func &= ~Op_UIMM; 888 func &= ~Op_UIMM;
889 goto common; 889 goto common;
890 common: 890 common:
891 db_printf("0x%x", IMM); 891 db_printf("0x%x", IMM);
892 break; 892 break;
893 default: 893 default:
894 ; 894 ;
895 } 895 }
896 if (func & Op_BD) { 896 if (func & Op_BD) {
897 int BD; 897 int BD;
898 BD = extract_field(instr, 31 - 29, 14); 898 BD = extract_field(instr, 31 - 29, 14);
899 /* Need to sign extend and shift up 2, then add addr */ 899 /* Need to sign extend and shift up 2, then add addr */
900 BD = BD << 18; 900 BD = BD << 18;
901 BD = BD >> 16; 901 BD = BD >> 16;
902 BD += loc; 902 BD += loc;
903 db_printsym(BD, DB_STGY_ANY, db_printf); 903 db_printsym(BD, DB_STGY_ANY, db_printf);
904 func &= ~Op_BD; 904 func &= ~Op_BD;
905 } 905 }
906 if (func & Op_ds) { 906 if (func & Op_ds) {
907 u_int ds; 907 u_int ds;
908 ds = extract_field(instr, 31 - 29, 14) << 2; 908 ds = extract_field(instr, 31 - 29, 14) << 2;
909 db_printf("0x%x", ds); 909 db_printf("0x%x", ds);
910 func &= ~Op_ds; 910 func &= ~Op_ds;
911 } 911 }
912 if (func & Op_me) { 912 if (func & Op_me) {
913 u_int me, mel, meh; 913 u_int me, mel, meh;
914 mel = extract_field(instr, 31 - 25, 4); 914 mel = extract_field(instr, 31 - 25, 4);
915 meh = extract_field(instr, 31 - 26, 1); 915 meh = extract_field(instr, 31 - 26, 1);
916 me = meh << 4 | mel; 916 me = meh << 4 | mel;
917 db_printf(", 0x%x", me); 917 db_printf(", 0x%x", me);
918 func &= ~Op_me; 918 func &= ~Op_me;
919 } 919 }
920 if ((func & Op_SH) && (func & Op_sh_mb_sh)) { 920 if ((func & Op_SH) && (func & Op_sh_mb_sh)) {
921 u_int SH; 921 u_int SH;
922 SH = extract_field(instr, 31 - 20, 5); 922 SH = extract_field(instr, 31 - 20, 5);
923 db_printf("%d", SH); 923 db_printf("%d", SH);
924 } 924 }
925 if ((func & Op_MB) && (func & Op_sh_mb_sh)) { 925 if ((func & Op_MB) && (func & Op_sh_mb_sh)) {
926 u_int MB; 926 u_int MB;
927 u_int ME; 927 u_int ME;
928 MB = extract_field(instr, 31 - 25, 5); 928 MB = extract_field(instr, 31 - 25, 5);
929 db_printf(", %d", MB); 929 db_printf(", %d", MB);
930 ME = extract_field(instr, 31 - 30, 5); 930 ME = extract_field(instr, 31 - 30, 5);
931 db_printf(", %d", ME); 931 db_printf(", %d", ME);
932 } 932 }
933 if ((func & Op_sh) && ! (func & Op_sh_mb_sh)) { 933 if ((func & Op_sh) && ! (func & Op_sh_mb_sh)) {
934 u_int sh, shl, shh; 934 u_int sh, shl, shh;
935 shl = extract_field(instr, 31 - 19, 4); 935 shl = extract_field(instr, 31 - 19, 4);
936 shh = extract_field(instr, 31 - 20, 1); 936 shh = extract_field(instr, 31 - 20, 1);
937 sh = shh << 4 | shl; 937 sh = shh << 4 | shl;
938 db_printf(", %d", sh); 938 db_printf(", %d", sh);
939 } 939 }
940 if ((func & Op_mb) && ! (func & Op_sh_mb_sh)) { 940 if ((func & Op_mb) && ! (func & Op_sh_mb_sh)) {
941 u_int mb, mbl, mbh; 941 u_int mb, mbl, mbh;
942 mbl = extract_field(instr, 31 - 25, 4); 942 mbl = extract_field(instr, 31 - 25, 4);
943 mbh = extract_field(instr, 31 - 26, 1); 943 mbh = extract_field(instr, 31 - 26, 1);
944 mb = mbh << 4 | mbl; 944 mb = mbh << 4 | mbl;
945 db_printf(", %d", mb); 945 db_printf(", %d", mb);
946 } 946 }
947 if ((func & Op_me) && ! (func & Op_sh_mb_sh)) { 947 if ((func & Op_me) && ! (func & Op_sh_mb_sh)) {
948 u_int me, mel, meh; 948 u_int me, mel, meh;
949 mel = extract_field(instr, 31 - 25, 4); 949 mel = extract_field(instr, 31 - 25, 4);
950 meh = extract_field(instr, 31 - 26, 1); 950 meh = extract_field(instr, 31 - 26, 1);
951 me = meh << 4 | mel; 951 me = meh << 4 | mel;
952 db_printf(", %d", me); 952 db_printf(", %d", me);
953 } 953 }
954 if (func & Op_tbr) { 954 if (func & Op_tbr) {
955 u_int tbr; 955 u_int tbr;
956 u_int tbrl; 956 u_int tbrl;
957 u_int tbrh; 957 u_int tbrh;
958 const char *reg; 958 const char *reg;
959 tbrl = extract_field(instr, 31 - 15, 5); 959 tbrl = extract_field(instr, 31 - 15, 5);
960 tbrh = extract_field(instr, 31 - 20, 5); 960 tbrh = extract_field(instr, 31 - 20, 5);
961 tbr = tbrh << 5 | tbrl; 961 tbr = tbrh << 5 | tbrl;
962 962
963 switch (tbr) { 963 switch (tbr) {
964 case 268: 964 case 268:
965 reg = "tbl"; 965 reg = "tbl";
966 break; 966 break;
967 case 269: 967 case 269:
968 reg = "tbu"; 968 reg = "tbu";
969 break; 969 break;
970 default: 970 default:
971 reg = 0; 971 reg = 0;
972 } 972 }
973 if (reg == 0) 973 if (reg == 0)
974 db_printf(", [unknown tbr %d ]", tbr); 974 db_printf(", [unknown tbr %d ]", tbr);
975 else 975 else
976 db_printf(", %s", reg); 976 db_printf(", %s", reg);
977 func &= ~Op_tbr; 977 func &= ~Op_tbr;
978 } 978 }
979 if (func & Op_NB) { 979 if (func & Op_NB) {
980 u_int NB; 980 u_int NB;
981 NB = extract_field(instr, 31 - 20, 5); 981 NB = extract_field(instr, 31 - 20, 5);
982 if (NB == 0) 982 if (NB == 0)
983 NB = 32; 983 NB = 32;
984 db_printf(", %d", NB); 984 db_printf(", %d", NB);
985 func &= ~Op_SR; 985 func &= ~Op_SR;
986 } 986 }
987} 987}
988 988
989void 989void
990op_base(instr_t instr, vaddr_t loc) 990op_base(instr_t instr, vaddr_t loc)
991{ 991{
992 dis_ppc(opcodes, instr, loc); 992 dis_ppc(opcodes, instr, loc);
993} 993}
994 994
995void 995void
996op_cl_x13(instr_t instr, vaddr_t loc) 996op_cl_x13(instr_t instr, vaddr_t loc)
997{ 997{
998 dis_ppc(opcodes_13, instr, loc); 998 dis_ppc(opcodes_13, instr, loc);
999} 999}
1000 1000
1001void 1001void
1002op_cl_x1e(instr_t instr, vaddr_t loc) 1002op_cl_x1e(instr_t instr, vaddr_t loc)
1003{ 1003{
1004 dis_ppc(opcodes_1e, instr, loc); 1004 dis_ppc(opcodes_1e, instr, loc);
1005} 1005}
1006 1006
1007void 1007void
1008op_cl_x1f(instr_t instr, vaddr_t loc) 1008op_cl_x1f(instr_t instr, vaddr_t loc)
1009{ 1009{
1010 dis_ppc(opcodes_1f, instr, loc); 1010 dis_ppc(opcodes_1f, instr, loc);
1011} 1011}
1012 1012
1013void 1013void
1014op_cl_x3a(instr_t instr, vaddr_t loc) 1014op_cl_x3a(instr_t instr, vaddr_t loc)
1015{ 1015{
1016 dis_ppc(opcodes_3a, instr, loc); 1016 dis_ppc(opcodes_3a, instr, loc);
1017} 1017}
1018 1018
1019void 1019void
1020op_cl_x3b(instr_t instr, vaddr_t loc) 1020op_cl_x3b(instr_t instr, vaddr_t loc)
1021{ 1021{
1022 dis_ppc(opcodes_3b, instr, loc); 1022 dis_ppc(opcodes_3b, instr, loc);
1023} 1023}
1024 1024
1025void 1025void
1026op_cl_x3e(instr_t instr, vaddr_t loc) 1026op_cl_x3e(instr_t instr, vaddr_t loc)
1027{ 1027{
1028 dis_ppc(opcodes_3e, instr, loc); 1028 dis_ppc(opcodes_3e, instr, loc);
1029} 1029}
1030 1030
1031void 1031void
1032op_cl_x3f(instr_t instr, vaddr_t loc) 1032op_cl_x3f(instr_t instr, vaddr_t loc)
1033{ 1033{
1034 dis_ppc(opcodes_3f, instr, loc); 1034 dis_ppc(opcodes_3f, instr, loc);
1035} 1035}
1036 1036
1037void 1037void
1038dis_ppc(const struct opcode *opcodeset, instr_t instr, vaddr_t loc) 1038dis_ppc(const struct opcode *opcodeset, instr_t instr, vaddr_t loc)
1039{ 1039{
1040 const struct opcode *op; 1040 const struct opcode *op;
1041 int found = 0; 1041 int found = 0;
1042 int i; 1042 int i;
1043 1043
1044 for (i = 0, op = &opcodeset[0]; 1044 for (i = 0, op = &opcodeset[0];
1045 found == 0 && op->mask != 0; 1045 found == 0 && op->mask != 0;
1046 i++, op = &opcodeset[i]) { 1046 i++, op = &opcodeset[i]) {
1047 if ((instr & op->mask) == op->code) { 1047 if ((instr & op->mask) == op->code) {
1048 found = 1; 1048 found = 1;
1049 db_printf("%s", op->name); 1049 db_printf("%s", op->name);
1050 disasm_fields(op, instr, loc); 1050 disasm_fields(op, instr, loc);
1051 return; 1051 return;
1052 } 1052 }
1053 } 1053 }
1054 op_ill(instr, loc); 1054 op_ill(instr, loc);
1055} 1055}
1056 1056
1057db_addr_t 1057db_addr_t
1058db_disasm(db_addr_t loc, bool extended) 1058db_disasm(db_addr_t loc, bool extended)
1059{ 1059{
1060 int class; 1060 int class;
1061 instr_t opcode; 1061 instr_t opcode;
1062 opcode = *(instr_t *)(loc); 1062
 1063 db_read_bytes(loc, sizeof(opcode), (char *)&opcode);
1063 class = opcode >> 26; 1064 class = opcode >> 26;
1064 (opcodes_base[class])(opcode, loc); 1065 (opcodes_base[class])(opcode, loc);
1065 1066
1066 return (loc + 4); 1067 return (loc + 4);
1067} 1068}
1068 1069
1069vaddr_t opc_disasm(vaddr_t loc, int); 1070vaddr_t opc_disasm(vaddr_t loc, int);
1070 1071
1071vaddr_t 1072vaddr_t
1072opc_disasm(vaddr_t loc, int xin) 1073opc_disasm(vaddr_t loc, int xin)
1073{ 1074{
1074 int class; 1075 int class;
1075 instr_t opcode; 1076 instr_t opcode;
1076 opcode = xin; 1077 opcode = xin;
1077 class = opcode >> 26; 1078 class = opcode >> 26;
1078 (opcodes_base[class])(opcode, loc); 1079 (opcodes_base[class])(opcode, loc);
1079 1080
1080 return (loc + 4); 1081 return (loc + 4);
1081} 1082}
cvs diff -r1.61 -r1.62 src/sys/arch/powerpc/powerpc/db_trace.c (switch to unified diff)

--- src/sys/arch/powerpc/powerpc/db_trace.c 2023/04/12 17:53:32 1.61
+++ src/sys/arch/powerpc/powerpc/db_trace.c 2023/04/12 19:47:41 1.62
@@ -1,331 +1,349 @@ @@ -1,331 +1,349 @@
1/* $NetBSD: db_trace.c,v 1.61 2023/04/12 17:53:32 riastradh Exp $ */ 1/* $NetBSD: db_trace.c,v 1.62 2023/04/12 19:47:41 riastradh Exp $ */
2/* $OpenBSD: db_trace.c,v 1.3 1997/03/21 02:10:48 niklas Exp $ */ 2/* $OpenBSD: db_trace.c,v 1.3 1997/03/21 02:10:48 niklas Exp $ */
3 3
4/* 4/*
5 * Mach Operating System 5 * Mach Operating System
6 * Copyright (c) 1992 Carnegie Mellon University 6 * Copyright (c) 1992 Carnegie Mellon University
7 * All Rights Reserved. 7 * All Rights Reserved.
8 * 8 *
9 * Permission to use, copy, modify and distribute this software and its 9 * Permission to use, copy, modify and distribute this software and its
10 * documentation is hereby granted, provided that both the copyright 10 * documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the 11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions 12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation. 13 * thereof, and that both notices appear in supporting documentation.
14 * 14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
17 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 17 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 * 18 *
19 * Carnegie Mellon requests users of this software to return to 19 * Carnegie Mellon requests users of this software to return to
20 * 20 *
21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
22 * School of Computer Science 22 * School of Computer Science
23 * Carnegie Mellon University 23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890 24 * Pittsburgh PA 15213-3890
25 * 25 *
26 * any improvements or extensions that they make and grant Carnegie Mellon 26 * any improvements or extensions that they make and grant Carnegie Mellon
27 * the rights to redistribute these changes. 27 * the rights to redistribute these changes.
28 */ 28 */
29 29
30#include <sys/cdefs.h> 30#include <sys/cdefs.h>
31__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.61 2023/04/12 17:53:32 riastradh Exp $"); 31__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.62 2023/04/12 19:47:41 riastradh Exp $");
32 32
33#ifdef _KERNEL_OPT 33#ifdef _KERNEL_OPT
34#include "opt_ppcarch.h" 34#include "opt_ppcarch.h"
35#endif 35#endif
36 36
37#include <sys/param.h> 37#include <sys/param.h>
38#include <sys/proc.h> 38#include <sys/proc.h>
39#include <sys/kernel.h> 39#include <sys/kernel.h>
40 40
41#include <uvm/uvm_extern.h> 41#include <uvm/uvm_extern.h>
42 42
43#include <machine/db_machdep.h> 43#include <machine/db_machdep.h>
44#include <machine/pmap.h> 44#include <machine/pmap.h>
45 45
46#include <powerpc/pcb.h> 46#include <powerpc/pcb.h>
47#include <powerpc/psl.h> 47#include <powerpc/psl.h>
48#include <powerpc/spr.h> 48#include <powerpc/spr.h>
49#if defined (PPC_OEA) || defined(PPC_OEA64) || defined (PPC_OEA64_BRIDGE) 49#if defined (PPC_OEA) || defined(PPC_OEA64) || defined (PPC_OEA64_BRIDGE)
50#include <powerpc/oea/spr.h> 50#include <powerpc/oea/spr.h>
51#elif defined(PPC_IBM4XX) 51#elif defined(PPC_IBM4XX)
52#include <powerpc/ibm4xx/spr.h> 52#include <powerpc/ibm4xx/spr.h>
53#elif defined(PPC_BOOKE) 53#elif defined(PPC_BOOKE)
54#include <powerpc/booke/spr.h> 54#include <powerpc/booke/spr.h>
55#else 55#else
56#ifdef _KERNEL 56#ifdef _KERNEL
57#error unknown powerpc variants 57#error unknown powerpc variants
58#endif 58#endif
59#endif 59#endif
60 60
61#ifndef _KERNEL /* crash(8) */ 61#ifndef _KERNEL /* crash(8) */
62#include <unistd.h> 62#include <unistd.h>
63#define PAGE_SIZE ((unsigned)sysconf(_SC_PAGESIZE)) 63#define PAGE_SIZE ((unsigned)sysconf(_SC_PAGESIZE))
64#endif 64#endif
65 65
66#include <ddb/db_access.h> 66#include <ddb/db_access.h>
67#include <ddb/db_interface.h> 67#include <ddb/db_interface.h>
68#include <ddb/db_proc.h> 68#include <ddb/db_proc.h>
69#include <ddb/db_sym.h> 69#include <ddb/db_sym.h>
70#include <ddb/db_variables.h> 70#include <ddb/db_variables.h>
71 71
 72#define R(P) \
 73({ \
 74 __typeof__(*(P)) __db_tmp; \
 75 db_read_bytes((db_addr_t)(P), sizeof(*(P)), (char *)&__db_tmp); \
 76 __db_tmp; \
 77})
 78
72const struct db_variable db_regs[] = { 79const struct db_variable db_regs[] = {
73 { "r0", (long *)&ddb_regs.r[0], FCN_NULL, NULL }, 80 { "r0", (long *)&ddb_regs.r[0], FCN_NULL, NULL },
74 { "r1", (long *)&ddb_regs.r[1], FCN_NULL, NULL }, 81 { "r1", (long *)&ddb_regs.r[1], FCN_NULL, NULL },
75 { "r2", (long *)&ddb_regs.r[2], FCN_NULL, NULL }, 82 { "r2", (long *)&ddb_regs.r[2], FCN_NULL, NULL },
76 { "r3", (long *)&ddb_regs.r[3], FCN_NULL, NULL }, 83 { "r3", (long *)&ddb_regs.r[3], FCN_NULL, NULL },
77 { "r4", (long *)&ddb_regs.r[4], FCN_NULL, NULL }, 84 { "r4", (long *)&ddb_regs.r[4], FCN_NULL, NULL },
78 { "r5", (long *)&ddb_regs.r[5], FCN_NULL, NULL }, 85 { "r5", (long *)&ddb_regs.r[5], FCN_NULL, NULL },
79 { "r6", (long *)&ddb_regs.r[6], FCN_NULL, NULL }, 86 { "r6", (long *)&ddb_regs.r[6], FCN_NULL, NULL },
80 { "r7", (long *)&ddb_regs.r[7], FCN_NULL, NULL }, 87 { "r7", (long *)&ddb_regs.r[7], FCN_NULL, NULL },
81 { "r8", (long *)&ddb_regs.r[8], FCN_NULL, NULL }, 88 { "r8", (long *)&ddb_regs.r[8], FCN_NULL, NULL },
82 { "r9", (long *)&ddb_regs.r[9], FCN_NULL, NULL }, 89 { "r9", (long *)&ddb_regs.r[9], FCN_NULL, NULL },
83 { "r10", (long *)&ddb_regs.r[10], FCN_NULL, NULL }, 90 { "r10", (long *)&ddb_regs.r[10], FCN_NULL, NULL },
84 { "r11", (long *)&ddb_regs.r[11], FCN_NULL, NULL }, 91 { "r11", (long *)&ddb_regs.r[11], FCN_NULL, NULL },
85 { "r12", (long *)&ddb_regs.r[12], FCN_NULL, NULL }, 92 { "r12", (long *)&ddb_regs.r[12], FCN_NULL, NULL },
86 { "r13", (long *)&ddb_regs.r[13], FCN_NULL, NULL }, 93 { "r13", (long *)&ddb_regs.r[13], FCN_NULL, NULL },
87 { "r14", (long *)&ddb_regs.r[14], FCN_NULL, NULL }, 94 { "r14", (long *)&ddb_regs.r[14], FCN_NULL, NULL },
88 { "r15", (long *)&ddb_regs.r[15], FCN_NULL, NULL }, 95 { "r15", (long *)&ddb_regs.r[15], FCN_NULL, NULL },
89 { "r16", (long *)&ddb_regs.r[16], FCN_NULL, NULL }, 96 { "r16", (long *)&ddb_regs.r[16], FCN_NULL, NULL },
90 { "r17", (long *)&ddb_regs.r[17], FCN_NULL, NULL }, 97 { "r17", (long *)&ddb_regs.r[17], FCN_NULL, NULL },
91 { "r18", (long *)&ddb_regs.r[18], FCN_NULL, NULL }, 98 { "r18", (long *)&ddb_regs.r[18], FCN_NULL, NULL },
92 { "r19", (long *)&ddb_regs.r[19], FCN_NULL, NULL }, 99 { "r19", (long *)&ddb_regs.r[19], FCN_NULL, NULL },
93 { "r20", (long *)&ddb_regs.r[20], FCN_NULL, NULL }, 100 { "r20", (long *)&ddb_regs.r[20], FCN_NULL, NULL },
94 { "r21", (long *)&ddb_regs.r[21], FCN_NULL, NULL }, 101 { "r21", (long *)&ddb_regs.r[21], FCN_NULL, NULL },
95 { "r22", (long *)&ddb_regs.r[22], FCN_NULL, NULL }, 102 { "r22", (long *)&ddb_regs.r[22], FCN_NULL, NULL },
96 { "r23", (long *)&ddb_regs.r[23], FCN_NULL, NULL }, 103 { "r23", (long *)&ddb_regs.r[23], FCN_NULL, NULL },
97 { "r24", (long *)&ddb_regs.r[24], FCN_NULL, NULL }, 104 { "r24", (long *)&ddb_regs.r[24], FCN_NULL, NULL },
98 { "r25", (long *)&ddb_regs.r[25], FCN_NULL, NULL }, 105 { "r25", (long *)&ddb_regs.r[25], FCN_NULL, NULL },
99 { "r26", (long *)&ddb_regs.r[26], FCN_NULL, NULL }, 106 { "r26", (long *)&ddb_regs.r[26], FCN_NULL, NULL },
100 { "r27", (long *)&ddb_regs.r[27], FCN_NULL, NULL }, 107 { "r27", (long *)&ddb_regs.r[27], FCN_NULL, NULL },
101 { "r28", (long *)&ddb_regs.r[28], FCN_NULL, NULL }, 108 { "r28", (long *)&ddb_regs.r[28], FCN_NULL, NULL },
102 { "r29", (long *)&ddb_regs.r[29], FCN_NULL, NULL }, 109 { "r29", (long *)&ddb_regs.r[29], FCN_NULL, NULL },
103 { "r30", (long *)&ddb_regs.r[30], FCN_NULL, NULL }, 110 { "r30", (long *)&ddb_regs.r[30], FCN_NULL, NULL },
104 { "r31", (long *)&ddb_regs.r[31], FCN_NULL, NULL }, 111 { "r31", (long *)&ddb_regs.r[31], FCN_NULL, NULL },
105 { "iar", (long *)&ddb_regs.iar, FCN_NULL, NULL }, 112 { "iar", (long *)&ddb_regs.iar, FCN_NULL, NULL },
106 { "msr", (long *)&ddb_regs.msr, FCN_NULL, NULL }, 113 { "msr", (long *)&ddb_regs.msr, FCN_NULL, NULL },
107 { "lr", (long *)&ddb_regs.lr, FCN_NULL, NULL }, 114 { "lr", (long *)&ddb_regs.lr, FCN_NULL, NULL },
108 { "ctr", (long *)&ddb_regs.ctr, FCN_NULL, NULL }, 115 { "ctr", (long *)&ddb_regs.ctr, FCN_NULL, NULL },
109 { "cr", (long *)&ddb_regs.cr, FCN_NULL, NULL }, 116 { "cr", (long *)&ddb_regs.cr, FCN_NULL, NULL },
110 { "xer", (long *)&ddb_regs.xer, FCN_NULL, NULL }, 117 { "xer", (long *)&ddb_regs.xer, FCN_NULL, NULL },
111 { "mq", (long *)&ddb_regs.mq, FCN_NULL, NULL }, 118 { "mq", (long *)&ddb_regs.mq, FCN_NULL, NULL },
112#ifdef PPC_IBM4XX 119#ifdef PPC_IBM4XX /* XXX crash(8) */
113 { "dear", (long *)&ddb_regs.dear, FCN_NULL, NULL }, 120 { "dear", (long *)&ddb_regs.dear, FCN_NULL, NULL },
114 { "esr", (long *)&ddb_regs.esr, FCN_NULL, NULL }, 121 { "esr", (long *)&ddb_regs.esr, FCN_NULL, NULL },
115 { "pid", (long *)&ddb_regs.pid, FCN_NULL, NULL }, 122 { "pid", (long *)&ddb_regs.pid, FCN_NULL, NULL },
116#endif 123#endif
117}; 124};
118const struct db_variable * const db_eregs = db_regs + sizeof (db_regs)/sizeof (db_regs[0]); 125const struct db_variable * const db_eregs = db_regs + sizeof (db_regs)/sizeof (db_regs[0]);
119 126
120/* 127/*
121 * Frame tracing. 128 * Frame tracing.
122 */ 129 */
123void 130void
124db_stack_trace_print(db_expr_t addr, bool have_addr, db_expr_t count, 131db_stack_trace_print(db_expr_t addr, bool have_addr, db_expr_t count,
125 const char *modif, void (*pr)(const char *, ...)) 132 const char *modif, void (*pr)(const char *, ...))
126{ 133{
127 db_addr_t frame, lr, *args; 134 db_addr_t frame, lr, *args;
128 db_expr_t diff; 135 db_expr_t diff;
129 db_sym_t sym; 136 db_sym_t sym;
130 const char *symname; 137 const char *symname;
131 const char *cp = modif; 138 const char *cp = modif;
132 char c; 139 char c;
133 bool kernel_only = true; 140 bool kernel_only = true;
134 bool trace_thread = false; 141 bool trace_thread = false;
135 bool lwpaddr = false; 142 bool lwpaddr = false;
136#ifdef _KERNEL 143#ifdef _KERNEL
137 extern int trapexit[], sctrapexit[]; 144 extern int trapexit[], sctrapexit[];
138#ifdef PPC_BOOKE 145#ifdef PPC_BOOKE
139 extern int intrcall[]; 146 extern int intrcall[];
140#endif 147#endif
141#else 148#else
142 extern void *trapexit, *sctrapexit, *intrcall; 149 extern void *trapexit, *sctrapexit, *intrcall;
143#endif 150#endif
144 bool full = false; 151 bool full = false;
145 bool in_kernel = true; 152 bool in_kernel = true;
146 153
147 while ((c = *cp++) != 0) { 154 while ((c = *cp++) != 0) {
148 if (c == 'a') { 155 if (c == 'a') {
149 lwpaddr = true; 156 lwpaddr = true;
150 trace_thread = true; 157 trace_thread = true;
151 } 158 }
152 if (c == 't') 159 if (c == 't')
153 trace_thread = true; 160 trace_thread = true;
154 if (c == 'u') 161 if (c == 'u')
155 kernel_only = false; 162 kernel_only = false;
156 if (c == 'f') 163 if (c == 'f')
157 full = true; 164 full = true;
158 } 165 }
159 166
160 if (have_addr) { 167 if (have_addr) {
161 if (trace_thread) { 168 if (trace_thread) {
162 struct proc *p; 169 struct proc *p;
163 struct lwp *l; 170 struct lwp *l;
164 struct pcb *pcb; 171 struct pcb *pcb;
165 172
166 if (lwpaddr) { 173 if (lwpaddr) {
167 l = (struct lwp *)addr; 174 l = (struct lwp *)addr;
168 p = l->l_proc; 175 p = R(&l->l_proc);
169 (*pr)("trace: pid %d ", p->p_pid); 176 (*pr)("trace: pid %d ", R(&p->p_pid));
170 } else { 177 } else {
171 (*pr)("trace: pid %d ", (int)addr); 178 (*pr)("trace: pid %d ", (int)addr);
172 p = db_proc_find((pid_t)addr); 179 p = db_proc_find((pid_t)addr);
173 if (p == NULL) { 180 if (p == NULL) {
174 (*pr)("not found\n"); 181 (*pr)("not found\n");
175 return; 182 return;
176 } 183 }
177 l = LIST_FIRST(&p->p_lwps); 184 l = R(&LIST_FIRST(&p->p_lwps));
178 if (l == NULL) { 185 if (l == NULL) {
179 (*pr)("trace: no LWP?\n"); 186 (*pr)("trace: no LWP?\n");
180 return; 187 return;
181 } 188 }
182 } 189 }
183 (*pr)("lid %d ", l->l_lid); 190 (*pr)("lid %d ", R(&l->l_lid));
184 pcb = lwp_getpcb(l); 191 pcb = lwp_getpcb(l);
185 frame = (db_addr_t)pcb->pcb_sp; 192 frame = (db_addr_t)R(&pcb->pcb_sp);
186 (*pr)("at %p\n", frame); 193 (*pr)("at %p\n", frame);
187 } else 194 } else
188 frame = (db_addr_t)addr; 195 frame = (db_addr_t)addr;
189 } else { 196 } else {
190 frame = (db_addr_t)ddb_regs.r[1]; 197 frame = (db_addr_t)ddb_regs.r[1];
191 } 198 }
192 for (;;) { 199 for (;;) {
193 if (frame < PAGE_SIZE) 200 if (frame < PAGE_SIZE)
194 break; 201 break;
195 frame = *(db_addr_t *)frame; 202 frame = R((db_addr_t *)frame);
196 next_frame: 203 next_frame:
197 args = (db_addr_t *)(frame + 8); 204 args = (db_addr_t *)(frame + 8);
198 if (frame < PAGE_SIZE) 205 if (frame < PAGE_SIZE)
199 break; 206 break;
200 if (count-- == 0) 207 if (count-- == 0)
201 break; 208 break;
202 209
203 lr = *(db_addr_t *)(frame + 4) - 4; 210 lr = R((db_addr_t *)(frame + 4)) - 4;
204 if ((lr & 3) || (lr < 0x100)) { 211 if ((lr & 3) || (lr < 0x100)) {
205 (*pr)("saved LR(0x%x) is invalid.", lr); 212 (*pr)("saved LR(0x%x) is invalid.", lr);
206 break; 213 break;
207 } 214 }
208 215
209 (*pr)("0x%08lx: ", frame); 216 (*pr)("0x%08lx: ", frame);
210 if (lr + 4 == (db_addr_t) trapexit || 217 if (lr + 4 == (db_addr_t) trapexit ||
211#if !defined(_KERNEL) || defined(PPC_BOOKE) 218#if !defined(_KERNEL) || defined(PPC_BOOKE) /* XXX crash(*) */
212 lr + 4 == (db_addr_t) intrcall || 219 lr + 4 == (db_addr_t) intrcall ||
213#endif 220#endif
214 lr + 4 == (db_addr_t) sctrapexit) { 221 lr + 4 == (db_addr_t) sctrapexit) {
215 const char *trapstr; 222 const char *trapstr;
216 struct trapframe *tf = &((struct ktrapframe *)frame)->ktf_tf; 223 struct trapframe *tf =
217 (*pr)("%s ", tf->tf_srr1 & PSL_PR ? "user" : "kernel"); 224 &((struct ktrapframe *)frame)->ktf_tf;
 225 (*pr)("%s ",
 226 R(&tf->tf_srr1) & PSL_PR ? "user" : "kernel");
218 if (lr + 4 == (db_addr_t) sctrapexit) { 227 if (lr + 4 == (db_addr_t) sctrapexit) {
219 (*pr)("SC trap #%d by ", tf->tf_fixreg[0]); 228 (*pr)("SC trap #%d by ", R(&tf->tf_fixreg[0]));
220 goto print_trap; 229 goto print_trap;
221 } 230 }
222 switch (tf->tf_exc) { 231 switch (R(&tf->tf_exc)) {
223 case EXC_DSI: 232 case EXC_DSI:
224#ifdef PPC_OEA 233#ifdef PPC_OEA /* XXX crash(*) */
225 (*pr)("DSI %s trap @ %#x by ", 234 (*pr)("DSI %s trap @ %#x by ",
226 tf->tf_dsisr & DSISR_STORE ? "write" : "read", 235 (R(&tf->tf_dsisr) & DSISR_STORE
227 tf->tf_dar); 236 ? "write"
 237 : "read"),
 238 R(&tf->tf_dar));
228#endif 239#endif
229#ifdef PPC_IBM4XX 240#ifdef PPC_IBM4XX /* XXX crash(*) */
230 trapstr = "DSI"; 241 trapstr = "DSI";
231dsi: 242dsi:
232 (*pr)("%s %s trap @ %#x by ", trapstr, 243 (*pr)("%s %s trap @ %#x by ", trapstr,
233 tf->tf_esr & ESR_DST ? "write" : "read", 244 (R(&tf->tf_esr) & ESR_DST
234 tf->tf_dear); 245 ? "write"
 246 : "read"),
 247 R(&tf->tf_dear));
235#endif 248#endif
236 goto print_trap; 249 goto print_trap;
237 case EXC_ALI: 250 case EXC_ALI:
238#ifdef PPC_OEA 251#ifdef PPC_OEA /* XXX crash(8) */
239 (*pr)("ALI trap @ %#x (DSISR %#x) ", 252 (*pr)("ALI trap @ %#x (DSISR %#x) ",
240 tf->tf_dar, tf->tf_dsisr); 253 R(&tf->tf_dar), R(&tf->tf_dsisr));
241 goto print_trap; 254 goto print_trap;
242#else 255#else
243 trapstr = "ALI"; break; 256 trapstr = "ALI"; break;
244#endif 257#endif
245 case EXC_ISI: trapstr = "ISI"; break; 258 case EXC_ISI: trapstr = "ISI"; break;
246 case EXC_PGM: trapstr = "PGM"; break; 259 case EXC_PGM: trapstr = "PGM"; break;
247 case EXC_SC: trapstr = "SC"; break; 260 case EXC_SC: trapstr = "SC"; break;
248 case EXC_EXI: trapstr = "EXI"; break; 261 case EXC_EXI: trapstr = "EXI"; break;
249 case EXC_MCHK: trapstr = "MCHK"; break; 262 case EXC_MCHK: trapstr = "MCHK"; break;
250 case EXC_VEC: trapstr = "VEC"; break; 263 case EXC_VEC: trapstr = "VEC"; break;
251 case EXC_FPU: trapstr = "FPU"; break; 264 case EXC_FPU: trapstr = "FPU"; break;
252 case EXC_FPA: trapstr = "FPA"; break; 265 case EXC_FPA: trapstr = "FPA"; break;
253 case EXC_DECR: trapstr = "DECR"; break; 266 case EXC_DECR: trapstr = "DECR"; break;
254 case EXC_BPT: trapstr = "BPT"; break; 267 case EXC_BPT: trapstr = "BPT"; break;
255 case EXC_TRC: trapstr = "TRC"; break; 268 case EXC_TRC: trapstr = "TRC"; break;
256 case EXC_RUNMODETRC: trapstr = "RUNMODETRC"; break; 269 case EXC_RUNMODETRC: trapstr = "RUNMODETRC"; break;
257 case EXC_PERF: trapstr = "PERF"; break; 270 case EXC_PERF: trapstr = "PERF"; break;
258 case EXC_SMI: trapstr = "SMI"; break; 271 case EXC_SMI: trapstr = "SMI"; break;
259 case EXC_RST: trapstr = "RST"; break; 272 case EXC_RST: trapstr = "RST"; break;
260 case EXC_DTMISS: trapstr = "DTMISS"; 273 case EXC_DTMISS: trapstr = "DTMISS";
261#ifdef PPC_IBM4XX 274#ifdef PPC_IBM4XX /* XXX crash(8) */
262 goto dsi; 275 goto dsi;
263#endif 276#endif
264 break; 277 break;
265 case EXC_ITMISS: trapstr = "ITMISS"; break; 278 case EXC_ITMISS: trapstr = "ITMISS"; break;
266 case EXC_FIT: trapstr = "FIT"; break; 279 case EXC_FIT: trapstr = "FIT"; break;
267 case EXC_PIT: trapstr = "PIT"; break; 280 case EXC_PIT: trapstr = "PIT"; break;
268 case EXC_WDOG: trapstr = "WDOG"; break; 281 case EXC_WDOG: trapstr = "WDOG"; break;
269 default: trapstr = NULL; break; 282 default: trapstr = NULL; break;
270 } 283 }
271 if (trapstr != NULL) { 284 if (trapstr != NULL) {
272 (*pr)("%s trap by ", trapstr); 285 (*pr)("%s trap by ", trapstr);
273 } else { 286 } else {
274 (*pr)("trap %#x by ", tf->tf_exc); 287 (*pr)("trap %#x by ", R(&tf->tf_exc));
275 } 288 }
276 print_trap: 289 print_trap:
277 lr = (db_addr_t) tf->tf_srr0; 290 lr = (db_addr_t)R(&tf->tf_srr0);
278 diff = 0; 291 diff = 0;
279 symname = NULL; 292 symname = NULL;
280 if (in_kernel && (tf->tf_srr1 & PSL_PR) == 0) { 293 if (in_kernel && (R(&tf->tf_srr1) & PSL_PR) == 0) {
281 sym = db_search_symbol(lr, DB_STGY_ANY, &diff); 294 sym = db_search_symbol(lr, DB_STGY_ANY, &diff);
282 db_symbol_values(sym, &symname, 0); 295 db_symbol_values(sym, &symname, 0);
283 } 296 }
284 if (symname == NULL || !strcmp(symname, "end")) { 297 if (symname == NULL || !strcmp(symname, "end")) {
285 (*pr)("%p: srr1=%#x\n", lr, tf->tf_srr1); 298 (*pr)("%p: srr1=%#x\n", lr, R(&tf->tf_srr1));
286 } else { 299 } else {
287 (*pr)("%s+%#x: srr1=%#x\n", symname, 300 (*pr)("%s+%#x: srr1=%#x\n", symname,
288 diff, tf->tf_srr1); 301 diff, R(&tf->tf_srr1));
289 } 302 }
290 (*pr)("%-10s r1=%#x cr=%#x xer=%#x ctr=%#x", 303 (*pr)("%-10s r1=%#x cr=%#x xer=%#x ctr=%#x",
291 "", tf->tf_fixreg[1], tf->tf_cr, tf->tf_xer, tf->tf_ctr); 304 "",
292#ifdef PPC_OEA 305 R(&tf->tf_fixreg[1]),
293 if (tf->tf_exc == EXC_DSI) 306 R(&tf->tf_cr),
294 (*pr)(" dsisr=%#x", tf->tf_dsisr); 307 R(&tf->tf_xer),
295#ifdef PPC_OEA601 308 R(&tf->tf_ctr));
296 if ((mfpvr() >> 16) == MPC601) 309#ifdef PPC_OEA /* XXX crash(8) */
297 (*pr)(" mq=%#x", tf->tf_mq); 310 if (R(&tf->tf_exc) == EXC_DSI)
 311 (*pr)(" dsisr=%#x", R(&tf->tf_dsisr));
 312#ifdef PPC_OEA601 /* XXX crash(8) */
 313 if ((mfpvr() >> 16) == MPC601) /* XXX crash(8) */
 314 (*pr)(" mq=%#x", R(&tf->tf_mq));
298#endif /* PPC_OEA601 */ 315#endif /* PPC_OEA601 */
299#endif /* PPC_OEA */ 316#endif /* PPC_OEA */
300#ifdef PPC_IBM4XX 317#ifdef PPC_IBM4XX /* XXX crash(8) */
301 if (tf->tf_exc == EXC_DSI || 318 if (R(&tf->tf_exc) == EXC_DSI ||
302 tf->tf_exc == EXC_DTMISS) 319 R(&tf->tf_exc) == EXC_DTMISS)
303 (*pr)(" dear=%#x", tf->tf_dear); 320 (*pr)(" dear=%#x", R(&tf->tf_dear));
304 (*pr)(" esr=%#x pid=%#x", tf->tf_esr, tf->tf_pid); 321 (*pr)(" esr=%#x pid=%#x", R(&tf->tf_esr),
 322 R(&tf->tf_pid));
305#endif 323#endif
306 (*pr)("\n"); 324 (*pr)("\n");
307 frame = (db_addr_t) tf->tf_fixreg[1]; 325 frame = (db_addr_t)R(&tf->tf_fixreg[1]);
308 in_kernel = !(tf->tf_srr1 & PSL_PR); 326 in_kernel = !(R(&tf->tf_srr1) & PSL_PR);
309 if (kernel_only && !in_kernel) 327 if (kernel_only && !in_kernel)
310 break; 328 break;
311 goto next_frame; 329 goto next_frame;
312 } 330 }
313 331
314 diff = 0; 332 diff = 0;
315 symname = NULL; 333 symname = NULL;
316 if (in_kernel) { 334 if (in_kernel) {
317 sym = db_search_symbol(lr, DB_STGY_ANY, &diff); 335 sym = db_search_symbol(lr, DB_STGY_ANY, &diff);
318 db_symbol_values(sym, &symname, 0); 336 db_symbol_values(sym, &symname, 0);
319 } 337 }
320 if (symname == NULL || !strcmp(symname, "end")) 338 if (symname == NULL || !strcmp(symname, "end"))
321 (*pr)("at %p", lr); 339 (*pr)("at %p", lr);
322 else 340 else
323 (*pr)("at %s+%#x", symname, diff); 341 (*pr)("at %s+%#x", symname, diff);
324 if (full) 342 if (full)
325 /* Print all the args stored in that stackframe. */ 343 /* Print all the args stored in that stackframe. */
326 (*pr)("(%lx, %lx, %lx, %lx, %lx, %lx, %lx, %lx)", 344 (*pr)("(%lx, %lx, %lx, %lx, %lx, %lx, %lx, %lx)",
327 args[0], args[1], args[2], args[3], 345 R(&args[0]), R(&args[1]), R(&args[2]), R(&args[3]),
328 args[4], args[5], args[6], args[7]); 346 R(&args[4]), R(&args[5]), R(&args[6]), R(&args[7]));
329 (*pr)("\n"); 347 (*pr)("\n");
330 } 348 }
331} 349}