Thu Jul 27 16:42:04 2023 UTC ()
Pull up following revision(s) (requested by mrg in ticket #1852):

	sys/arch/x86/x86/errata.c: revision 1.32

fix the cpuids for the zen2 client CPUs.

i'm not exactly how i came up with the values i had, though one
of them was still valid and matched my test systems.


(martin)
diff -r1.23.10.2 -r1.23.10.3 src/sys/arch/x86/x86/errata.c
cvs diff -r1.23.10.2 -r1.23.10.3 src/sys/arch/x86/x86/errata.c (expand / switch to unified diff)

--- src/sys/arch/x86/x86/errata.c 2023/07/25 09:15:28 1.23.10.2
+++ src/sys/arch/x86/x86/errata.c 2023/07/27 16:42:04 1.23.10.3
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: errata.c,v 1.23.10.2 2023/07/25 09:15:28 martin Exp $ */ 1/* $NetBSD: errata.c,v 1.23.10.3 2023/07/27 16:42:04 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 4 * Copyright (c) 2007 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran. 8 * by Andrew Doran.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -35,27 +35,27 @@ @@ -35,27 +35,27 @@
35 * This currently only handles AMD CPUs, and is generalised because 35 * This currently only handles AMD CPUs, and is generalised because
36 * there are quite a few problems that the BIOS can patch via MSR, 36 * there are quite a few problems that the BIOS can patch via MSR,
37 * but it is not known if the OS can patch these yet. The list is 37 * but it is not known if the OS can patch these yet. The list is
38 * expected to grow over time. 38 * expected to grow over time.
39 * 39 *
40 * The data here are from: Revision Guide for AMD Athlon 64 and 40 * The data here are from: Revision Guide for AMD Athlon 64 and
41 * AMD Opteron Processors, Publication #25759, Revision: 3.69, 41 * AMD Opteron Processors, Publication #25759, Revision: 3.69,
42 * Issue Date: September 2006 42 * Issue Date: September 2006
43 * 43 *
44 * XXX This should perhaps be integrated with the identcpu code. 44 * XXX This should perhaps be integrated with the identcpu code.
45 */ 45 */
46 46
47#include <sys/cdefs.h> 47#include <sys/cdefs.h>
48__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.2 2023/07/25 09:15:28 martin Exp $"); 48__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.23.10.3 2023/07/27 16:42:04 martin Exp $");
49 49
50#include <sys/types.h> 50#include <sys/types.h>
51#include <sys/systm.h> 51#include <sys/systm.h>
52 52
53#include <machine/cpu.h> 53#include <machine/cpu.h>
54#include <machine/cpufunc.h> 54#include <machine/cpufunc.h>
55#include <machine/specialreg.h> 55#include <machine/specialreg.h>
56 56
57#include <x86/cpuvar.h> 57#include <x86/cpuvar.h>
58#include <x86/cputypes.h> 58#include <x86/cputypes.h>
59 59
60typedef struct errata { 60typedef struct errata {
61 u_short e_num; 61 u_short e_num;
@@ -86,28 +86,28 @@ static const u_int cpurevs[] = { @@ -86,28 +86,28 @@ static const u_int cpurevs[] = {
86 JH_E6, 0x0020f12, JH_E6, 0x0020f32, SH_B0, 0x0000f40, 86 JH_E6, 0x0020f12, JH_E6, 0x0020f32, SH_B0, 0x0000f40,
87 SH_B3, 0x0000f51, SH_C0, 0x0000f48, SH_C0, 0x0000f58, 87 SH_B3, 0x0000f51, SH_C0, 0x0000f48, SH_C0, 0x0000f58,
88 SH_CG, 0x0000f4a, SH_CG, 0x0000f5a, SH_CG, 0x0000f7a, 88 SH_CG, 0x0000f4a, SH_CG, 0x0000f5a, SH_CG, 0x0000f7a,
89 SH_D0, 0x0010f40, SH_D0, 0x0010f50, SH_D0, 0x0010f70, 89 SH_D0, 0x0010f40, SH_D0, 0x0010f50, SH_D0, 0x0010f70,
90 SH_E4, 0x0020f51, SH_E4, 0x0020f71, SH_E5, 0x0020f42, 90 SH_E4, 0x0020f51, SH_E4, 0x0020f71, SH_E5, 0x0020f42,
91 DR_BA, 0x0100f2a, DR_B2, 0x0100f22, DR_B3, 0x0100f23, 91 DR_BA, 0x0100f2a, DR_B2, 0x0100f22, DR_B3, 0x0100f23,
92 RB_C2, 0x0100f42, RB_C3, 0x0100f43, BL_C2, 0x0100f52, 92 RB_C2, 0x0100f42, RB_C3, 0x0100f43, BL_C2, 0x0100f52,
93 BL_C3, 0x0100f53, DA_C2, 0x0100f62, DA_C3, 0x0100f63, 93 BL_C3, 0x0100f53, DA_C2, 0x0100f62, DA_C3, 0x0100f63,
94 HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91, 94 HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91,
95 PH_E0, 0x0100fa0, LN_B0, 0x0300f10, KB_A1, 0x0700F01, 95 PH_E0, 0x0100fa0, LN_B0, 0x0300f10, KB_A1, 0x0700F01,
96 ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12, 96 ML_A1, 0x0730F01, ZP_B1, 0x0800F11, ZP_B2, 0x0800F12,
97 PiR_B2, 0x0800F82, Rome_B0, 0x0830F10, 97 PiR_B2, 0x0800F82, Rome_B0, 0x0830F10,
98 /* XXX client Zen2 names aren't known yet. */ 98 /* XXX client Zen2 names aren't known yet. */
99 Z2_XB, 0x0840F70, Z2_Ren, 0x0860F80, Z2_Luc, 0x0870F10, 99 Z2_XB, 0x0840F70, Z2_Ren, 0x0860F01, Z2_Luc, 0x0860F81,
100 Z2_Mat, 0x0890F70, Z2_VG, 0x0890F80, Z2_Men, 0x08A0F10, 100 Z2_Mat, 0x0870F10, Z2_VG, 0x0890F02, Z2_Men, 0x08A0F00,
101 Milan_B1, 0x0A00F11, Milan_B2, 0x0A00F12, 101 Milan_B1, 0x0A00F11, Milan_B2, 0x0A00F12,
102 Genoa_B1, 0x0A10F11, 102 Genoa_B1, 0x0A10F11,
103 OINK 103 OINK
104}; 104};
105 105
106static const uint8_t x86_errata_set1[] = { 106static const uint8_t x86_errata_set1[] = {
107 SH_B3, SH_C0, SH_CG, DH_CG, CH_CG, OINK 107 SH_B3, SH_C0, SH_CG, DH_CG, CH_CG, OINK
108}; 108};
109 109
110static const uint8_t x86_errata_set2[] = { 110static const uint8_t x86_errata_set2[] = {
111 SH_B3, SH_C0, SH_CG, DH_CG, CH_CG, SH_D0, DH_D0, CH_D0, OINK 111 SH_B3, SH_C0, SH_CG, DH_CG, CH_CG, SH_D0, DH_D0, CH_D0, OINK
112}; 112};
113 113