Fri Jul 28 02:27:25 2023 UTC ()
Regen.


(msaitoh)
diff -r1.1464 -r1.1465 src/sys/dev/pci/pcidevs.h
diff -r1.1463 -r1.1464 src/sys/dev/pci/pcidevs_data.h
cvs diff -r1.1464 -r1.1465 src/sys/dev/pci/pcidevs.h (expand / switch to unified diff)

--- src/sys/dev/pci/pcidevs.h 2023/07/23 05:52:19 1.1464
+++ src/sys/dev/pci/pcidevs.h 2023/07/28 02:27:25 1.1465
@@ -1,20 +1,20 @@ @@ -1,20 +1,20 @@
1/* $NetBSD: pcidevs.h,v 1.1464 2023/07/23 05:52:19 msaitoh Exp $ */ 1/* $NetBSD: pcidevs.h,v 1.1465 2023/07/28 02:27:25 msaitoh Exp $ */
2 2
3/* 3/*
4 * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT. 4 * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
5 * 5 *
6 * generated from: 6 * generated from:
7 * NetBSD: pcidevs,v 1.1482 2023/07/23 05:52:00 msaitoh Exp 7 * NetBSD: pcidevs,v 1.1483 2023/07/28 02:26:58 msaitoh Exp
8 */ 8 */
9 9
10/* 10/*
11 * Copyright (c) 1995, 1996 Christopher G. Demetriou 11 * Copyright (c) 1995, 1996 Christopher G. Demetriou
12 * All rights reserved. 12 * All rights reserved.
13 * 13 *
14 * Redistribution and use in source and binary forms, with or without 14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions 15 * modification, are permitted provided that the following conditions
16 * are met: 16 * are met:
17 * 1. Redistributions of source code must retain the above copyright 17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer. 18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright 19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the 20 * notice, this list of conditions and the following disclaimer in the
@@ -1097,26 +1097,27 @@ @@ -1097,26 +1097,27 @@
1097#define PCI_PRODUCT_AMD_F19_6X_IOMMU 0x14d9 /* 19h/6xh IOMMU */ 1097#define PCI_PRODUCT_AMD_F19_6X_IOMMU 0x14d9 /* 19h/6xh IOMMU */
1098#define PCI_PRODUCT_AMD_F19_6X_PCIE_DUMMY_HB 0x14da /* 19h/6xh PCIe Dummy Host Bridge */ 1098#define PCI_PRODUCT_AMD_F19_6X_PCIE_DUMMY_HB 0x14da /* 19h/6xh PCIe Dummy Host Bridge */
1099#define PCI_PRODUCT_AMD_F19_6X_GPPB 0x14db /* 19h/6xh PCIe GPP Bridge */ 1099#define PCI_PRODUCT_AMD_F19_6X_GPPB 0x14db /* 19h/6xh PCIe GPP Bridge */
1100#define PCI_PRODUCT_AMD_F19_6X_INTNL_GPPB 0x14dd /* 19h/6xh Internal PCIe GPP Bridge */ 1100#define PCI_PRODUCT_AMD_F19_6X_INTNL_GPPB 0x14dd /* 19h/6xh Internal PCIe GPP Bridge */
1101#define PCI_PRODUCT_AMD_F19_6X_PCIE_DUMMY 0x14de /* 19h/6xh PCIe Dummy Function */ 1101#define PCI_PRODUCT_AMD_F19_6X_PCIE_DUMMY 0x14de /* 19h/6xh PCIe Dummy Function */
1102#define PCI_PRODUCT_AMD_F19_6X_DF_0 0x14e0 /* 19h/6xh Data Fabric 0 */ 1102#define PCI_PRODUCT_AMD_F19_6X_DF_0 0x14e0 /* 19h/6xh Data Fabric 0 */
1103#define PCI_PRODUCT_AMD_F19_6X_DF_1 0x14e1 /* 19h/6xh Data Fabric 1 */ 1103#define PCI_PRODUCT_AMD_F19_6X_DF_1 0x14e1 /* 19h/6xh Data Fabric 1 */
1104#define PCI_PRODUCT_AMD_F19_6X_DF_2 0x14e2 /* 19h/6xh Data Fabric 2 */ 1104#define PCI_PRODUCT_AMD_F19_6X_DF_2 0x14e2 /* 19h/6xh Data Fabric 2 */
1105#define PCI_PRODUCT_AMD_F19_6X_DF_3 0x14e3 /* 19h/6xh Data Fabric 3 */ 1105#define PCI_PRODUCT_AMD_F19_6X_DF_3 0x14e3 /* 19h/6xh Data Fabric 3 */
1106#define PCI_PRODUCT_AMD_F19_6X_DF_4 0x14e4 /* 19h/6xh Data Fabric 4 */ 1106#define PCI_PRODUCT_AMD_F19_6X_DF_4 0x14e4 /* 19h/6xh Data Fabric 4 */
1107#define PCI_PRODUCT_AMD_F19_6X_DF_5 0x14e5 /* 19h/6xh Data Fabric 5 */ 1107#define PCI_PRODUCT_AMD_F19_6X_DF_5 0x14e5 /* 19h/6xh Data Fabric 5 */
1108#define PCI_PRODUCT_AMD_F19_6X_DF_6 0x14e6 /* 19h/6xh Data Fabric 6 */ 1108#define PCI_PRODUCT_AMD_F19_6X_DF_6 0x14e6 /* 19h/6xh Data Fabric 6 */
1109#define PCI_PRODUCT_AMD_F19_6X_DF_7 0x14e7 /* 19h/6xh Data Fabric 7 */ 1109#define PCI_PRODUCT_AMD_F19_6X_DF_7 0x14e7 /* 19h/6xh Data Fabric 7 */
 1110#define PCI_PRODUCT_AMD_F19_7X_RC 0x14e8 /* 19h/7xh Root Complex */
1110#define PCI_PRODUCT_AMD_F17_AX_XHCI_0 0x1503 /* 17h/Axh USB 3.1 xHCI */ 1111#define PCI_PRODUCT_AMD_F17_AX_XHCI_0 0x1503 /* 17h/Axh USB 3.1 xHCI */
1111#define PCI_PRODUCT_AMD_F17_AX_XHCI_1 0x1504 /* 17h/Axh USB 3.1 xHCI */ 1112#define PCI_PRODUCT_AMD_F17_AX_XHCI_1 0x1504 /* 17h/Axh USB 3.1 xHCI */
1112#define PCI_PRODUCT_AMD_F17_AX_USB_BIOM 0x1505 /* 17h/Axh Secure USB BIOmetric */ 1113#define PCI_PRODUCT_AMD_F17_AX_USB_BIOM 0x1505 /* 17h/Axh Secure USB BIOmetric */
1113#define PCI_PRODUCT_AMD_F17_AX_GFX 0x1506 /* 17h/Axh Internal GPU */ 1114#define PCI_PRODUCT_AMD_F17_AX_GFX 0x1506 /* 17h/Axh Internal GPU */
1114#define PCI_PRODUCT_AMD_F14_RC 0x1510 /* Family14h Root Complex */ 1115#define PCI_PRODUCT_AMD_F14_RC 0x1510 /* Family14h Root Complex */
1115#define PCI_PRODUCT_AMD_F14_PCIE_1 0x1512 /* Family14h PCIe */ 1116#define PCI_PRODUCT_AMD_F14_PCIE_1 0x1512 /* Family14h PCIe */
1116#define PCI_PRODUCT_AMD_F14_PCIE_2 0x1513 /* Family14h PCIe */ 1117#define PCI_PRODUCT_AMD_F14_PCIE_2 0x1513 /* Family14h PCIe */
1117#define PCI_PRODUCT_AMD_F14_PCIE_3 0x1514 /* Family14h PCIe */ 1118#define PCI_PRODUCT_AMD_F14_PCIE_3 0x1514 /* Family14h PCIe */
1118#define PCI_PRODUCT_AMD_F14_PCIE_4 0x1515 /* Family14h PCIe */ 1119#define PCI_PRODUCT_AMD_F14_PCIE_4 0x1515 /* Family14h PCIe */
1119#define PCI_PRODUCT_AMD_F14_PCIE_5 0x1516 /* Family14h PCIe */ 1120#define PCI_PRODUCT_AMD_F14_PCIE_5 0x1516 /* Family14h PCIe */
1120#define PCI_PRODUCT_AMD_F16_HT 0x1530 /* Family16h HyperTransport Configuration */ 1121#define PCI_PRODUCT_AMD_F16_HT 0x1530 /* Family16h HyperTransport Configuration */
1121#define PCI_PRODUCT_AMD_F16_ADDR 0x1531 /* Family16h Address Map Configuration */ 1122#define PCI_PRODUCT_AMD_F16_ADDR 0x1531 /* Family16h Address Map Configuration */
1122#define PCI_PRODUCT_AMD_F16_DRAM 0x1532 /* Family16h DRAM Configuration */ 1123#define PCI_PRODUCT_AMD_F16_DRAM 0x1532 /* Family16h DRAM Configuration */
cvs diff -r1.1463 -r1.1464 src/sys/dev/pci/pcidevs_data.h (expand / switch to unified diff)

--- src/sys/dev/pci/pcidevs_data.h 2023/07/23 05:52:18 1.1463
+++ src/sys/dev/pci/pcidevs_data.h 2023/07/28 02:27:24 1.1464
@@ -1,20 +1,20 @@ @@ -1,20 +1,20 @@
1/* $NetBSD: pcidevs_data.h,v 1.1463 2023/07/23 05:52:18 msaitoh Exp $ */ 1/* $NetBSD: pcidevs_data.h,v 1.1464 2023/07/28 02:27:24 msaitoh Exp $ */
2 2
3/* 3/*
4 * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT. 4 * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
5 * 5 *
6 * generated from: 6 * generated from:
7 * NetBSD: pcidevs,v 1.1482 2023/07/23 05:52:00 msaitoh Exp 7 * NetBSD: pcidevs,v 1.1483 2023/07/28 02:26:58 msaitoh Exp
8 */ 8 */
9 9
10/* 10/*
11 * Copyright (c) 1995, 1996 Christopher G. Demetriou 11 * Copyright (c) 1995, 1996 Christopher G. Demetriou
12 * All rights reserved. 12 * All rights reserved.
13 * 13 *
14 * Redistribution and use in source and binary forms, with or without 14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions 15 * modification, are permitted provided that the following conditions
16 * are met: 16 * are met:
17 * 1. Redistributions of source code must retain the above copyright 17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer. 18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright 19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the 20 * notice, this list of conditions and the following disclaimer in the
@@ -1377,26 +1377,28 @@ static const uint32_t pci_products[] = { @@ -1377,26 +1377,28 @@ static const uint32_t pci_products[] = {
1377 8313, 490, 8129, 8079, 0, 1377 8313, 490, 8129, 8079, 0,
1378 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_2,  1378 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_2,
1379 8313, 490, 8129, 6369, 0, 1379 8313, 490, 8129, 6369, 0,
1380 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_3,  1380 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_3,
1381 8313, 490, 8129, 6380, 0, 1381 8313, 490, 8129, 6380, 0,
1382 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_4,  1382 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_4,
1383 8313, 490, 8129, 6744, 0, 1383 8313, 490, 8129, 6744, 0,
1384 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_5,  1384 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_5,
1385 8313, 490, 8129, 8081, 0, 1385 8313, 490, 8129, 8081, 0,
1386 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_6,  1386 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_6,
1387 8313, 490, 8129, 8321, 0, 1387 8313, 490, 8129, 8321, 0,
1388 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_7,  1388 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_7,
1389 8313, 490, 8129, 8323, 0, 1389 8313, 490, 8129, 8323, 0,
 1390 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_7X_RC,
 1391 8219, 8083, 8088, 0,
1390 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_XHCI_0,  1392 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_XHCI_0,
1391 8159, 6903, 8325, 8183, 0, 1393 8159, 6903, 8325, 8183, 0,
1392 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_XHCI_1,  1394 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_XHCI_1,
1393 8159, 6903, 8325, 8183, 0, 1395 8159, 6903, 8325, 8183, 0,
1394 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_USB_BIOM,  1396 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_USB_BIOM,
1395 8159, 8329, 6903, 8336, 0, 1397 8159, 8329, 6903, 8336, 0,
1396 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_GFX,  1398 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_GFX,
1397 8159, 8240, 8346, 0, 1399 8159, 8240, 8346, 0,
1398 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_RC,  1400 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_RC,
1399 8350, 8083, 8088, 0, 1401 8350, 8083, 8088, 0,
1400 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_1,  1402 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_1,
1401 8350, 8154, 0, 1403 8350, 8154, 0,
1402 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_2,  1404 PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_2,
@@ -19182,47 +19184,47 @@ static const char pci_words[] = { "."  @@ -19182,47 +19184,47 @@ static const char pci_words[] = { "."
19182 "Address\0" /* 48 refs @ 7992 */ 19184 "Address\0" /* 48 refs @ 7992 */
19183 "Map\0" /* 10 refs @ 8000 */ 19185 "Map\0" /* 10 refs @ 8000 */
19184 "DRAM\0" /* 49 refs @ 8004 */ 19186 "DRAM\0" /* 49 refs @ 8004 */
19185 "Miscellaneous\0" /* 8 refs @ 8009 */ 19187 "Miscellaneous\0" /* 8 refs @ 8009 */
19186 "Family10h\0" /* 5 refs @ 8023 */ 19188 "Family10h\0" /* 5 refs @ 8023 */
19187 "Link\0" /* 52 refs @ 8033 */ 19189 "Link\0" /* 52 refs @ 8033 */
19188 "Family11h\0" /* 5 refs @ 8038 */ 19190 "Family11h\0" /* 5 refs @ 8038 */
19189 "Family15h\0" /* 32 refs @ 8048 */ 19191 "Family15h\0" /* 32 refs @ 8048 */
19190 "Processor\0" /* 59 refs @ 8058 */ 19192 "Processor\0" /* 59 refs @ 8058 */
19191 "Function\0" /* 43 refs @ 8068 */ 19193 "Function\0" /* 43 refs @ 8068 */
19192 "0\0" /* 159 refs @ 8077 */ 19194 "0\0" /* 159 refs @ 8077 */
19193 "1\0" /* 188 refs @ 8079 */ 19195 "1\0" /* 188 refs @ 8079 */
19194 "5\0" /* 49 refs @ 8081 */ 19196 "5\0" /* 49 refs @ 8081 */
19195 "Root\0" /* 309 refs @ 8083 */ 19197 "Root\0" /* 310 refs @ 8083 */
19196 "Complex\0" /* 15 refs @ 8088 */ 19198 "Complex\0" /* 16 refs @ 8088 */
19197 "Port\0" /* 439 refs @ 8096 */ 19199 "Port\0" /* 439 refs @ 8096 */
19198 "IOMMU\0" /* 12 refs @ 8101 */ 19200 "IOMMU\0" /* 12 refs @ 8101 */
19199 "Family16h\0" /* 19 refs @ 8107 */ 19201 "Family16h\0" /* 19 refs @ 8107 */
19200 "GPP\0" /* 27 refs @ 8117 */ 19202 "GPP\0" /* 27 refs @ 8117 */
19201 "17h/7xh\0" /* 12 refs @ 8121 */ 19203 "17h/7xh\0" /* 12 refs @ 8121 */
19202 "Fabric\0" /* 72 refs @ 8129 */ 19204 "Fabric\0" /* 72 refs @ 8129 */
19203 "17h/6xh\0" /* 20 refs @ 8136 */ 19205 "17h/6xh\0" /* 20 refs @ 8136 */
19204 "Family17h\0" /* 21 refs @ 8144 */ 19206 "Family17h\0" /* 21 refs @ 8144 */
19205 "PCIe\0" /* 714 refs @ 8154 */ 19207 "PCIe\0" /* 714 refs @ 8154 */
19206 "17h/Axh\0" /* 19 refs @ 8159 */ 19208 "17h/Axh\0" /* 19 refs @ 8159 */
19207 "Dummy\0" /* 8 refs @ 8167 */ 19209 "Dummy\0" /* 8 refs @ 8167 */
19208 "Crypto\0" /* 6 refs @ 8173 */ 19210 "Crypto\0" /* 6 refs @ 8173 */
19209 "HD\0" /* 377 refs @ 8180 */ 19211 "HD\0" /* 377 refs @ 8180 */
19210 "xHCI\0" /* 48 refs @ 8183 */ 19212 "xHCI\0" /* 48 refs @ 8183 */
19211 "Family17h/7xh\0" /* 5 refs @ 8188 */ 19213 "Family17h/7xh\0" /* 5 refs @ 8188 */
19212 "Reserved\0" /* 7 refs @ 8202 */ 19214 "Reserved\0" /* 7 refs @ 8202 */
19213 "SPP\0" /* 1 refs @ 8211 */ 19215 "SPP\0" /* 1 refs @ 8211 */
19214 "3.0\0" /* 7 refs @ 8215 */ 19216 "3.0\0" /* 7 refs @ 8215 */
19215 "19h/7xh\0" /* 2 refs @ 8219 */ 19217 "19h/7xh\0" /* 3 refs @ 8219 */
19216 "19h/1xh\0" /* 26 refs @ 8227 */ 19218 "19h/1xh\0" /* 26 refs @ 8227 */
19217 "RCEC\0" /* 3 refs @ 8235 */ 19219 "RCEC\0" /* 3 refs @ 8235 */
19218 "Internal\0" /* 10 refs @ 8240 */ 19220 "Internal\0" /* 10 refs @ 8240 */
19219 "Primary\0" /* 4 refs @ 8249 */ 19221 "Primary\0" /* 4 refs @ 8249 */
19220 "Non\0" /* 5 refs @ 8257 */ 19222 "Non\0" /* 5 refs @ 8257 */
19221 "Transparent\0" /* 5 refs @ 8261 */ 19223 "Transparent\0" /* 5 refs @ 8261 */
19222 "Secondary\0" /* 32 refs @ 8273 */ 19224 "Secondary\0" /* 32 refs @ 8273 */
19223 "vNTB\0" /* 1 refs @ 8283 */ 19225 "vNTB\0" /* 1 refs @ 8283 */
19224 "Swith\0" /* 2 refs @ 8288 */ 19226 "Swith\0" /* 2 refs @ 8288 */
19225 "NBIF\0" /* 1 refs @ 8294 */ 19227 "NBIF\0" /* 1 refs @ 8294 */
19226 "DS\0" /* 1 refs @ 8299 */ 19228 "DS\0" /* 1 refs @ 8299 */
19227 "in\0" /* 3 refs @ 8302 */ 19229 "in\0" /* 3 refs @ 8302 */
19228 "PSP\0" /* 2 refs @ 8305 */ 19230 "PSP\0" /* 2 refs @ 8305 */