Tue Oct 31 13:57:08 2023 UTC ()

eqos_pci: Limit to 32bit DMA only for PSE devices.


(msaitoh)

diff -r1.2 -r1.3 src/sys/dev/pci/if_eqos_pci.c

--- src/sys/dev/pci/if_eqos_pci.c 2023/10/26 18:02:51	1.2
+++ src/sys/dev/pci/if_eqos_pci.c 2023/10/31 13:57:08	1.3

 @@ -1,14 +1,14 @@
-/* $NetBSD: if_eqos_pci.c,v 1.2 2023/10/26 18:02:51 msaitoh Exp $ */
+/* $NetBSD: if_eqos_pci.c,v 1.3 2023/10/31 13:57:08 msaitoh Exp $ */
 /*-
  * Copyright (c) 2023 Masanobu SAITOH <msaitoh@netbsd.org>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -25,27 +25,27 @@
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * TODO:
  *	Use multi vector MSI to support multiqueue.
+ *
  */
 #include "opt_net_mpsafe.h"
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_eqos_pci.c,v 1.2 2023/10/26 18:02:51 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_eqos_pci.c,v 1.3 2023/10/31 13:57:08 msaitoh Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/rndsource.h>
 #include <net/if_ether.h>
 #include <net/if_media.h>
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcidevs.h>
 @@ -120,59 +120,60 @@ eqos_pci_attach(device_t parent, device_
 	psc->sc_pcidevid = PCI_PRODUCT(pa->pa_id);
 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_BAR0);
 	if (pci_mapreg_map(pa, PCI_BAR0, memtype, 0, &memt, &memh, NULL,
 		&memsize) != 0) {
 		aprint_error(": can't map mem space\n");
 		return;
+	}
 	sc->sc_dev = self;
 	sc->sc_bst = memt;
 	sc->sc_bsh = memh;
 	prop = device_properties(sc->sc_dev);
-#if 0 /* I don't know why dmat64 doesn't work... */
+	if (pci_dma64_available(pa))
 	if (pci_dma64_available(pa)) {
 		aprint_verbose(", 64-bit DMA");
 		sc->sc_dmat = pa->pa_dmat64;
-	} else  {
+	else
 		aprint_verbose(", 32-bit DMA");
 		sc->sc_dmat = pa->pa_dmat;
 #else
 	sc->sc_dmat = pa->pa_dmat;
 #endif
 	sc->sc_phy_id = MII_PHY_ANY;
 	switch (psc->sc_pcidevid) {
 	case PCI_PRODUCT_INTEL_EHL_ETH:
 		sc->sc_csr_clock = 204800000;
 		dma_pbl = 32;
 		break;
 	case PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_RGMII:
 	case PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_RGMII:
 	case PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_1G:
 	case PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_1G:
 	case PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_2_5G:
 	case PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_2_5G:
 		sc->sc_dmat = pa->pa_dmat; /* 32bit DMA only */
 		sc->sc_csr_clock = 200000000;
 		dma_pbl = 32;
 		break;
 #if 0
 	case PCI_PRODUCT_INTEL_QUARTK_ETH:
 		dma_pbl = 16;
 #endif
 	default:
 		sc->sc_csr_clock = 200000000; /* XXX */
+	}
 	if (sc->sc_dmat == pa->pa_dmat64)
 		aprint_verbose(", 64-bit DMA");
 	else
 		aprint_verbose(", 32-bit DMA");
 	/* Defaults */
 	if (dma_pbl != 0) {
 		prop = device_properties(sc->sc_dev);
 		prop_dictionary_set_uint32(prop, "snps,pbl", dma_pbl);
+	}
 	if (eqos_attach(sc) != 0) {
 		aprint_error_dev(sc->sc_dev, "failed in eqos_attach()\n");
 		return;
+	}
 	/* Allocation settings */
 	counts[PCI_INTR_TYPE_MSI] = 1;