| @@ -1,41 +1,41 @@ | | | @@ -1,41 +1,41 @@ |
1 | /* $NetBSD: i915_pci.c,v 1.4 2021/12/19 01:44:49 riastradh Exp $ */ | | 1 | /* $NetBSD: i915_pci.c,v 1.4.4.1 2024/01/15 14:13:39 martin Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Copyright © 2016 Intel Corporation | | 4 | * Copyright © 2016 Intel Corporation |
5 | * | | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | | 7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation | | 8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | | 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the | | 10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: | | 11 | * Software is furnished to do so, subject to the following conditions: |
12 | * | | 12 | * |
13 | * The above copyright notice and this permission notice (including the next | | 13 | * The above copyright notice and this permission notice (including the next |
14 | * paragraph) shall be included in all copies or substantial portions of the | | 14 | * paragraph) shall be included in all copies or substantial portions of the |
15 | * Software. | | 15 | * Software. |
16 | * | | 16 | * |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | | 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | | 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | | 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | | 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | | 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | | 22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
23 | * IN THE SOFTWARE. | | 23 | * IN THE SOFTWARE. |
24 | * | | 24 | * |
25 | */ | | 25 | */ |
26 | | | 26 | |
27 | #include <sys/cdefs.h> | | 27 | #include <sys/cdefs.h> |
28 | __KERNEL_RCSID(0, "$NetBSD: i915_pci.c,v 1.4 2021/12/19 01:44:49 riastradh Exp $"); | | 28 | __KERNEL_RCSID(0, "$NetBSD: i915_pci.c,v 1.4.4.1 2024/01/15 14:13:39 martin Exp $"); |
29 | | | 29 | |
30 | #include <linux/console.h> | | 30 | #include <linux/console.h> |
31 | #include <linux/vga_switcheroo.h> | | 31 | #include <linux/vga_switcheroo.h> |
32 | | | 32 | |
33 | #include <drm/drm_drv.h> | | 33 | #include <drm/drm_drv.h> |
34 | | | 34 | |
35 | #include "display/intel_fbdev.h" | | 35 | #include "display/intel_fbdev.h" |
36 | | | 36 | |
37 | #include "i915_drv.h" | | 37 | #include "i915_drv.h" |
38 | #include "i915_perf.h" | | 38 | #include "i915_perf.h" |
39 | #include "i915_globals.h" | | 39 | #include "i915_globals.h" |
40 | #include "i915_selftest.h" | | 40 | #include "i915_selftest.h" |
41 | | | 41 | |
| @@ -432,27 +432,27 @@ static const struct intel_device_info sn | | | @@ -432,27 +432,27 @@ static const struct intel_device_info sn |
432 | }; | | 432 | }; |
433 | | | 433 | |
434 | #define GEN7_FEATURES \ | | 434 | #define GEN7_FEATURES \ |
435 | GEN(7), \ | | 435 | GEN(7), \ |
436 | .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \ | | 436 | .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \ |
437 | .display.has_hotplug = 1, \ | | 437 | .display.has_hotplug = 1, \ |
438 | .display.has_fbc = 1, \ | | 438 | .display.has_fbc = 1, \ |
439 | .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ | | 439 | .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ |
440 | .has_coherent_ggtt = true, \ | | 440 | .has_coherent_ggtt = true, \ |
441 | .has_llc = 1, \ | | 441 | .has_llc = 1, \ |
442 | .has_rc6 = 1, \ | | 442 | .has_rc6 = 1, \ |
443 | .has_rc6p = 1, \ | | 443 | .has_rc6p = 1, \ |
444 | .has_rps = true, \ | | 444 | .has_rps = true, \ |
445 | .ppgtt_type = INTEL_PPGTT_FULL, \ | | 445 | .ppgtt_type = INTEL_PPGTT_ALIASING, \ |
446 | .ppgtt_size = 31, \ | | 446 | .ppgtt_size = 31, \ |
447 | IVB_PIPE_OFFSETS, \ | | 447 | IVB_PIPE_OFFSETS, \ |
448 | IVB_CURSOR_OFFSETS, \ | | 448 | IVB_CURSOR_OFFSETS, \ |
449 | IVB_COLORS, \ | | 449 | IVB_COLORS, \ |
450 | GEN_DEFAULT_PAGE_SIZES, \ | | 450 | GEN_DEFAULT_PAGE_SIZES, \ |
451 | GEN_DEFAULT_REGIONS | | 451 | GEN_DEFAULT_REGIONS |
452 | | | 452 | |
453 | #define IVB_D_PLATFORM \ | | 453 | #define IVB_D_PLATFORM \ |
454 | GEN7_FEATURES, \ | | 454 | GEN7_FEATURES, \ |
455 | PLATFORM(INTEL_IVYBRIDGE), \ | | 455 | PLATFORM(INTEL_IVYBRIDGE), \ |
456 | .has_l3_dpf = 1 | | 456 | .has_l3_dpf = 1 |
457 | | | 457 | |
458 | static const struct intel_device_info ivb_d_gt1_info = { | | 458 | static const struct intel_device_info ivb_d_gt1_info = { |
| @@ -489,27 +489,27 @@ static const struct intel_device_info iv | | | @@ -489,27 +489,27 @@ static const struct intel_device_info iv |
489 | .has_l3_dpf = 1, | | 489 | .has_l3_dpf = 1, |
490 | }; | | 490 | }; |
491 | | | 491 | |
492 | static const struct intel_device_info vlv_info = { | | 492 | static const struct intel_device_info vlv_info = { |
493 | PLATFORM(INTEL_VALLEYVIEW), | | 493 | PLATFORM(INTEL_VALLEYVIEW), |
494 | GEN(7), | | 494 | GEN(7), |
495 | .is_lp = 1, | | 495 | .is_lp = 1, |
496 | .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), | | 496 | .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), |
497 | .has_runtime_pm = 1, | | 497 | .has_runtime_pm = 1, |
498 | .has_rc6 = 1, | | 498 | .has_rc6 = 1, |
499 | .has_rps = true, | | 499 | .has_rps = true, |
500 | .display.has_gmch = 1, | | 500 | .display.has_gmch = 1, |
501 | .display.has_hotplug = 1, | | 501 | .display.has_hotplug = 1, |
502 | .ppgtt_type = INTEL_PPGTT_FULL, | | 502 | .ppgtt_type = INTEL_PPGTT_ALIASING, |
503 | .ppgtt_size = 31, | | 503 | .ppgtt_size = 31, |
504 | .has_snoop = true, | | 504 | .has_snoop = true, |
505 | .has_coherent_ggtt = false, | | 505 | .has_coherent_ggtt = false, |
506 | .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), | | 506 | .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), |
507 | .display_mmio_offset = VLV_DISPLAY_BASE, | | 507 | .display_mmio_offset = VLV_DISPLAY_BASE, |
508 | I9XX_PIPE_OFFSETS, | | 508 | I9XX_PIPE_OFFSETS, |
509 | I9XX_CURSOR_OFFSETS, | | 509 | I9XX_CURSOR_OFFSETS, |
510 | I965_COLORS, | | 510 | I965_COLORS, |
511 | GEN_DEFAULT_PAGE_SIZES, | | 511 | GEN_DEFAULT_PAGE_SIZES, |
512 | GEN_DEFAULT_REGIONS, | | 512 | GEN_DEFAULT_REGIONS, |
513 | }; | | 513 | }; |
514 | | | 514 | |
515 | #define G75_FEATURES \ | | 515 | #define G75_FEATURES \ |