fix various typos in comments.diff -r1.5 -r1.6 src/sys/dev/audio/mulaw.c
(andvar)
--- src/sys/dev/audio/mulaw.c 2021/07/21 06:35:44 1.5
+++ src/sys/dev/audio/mulaw.c 2024/02/02 22:39:10 1.6
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: mulaw.c,v 1.5 2021/07/21 06:35:44 skrll Exp $ */ | 1 | /* $NetBSD: mulaw.c,v 1.6 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (C) 2017 Tetsuya Isaki. All rights reserved. | 4 | * Copyright (C) 2017 Tetsuya Isaki. All rights reserved. | |
5 | * Copyright (C) 2017 Y.Sugahara (moveccr). All rights reserved. | 5 | * Copyright (C) 2017 Y.Sugahara (moveccr). All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
@@ -17,27 +17,27 @@ | @@ -17,27 +17,27 @@ | |||
17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | |
23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
26 | * SUCH DAMAGE. | 26 | * SUCH DAMAGE. | |
27 | */ | 27 | */ | |
28 | 28 | |||
29 | #include <sys/cdefs.h> | 29 | #include <sys/cdefs.h> | |
30 | __KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.5 2021/07/21 06:35:44 skrll Exp $"); | 30 | __KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1.6 2024/02/02 22:39:10 andvar Exp $"); | |
31 | 31 | |||
32 | #include <sys/param.h> | 32 | #include <sys/param.h> | |
33 | #include <sys/types.h> | 33 | #include <sys/types.h> | |
34 | #include <sys/systm.h> | 34 | #include <sys/systm.h> | |
35 | #include <sys/device.h> | 35 | #include <sys/device.h> | |
36 | #include <dev/audio/audiovar.h> | 36 | #include <dev/audio/audiovar.h> | |
37 | #include <dev/audio/mulaw.h> | 37 | #include <dev/audio/mulaw.h> | |
38 | 38 | |||
39 | /* | 39 | /* | |
40 | * audio_internal_to_mulaw has two implementations. | 40 | * audio_internal_to_mulaw has two implementations. | |
41 | * | 41 | * | |
42 | * 1. Use 8bit table (MULAW_LQ_ENC) | 42 | * 1. Use 8bit table (MULAW_LQ_ENC) | |
43 | * It's traditional implementation and its precision is 8bit. | 43 | * It's traditional implementation and its precision is 8bit. | |
@@ -47,27 +47,27 @@ __KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1. | @@ -47,27 +47,27 @@ __KERNEL_RCSID(0, "$NetBSD: mulaw.c,v 1. | |||
47 | * 2. Calculation (default) | 47 | * 2. Calculation (default) | |
48 | * It calculates mu-law with full spec and its precision is 14bit. | 48 | * It calculates mu-law with full spec and its precision is 14bit. | |
49 | * It's about 3 times slower but the size is less than a half (on m68k, | 49 | * It's about 3 times slower but the size is less than a half (on m68k, | |
50 | * for example). | 50 | * for example). | |
51 | * | 51 | * | |
52 | * mu-law is no longer a popular format. I think size-optimized is better. | 52 | * mu-law is no longer a popular format. I think size-optimized is better. | |
53 | */ | 53 | */ | |
54 | /* #define MULAW_LQ_ENC */ | 54 | /* #define MULAW_LQ_ENC */ | |
55 | 55 | |||
56 | /* | 56 | /* | |
57 | * About mulaw32 format. | 57 | * About mulaw32 format. | |
58 | * | 58 | * | |
59 | * The format which I call ``mulaw32'' is only used in dev/tc/bba.c . | 59 | * The format which I call ``mulaw32'' is only used in dev/tc/bba.c . | |
60 | * It is 8bit mu-law but 16bit left-shifted and its containter is 32bit. | 60 | * It is 8bit mu-law but 16bit left-shifted and its container is 32bit. | |
61 | * Not mu-law calculated in 32bit. | 61 | * Not mu-law calculated in 32bit. | |
62 | * | 62 | * | |
63 | * When MULAW32 is not defined (it's default), this file outputs | 63 | * When MULAW32 is not defined (it's default), this file outputs | |
64 | * audio_internal_to_mulaw() and audio_mulaw_to_internal(). When | 64 | * audio_internal_to_mulaw() and audio_mulaw_to_internal(). When | |
65 | * MULAW32 is defined, this file outputs audio_internal_to_mulaw32() | 65 | * MULAW32 is defined, this file outputs audio_internal_to_mulaw32() | |
66 | * and audio_mulaw32_to_internal() instead. | 66 | * and audio_mulaw32_to_internal() instead. | |
67 | * | 67 | * | |
68 | * Since mu-law is used as userland format and is mandatory, all audio | 68 | * Since mu-law is used as userland format and is mandatory, all audio | |
69 | * drivers (including tc/bba) link this mulaw.c in ordinary procedure. | 69 | * drivers (including tc/bba) link this mulaw.c in ordinary procedure. | |
70 | * On the other hand, only tc/bba also needs audio_internal_to_mulaw32() | 70 | * On the other hand, only tc/bba also needs audio_internal_to_mulaw32() | |
71 | * and audio_mulaw32_to_internal() as its hardware drivers codec, so | 71 | * and audio_mulaw32_to_internal() as its hardware drivers codec, so | |
72 | * define MULAW32 and include this file. It's a bit tricky but I think | 72 | * define MULAW32 and include this file. It's a bit tricky but I think | |
73 | * this is the simplest way. | 73 | * this is the simplest way. |
--- src/sys/dev/i2c/sht3xreg.h 2022/05/28 10:36:23 1.3
+++ src/sys/dev/i2c/sht3xreg.h 2024/02/02 22:39:10 1.4
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: sht3xreg.h,v 1.3 2022/05/28 10:36:23 andvar Exp $ */ | 1 | /* $NetBSD: sht3xreg.h,v 1.4 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 2021 Brad Spencer <brad@anduin.eldar.org> | 4 | * Copyright (c) 2021 Brad Spencer <brad@anduin.eldar.org> | |
5 | * | 5 | * | |
6 | * Permission to use, copy, modify, and distribute this software for any | 6 | * Permission to use, copy, modify, and distribute this software for any | |
7 | * purpose with or without fee is hereby granted, provided that the above | 7 | * purpose with or without fee is hereby granted, provided that the above | |
8 | * copyright notice and this permission notice appear in all copies. | 8 | * copyright notice and this permission notice appear in all copies. | |
9 | * | 9 | * | |
10 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | 10 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
11 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | 11 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
12 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | 12 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
13 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | 13 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
14 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | 14 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
@@ -74,27 +74,27 @@ | @@ -74,27 +74,27 @@ | |||
74 | #define SHT3X_ALERT_PENDING 0x8000 | 74 | #define SHT3X_ALERT_PENDING 0x8000 | |
75 | #define SHT3X_HEATER_STATUS 0x2000 | 75 | #define SHT3X_HEATER_STATUS 0x2000 | |
76 | #define SHT3X_RH_TRACKING_ALERT 0x0800 | 76 | #define SHT3X_RH_TRACKING_ALERT 0x0800 | |
77 | #define SHT3X_TEMP_TRACKING_ALERT 0x0400 | 77 | #define SHT3X_TEMP_TRACKING_ALERT 0x0400 | |
78 | #define SHT3X_RESET_DETECTED 0x0010 | 78 | #define SHT3X_RESET_DETECTED 0x0010 | |
79 | #define SHT3X_LAST_COMMAND_STATUS 0x0002 | 79 | #define SHT3X_LAST_COMMAND_STATUS 0x0002 | |
80 | #define SHT3X_WRITE_DATA_CHECKSUM 0x0001 | 80 | #define SHT3X_WRITE_DATA_CHECKSUM 0x0001 | |
81 | 81 | |||
82 | /* Alert mode */ | 82 | /* Alert mode */ | |
83 | /* This is not supported by the sht3xtemp driver as | 83 | /* This is not supported by the sht3xtemp driver as | |
84 | the information in the datasheet was not enough to | 84 | the information in the datasheet was not enough to | |
85 | get it working. A read of the registers appears to | 85 | get it working. A read of the registers appears to | |
86 | function just fine, but writes do not do anything, and | 86 | function just fine, but writes do not do anything, and | |
87 | the chip does not indicate any errors occured. | 87 | the chip does not indicate any errors occurred. | |
88 | */ | 88 | */ | |
89 | #define SHT3X_READ_HIGH_ALERT_SET 0xE11F | 89 | #define SHT3X_READ_HIGH_ALERT_SET 0xE11F | |
90 | #define SHT3X_READ_HIGH_ALERT_CLEAR 0xE114 | 90 | #define SHT3X_READ_HIGH_ALERT_CLEAR 0xE114 | |
91 | #define SHT3X_READ_LOW_ALERT_SET 0xE102 | 91 | #define SHT3X_READ_LOW_ALERT_SET 0xE102 | |
92 | #define SHT3X_READ_LOW_ALERT_CLEAR 0xE109 | 92 | #define SHT3X_READ_LOW_ALERT_CLEAR 0xE109 | |
93 | #define SHT3X_WRITE_HIGH_ALERT_SET 0x611D | 93 | #define SHT3X_WRITE_HIGH_ALERT_SET 0x611D | |
94 | #define SHT3X_WRITE_HIGH_ALERT_CLEAR 0x6116 | 94 | #define SHT3X_WRITE_HIGH_ALERT_CLEAR 0x6116 | |
95 | #define SHT3X_WRITE_LOW_ALERT_SET 0x6100 | 95 | #define SHT3X_WRITE_LOW_ALERT_SET 0x6100 | |
96 | #define SHT3X_WRITE_LOW_ALERT_CLEAR 0x610B | 96 | #define SHT3X_WRITE_LOW_ALERT_CLEAR 0x610B | |
97 | 97 | |||
98 | /* Other commands */ | 98 | /* Other commands */ | |
99 | #define SHT3X_SOFT_RESET 0x30A2 | 99 | #define SHT3X_SOFT_RESET 0x30A2 | |
100 | /* this is not documented in the datasheet, but is present in a | 100 | /* this is not documented in the datasheet, but is present in a |
--- src/sys/dev/ic/aic6915.c 2022/09/25 18:43:32 1.45
+++ src/sys/dev/ic/aic6915.c 2024/02/02 22:39:10 1.46
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: aic6915.c,v 1.45 2022/09/25 18:43:32 thorpej Exp $ */ | 1 | /* $NetBSD: aic6915.c,v 1.46 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2001 The NetBSD Foundation, Inc. | 4 | * Copyright (c) 2001 The NetBSD Foundation, Inc. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * This code is derived from software contributed to The NetBSD Foundation | 7 | * This code is derived from software contributed to The NetBSD Foundation | |
8 | * by Jason R. Thorpe. | 8 | * by Jason R. Thorpe. | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions and the following disclaimer. | 14 | * notice, this list of conditions and the following disclaimer. | |
@@ -25,27 +25,27 @@ | @@ -25,27 +25,27 @@ | |||
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
29 | * POSSIBILITY OF SUCH DAMAGE. | 29 | * POSSIBILITY OF SUCH DAMAGE. | |
30 | */ | 30 | */ | |
31 | 31 | |||
32 | /* | 32 | /* | |
33 | * Device driver for the Adaptec AIC-6915 (``Starfire'') | 33 | * Device driver for the Adaptec AIC-6915 (``Starfire'') | |
34 | * 10/100 Ethernet controller. | 34 | * 10/100 Ethernet controller. | |
35 | */ | 35 | */ | |
36 | 36 | |||
37 | #include <sys/cdefs.h> | 37 | #include <sys/cdefs.h> | |
38 | __KERNEL_RCSID(0, "$NetBSD: aic6915.c,v 1.45 2022/09/25 18:43:32 thorpej Exp $"); | 38 | __KERNEL_RCSID(0, "$NetBSD: aic6915.c,v 1.46 2024/02/02 22:39:10 andvar Exp $"); | |
39 | 39 | |||
40 | 40 | |||
41 | #include <sys/param.h> | 41 | #include <sys/param.h> | |
42 | #include <sys/systm.h> | 42 | #include <sys/systm.h> | |
43 | #include <sys/callout.h> | 43 | #include <sys/callout.h> | |
44 | #include <sys/mbuf.h> | 44 | #include <sys/mbuf.h> | |
45 | #include <sys/kernel.h> | 45 | #include <sys/kernel.h> | |
46 | #include <sys/socket.h> | 46 | #include <sys/socket.h> | |
47 | #include <sys/ioctl.h> | 47 | #include <sys/ioctl.h> | |
48 | #include <sys/errno.h> | 48 | #include <sys/errno.h> | |
49 | #include <sys/device.h> | 49 | #include <sys/device.h> | |
50 | 50 | |||
51 | #include <net/if.h> | 51 | #include <net/if.h> | |
@@ -814,27 +814,27 @@ sf_tick(void *arg) | @@ -814,27 +814,27 @@ sf_tick(void *arg) | |||
814 | int s; | 814 | int s; | |
815 | 815 | |||
816 | s = splnet(); | 816 | s = splnet(); | |
817 | mii_tick(&sc->sc_mii); | 817 | mii_tick(&sc->sc_mii); | |
818 | sf_stats_update(sc); | 818 | sf_stats_update(sc); | |
819 | splx(s); | 819 | splx(s); | |
820 | 820 | |||
821 | callout_schedule(&sc->sc_tick_callout, hz); | 821 | callout_schedule(&sc->sc_tick_callout, hz); | |
822 | } | 822 | } | |
823 | 823 | |||
824 | /* | 824 | /* | |
825 | * sf_stats_update: | 825 | * sf_stats_update: | |
826 | * | 826 | * | |
827 | * Read the statitistics counters. | 827 | * Read the statistics counters. | |
828 | */ | 828 | */ | |
829 | static void | 829 | static void | |
830 | sf_stats_update(struct sf_softc *sc) | 830 | sf_stats_update(struct sf_softc *sc) | |
831 | { | 831 | { | |
832 | struct sf_stats stats; | 832 | struct sf_stats stats; | |
833 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; | 833 | struct ifnet *ifp = &sc->sc_ethercom.ec_if; | |
834 | uint32_t *p; | 834 | uint32_t *p; | |
835 | u_int i; | 835 | u_int i; | |
836 | 836 | |||
837 | p = &stats.TransmitOKFrames; | 837 | p = &stats.TransmitOKFrames; | |
838 | for (i = 0; i < (sizeof(stats) / sizeof(uint32_t)); i++) { | 838 | for (i = 0; i < (sizeof(stats) / sizeof(uint32_t)); i++) { | |
839 | *p++ = sf_genreg_read(sc, | 839 | *p++ = sf_genreg_read(sc, | |
840 | SF_STATS_BASE + (i * sizeof(uint32_t))); | 840 | SF_STATS_BASE + (i * sizeof(uint32_t))); |
--- src/sys/dev/ic/aic79xx.c 2023/08/01 20:50:11 1.69
+++ src/sys/dev/ic/aic79xx.c 2024/02/02 22:39:10 1.70
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: aic79xx.c,v 1.69 2023/08/01 20:50:11 andvar Exp $ */ | 1 | /* $NetBSD: aic79xx.c,v 1.70 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Core routines and tables shareable across OS platforms. | 4 | * Core routines and tables shareable across OS platforms. | |
5 | * | 5 | * | |
6 | * Copyright (c) 1994-2002 Justin T. Gibbs. | 6 | * Copyright (c) 1994-2002 Justin T. Gibbs. | |
7 | * Copyright (c) 2000-2003 Adaptec Inc. | 7 | * Copyright (c) 2000-2003 Adaptec Inc. | |
8 | * All rights reserved. | 8 | * All rights reserved. | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions, and the following disclaimer, | 14 | * notice, this list of conditions, and the following disclaimer, | |
@@ -39,27 +39,27 @@ | @@ -39,27 +39,27 @@ | |||
39 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 39 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
40 | * POSSIBILITY OF SUCH DAMAGES. | 40 | * POSSIBILITY OF SUCH DAMAGES. | |
41 | * | 41 | * | |
42 | * Id: //depot/aic7xxx/aic7xxx/aic79xx.c#202 $ | 42 | * Id: //depot/aic7xxx/aic7xxx/aic79xx.c#202 $ | |
43 | * | 43 | * | |
44 | * $FreeBSD: src/sys/dev/aic7xxx/aic79xx.c,v 1.24 2003/06/28 04:46:54 gibbs Exp $ | 44 | * $FreeBSD: src/sys/dev/aic7xxx/aic79xx.c,v 1.24 2003/06/28 04:46:54 gibbs Exp $ | |
45 | */ | 45 | */ | |
46 | /* | 46 | /* | |
47 | * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. | 47 | * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. | |
48 | * - April 2003 | 48 | * - April 2003 | |
49 | */ | 49 | */ | |
50 | 50 | |||
51 | #include <sys/cdefs.h> | 51 | #include <sys/cdefs.h> | |
52 | __KERNEL_RCSID(0, "$NetBSD: aic79xx.c,v 1.69 2023/08/01 20:50:11 andvar Exp $"); | 52 | __KERNEL_RCSID(0, "$NetBSD: aic79xx.c,v 1.70 2024/02/02 22:39:10 andvar Exp $"); | |
53 | 53 | |||
54 | #include <dev/ic/aic79xx_osm.h> | 54 | #include <dev/ic/aic79xx_osm.h> | |
55 | #include <dev/ic/aic79xx_inline.h> | 55 | #include <dev/ic/aic79xx_inline.h> | |
56 | #include <dev/ic/aic7xxx_cam.h> | 56 | #include <dev/ic/aic7xxx_cam.h> | |
57 | 57 | |||
58 | #include <dev/microcode/aic7xxx/aicasm.h> | 58 | #include <dev/microcode/aic7xxx/aicasm.h> | |
59 | #include <dev/microcode/aic7xxx/aicasm_insformat.h> | 59 | #include <dev/microcode/aic7xxx/aicasm_insformat.h> | |
60 | 60 | |||
61 | 61 | |||
62 | /******************************** Globals *************************************/ | 62 | /******************************** Globals *************************************/ | |
63 | struct ahd_softc_tailq ahd_tailq = TAILQ_HEAD_INITIALIZER(ahd_tailq); | 63 | struct ahd_softc_tailq ahd_tailq = TAILQ_HEAD_INITIALIZER(ahd_tailq); | |
64 | 64 | |||
65 | /***************************** Lookup Tables **********************************/ | 65 | /***************************** Lookup Tables **********************************/ | |
@@ -1861,27 +1861,27 @@ ahd_handle_transmission_error(struct ahd | @@ -1861,27 +1861,27 @@ ahd_handle_transmission_error(struct ahd | |||
1861 | * busfree detection is enabled. Once LQIPHASE_LQ is | 1861 | * busfree detection is enabled. Once LQIPHASE_LQ is | |
1862 | * true (first entry into host message loop is much | 1862 | * true (first entry into host message loop is much | |
1863 | * the same), we must clear LQIPHASE_LQ and hit | 1863 | * the same), we must clear LQIPHASE_LQ and hit | |
1864 | * LQIRETRY so the hardware is ready to handle | 1864 | * LQIRETRY so the hardware is ready to handle | |
1865 | * a future LQ. NONPACKREQ will not be asserted again | 1865 | * a future LQ. NONPACKREQ will not be asserted again | |
1866 | * once we hit LQIRETRY until another packet is | 1866 | * once we hit LQIRETRY until another packet is | |
1867 | * processed. The target may either go busfree | 1867 | * processed. The target may either go busfree | |
1868 | * or start another packet in response to our message. | 1868 | * or start another packet in response to our message. | |
1869 | * | 1869 | * | |
1870 | * Read Streaming P0 asserted: | 1870 | * Read Streaming P0 asserted: | |
1871 | * If we raise ATN and the target completes the entire | 1871 | * If we raise ATN and the target completes the entire | |
1872 | * stream (P0 asserted during the last packet), the | 1872 | * stream (P0 asserted during the last packet), the | |
1873 | * hardware will ack all data and return to the ISTART | 1873 | * hardware will ack all data and return to the ISTART | |
1874 | * state. When the target reponds to our ATN condition, | 1874 | * state. When the target responds to our ATN condition, | |
1875 | * LQIPHASE_LQ will be asserted. We should respond to | 1875 | * LQIPHASE_LQ will be asserted. We should respond to | |
1876 | * this with an LQIRETRY to prepare for any future | 1876 | * this with an LQIRETRY to prepare for any future | |
1877 | * packets. NONPACKREQ will not be asserted again | 1877 | * packets. NONPACKREQ will not be asserted again | |
1878 | * once we hit LQIRETRY until another packet is | 1878 | * once we hit LQIRETRY until another packet is | |
1879 | * processed. The target may either go busfree or | 1879 | * processed. The target may either go busfree or | |
1880 | * start another packet in response to our message. | 1880 | * start another packet in response to our message. | |
1881 | * Busfree detection is enabled. | 1881 | * Busfree detection is enabled. | |
1882 | * | 1882 | * | |
1883 | * Read Streaming P0 not asserted: | 1883 | * Read Streaming P0 not asserted: | |
1884 | * If we raise ATN and the target transitions to | 1884 | * If we raise ATN and the target transitions to | |
1885 | * MSGOUT in or after a packet where P0 is not | 1885 | * MSGOUT in or after a packet where P0 is not | |
1886 | * asserted, the hardware will assert LQIPHASE_NLQ. | 1886 | * asserted, the hardware will assert LQIPHASE_NLQ. | |
1887 | * We should respond to the LQIPHASE_NLQ with an | 1887 | * We should respond to the LQIPHASE_NLQ with an | |
@@ -7610,27 +7610,27 @@ ahd_reset_channel(struct ahd_softc *ahd, | @@ -7610,27 +7610,27 @@ ahd_reset_channel(struct ahd_softc *ahd, | |||
7610 | * Disable selections so no automatic hardware | 7610 | * Disable selections so no automatic hardware | |
7611 | * functions will modify chip state. | 7611 | * functions will modify chip state. | |
7612 | */ | 7612 | */ | |
7613 | ahd_outb(ahd, SCSISEQ0, 0); | 7613 | ahd_outb(ahd, SCSISEQ0, 0); | |
7614 | ahd_outb(ahd, SCSISEQ1, 0); | 7614 | ahd_outb(ahd, SCSISEQ1, 0); | |
7615 | 7615 | |||
7616 | /* | 7616 | /* | |
7617 | * Safely shut down our DMA engines. Always start with | 7617 | * Safely shut down our DMA engines. Always start with | |
7618 | * the FIFO that is not currently active (if any are | 7618 | * the FIFO that is not currently active (if any are | |
7619 | * actively connected). | 7619 | * actively connected). | |
7620 | */ | 7620 | */ | |
7621 | next_fifo = fifo = ahd_inb(ahd, DFFSTAT) & CURRFIFO; | 7621 | next_fifo = fifo = ahd_inb(ahd, DFFSTAT) & CURRFIFO; | |
7622 | if (next_fifo > CURRFIFO_1) | 7622 | if (next_fifo > CURRFIFO_1) | |
7623 | /* If disconneced, arbitrarily start with FIFO1. */ | 7623 | /* If disconnected, arbitrarily start with FIFO1. */ | |
7624 | next_fifo = fifo = 0; | 7624 | next_fifo = fifo = 0; | |
7625 | do { | 7625 | do { | |
7626 | next_fifo ^= CURRFIFO_1; | 7626 | next_fifo ^= CURRFIFO_1; | |
7627 | ahd_set_modes(ahd, next_fifo, next_fifo); | 7627 | ahd_set_modes(ahd, next_fifo, next_fifo); | |
7628 | ahd_outb(ahd, DFCNTRL, | 7628 | ahd_outb(ahd, DFCNTRL, | |
7629 | ahd_inb(ahd, DFCNTRL) & ~(SCSIEN|HDMAEN)); | 7629 | ahd_inb(ahd, DFCNTRL) & ~(SCSIEN|HDMAEN)); | |
7630 | while ((ahd_inb(ahd, DFCNTRL) & HDMAENACK) != 0) | 7630 | while ((ahd_inb(ahd, DFCNTRL) & HDMAENACK) != 0) | |
7631 | ahd_delay(10); | 7631 | ahd_delay(10); | |
7632 | /* | 7632 | /* | |
7633 | * Set CURRFIFO to the now inactive channel. | 7633 | * Set CURRFIFO to the now inactive channel. | |
7634 | */ | 7634 | */ | |
7635 | ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI); | 7635 | ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI); | |
7636 | ahd_outb(ahd, DFFSTAT, next_fifo); | 7636 | ahd_outb(ahd, DFFSTAT, next_fifo); | |
@@ -7890,27 +7890,27 @@ ahd_handle_scsi_status(struct ahd_softc | @@ -7890,27 +7890,27 @@ ahd_handle_scsi_status(struct ahd_softc | |||
7890 | scsipi_printaddr(scb->xs->xs_periph); | 7890 | scsipi_printaddr(scb->xs->xs_periph); | |
7891 | if (scsi_4btoul(siu->pkt_failures_length) < 4) { | 7891 | if (scsi_4btoul(siu->pkt_failures_length) < 4) { | |
7892 | printf("Unable to parse pkt_failures\n"); | 7892 | printf("Unable to parse pkt_failures\n"); | |
7893 | } else { | 7893 | } else { | |
7894 | 7894 | |||
7895 | switch (SIU_PKTFAIL_CODE(siu)) { | 7895 | switch (SIU_PKTFAIL_CODE(siu)) { | |
7896 | case SIU_PFC_NONE: | 7896 | case SIU_PFC_NONE: | |
7897 | printf("No packet failure found\n"); | 7897 | printf("No packet failure found\n"); | |
7898 | break; | 7898 | break; | |
7899 | case SIU_PFC_CIU_FIELDS_INVALID: | 7899 | case SIU_PFC_CIU_FIELDS_INVALID: | |
7900 | printf("Invalid Command IU Field\n"); | 7900 | printf("Invalid Command IU Field\n"); | |
7901 | break; | 7901 | break; | |
7902 | case SIU_PFC_TMF_NOT_SUPPORTED: | 7902 | case SIU_PFC_TMF_NOT_SUPPORTED: | |
7903 | printf("TMF not supportd\n"); | 7903 | printf("TMF not supported\n"); | |
7904 | break; | 7904 | break; | |
7905 | case SIU_PFC_TMF_FAILED: | 7905 | case SIU_PFC_TMF_FAILED: | |
7906 | printf("TMF failed\n"); | 7906 | printf("TMF failed\n"); | |
7907 | break; | 7907 | break; | |
7908 | case SIU_PFC_INVALID_TYPE_CODE: | 7908 | case SIU_PFC_INVALID_TYPE_CODE: | |
7909 | printf("Invalid L_Q Type code\n"); | 7909 | printf("Invalid L_Q Type code\n"); | |
7910 | break; | 7910 | break; | |
7911 | case SIU_PFC_ILLEGAL_REQUEST: | 7911 | case SIU_PFC_ILLEGAL_REQUEST: | |
7912 | printf("Illegal request\n"); | 7912 | printf("Illegal request\n"); | |
7913 | default: | 7913 | default: | |
7914 | break; | 7914 | break; | |
7915 | } | 7915 | } | |
7916 | } | 7916 | } | |
@@ -8952,51 +8952,51 @@ ahd_read_seeprom(struct ahd_softc *ahd, | @@ -8952,51 +8952,51 @@ ahd_read_seeprom(struct ahd_softc *ahd, | |||
8952 | *bytestream_ptr = ahd_inb(ahd, SEEDAT+1); | 8952 | *bytestream_ptr = ahd_inb(ahd, SEEDAT+1); | |
8953 | } else { | 8953 | } else { | |
8954 | /* | 8954 | /* | |
8955 | * ahd_inw() already handles machine byte order. | 8955 | * ahd_inw() already handles machine byte order. | |
8956 | */ | 8956 | */ | |
8957 | *tbuf = ahd_inw(ahd, SEEDAT); | 8957 | *tbuf = ahd_inw(ahd, SEEDAT); | |
8958 | } | 8958 | } | |
8959 | tbuf++; | 8959 | tbuf++; | |
8960 | } | 8960 | } | |
8961 | return (error); | 8961 | return (error); | |
8962 | } | 8962 | } | |
8963 | 8963 | |||
8964 | /* | 8964 | /* | |
8965 | * Write count 16bit words from tbuf, into SEEPROM attache to the | 8965 | * Write count 16bit words from tbuf, into SEEPROM attached to the | |
8966 | * controller starting at 16bit word address start_addr, using the | 8966 | * controller starting at 16bit word address start_addr, using the | |
8967 | * controller's SEEPROM writing state machine. | 8967 | * controller's SEEPROM writing state machine. | |
8968 | */ | 8968 | */ | |
8969 | int | 8969 | int | |
8970 | ahd_write_seeprom(struct ahd_softc *ahd, uint16_t *tbuf, | 8970 | ahd_write_seeprom(struct ahd_softc *ahd, uint16_t *tbuf, | |
8971 | u_int start_addr, u_int count) | 8971 | u_int start_addr, u_int count) | |
8972 | { | 8972 | { | |
8973 | u_int cur_addr; | 8973 | u_int cur_addr; | |
8974 | u_int end_addr; | 8974 | u_int end_addr; | |
8975 | int error; | 8975 | int error; | |
8976 | int retval; | 8976 | int retval; | |
8977 | 8977 | |||
8978 | AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK); | 8978 | AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK); | |
8979 | error = ENOENT; | 8979 | error = ENOENT; | |
8980 | 8980 | |||
8981 | /* Place the chip into write-enable mode */ | 8981 | /* Place the chip into write-enable mode */ | |
8982 | ahd_outb(ahd, SEEADR, SEEOP_EWEN_ADDR); | 8982 | ahd_outb(ahd, SEEADR, SEEOP_EWEN_ADDR); | |
8983 | ahd_outb(ahd, SEECTL, SEEOP_EWEN | SEESTART); | 8983 | ahd_outb(ahd, SEECTL, SEEOP_EWEN | SEESTART); | |
8984 | error = ahd_wait_seeprom(ahd); | 8984 | error = ahd_wait_seeprom(ahd); | |
8985 | if (error) | 8985 | if (error) | |
8986 | return (error); | 8986 | return (error); | |
8987 | 8987 | |||
8988 | /* | 8988 | /* | |
8989 | * Write the data. If we don't get throught the loop at | 8989 | * Write the data. If we don't get through the loop at | |
8990 | * least once, the arguments were invalid. | 8990 | * least once, the arguments were invalid. | |
8991 | */ | 8991 | */ | |
8992 | retval = EINVAL; | 8992 | retval = EINVAL; | |
8993 | end_addr = start_addr + count; | 8993 | end_addr = start_addr + count; | |
8994 | for (cur_addr = start_addr; cur_addr < end_addr; cur_addr++) { | 8994 | for (cur_addr = start_addr; cur_addr < end_addr; cur_addr++) { | |
8995 | ahd_outw(ahd, SEEDAT, *tbuf++); | 8995 | ahd_outw(ahd, SEEDAT, *tbuf++); | |
8996 | ahd_outb(ahd, SEEADR, cur_addr); | 8996 | ahd_outb(ahd, SEEADR, cur_addr); | |
8997 | ahd_outb(ahd, SEECTL, SEEOP_WRITE | SEESTART); | 8997 | ahd_outb(ahd, SEECTL, SEEOP_WRITE | SEESTART); | |
8998 | 8998 | |||
8999 | retval = ahd_wait_seeprom(ahd); | 8999 | retval = ahd_wait_seeprom(ahd); | |
9000 | if (retval) | 9000 | if (retval) | |
9001 | break; | 9001 | break; | |
9002 | } | 9002 | } |
--- src/sys/dev/ic/aic7xxx.c 2022/06/27 22:41:29 1.147
+++ src/sys/dev/ic/aic7xxx.c 2024/02/02 22:39:10 1.148
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $ */ | 1 | /* $NetBSD: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Core routines and tables shareable across OS platforms. | 4 | * Core routines and tables shareable across OS platforms. | |
5 | * | 5 | * | |
6 | * Copyright (c) 1994-2002 Justin T. Gibbs. | 6 | * Copyright (c) 1994-2002 Justin T. Gibbs. | |
7 | * Copyright (c) 2000-2002 Adaptec Inc. | 7 | * Copyright (c) 2000-2002 Adaptec Inc. | |
8 | * All rights reserved. | 8 | * All rights reserved. | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions, and the following disclaimer, | 14 | * notice, this list of conditions, and the following disclaimer, | |
@@ -29,38 +29,38 @@ | @@ -29,38 +29,38 @@ | |||
29 | * NO WARRANTY | 29 | * NO WARRANTY | |
30 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | 30 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
31 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | 31 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
32 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | 32 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | |
33 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | 33 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
34 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 34 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
35 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 35 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
36 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 36 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
37 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | 37 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
38 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | 38 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | |
39 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 39 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
40 | * POSSIBILITY OF SUCH DAMAGES. | 40 | * POSSIBILITY OF SUCH DAMAGES. | |
41 | * | 41 | * | |
42 | * $Id: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $ | 42 | * $Id: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $ | |
43 | * | 43 | * | |
44 | * //depot/aic7xxx/aic7xxx/aic7xxx.c#112 $ | 44 | * //depot/aic7xxx/aic7xxx/aic7xxx.c#112 $ | |
45 | * | 45 | * | |
46 | * $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx.c,v 1.88 2003/01/20 20:44:55 gibbs Exp $ | 46 | * $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx.c,v 1.88 2003/01/20 20:44:55 gibbs Exp $ | |
47 | */ | 47 | */ | |
48 | /* | 48 | /* | |
49 | * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003 | 49 | * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003 | |
50 | */ | 50 | */ | |
51 | 51 | |||
52 | #include <sys/cdefs.h> | 52 | #include <sys/cdefs.h> | |
53 | __KERNEL_RCSID(0, "$NetBSD: aic7xxx.c,v 1.147 2022/06/27 22:41:29 andvar Exp $"); | 53 | __KERNEL_RCSID(0, "$NetBSD: aic7xxx.c,v 1.148 2024/02/02 22:39:10 andvar Exp $"); | |
54 | 54 | |||
55 | #include <dev/ic/aic7xxx_osm.h> | 55 | #include <dev/ic/aic7xxx_osm.h> | |
56 | #include <dev/ic/aic7xxx_inline.h> | 56 | #include <dev/ic/aic7xxx_inline.h> | |
57 | #include <dev/ic/aic7xxx_cam.h> | 57 | #include <dev/ic/aic7xxx_cam.h> | |
58 | 58 | |||
59 | /****************************** Softc Data ************************************/ | 59 | /****************************** Softc Data ************************************/ | |
60 | struct ahc_softc_tailq ahc_tailq = TAILQ_HEAD_INITIALIZER(ahc_tailq); | 60 | struct ahc_softc_tailq ahc_tailq = TAILQ_HEAD_INITIALIZER(ahc_tailq); | |
61 | 61 | |||
62 | /***************************** Lookup Tables **********************************/ | 62 | /***************************** Lookup Tables **********************************/ | |
63 | const char * const ahc_chip_names[] = | 63 | const char * const ahc_chip_names[] = | |
64 | { | 64 | { | |
65 | "NONE", | 65 | "NONE", | |
66 | "aic7770", | 66 | "aic7770", | |
@@ -4130,27 +4130,27 @@ ahc_build_free_scb_list(struct ahc_softc | @@ -4130,27 +4130,27 @@ ahc_build_free_scb_list(struct ahc_softc | |||
4130 | 4130 | |||
4131 | scbsize = 32; | 4131 | scbsize = 32; | |
4132 | if ((ahc->flags & AHC_LSCBS_ENABLED) != 0) | 4132 | if ((ahc->flags & AHC_LSCBS_ENABLED) != 0) | |
4133 | scbsize = 64; | 4133 | scbsize = 64; | |
4134 | 4134 | |||
4135 | for (i = 0; i < ahc->scb_data->maxhscbs; i++) { | 4135 | for (i = 0; i < ahc->scb_data->maxhscbs; i++) { | |
4136 | int j; | 4136 | int j; | |
4137 | 4137 | |||
4138 | ahc_outb(ahc, SCBPTR, i); | 4138 | ahc_outb(ahc, SCBPTR, i); | |
4139 | 4139 | |||
4140 | /* | 4140 | /* | |
4141 | * Touch all SCB bytes to avoid parity errors | 4141 | * Touch all SCB bytes to avoid parity errors | |
4142 | * should one of our debugging routines read | 4142 | * should one of our debugging routines read | |
4143 | * an otherwise uninitiatlized byte. | 4143 | * an otherwise uninitialized byte. | |
4144 | */ | 4144 | */ | |
4145 | for (j = 0; j < scbsize; j++) | 4145 | for (j = 0; j < scbsize; j++) | |
4146 | ahc_outb(ahc, SCB_BASE+j, 0xFF); | 4146 | ahc_outb(ahc, SCB_BASE+j, 0xFF); | |
4147 | 4147 | |||
4148 | /* Clear the control byte. */ | 4148 | /* Clear the control byte. */ | |
4149 | ahc_outb(ahc, SCB_CONTROL, 0); | 4149 | ahc_outb(ahc, SCB_CONTROL, 0); | |
4150 | 4150 | |||
4151 | /* Set the next pointer */ | 4151 | /* Set the next pointer */ | |
4152 | if ((ahc->flags & AHC_PAGESCBS) != 0) | 4152 | if ((ahc->flags & AHC_PAGESCBS) != 0) | |
4153 | ahc_outb(ahc, SCB_NEXT, i+1); | 4153 | ahc_outb(ahc, SCB_NEXT, i+1); | |
4154 | else | 4154 | else | |
4155 | ahc_outb(ahc, SCB_NEXT, SCB_LIST_NULL); | 4155 | ahc_outb(ahc, SCB_NEXT, SCB_LIST_NULL); | |
4156 | 4156 |
--- src/sys/dev/marvell/if_mvxpereg.h 2021/11/10 15:55:35 1.7
+++ src/sys/dev/marvell/if_mvxpereg.h 2024/02/02 22:39:10 1.8
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: if_mvxpereg.h,v 1.7 2021/11/10 15:55:35 msaitoh Exp $ */ | 1 | /* $NetBSD: if_mvxpereg.h,v 1.8 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | /* | 2 | /* | |
3 | * Copyright (c) 2015 Internet Initiative Japan Inc. | 3 | * Copyright (c) 2015 Internet Initiative Japan Inc. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * | 14 | * | |
@@ -479,27 +479,27 @@ | @@ -479,27 +479,27 @@ | |||
479 | #define MVXPE_PTXDQS_TBT_MASK (0x3fff << 16) | 479 | #define MVXPE_PTXDQS_TBT_MASK (0x3fff << 16) | |
480 | #define MVXPE_PTXDQS_TBT(x) (((x) & 0x3fff) << 16) | 480 | #define MVXPE_PTXDQS_TBT(x) (((x) & 0x3fff) << 16) | |
481 | 481 | |||
482 | /* Port TX queues Status (MVXPE_PTXS) */ | 482 | /* Port TX queues Status (MVXPE_PTXS) */ | |
483 | /* Transmitted Buffer Counter */ | 483 | /* Transmitted Buffer Counter */ | |
484 | #define MVXPE_PTXS_TBC(x) (((x) & 0x3fff) << 16) | 484 | #define MVXPE_PTXS_TBC(x) (((x) & 0x3fff) << 16) | |
485 | 485 | |||
486 | #define MVXPE_PTXS_GET_TBC(reg) (((reg) >> 16) & 0x3fff) | 486 | #define MVXPE_PTXS_GET_TBC(reg) (((reg) >> 16) & 0x3fff) | |
487 | /* Pending Descriptors Counter */ | 487 | /* Pending Descriptors Counter */ | |
488 | #define MVXPE_PTXS_PDC(x) ((x) & 0x3fff) | 488 | #define MVXPE_PTXS_PDC(x) ((x) & 0x3fff) | |
489 | #define MVXPE_PTXS_GET_PDC(x) ((x) & 0x3fff) | 489 | #define MVXPE_PTXS_GET_PDC(x) ((x) & 0x3fff) | |
490 | 490 | |||
491 | /* Port TX queues Status Update (MVXPE_PTXSU) */ | 491 | /* Port TX queues Status Update (MVXPE_PTXSU) */ | |
492 | /* Number Of Written Descriptoes */ | 492 | /* Number Of Written Descriptors */ | |
493 | #define MVXPE_PTXSU_NOWD(x) (((x) & 0xff) << 0) | 493 | #define MVXPE_PTXSU_NOWD(x) (((x) & 0xff) << 0) | |
494 | /* Number Of Released Buffers */ | 494 | /* Number Of Released Buffers */ | |
495 | #define MVXPE_PTXSU_NORB(x) (((x) & 0xff) << 16) | 495 | #define MVXPE_PTXSU_NORB(x) (((x) & 0xff) << 16) | |
496 | 496 | |||
497 | /* TX Transmitted Buffers Counter (MVXPE_TXTBC) */ | 497 | /* TX Transmitted Buffers Counter (MVXPE_TXTBC) */ | |
498 | /* Transmitted Buffers Counter */ | 498 | /* Transmitted Buffers Counter */ | |
499 | #define MVXPE_TXTBC_TBC(x) (((x) & 0x3fff) << 16) | 499 | #define MVXPE_TXTBC_TBC(x) (((x) & 0x3fff) << 16) | |
500 | 500 | |||
501 | /* Port TX Initialization (MVXPE_PTXINIT) */ | 501 | /* Port TX Initialization (MVXPE_PTXINIT) */ | |
502 | #define MVXPE_PTXINIT_TXDMAINIT (1 << 0) | 502 | #define MVXPE_PTXINIT_TXDMAINIT (1 << 0) | |
503 | 503 | |||
504 | /* | 504 | /* | |
505 | * Tx DMA Packet Modification Registers | 505 | * Tx DMA Packet Modification Registers |
--- src/sys/dev/marvell/mvgbereg.h 2021/08/30 00:08:28 1.9
+++ src/sys/dev/marvell/mvgbereg.h 2024/02/02 22:39:10 1.10
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: mvgbereg.h,v 1.9 2021/08/30 00:08:28 rin Exp $ */ | 1 | /* $NetBSD: mvgbereg.h,v 1.10 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | /* | 2 | /* | |
3 | * Copyright (c) 2007, 2013 KIYOHARA Takashi | 3 | * Copyright (c) 2007, 2013 KIYOHARA Takashi | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * | 14 | * | |
@@ -573,27 +573,27 @@ | @@ -573,27 +573,27 @@ | |||
573 | /* Port TX queues Descriptors Queue Size (MVGBE_PTXDQS) */ | 573 | /* Port TX queues Descriptors Queue Size (MVGBE_PTXDQS) */ | |
574 | /* Descriptors Queue Size */ | 574 | /* Descriptors Queue Size */ | |
575 | #define MVGBE_PTXDQS_DQS(x) (((x) & 0x3fff) << 0) | 575 | #define MVGBE_PTXDQS_DQS(x) (((x) & 0x3fff) << 0) | |
576 | /* Transmitted Buffer Threshold */ | 576 | /* Transmitted Buffer Threshold */ | |
577 | #define MVGBE_PTXDQS_TBT(x) (((x) & 0x3fff) << 16) | 577 | #define MVGBE_PTXDQS_TBT(x) (((x) & 0x3fff) << 16) | |
578 | 578 | |||
579 | /* Port TX queues Status (MVGBE_PTXS) */ | 579 | /* Port TX queues Status (MVGBE_PTXS) */ | |
580 | /* Pending Descriptors Counter */ | 580 | /* Pending Descriptors Counter */ | |
581 | #define MVGBE_PTXDQS_PDC(x) (((x) & 0x3fff) << 0) | 581 | #define MVGBE_PTXDQS_PDC(x) (((x) & 0x3fff) << 0) | |
582 | /* Transmitted Buffer Counter */ | 582 | /* Transmitted Buffer Counter */ | |
583 | #define MVGBE_PTXS_TBC(x) (((x) & 0x3fff) << 16) | 583 | #define MVGBE_PTXS_TBC(x) (((x) & 0x3fff) << 16) | |
584 | 584 | |||
585 | /* Port TX queues Status Update (MVGBE_PTXSU) */ | 585 | /* Port TX queues Status Update (MVGBE_PTXSU) */ | |
586 | /* Number Of Written Descriptoes */ | 586 | /* Number Of Written Descriptors */ | |
587 | #define MVGBE_PTXSU_NOWD(x) (((x) & 0xff) << 0) | 587 | #define MVGBE_PTXSU_NOWD(x) (((x) & 0xff) << 0) | |
588 | /* Number Of Released Buffers */ | 588 | /* Number Of Released Buffers */ | |
589 | #define MVGBE_PTXSU_NORB(x) (((x) & 0xff) << 16) | 589 | #define MVGBE_PTXSU_NORB(x) (((x) & 0xff) << 16) | |
590 | 590 | |||
591 | /* TX Transmitted Buffers Counter (MVGBE_TXTBC) */ | 591 | /* TX Transmitted Buffers Counter (MVGBE_TXTBC) */ | |
592 | /* Transmitted Buffers Counter */ | 592 | /* Transmitted Buffers Counter */ | |
593 | #define MVGBE_TXTBC_TBC(x) (((x) & 0x3fff) << 16) | 593 | #define MVGBE_TXTBC_TBC(x) (((x) & 0x3fff) << 16) | |
594 | 594 | |||
595 | /* Port TX Initialization (MVGBE_PTXINIT) */ | 595 | /* Port TX Initialization (MVGBE_PTXINIT) */ | |
596 | #define MVGBE_PTXINIT_TXDMAINIT (1 << 0) | 596 | #define MVGBE_PTXINIT_TXDMAINIT (1 << 0) | |
597 | 597 | |||
598 | /* Marvell Header (MVGBE_MH) */ | 598 | /* Marvell Header (MVGBE_MH) */ | |
599 | #define MVGBE_MH_MHEN (1 << 0) | 599 | #define MVGBE_MH_MHEN (1 << 0) | |
@@ -769,27 +769,27 @@ | @@ -769,27 +769,27 @@ | |||
769 | * Set the chip's packet size limit to 9022. | 769 | * Set the chip's packet size limit to 9022. | |
770 | * (ETHER_MAX_LEN_JUMBO + ETHER_VLAN_ENCAP_LEN) | 770 | * (ETHER_MAX_LEN_JUMBO + ETHER_VLAN_ENCAP_LEN) | |
771 | */ | 771 | */ | |
772 | #define MVGBE_MRU 9022 | 772 | #define MVGBE_MRU 9022 | |
773 | 773 | |||
774 | #define MVGBE_RXBUF_ALIGN 32 /* Cache line size */ | 774 | #define MVGBE_RXBUF_ALIGN 32 /* Cache line size */ | |
775 | #define MVGBE_RXBUF_MASK (MVGBE_RXBUF_ALIGN - 1) | 775 | #define MVGBE_RXBUF_MASK (MVGBE_RXBUF_ALIGN - 1) | |
776 | #define MVGBE_HWHEADER_SIZE 2 | 776 | #define MVGBE_HWHEADER_SIZE 2 | |
777 | 777 | |||
778 | 778 | |||
779 | /* | 779 | /* | |
780 | * DMA descriptors | 780 | * DMA descriptors | |
781 | * Despite the documentation saying these descriptors only need to be | 781 | * Despite the documentation saying these descriptors only need to be | |
782 | * aligned to 16-byte bondaries, 32-byte alignment seems to be required | 782 | * aligned to 16-byte boundaries, 32-byte alignment seems to be required | |
783 | * by the hardware. We'll just pad them out to that to make it easier. | 783 | * by the hardware. We'll just pad them out to that to make it easier. | |
784 | */ | 784 | */ | |
785 | struct mvgbe_tx_desc { | 785 | struct mvgbe_tx_desc { | |
786 | #ifdef MVGBE_BIG_ENDIAN | 786 | #ifdef MVGBE_BIG_ENDIAN | |
787 | uint16_t bytecnt; /* Descriptor buffer byte count */ | 787 | uint16_t bytecnt; /* Descriptor buffer byte count */ | |
788 | uint16_t l4ichk; /* CPU provided TCP Checksum */ | 788 | uint16_t l4ichk; /* CPU provided TCP Checksum */ | |
789 | uint32_t cmdsts; /* Descriptor command status */ | 789 | uint32_t cmdsts; /* Descriptor command status */ | |
790 | uint32_t nextdescptr; /* Next descriptor pointer */ | 790 | uint32_t nextdescptr; /* Next descriptor pointer */ | |
791 | uint32_t bufptr; /* Descriptor buffer pointer */ | 791 | uint32_t bufptr; /* Descriptor buffer pointer */ | |
792 | #else | 792 | #else | |
793 | uint32_t cmdsts; /* Descriptor command status */ | 793 | uint32_t cmdsts; /* Descriptor command status */ | |
794 | uint16_t l4ichk; /* CPU provided TCP Checksum */ | 794 | uint16_t l4ichk; /* CPU provided TCP Checksum */ | |
795 | uint16_t bytecnt; /* Descriptor buffer byte count */ | 795 | uint16_t bytecnt; /* Descriptor buffer byte count */ |
--- src/sys/dev/microcode/aic7xxx/aic7xxx.reg 2022/01/25 22:01:34 1.6
+++ src/sys/dev/microcode/aic7xxx/aic7xxx.reg 2024/02/02 22:39:10 1.7
@@ -29,27 +29,27 @@ | @@ -29,27 +29,27 @@ | |||
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | 29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | 30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | |
31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | 31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
32 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 32 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | |
37 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 37 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
38 | * POSSIBILITY OF SUCH DAMAGES. | 38 | * POSSIBILITY OF SUCH DAMAGES. | |
39 | * | 39 | * | |
40 | * $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx.reg,v 1.43 2003/01/20 20:44:55 gibbs Exp $ | 40 | * $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx.reg,v 1.43 2003/01/20 20:44:55 gibbs Exp $ | |
41 | */ | 41 | */ | |
42 | VERSION = "$NetBSD: aic7xxx.reg,v 1.6 2022/01/25 22:01:34 andvar Exp $" | 42 | VERSION = "$NetBSD: aic7xxx.reg,v 1.7 2024/02/02 22:39:10 andvar Exp $" | |
43 | 43 | |||
44 | /* | 44 | /* | |
45 | * This file is processed by the aic7xxx_asm utility for use in assembling | 45 | * This file is processed by the aic7xxx_asm utility for use in assembling | |
46 | * firmware for the aic7xxx family of SCSI host adapters as well as to generate | 46 | * firmware for the aic7xxx family of SCSI host adapters as well as to generate | |
47 | * a C header file for use in the kernel portion of the Aic7xxx driver. | 47 | * a C header file for use in the kernel portion of the Aic7xxx driver. | |
48 | * | 48 | * | |
49 | * All page numbers refer to the Adaptec AIC-7770 Data Book available from | 49 | * All page numbers refer to the Adaptec AIC-7770 Data Book available from | |
50 | * Adaptec's Technical Documents Department 1-800-934-2766 | 50 | * Adaptec's Technical Documents Department 1-800-934-2766 | |
51 | */ | 51 | */ | |
52 | 52 | |||
53 | /* | 53 | /* | |
54 | * SCSI Sequence Control (p. 3-11). | 54 | * SCSI Sequence Control (p. 3-11). | |
55 | * Each bit, when set starts a specific SCSI sequence on the bus | 55 | * Each bit, when set starts a specific SCSI sequence on the bus | |
@@ -460,27 +460,27 @@ register SCAMCTL { | @@ -460,27 +460,27 @@ register SCAMCTL { | |||
460 | mask SCAMLVL 0x03 | 460 | mask SCAMLVL 0x03 | |
461 | } | 461 | } | |
462 | 462 | |||
463 | /* | 463 | /* | |
464 | * Target Mode Selecting in ID bitmask (aic7890/91/96/97) | 464 | * Target Mode Selecting in ID bitmask (aic7890/91/96/97) | |
465 | */ | 465 | */ | |
466 | register TARGID { | 466 | register TARGID { | |
467 | address 0x01b | 467 | address 0x01b | |
468 | size 2 | 468 | size 2 | |
469 | access_mode RW | 469 | access_mode RW | |
470 | } | 470 | } | |
471 | 471 | |||
472 | /* | 472 | /* | |
473 | * Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book) | 473 | * Serial Port I/O Capability register (p. 4-95 aic7860 Data Book) | |
474 | * Indicates if external logic has been attached to the chip to | 474 | * Indicates if external logic has been attached to the chip to | |
475 | * perform the tasks of accessing a serial eeprom, testing termination | 475 | * perform the tasks of accessing a serial eeprom, testing termination | |
476 | * strength, and performing cable detection. On the aic7860, most of | 476 | * strength, and performing cable detection. On the aic7860, most of | |
477 | * these features are handled on chip, but on the aic7855 an attached | 477 | * these features are handled on chip, but on the aic7855 an attached | |
478 | * aic3800 does the grunt work. | 478 | * aic3800 does the grunt work. | |
479 | */ | 479 | */ | |
480 | register SPIOCAP { | 480 | register SPIOCAP { | |
481 | address 0x01b | 481 | address 0x01b | |
482 | access_mode RW | 482 | access_mode RW | |
483 | field SOFT1 0x80 | 483 | field SOFT1 0x80 | |
484 | field SOFT0 0x40 | 484 | field SOFT0 0x40 | |
485 | field SOFTCMDEN 0x20 | 485 | field SOFTCMDEN 0x20 | |
486 | field EXT_BRDCTL 0x10 /* External Board control */ | 486 | field EXT_BRDCTL 0x10 /* External Board control */ |
--- src/sys/dev/pci/if_sipreg.h 2020/03/08 02:44:12 1.21
+++ src/sys/dev/pci/if_sipreg.h 2024/02/02 22:39:10 1.22
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: if_sipreg.h,v 1.21 2020/03/08 02:44:12 thorpej Exp $ */ | 1 | /* $NetBSD: if_sipreg.h,v 1.22 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2001 The NetBSD Foundation, Inc. | 4 | * Copyright (c) 2001 The NetBSD Foundation, Inc. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * This code is derived from software contributed to The NetBSD Foundation | 7 | * This code is derived from software contributed to The NetBSD Foundation | |
8 | * by Jason R. Thorpe. | 8 | * by Jason R. Thorpe. | |
9 | * | 9 | * | |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without | |
11 | * modification, are permitted provided that the following conditions | 11 | * modification, are permitted provided that the following conditions | |
12 | * are met: | 12 | * are met: | |
13 | * 1. Redistributions of source code must retain the above copyright | 13 | * 1. Redistributions of source code must retain the above copyright | |
14 | * notice, this list of conditions and the following disclaimer. | 14 | * notice, this list of conditions and the following disclaimer. | |
@@ -675,27 +675,27 @@ struct sip_desc { | @@ -675,27 +675,27 @@ struct sip_desc { | |||
675 | #define VDR_VTCI 0xffff0000 /* VLAN tag control information */ | 675 | #define VDR_VTCI 0xffff0000 /* VLAN tag control information */ | |
676 | #define VDR_VTYPE 0x0000ffff /* VLAN type field */ | 676 | #define VDR_VTYPE 0x0000ffff /* VLAN type field */ | |
677 | 677 | |||
678 | #define SIP83820_NS_CCSR 0xcc /* CLKRUN control/status register (83820) */ | 678 | #define SIP83820_NS_CCSR 0xcc /* CLKRUN control/status register (83820) */ | |
679 | #if 0 | 679 | #if 0 | |
680 | #define CCSR_PMESTS 0x00008000 /* PME status */ | 680 | #define CCSR_PMESTS 0x00008000 /* PME status */ | |
681 | #define CCSR_PMEEN 0x00000100 /* PME enable */ | 681 | #define CCSR_PMEEN 0x00000100 /* PME enable */ | |
682 | #define CCSR_CLKRUN_EN 0x00000001 /* clkrun enable */ | 682 | #define CCSR_CLKRUN_EN 0x00000001 /* clkrun enable */ | |
683 | #endif | 683 | #endif | |
684 | 684 | |||
685 | #define SIP_TBICR 0xe0 /* TBI control register */ | 685 | #define SIP_TBICR 0xe0 /* TBI control register */ | |
686 | #define TBICR_MR_LOOPBACK 0x00004000 /* TBI PCS loopback enable */ | 686 | #define TBICR_MR_LOOPBACK 0x00004000 /* TBI PCS loopback enable */ | |
687 | #define TBICR_MR_AN_ENABLE 0x00001000 /* TBI autonegotiation enable */ | 687 | #define TBICR_MR_AN_ENABLE 0x00001000 /* TBI autonegotiation enable */ | |
688 | #define TBICR_MR_RESTART_AN 0x00000200 /* restart TBI autoneogtiation */ | 688 | #define TBICR_MR_RESTART_AN 0x00000200 /* restart TBI autonegotiation */ | |
689 | 689 | |||
690 | #define SIP_TBISR 0xe4 /* TBI status register */ | 690 | #define SIP_TBISR 0xe4 /* TBI status register */ | |
691 | #define TBISR_MR_LINK_STATUS 0x00000020 /* TBI link status */ | 691 | #define TBISR_MR_LINK_STATUS 0x00000020 /* TBI link status */ | |
692 | #define TBISR_MR_AN_COMPLETE 0x00000004 /* TBI autonegotiation complete */ | 692 | #define TBISR_MR_AN_COMPLETE 0x00000004 /* TBI autonegotiation complete */ | |
693 | 693 | |||
694 | #define SIP_TANAR 0xe8 /* TBI autoneg adv. register */ | 694 | #define SIP_TANAR 0xe8 /* TBI autoneg adv. register */ | |
695 | #define TANAR_NP 0x00008000 /* next page exchange required */ | 695 | #define TANAR_NP 0x00008000 /* next page exchange required */ | |
696 | #define TANAR_RF2 0x00002000 /* remote fault 2 */ | 696 | #define TANAR_RF2 0x00002000 /* remote fault 2 */ | |
697 | #define TANAR_RF1 0x00001000 /* remote fault 1 */ | 697 | #define TANAR_RF1 0x00001000 /* remote fault 1 */ | |
698 | #define TANAR_PS2 0x00000100 /* pause encoding 2 */ | 698 | #define TANAR_PS2 0x00000100 /* pause encoding 2 */ | |
699 | #define TANAR_PS1 0x00000080 /* pause encoding 1 */ | 699 | #define TANAR_PS1 0x00000080 /* pause encoding 1 */ | |
700 | #define TANAR_HALF_DUP 0x00000040 /* adv. half duplex */ | 700 | #define TANAR_HALF_DUP 0x00000040 /* adv. half duplex */ | |
701 | #define TANAR_FULL_DUP 0x00000020 /* adv. full duplex */ | 701 | #define TANAR_FULL_DUP 0x00000020 /* adv. full duplex */ |
--- src/sys/dev/pci/if_skreg.h 2022/02/23 21:54:41 1.31
+++ src/sys/dev/pci/if_skreg.h 2024/02/02 22:39:10 1.32
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: if_skreg.h,v 1.31 2022/02/23 21:54:41 andvar Exp $ */ | 1 | /* $NetBSD: if_skreg.h,v 1.32 2024/02/02 22:39:10 andvar Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2003 The NetBSD Foundation, Inc. | 4 | * Copyright (c) 2003 The NetBSD Foundation, Inc. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
@@ -1846,36 +1846,36 @@ struct msk_status_desc { | @@ -1846,36 +1846,36 @@ struct msk_status_desc { | |||
1846 | 1846 | |||
1847 | /* Source Address High #1 (SAH1) */ | 1847 | /* Source Address High #1 (SAH1) */ | |
1848 | #define YUKON_SAH1 0x0024 /* SA1[47:32] */ | 1848 | #define YUKON_SAH1 0x0024 /* SA1[47:32] */ | |
1849 | 1849 | |||
1850 | /* Source Address Low #2 (SAL2) */ | 1850 | /* Source Address Low #2 (SAL2) */ | |
1851 | #define YUKON_SAL2 0x0028 /* SA2[15:0] */ | 1851 | #define YUKON_SAL2 0x0028 /* SA2[15:0] */ | |
1852 | 1852 | |||
1853 | /* Source Address Middle #2 (SAM2) */ | 1853 | /* Source Address Middle #2 (SAM2) */ | |
1854 | #define YUKON_SAM2 0x002c /* SA2[31:16] */ | 1854 | #define YUKON_SAM2 0x002c /* SA2[31:16] */ | |
1855 | 1855 | |||
1856 | /* Source Address High #2 (SAH2) */ | 1856 | /* Source Address High #2 (SAH2) */ | |
1857 | #define YUKON_SAH2 0x0030 /* SA2[47:32] */ | 1857 | #define YUKON_SAH2 0x0030 /* SA2[47:32] */ | |
1858 | 1858 | |||
1859 | /* Multicatst Address Hash Register 1 (MCAH1) */ | 1859 | /* Multicast Address Hash Register 1 (MCAH1) */ | |
1860 | #define YUKON_MCAH1 0x0034 | 1860 | #define YUKON_MCAH1 0x0034 | |
1861 | 1861 | |||
1862 | /* Multicatst Address Hash Register 2 (MCAH2) */ | 1862 | /* Multicast Address Hash Register 2 (MCAH2) */ | |
1863 | #define YUKON_MCAH2 0x0038 | 1863 | #define YUKON_MCAH2 0x0038 | |
1864 | 1864 | |||
1865 | /* Multicatst Address Hash Register 3 (MCAH3) */ | 1865 | /* Multicast Address Hash Register 3 (MCAH3) */ | |
1866 | #define YUKON_MCAH3 0x003c | 1866 | #define YUKON_MCAH3 0x003c | |
1867 | 1867 | |||
1868 | /* Multicatst Address Hash Register 4 (MCAH4) */ | 1868 | /* Multicast Address Hash Register 4 (MCAH4) */ | |
1869 | #define YUKON_MCAH4 0x0040 | 1869 | #define YUKON_MCAH4 0x0040 | |
1870 | 1870 | |||
1871 | /* Transmit Interrupt Register (TIR) */ | 1871 | /* Transmit Interrupt Register (TIR) */ | |
1872 | #define YUKON_TIR 0x0044 | 1872 | #define YUKON_TIR 0x0044 | |
1873 | 1873 | |||
1874 | #define YU_TIR_OUT_UNICAST 0x0001 /* Num Unicast Packets Transmitted */ | 1874 | #define YU_TIR_OUT_UNICAST 0x0001 /* Num Unicast Packets Transmitted */ | |
1875 | #define YU_TIR_OUT_BROADCAST 0x0002 /* Num Broadcast Packets Transmitted */ | 1875 | #define YU_TIR_OUT_BROADCAST 0x0002 /* Num Broadcast Packets Transmitted */ | |
1876 | #define YU_TIR_OUT_PAUSE 0x0004 /* Num Pause Packets Transmitted */ | 1876 | #define YU_TIR_OUT_PAUSE 0x0004 /* Num Pause Packets Transmitted */ | |
1877 | #define YU_TIR_OUT_MULTICAST 0x0008 /* Num Multicast Packets Transmitted */ | 1877 | #define YU_TIR_OUT_MULTICAST 0x0008 /* Num Multicast Packets Transmitted */ | |
1878 | #define YU_TIR_OUT_OCTETS 0x0030 /* Num Bytes Transmitted */ | 1878 | #define YU_TIR_OUT_OCTETS 0x0030 /* Num Bytes Transmitted */ | |
1879 | #define YU_TIR_OUT_64_OCTETS 0x0000 /* Num Packets Transmitted */ | 1879 | #define YU_TIR_OUT_64_OCTETS 0x0000 /* Num Packets Transmitted */ | |
1880 | #define YU_TIR_OUT_127_OCTETS 0x0000 /* Num Packets Transmitted */ | 1880 | #define YU_TIR_OUT_127_OCTETS 0x0000 /* Num Packets Transmitted */ | |
1881 | #define YU_TIR_OUT_255_OCTETS 0x0000 /* Num Packets Transmitted */ | 1881 | #define YU_TIR_OUT_255_OCTETS 0x0000 /* Num Packets Transmitted */ |
--- src/sys/netinet/sctp_input.c 2022/04/08 10:27:04 1.16
+++ src/sys/netinet/sctp_input.c 2024/02/02 22:39:09 1.17
@@ -1,15 +1,15 @@ | @@ -1,15 +1,15 @@ | |||
1 | /* $KAME: sctp_input.c,v 1.28 2005/04/21 18:36:21 nishida Exp $ */ | 1 | /* $KAME: sctp_input.c,v 1.28 2005/04/21 18:36:21 nishida Exp $ */ | |
2 | /* $NetBSD: sctp_input.c,v 1.16 2022/04/08 10:27:04 andvar Exp $ */ | 2 | /* $NetBSD: sctp_input.c,v 1.17 2024/02/02 22:39:09 andvar Exp $ */ | |
3 | 3 | |||
4 | /* | 4 | /* | |
5 | * Copyright (C) 2002, 2003, 2004 Cisco Systems Inc, | 5 | * Copyright (C) 2002, 2003, 2004 Cisco Systems Inc, | |
6 | * All rights reserved. | 6 | * All rights reserved. | |
7 | * | 7 | * | |
8 | * Redistribution and use in source and binary forms, with or without | 8 | * Redistribution and use in source and binary forms, with or without | |
9 | * modification, are permitted provided that the following conditions | 9 | * modification, are permitted provided that the following conditions | |
10 | * are met: | 10 | * are met: | |
11 | * 1. Redistributions of source code must retain the above copyright | 11 | * 1. Redistributions of source code must retain the above copyright | |
12 | * notice, this list of conditions and the following disclaimer. | 12 | * notice, this list of conditions and the following disclaimer. | |
13 | * 2. Redistributions in binary form must reproduce the above copyright | 13 | * 2. Redistributions in binary form must reproduce the above copyright | |
14 | * notice, this list of conditions and the following disclaimer in the | 14 | * notice, this list of conditions and the following disclaimer in the | |
15 | * documentation and/or other materials provided with the distribution. | 15 | * documentation and/or other materials provided with the distribution. | |
@@ -21,27 +21,27 @@ | @@ -21,27 +21,27 @@ | |||
21 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 21 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
23 | * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE | 23 | * ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE | |
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
26 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 26 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
27 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 27 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
28 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 28 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
29 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 29 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
30 | * SUCH DAMAGE. | 30 | * SUCH DAMAGE. | |
31 | */ | 31 | */ | |
32 | 32 | |||
33 | #include <sys/cdefs.h> | 33 | #include <sys/cdefs.h> | |
34 | __KERNEL_RCSID(0, "$NetBSD: sctp_input.c,v 1.16 2022/04/08 10:27:04 andvar Exp $"); | 34 | __KERNEL_RCSID(0, "$NetBSD: sctp_input.c,v 1.17 2024/02/02 22:39:09 andvar Exp $"); | |
35 | 35 | |||
36 | #ifdef _KERNEL_OPT | 36 | #ifdef _KERNEL_OPT | |
37 | #include "opt_ipsec.h" | 37 | #include "opt_ipsec.h" | |
38 | #include "opt_inet.h" | 38 | #include "opt_inet.h" | |
39 | #include "opt_sctp.h" | 39 | #include "opt_sctp.h" | |
40 | #endif /* _KERNEL_OPT */ | 40 | #endif /* _KERNEL_OPT */ | |
41 | 41 | |||
42 | #include <sys/param.h> | 42 | #include <sys/param.h> | |
43 | #include <sys/systm.h> | 43 | #include <sys/systm.h> | |
44 | #include <sys/malloc.h> | 44 | #include <sys/malloc.h> | |
45 | #include <sys/mbuf.h> | 45 | #include <sys/mbuf.h> | |
46 | #include <sys/socket.h> | 46 | #include <sys/socket.h> | |
47 | #include <sys/socketvar.h> | 47 | #include <sys/socketvar.h> | |
@@ -378,27 +378,27 @@ sctp_process_init_ack(struct mbuf *m, in | @@ -378,27 +378,27 @@ sctp_process_init_ack(struct mbuf *m, in | |||
378 | mp->num_param = htonl(1); | 378 | mp->num_param = htonl(1); | |
379 | mp->param = htons(SCTP_STATE_COOKIE); | 379 | mp->param = htons(SCTP_STATE_COOKIE); | |
380 | mp->resv = 0; | 380 | mp->resv = 0; | |
381 | } | 381 | } | |
382 | sctp_abort_association(stcb->sctp_ep, stcb, m, iphlen, | 382 | sctp_abort_association(stcb->sctp_ep, stcb, m, iphlen, | |
383 | sh, op_err); | 383 | sh, op_err); | |
384 | } | 384 | } | |
385 | return (retval); | 385 | return (retval); | |
386 | } | 386 | } | |
387 | 387 | |||
388 | /* | 388 | /* | |
389 | * Cancel the INIT timer, We do this first before queueing | 389 | * Cancel the INIT timer, We do this first before queueing | |
390 | * the cookie. We always cancel at the primary to assume that | 390 | * the cookie. We always cancel at the primary to assume that | |
391 | * we are canceling the timer started by the INIT which always | 391 | * we are cancelling the timer started by the INIT which always | |
392 | * goes to the primary. | 392 | * goes to the primary. | |
393 | */ | 393 | */ | |
394 | sctp_timer_stop(SCTP_TIMER_TYPE_INIT, stcb->sctp_ep, stcb, | 394 | sctp_timer_stop(SCTP_TIMER_TYPE_INIT, stcb->sctp_ep, stcb, | |
395 | asoc->primary_destination); | 395 | asoc->primary_destination); | |
396 | 396 | |||
397 | /* calculate the RTO */ | 397 | /* calculate the RTO */ | |
398 | net->RTO = sctp_calculate_rto(stcb, asoc, net, &asoc->time_entered); | 398 | net->RTO = sctp_calculate_rto(stcb, asoc, net, &asoc->time_entered); | |
399 | 399 | |||
400 | return (0); | 400 | return (0); | |
401 | } | 401 | } | |
402 | 402 | |||
403 | static void | 403 | static void | |
404 | sctp_handle_heartbeat_ack(struct sctp_heartbeat_chunk *cp, | 404 | sctp_handle_heartbeat_ack(struct sctp_heartbeat_chunk *cp, |
--- src/tests/lib/libm/t_round.c 2017/09/03 13:41:19 1.9
+++ src/tests/lib/libm/t_round.c 2024/02/02 22:39:09 1.10
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: t_round.c,v 1.9 2017/09/03 13:41:19 wiz Exp $ */ | 1 | /* $NetBSD: t_round.c,v 1.10 2024/02/02 22:39:09 andvar Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2011 The NetBSD Foundation, Inc. | 4 | * Copyright (c) 2011 The NetBSD Foundation, Inc. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
@@ -26,27 +26,27 @@ | @@ -26,27 +26,27 @@ | |||
26 | * POSSIBILITY OF SUCH DAMAGE. | 26 | * POSSIBILITY OF SUCH DAMAGE. | |
27 | */ | 27 | */ | |
28 | 28 | |||
29 | #include <sys/param.h> | 29 | #include <sys/param.h> | |
30 | 30 | |||
31 | #include <atf-c.h> | 31 | #include <atf-c.h> | |
32 | #include <float.h> | 32 | #include <float.h> | |
33 | #include <math.h> | 33 | #include <math.h> | |
34 | #include <stdio.h> | 34 | #include <stdio.h> | |
35 | #include <stdint.h> | 35 | #include <stdint.h> | |
36 | 36 | |||
37 | /* | 37 | /* | |
38 | * This tests for a bug in the initial implementation where | 38 | * This tests for a bug in the initial implementation where | |
39 | * precision was lost in an internal substraction, leading to | 39 | * precision was lost in an internal subtraction, leading to | |
40 | * rounding into the wrong direction. | 40 | * rounding into the wrong direction. | |
41 | */ | 41 | */ | |
42 | 42 | |||
43 | /* 0.5 - EPSILON */ | 43 | /* 0.5 - EPSILON */ | |
44 | #define VAL 0x0.7ffffffffffffcp0 | 44 | #define VAL 0x0.7ffffffffffffcp0 | |
45 | #define VALF 0x0.7fffff8p0 | 45 | #define VALF 0x0.7fffff8p0 | |
46 | #define VALL (0.5 - LDBL_EPSILON) | 46 | #define VALL (0.5 - LDBL_EPSILON) | |
47 | 47 | |||
48 | #ifdef __vax__ | 48 | #ifdef __vax__ | |
49 | #define SMALL_NUM 1.0e-38 | 49 | #define SMALL_NUM 1.0e-38 | |
50 | #else | 50 | #else | |
51 | #define SMALL_NUM 1.0e-40 | 51 | #define SMALL_NUM 1.0e-40 | |
52 | #endif | 52 | #endif |