 @@ -1,14 +1,14 @@
-/*	$NetBSD: ehcireg.h,v 1.37 2016/04/23 10:15:31 skrll Exp $	*/
+/*	$NetBSD: ehcireg.h,v 1.38 2024/02/05 23:07:42 jmcneill Exp $	*/
 /*
  * Copyright (c) 2001, 2004 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Lennart Augustsson (lennart@augustsson.net).
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -193,26 +193,27 @@ typedef uint32_t ehci_link_t;
 #define EHCI_LINK_TYPE(x)	((x) & 0x00000006)
 #define  EHCI_LINK_ITD		0x0
 #define  EHCI_LINK_QH		0x2
 #define  EHCI_LINK_SITD		0x4
 #define  EHCI_LINK_FSTN		0x6
 #define EHCI_LINK_ADDR(x)	((x) &~ 0x1f)
 typedef uint32_t ehci_physaddr_t;
 typedef uint32_t ehci_isoc_trans_t;
 typedef uint32_t ehci_isoc_bufr_ptr_t;
 /* Isochronous Transfer Descriptor */
 #define EHCI_ITD_ALIGN 32
 #define EHCI_ITD_NUFRAMES USB_UFRAMES_PER_FRAME
 #define EHCI_ITD_NBUFFERS 7
 typedef struct {
 	volatile ehci_link_t		itd_next;
 	volatile ehci_isoc_trans_t	itd_ctl[EHCI_ITD_NUFRAMES];
 #define EHCI_ITD_STATUS_MASK	__BITS(31,28)
 #define EHCI_ITD_GET_STATUS(x)	__SHIFTOUT((x), EHCI_ITD_STATUS_MASK)
 #define EHCI_ITD_SET_STATUS(x)	__SHIFTIN((x), EHCI_ITD_STATUS_MASK)
 #define EHCI_ITD_ACTIVE		__BIT(31)
 #define EHCI_ITD_BUF_ERR	__BIT(30)
 #define EHCI_ITD_BABBLE		__BIT(29)
 #define EHCI_ITD_ERROR		__BIT(28)
 #define EHCI_ITD_LEN_MASK	__BITS(27,16)
 @@ -237,30 +238,30 @@ typedef struct {
 #define EHCI_ITD_DADDR_MASK	__BITS(6,0)
 #define EHCI_ITD_GET_DADDR(x)	__SHIFTOUT((x), EHCI_ITD_DADDR_MASK)
 #define EHCI_ITD_SET_DADDR(x)	__SHIFTIN((x), EHCI_ITD_DADDR_MASK)
 #define EHCI_ITD_DIR_MASK	__BIT(11)
 #define EHCI_ITD_GET_DIR(x)	__SHIFTOUT((x), EHCI_ITD_DIR_MASK)
 #define EHCI_ITD_SET_DIR(x)	__SHIFTIN((x), EHCI_ITD_DIR_MASK)
 #define EHCI_ITD_MAXPKT_MASK	__BITS(10,0)
 #define EHCI_ITD_GET_MAXPKT(x)	__SHIFTOUT((x), EHCI_ITD_MAXPKT_MASK)
 #define EHCI_ITD_SET_MAXPKT(x)	__SHIFTIN((x), EHCI_ITD_MAXPKT_MASK)
 #define EHCI_ITD_MULTI_MASK	__BITS(1,0)
 #define EHCI_ITD_GET_MULTI(x)	__SHIFTOUT((x), EHCI_ITD_MULTI_MASK)
 #define EHCI_ITD_SET_MULTI(x)	__SHIFTIN((x), EHCI_ITD_MULTI_MASK)
 	volatile ehci_isoc_bufr_ptr_t	itd_bufr_hi[EHCI_ITD_NBUFFERS];
-} ehci_itd_t;
+} __aligned(EHCI_ITD_ALIGN) ehci_itd_t;
 #define EHCI_ITD_ALIGN 32
 /* Split Transaction Isochronous Transfer Descriptor */
 #define EHCI_SITD_ALIGN 32
 typedef struct {
 	volatile ehci_link_t	sitd_next;
 	volatile uint32_t	sitd_endp;
 #define EHCI_SITD_DIR_MASK	__BIT(31)
 #define EHCI_SITD_PORT_MASK	__BITS(30,24)
 #define EHCI_SITD_HUBA_MASK	__BITS(22,16)
 #define EHCI_SITD_ENDPT_MASK	__BITS(11,8)
 #define EHCI_SITD_DADDR_MASK	__BITS(6,0)
 #define EHCI_SITD_SET_DIR(x)	__SHIFTIN((x), EHCI_SITD_DIR_MASK)
 #define EHCI_SITD_SET_PORT(x)	__SHIFTIN((x), EHCI_SITD_PORT_MASK)
 #define EHCI_SITD_SET_HUBA(x)	__SHIFTIN((x), EHCI_SITD_HUBA_MASK)
 #define EHCI_SITD_SET_ENDPT(x)	__SHIFTIN((x), EHCI_SITD_ENDPT_MASK)
 #define EHCI_SITD_SET_DADDR(x)	__SHIFTIN((x), EHCI_SITD_DADDR_MASK)
 @@ -284,32 +285,32 @@ typedef struct {
 #define EHCI_SITD_MISS		0x00000004
 #define EHCI_SITD_SPLITXSTATE	0x00000002
 #define EHCI_SITD_BUFFERS	2
 	volatile uint32_t	sitd_buffer[EHCI_SITD_BUFFERS];
 #define EHCI_SITD_SET_BPTR(x)	((x) & 0xfffff000)
 #define EHCI_SITD_SET_OFFS(x)	((x) & 0xfff)
 #define EHCI_SITD_TP_MASK	__BITS(4,3)
 #define EHCI_SITD_TCOUNT_MASK	__BITS(2,0)
 	volatile ehci_link_t	sitd_back;
 	volatile uint32_t	sitd_buffer_hi[EHCI_SITD_BUFFERS];
-} ehci_sitd_t;
+} __aligned(EHCI_SITD_ALIGN) ehci_sitd_t;
 #define EHCI_SITD_ALIGN 32
 /* Queue Element Transfer Descriptor */
 #define EHCI_QTD_NBUFFERS	5
 #define EHCI_QTD_MAXTRANSFER	(EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE)
 #define EHCI_QTD_ALIGN 32
 typedef struct {
 	volatile ehci_link_t	qtd_next;
 	volatile ehci_link_t	qtd_altnext;
 	volatile uint32_t	qtd_status;
 #define EHCI_QTD_STATUS_MASK	__BITS(7,0)
 #define EHCI_QTD_GET_STATUS(x)	__SHIFTOUT((x), EHCI_QTD_STATUS_MASK)
 #define EHCI_QTD_SET_STATUS(x)	__SHIFTIN((x), EHCI_QTD_STATUS_MASK)
 #define  EHCI_QTD_ACTIVE	0x80
 #define  EHCI_QTD_HALTED	0x40
 #define  EHCI_QTD_BUFERR	0x20
 #define  EHCI_QTD_BABBLE	0x10
 #define  EHCI_QTD_XACTERR	0x08
 #define  EHCI_QTD_MISSEDMICRO	0x04
 @@ -328,30 +329,30 @@ typedef struct {
 #define EHCI_QTD_C_PAGE_MASK	__BITS(14,12)
 #define EHCI_QTD_GET_C_PAGE(x)	__SHIFTOUT((x), EHCI_QTD_C_PAGE_MASK)
 #define EHCI_QTD_SET_C_PAGE(x)	__SHIFTIN((x), EHCI_QTD_C_PAGE_MASK)
 #define EHCI_QTD_IOC		__BIT(15)
 #define EHCI_QTD_GET_IOC(x)	__SHIFTOUT((x), EHCI_QTD_IOC)
 #define EHCI_QTD_BYTES_MASK	__BITS(30,16)
 #define EHCI_QTD_GET_BYTES(x)	__SHIFTOUT((x), EHCI_QTD_BYTES_MASK)
 #define EHCI_QTD_SET_BYTES(x)	__SHIFTIN((x), EHCI_QTD_BYTES_MASK)
 #define EHCI_QTD_TOGGLE_MASK	__BIT(31)
 #define EHCI_QTD_GET_TOGGLE(x)	__SHIFTOUT((x), EHCI_QTD_TOGGLE_MASK)
 #define	EHCI_QTD_SET_TOGGLE(x)	__SHIFTIN((x), EHCI_QTD_TOGGLE_MASK)
 	volatile ehci_physaddr_t qtd_buffer[EHCI_QTD_NBUFFERS];
 	volatile ehci_physaddr_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
-} ehci_qtd_t;
+} __aligned(EHCI_QTD_ALIGN) ehci_qtd_t;
 #define EHCI_QTD_ALIGN 32
 /* Queue Head */
 #define EHCI_QH_ALIGN 32
 typedef struct {
 	volatile ehci_link_t	qh_link;
 	volatile uint32_t	qh_endp;
 #define EHCI_QH_ADDR_MASK	__BITS(6,0)	/* endpoint addr */
 #define EHCI_QH_GET_ADDR(x)	__SHIFTOUT((x), EHCI_QH_ADDR_MASK)
 #define EHCI_QH_SET_ADDR(x)	__SHIFTIN((x), EHCI_QH_ADDR_MASK)
 #define EHCI_QH_INACT		__BIT(7)	/* inactivate on next */
 #define EHCI_QH_GET_INACT(x)	__SHIFTOUT((x), EHCI_QH_INACT)
 #define EHCI_QH_ENDPT_MASK	__BITS(11,8)	 /* endpoint no */
 #define EHCI_QH_GET_ENDPT(x)	__SHIFTOUT((x), EHCI_QH_ENDPT_MASK)
 #define EHCI_QH_SET_ENDPT(x)	__SHIFTIN((x), EHCI_QH_ENDPT_MASK)
 #define EHCI_QH_EPS_MASK	__BITS(13,12)	/* endpoint speed */
 #define EHCI_QH_GET_EPS(x)	__SHIFTOUT((x), EHCI_QH_EPS_MASK)
 @@ -378,36 +379,46 @@ typedef struct {
 #define EHCI_QH_CMASK_MASK	__BITS(15,8)	 /* split completion mask */
 #define EHCI_QH_GET_CMASK(x)	__SHIFTOUT((x), EHCI_QH_CMASK_MASK)
 #define EHCI_QH_SET_CMASK(x)	__SHIFTIN((x), EHCI_QH_CMASK_MASK)
 #define EHCI_QH_HUBA_MASK	__BITS(22,16)	/* hub address */
 #define EHCI_QH_GET_HUBA(x)	__SHIFTOUT((x), EHCI_QH_HUBA_MASK)
 #define EHCI_QH_SET_HUBA(x)	__SHIFTIN((x), EHCI_QH_HUBA_MASK)
 #define EHCI_QH_PORT_MASK	__BITS(29,23)	 /* hub port */
 #define EHCI_QH_GET_PORT(x)	__SHIFTOUT((x), EHCI_QH_PORT_MASK)
 #define EHCI_QH_SET_PORT(x)	__SHIFTIN((x), EHCI_QH_PORT_MASK)
 #define EHCI_QH_MULTI_MASK	__BITS(31,30)	/* pipe multiplier */
 #define EHCI_QH_GET_MULT(x)	__SHIFTOUT((x), EHCI_QH_MULTI_MASK)
 #define EHCI_QH_SET_MULT(x)	__SHIFTIN((x), EHCI_QH_MULTI_MASK)
 	volatile ehci_link_t	qh_curqtd;
-	ehci_qtd_t		qh_qtd;
+	/*
-} ehci_qh_t;
+	 * The QH descriptor contains a TD overlay, but it is not
-#define EHCI_QH_ALIGN 32
+	 * 32-byte aligned, so declare the fields instead of embedding
 	 * a ehci_qtd_t directly.
 	 */
 	struct {
 		volatile ehci_link_t	qtd_next;
 		volatile ehci_link_t	qtd_altnext;
 		volatile uint32_t	qtd_status;
 		volatile ehci_physaddr_t qtd_buffer[EHCI_QTD_NBUFFERS];
 		volatile ehci_physaddr_t qtd_buffer_hi[EHCI_QTD_NBUFFERS];
 	} qh_qtd;
 } __aligned(EHCI_QH_ALIGN) ehci_qh_t;
 /* Periodic Frame Span Traversal Node */
 #define EHCI_FSTN_ALIGN 32
 typedef struct {
 	volatile ehci_link_t	fstn_link;
 	volatile ehci_link_t	fstn_back;
-} ehci_fstn_t;
+} __aligned(EHCI_FSTN_ALIGN) ehci_fstn_t;
 #define EHCI_FSTN_ALIGN 32
 /* Debug Port */
 #define PCI_CAP_DEBUGPORT_OFFSET __BITS(28,16)
 #define PCI_CAP_DEBUGPORT_BAR	__BITS(31,29)
 /* Debug Port Registers, offset into DEBUGPORT_BAR at DEBUGPORT_OFFSET */
 #define EHCI_DEBUG_SC		0x00
 /* Status/Control Register */
 #define  EHCI_DSC_DATA_LENGTH	__BITS(3,0)
 #define  EHCI_DSC_WRITE		__BIT(4)
 #define  EHCI_DSC_GO		__BIT(5)
 #define  EHCI_DSC_ERROR		__BIT(6)
 #define  EHCI_DSC_EXCEPTION	__BITS(9,7)
 #define   EHCI_DSC_EXCEPTION_NONE	0