--- - branch: MAIN date: Tue Jun 9 05:35:10 UTC 2009 files: - new: '1.11' old: '1.10' path: pkgsrc/x11/xf86-video-ati/Makefile pathrev: pkgsrc/x11/xf86-video-ati/Makefile@1.11 type: modified - new: '1.8' old: '1.7' path: pkgsrc/x11/xf86-video-ati/distinfo pathrev: pkgsrc/x11/xf86-video-ati/distinfo@1.8 type: modified id: 20090609T053510Z.ec523e1eb052a6a4ed88ef2df832b7db539eb7ec log: "Update to 6.12.2. Upstream changelogs:\n\nChanges in 6.12.2:\n\nxf86-video-ati 6.12.2 highlights\n- - lots of bug fixes\n- - r2xx/r3xx textured video improvements from Roland\n\nAlex Deucher (27):\n bump version post release\n Add new pci ids\n R6xx/R7xx EXA: fix maxPitchBytes\n DCE3.2: use RMX for for non-native modes on DVI\n radeon: add new chip ids\n R4xx ATOM: fix crtc routing for CRT1\n R6xx/R7xx: clean up bool const code\n R6xx/R7xx: clean up logic in EXA Comp PS setup\n R6xx/R7xx EXA: rework composite pixel shader\n radeon: re-enable r/g/b intensity attributes for overlay\n mac mini: fix connector setup regression\n r1xx-r3xx TV: fix white noise\n Mac mini: fix connector setup for real\n mac mini: 3rd time's the charm\n COMBIOS: fix default sclk/mclk from bios\n COMBIS: Clarify case 0 for LCD DDC table\n \ Unify mc_idle()\n Add PCIE register accessors\n Add RV790 (HD 4890) support\n DCE3/3.2: fix up transmitter/encoder setup\n DCE3/3.2: cleanup dpms after previous changes\n radeon: fix Xv vsync for multi-head\n \ Fix missing ')' in PCIE macro\n Cast info->sclk to int\n DCE3/3.2: further fixes\n ATOM: code cleanup\n Bump for release\n\nEduard Fuchs (1):\n Enable byte swapping for r6xx/r7xx Hardware\n\nRoland Scheidegger (4):\n clip fixes\n don't convert planar yuv to packed for r300\n don't convert planar yuv to packed for r200\n fix textured video allocation bug\n\nChanges in 6.12.1:\n\nFix some fall out from the r6xx/r7xx merge\nand fix load detection on avivo chips.\n\nAlex Deucher (9):\n Bump post-release\n radeon: fix typo in bios scratch reg setup\n atom: fix up bios scartch register usage\n \ Fix fallout from r6xx/r7xx EXA merge in IB handling\n radeon: add another AGP quirk\n AVIVO: Fix dac load detection\n R6xx/R7xx AGP: disable gart data transfers\n ATOM: fix up tv-out support\n bump for release\n\nFabio (2):\n man page updates\n man page update\n\nChanges in 6.12.0:\n\nBig changes here are EXA and Xv support for\nR6xx/R7xx chips. Requires an updated drm.\nOther than that, mostly bug fixes.\n\nAdam Jackson (3):\n output: Allow for multiple DisplayPort outputs.\n Add some more cases to the DVI single-link checks.\n uniphy: start adding DisplayPort setup\n\nAlex Deucher (81):\n \ Initial R6xx/R7xx EXA and textured video support\n Allow rotation on r6xx/r7xx\n EXA: fix and re-enable Solid() on R7xx\n r6xx/r7xx EXA: cleanup overlapping copy\n R6xx/R7xx EXA: improve overlapping copy performance\n \ r6xx/r7xx EXA: fix corruption when doing sw access\n Revert \"R6xx/R7xx EXA: improve overlapping copy performance\"\n R6xx/R7xx EXA: add accelerated UTS/DFS hooks\n Revert \"r6xx/r7xx EXA: Optimize overlapping copy\"\n R6xx/R7xx EXA: fallback on overlapping blits for now\n R6xx/R7xx EXA: Fix typo in DFS\n \ R6xx/R7xx Xv: fix typos in cache flushing commands\n R6xx/R7xx UTS: move actual upload to separate function\n R6xx/R7xx Xv: implement native shader for planar formats\n R6xx/R7xx Xv: add accelerated uploads for planar formats\n R6xx/R7xx Xv: fix cache flush buffer size for planar\n R6xx/R7xx: Add checks to make sure we don't overrun VB space\n R6xx/R7xx Xv: Add native support for packed formats\n R6xx/R7xx Xv: add support for packed uploads\n \ adjust alignment\n R6xx/R7xx: Move engine idle to sync functions\n \ R6xx/R7xx: be more verbose about what function ran out of VB space\n R6xx/R7xx: handle running out of vertex buffer space\n R6xx/R7xx Xv: switch packed over to Yang's new shader code\n Revert \"R6xx/R7xx: handle running out of vertex buffer space\"\n R6xx/R7xx EXA: properly handle non repeat cases in the texture setup\n R6xx/R7xx EXA: handle running out of vertex space in the copy path\n \ R6xx/R7xx: switch to drm for wait for idle\n R6xx/R7xx EXA: switch to surface sync packet\n Bump version post release\n R6xx/R7xx: fixup accel paths\n R6xx/R7xx: reset 3D state after VT switch\n R6xx/R7xx EXA/Xv: properly deal with running out of vertex buffer space\n R6xx/R7xx Xv: fix some missing bits from last commit\n R6xx/R7xx: wait for MC idle when changing the MC\n Fix MC setup on systems with more than 512 MB of VRAM\n \ R6xx/R7xx: fix up a few more paths\n radeon: one more 32 -> 64 just to be safe\n Don't write new HDP location until we've written the new FB location\n RBBM_GUICNTL is pre-r6xx only\n R6xx/R7xx: add wait for idle MMIO path\n RS600: fix up MC setup\n radeon: re-enable load detection output attribute for TV/CV\n RS600: fix MC addr mask\n R6xx/R7xx EXA: Optimize temp surface for overlapping copies\n R6xx/R7xx EXA: init copy_area to NULL\n R6xx/R7xx EXA: same surface and same coords equals nop\n RS600: enable the DRI by default\n R6xx/R7xx: use shadowfb if DRI is disabled\n \ DCE3.2: fix up Save()/Restore()\n R300: Add AGP quirk\n Print a message when we have a shared DDC line\n R6xx/R7xx: switch emit functions to macros\n R6xx/R7xx: write vertexes directly to the IB\n R6xx/R7xx: code cleanups\n R6xx/R7xx Xv: combine packed and planar shaders\n R6xx/R7xx EXA: combine composite mask/non-mask VS\n R6xx/R7xx EXA: cleanup composite texture setup\n R6xx/r7xx: remove some unneeded code I missed in the last commit\n Rotation: don't rotate if acceleration is not active\n AVIVO: add aspect scaling mode\n radeon: adjust LVDS so that default modes get added\n \ Revert \"radeon: adjust LVDS so that default modes get added\"\n radeon: just add some common modes for LVDS\n ATOM: don't use fixed ref div for LVDS\n \ RN50: fix up cloning on servers\n R6xx/R7xx: disable XV_BICUBIC attribute\n \ R6xx/R7xx: wire up DMAForXv option like older asics\n radeon: add a few more default common modes for lvds\n AVIVO: fix panning\n R6xx/r7xx: clarify EXA message\n R4xx: add R4xxATOM option\n radeon: clean more thoroughly in RADEONFreeRec()\n RS600: fix page table size for rs600 as well\n \ R6xx/r7xx: clarify accel messages\n R6xx/R7xx: return in RADEONWaitForIdleMMIO() if accel is off\n R6xx/R7xx: fix up vline stuff along the lines of previous chips\n R6xx/R7xx: EXA VSync Option not supported yet\n radeon: add support for 30 bit LUTs\n radeon: man page updates\n bump for release\n\nBryce Harrington (1):\n Quirk for RV280 on 82865G/PE/P DRAM Controller/Host-Hub\n\nChristian Koenig (1):\n R6xx/R7xx: move shaders to r600_shader.c and fixup Xv PS\n\nCooper Yuan (1):\n radeon: save bios scratch registers in Preinit()\n\nDave Airlie (3):\n r600: enable DRI by default\n r600: fix sizing of PCI GART table for r600\n r600: reload shaders into VRAM on resume\n\nMark van Doesburg (1):\n R6xx/R7xx EXA: use a temp surface for overlapping copy\n\nMichel Dè\x88\Nzer (6):\n Fix compile warning when building without EXA.\n Only call RADEONWaitForVLine if it might actually do anything useful.\n EXA: Pass pScrn and info into RadeonCompositeTile.\n EXA: Adapt to EXA changes in xserver Git.\n Revert \"EXA: Adapt to EXA changes in xserver Git.\"\n EXA: Make sure Prepare/FinishAccess hooks can handle\nEXA_PREPARE_AUX* indices.\n\nPierre Ossman (2):\n Fix bad range adjustment in VLINE code.\n Xv vsync support on r6xx/r7xx cards.\n\nTormod Volden (3):\n Janitor: cosmetic clean-up of AGPMode quirk table\n M9+: Add AGP quirk for Sony Vaio\n RV350: Add AGPMode quirk for Thinkpad\n\nYang Zhao (5):\n r6xx/r7xx EXA: Optimize overlapping copy\n R6xx/R7xx EXA: Optimize overlapping copy\n R6xx/R7xx Xv: Planar - Properly scale Y'CbCr values before\nconverting to RGB\n R6xx/R7xx EXA: Further optimizations to overlapping copy\n R6xx/R7xx shader: Fix OFFSET_[XYZ] macro for TEX_DWORD2 to accept floats\n\nroot (2):\n atom: Enable DisplayPort source to DVI/HDMI sink\n output: Filter out dual-link modes from DP->DVI connections\n\n???(Yu-yeon Oh) (1):\n radeon_driver.c small memory bug\n" module: pkgsrc subject: 'CVS commit: pkgsrc/x11/xf86-video-ati' unixtime: '1244525710' user: hasso