---
- branch: MAIN
  date: Sat Oct  8 22:30:43 UTC 2016
  files:
  - new: '1.43'
    old: '1.42'
    path: pkgsrc/cad/verilog/Makefile
    pathrev: pkgsrc/cad/verilog/Makefile@1.43
    type: modified
  - new: '1.11'
    old: '1.10'
    path: pkgsrc/cad/verilog/PLIST
    pathrev: pkgsrc/cad/verilog/PLIST@1.11
    type: modified
  - new: '1.11'
    old: '1.10'
    path: pkgsrc/cad/verilog/buildlink3.mk
    pathrev: pkgsrc/cad/verilog/buildlink3.mk@1.11
    type: modified
  - new: '1.21'
    old: '1.20'
    path: pkgsrc/cad/verilog/distinfo
    pathrev: pkgsrc/cad/verilog/distinfo@1.21
    type: modified
  - new: '0'
    old: '1.1'
    path: pkgsrc/cad/verilog/patches/patch-lexor_keyword.cc
    pathrev: pkgsrc/cad/verilog/patches/patch-lexor_keyword.cc@0
    type: deleted
  - new: '0'
    old: '1.2'
    path: pkgsrc/cad/verilog/patches/patch-vpi_Makefile
    pathrev: pkgsrc/cad/verilog/patches/patch-vpi_Makefile@0
    type: deleted
  id: 20161008T223043Z.72954e13ddaf6ceecb16651c0f24e0b545e4c6a9
  log: |
    Update cad/verilog (icarus verilog) from 0.9.7 to 10.1.1

    pkgsrc changes:
     - note GitHub tags (but not use them for now)
     - remove conflict with nonexistent verilog-current
     - install additional documentation in share/doc/ivl (not share/ivl)
     - drop DESTDIR gymnastics - build works without it
     - (re)enable gperf dependency
     - regenerate buildlink3.mk
     - drop patches/patch-lexor_keyword.cc - no longer needed
     - patches/patch-vpi_Makefile partially fixed upstream - rest not needed

    upstream changelog
    ==================

    Probably the only notes available:

    Here are the release notes for Icarus Verilog release branch 10. The 10
    release is a huge improvement over the 0.9 release series, in every
    aspect. Much more of the Verilog and SystemVerilog language is supported,
    many bugs have been fixed, and performance has improved. The changes
    (improvements!) are so numerous that there is no point attempting to
    enumerate them.

     -- http://iverilog.wikia.com/wiki/Release_Notes_Icarus_Verilog_10
  module: pkgsrc
  subject: 'CVS commit: pkgsrc/cad/verilog'
  unixtime: '1475965843'
  user: kamil