---
- branch: MAIN
  date: Thu Mar 26 02:37:14 UTC 2020
  files:
  - new: '1.4'
    old: '1.3'
    path: pkgsrc/cad/iverilog/distinfo
    pathrev: pkgsrc/cad/iverilog/distinfo@1.4
    type: modified
  - new: '1.1'
    old: '0'
    path: pkgsrc/cad/iverilog/patches/patch-Makefile.in
    pathrev: pkgsrc/cad/iverilog/patches/patch-Makefile.in@1.1
    type: added
  - new: '1.1'
    old: '0'
    path: pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile.in
    pathrev: pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile.in@1.1
    type: added
  - new: '1.1'
    old: '0'
    path: pkgsrc/cad/iverilog/patches/patch-tgt-pcb_Makefile.in
    pathrev: pkgsrc/cad/iverilog/patches/patch-tgt-pcb_Makefile.in@1.1
    type: added
  - new: '1.1'
    old: '0'
    path: pkgsrc/cad/iverilog/patches/patch-vhdlpp_Makefile.in
    pathrev: pkgsrc/cad/iverilog/patches/patch-vhdlpp_Makefile.in@1.1
    type: added
  - new: '1.1'
    old: '0'
    path: pkgsrc/cad/iverilog/patches/patch-vvp_Makefile.in
    pathrev: pkgsrc/cad/iverilog/patches/patch-vvp_Makefile.in@1.1
    type: added
  - new: '0'
    old: '1.3'
    path: pkgsrc/cad/iverilog/patches/patch-ad
    pathrev: pkgsrc/cad/iverilog/patches/patch-ad@0
    type: deleted
  - new: '0'
    old: '1.1'
    path: pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile
    pathrev: pkgsrc/cad/iverilog/patches/patch-cadpli_Makefile@0
    type: deleted
  id: 20200326T023714Z.6da22e2ffa6539182d2751dbb075637ffeff1f80
  log: |
    Fix racy bison use. Rename patch to match patched file.
  module: pkgsrc
  subject: 'CVS commit: pkgsrc/cad/iverilog'
  unixtime: '1585190234'
  user: joerg