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Date: Sun, 9 Oct 2016 13:14:06 +0000
From: "Kamil Rytarowski" <kamil@netbsd.org>
Subject: CVS commit: pkgsrc/cad/veriwell
To: pkgsrc-changes@NetBSD.org
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Module Name:	pkgsrc
Committed By:	kamil
Date:		Sun Oct  9 13:14:06 UTC 2016

Added Files:
	pkgsrc/cad/veriwell: DESCR Makefile PLIST distinfo

Log Message:
Import veriwell-2.8.7 as cad/veriwell

VeriWell is a full Verilog simulator. It supports nearly all of the
IEEE1364-1995 standard, as well as PLI 1.0.

Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in
the mid-1990 and was included with the Thomas and Moorby book.


To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 pkgsrc/cad/veriwell/DESCR pkgsrc/cad/veriwell/Makefile \
    pkgsrc/cad/veriwell/PLIST pkgsrc/cad/veriwell/distinfo

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


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Added files:

Index: pkgsrc/cad/veriwell/DESCR
diff -u /dev/null pkgsrc/cad/veriwell/DESCR:1.1
--- /dev/null	Sun Oct  9 13:14:06 2016
+++ pkgsrc/cad/veriwell/DESCR	Sun Oct  9 13:14:06 2016
@@ -0,0 +1,5 @@
+VeriWell is a full Verilog simulator. It supports nearly all of the
+IEEE1364-1995 standard, as well as PLI 1.0.
+
+Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in
+the mid-1990 and was included with the Thomas and Moorby book.
Index: pkgsrc/cad/veriwell/Makefile
diff -u /dev/null pkgsrc/cad/veriwell/Makefile:1.1
--- /dev/null	Sun Oct  9 13:14:06 2016
+++ pkgsrc/cad/veriwell/Makefile	Sun Oct  9 13:14:06 2016
@@ -0,0 +1,18 @@
+# $NetBSD: Makefile,v 1.1 2016/10/09 13:14:06 kamil Exp $
+
+DISTNAME=	veriwell-2.8.7
+CATEGORIES=	cad
+MASTER_SITES=	${MASTER_SITE_SOURCEFORGE:=veriwell/}
+
+MAINTAINER=	pkgsrc-users@NetBSD.org
+HOMEPAGE=	https://sourceforge.net/projects/veriwell/
+COMMENT=	Verilog Simulator
+LICENSE=	gnu-gpl-v2
+
+GNU_CONFIGURE=	yes
+USE_LANGUAGES=	c c++
+
+TEST_TARGET=	check
+
+.include "../../devel/zlib/buildlink3.mk"
+.include "../../mk/bsd.pkg.mk"
Index: pkgsrc/cad/veriwell/PLIST
diff -u /dev/null pkgsrc/cad/veriwell/PLIST:1.1
--- /dev/null	Sun Oct  9 13:14:06 2016
+++ pkgsrc/cad/veriwell/PLIST	Sun Oct  9 13:14:06 2016
@@ -0,0 +1,7 @@
+@comment $NetBSD: PLIST,v 1.1 2016/10/09 13:14:06 kamil Exp $
+bin/veriwell
+include/acc_user.h
+include/veriuser.c
+include/veriuser.h
+lib/libveriwell.la
+man/man1/veriwell.1
Index: pkgsrc/cad/veriwell/distinfo
diff -u /dev/null pkgsrc/cad/veriwell/distinfo:1.1
--- /dev/null	Sun Oct  9 13:14:06 2016
+++ pkgsrc/cad/veriwell/distinfo	Sun Oct  9 13:14:06 2016
@@ -0,0 +1,6 @@
+$NetBSD: distinfo,v 1.1 2016/10/09 13:14:06 kamil Exp $
+
+SHA1 (veriwell-2.8.7.tar.gz) = 9ef4e6a25a4fd65db325a89ed89b199547fabbd6
+RMD160 (veriwell-2.8.7.tar.gz) = 3d86c40b353f701d61cab301e0f7c3ec136c88e7
+SHA512 (veriwell-2.8.7.tar.gz) = c0858ce71bd8cfef989e96899bc0d5fc0c919d8248cad0bebde7faf31073cde0423ddb168cf0fabb9f7b46ced7b953ad392627b7e1ad5ea1e7ef75f9524717a8
+Size (veriwell-2.8.7.tar.gz) = 875596 bytes


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