Thu Jan 21 11:59:30 2010 UTC ()
Pullup ticket #2963 - requested by dholland
hercules: build fix
Revisions pulled up:
- emulators/hercules/Makefile 1.23-1.24
- emulators/hercules/distinfo 1.10
- emulators/hercules/patches/patch-aa 1.8
- emulators/hercules/patches/patch-aj 1.2
- emulators/hercules/patches/patch-an 1.2
- emulators/hercules/patches/patch-ap 1.1
- emulators/hercules/patches/patch-aq 1.1
- emulators/hercules/patches/patch-ar 1.1
- emulators/hercules/patches/patch-as 1.1
- emulators/hercules/patches/patch-at 1.1
- emulators/hercules/patches/patch-au 1.1
- emulators/hercules/patches/patch-av 1.1
- emulators/hercules/patches/patch-aw 1.1
---
Module Name: pkgsrc
Committed By: dholland
Date: Sun Jan 17 08:00:47 UTC 2010
Modified Files:
pkgsrc/emulators/hercules: Makefile distinfo
pkgsrc/emulators/hercules/patches: patch-aa patch-aj patch-an
Added Files:
pkgsrc/emulators/hercules/patches: patch-ap patch-aq patch-ar patch-as
patch-at patch-au patch-av patch-aw
Log Message:
Patch out no-longer-supported gcc language extensions, mostly lvalue
casts and lvalue ternary operators. Also make static/non-static decls
consistent. Fixes broken build. While here, add DESTDIR support.
---
Module Name: pkgsrc
Committed By: dholland
Date: Sun Jan 17 08:02:49 UTC 2010
Modified Files:
pkgsrc/emulators/hercules: Makefile
Log Message:
Update HOMEPAGE and MASTER_SITES.
(tron)
diff -r1.22 -r1.22.24.1 pkgsrc/emulators/hercules/Makefile
diff -r1.9 -r1.9.38.1 pkgsrc/emulators/hercules/distinfo
diff -r1.7 -r1.7.38.1 pkgsrc/emulators/hercules/patches/patch-aa
diff -r1.1 -r1.1.62.1 pkgsrc/emulators/hercules/patches/patch-aj
diff -r1.1 -r1.1.62.1 pkgsrc/emulators/hercules/patches/patch-an
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-ap
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-aq
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-ar
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-as
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-at
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-au
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-av
diff -r0 -r1.1.2.2 pkgsrc/emulators/hercules/patches/patch-aw
--- pkgsrc/emulators/hercules/Makefile 2007/09/02 11:54:08 1.22
+++ pkgsrc/emulators/hercules/Makefile 2010/01/21 11:59:30 1.22.24.1
| @@ -1,28 +1,32 @@ | | | @@ -1,28 +1,32 @@ |
1 | # $NetBSD: Makefile,v 1.22 2007/09/02 11:54:08 joerg Exp $ | | 1 | # $NetBSD: Makefile,v 1.22.24.1 2010/01/21 11:59:30 tron Exp $ |
2 | | | 2 | |
3 | DISTNAME= hercules-2.11 | | 3 | DISTNAME= hercules-2.11 |
4 | PKGREVISION= 4 | | 4 | PKGREVISION= 4 |
5 | CATEGORIES= emulators | | 5 | CATEGORIES= emulators |
6 | MASTER_SITES= http://www.conmicro.cx/hercules/ | | 6 | MASTER_SITES= http://www.hercules-390.org/ |
7 | | | 7 | |
8 | MAINTAINER= pkgsrc-users@NetBSD.org | | 8 | MAINTAINER= pkgsrc-users@NetBSD.org |
9 | HOMEPAGE= http://www.conmicro.cx/hercules/ | | 9 | HOMEPAGE= http://www.hercules-390.org/ |
10 | COMMENT= S370 emulator | | 10 | COMMENT= S370 emulator |
11 | | | 11 | |
| | | 12 | PKG_DESTDIR_SUPPORT= user-destdir |
| | | 13 | |
12 | DEPENDS+= hercules-images-[0-9]*:../../emulators/hercules-images | | 14 | DEPENDS+= hercules-images-[0-9]*:../../emulators/hercules-images |
13 | | | 15 | |
14 | USE_TOOLS+= gmake bash:run | | 16 | USE_TOOLS+= gmake bash:run |
15 | MAKE_FILE= makefile | | 17 | MAKE_FILE= makefile |
16 | MAKE_ENV+= HOST_ARCH=${MACHINE_ARCH:Q} | | 18 | MAKE_ENV+= HOST_ARCH=${MACHINE_ARCH:Q} |
17 | | | 19 | |
18 | REPLACE_BASH+= dasdlist | | 20 | REPLACE_BASH+= dasdlist |
19 | | | 21 | |
20 | PTHREAD_OPTS+= require | | 22 | PTHREAD_OPTS+= require |
21 | | | 23 | |
| | | 24 | INSTALLATION_DIRS+= bin share/examples/hercules |
| | | 25 | SPECIAL_PERMS+= ${PREFIX}/bin/hercifc ${SETUID_ROOT_PERMS} |
| | | 26 | |
22 | pre-install: | | 27 | pre-install: |
23 | ${INSTALL_DATA_DIR} ${PREFIX}/share/examples/hercules | | 28 | ${INSTALL_DATA} ${WRKSRC}/hercules.cnf ${DESTDIR}${PREFIX}/share/examples/hercules/ |
24 | ${INSTALL_DATA} ${WRKSRC}/hercules.cnf ${PREFIX}/share/examples/hercules/ | | 29 | ${INSTALL_DATA} ${WRKSRC}/zzsa.cnf ${DESTDIR}${PREFIX}/share/examples/hercules/ |
25 | ${INSTALL_DATA} ${WRKSRC}/zzsa.cnf ${PREFIX}/share/examples/hercules/ | | | |
26 | | | 30 | |
27 | .include "../../mk/pthread.buildlink3.mk" | | 31 | .include "../../mk/pthread.buildlink3.mk" |
28 | .include "../../mk/bsd.pkg.mk" | | 32 | .include "../../mk/bsd.pkg.mk" |
--- pkgsrc/emulators/hercules/distinfo 2005/12/09 10:46:43 1.9
+++ pkgsrc/emulators/hercules/distinfo 2010/01/21 11:59:30 1.9.38.1
| @@ -1,19 +1,27 @@ | | | @@ -1,19 +1,27 @@ |
1 | $NetBSD: distinfo,v 1.9 2005/12/09 10:46:43 joerg Exp $ | | 1 | $NetBSD: distinfo,v 1.9.38.1 2010/01/21 11:59:30 tron Exp $ |
2 | | | 2 | |
3 | SHA1 (hercules-2.11.tar.gz) = ec84388e29cfd070055afa5fc11a33c896f2333a | | 3 | SHA1 (hercules-2.11.tar.gz) = ec84388e29cfd070055afa5fc11a33c896f2333a |
4 | RMD160 (hercules-2.11.tar.gz) = 113647be0bd80ecc52331319902a1140a81b56aa | | 4 | RMD160 (hercules-2.11.tar.gz) = 113647be0bd80ecc52331319902a1140a81b56aa |
5 | Size (hercules-2.11.tar.gz) = 616554 bytes | | 5 | Size (hercules-2.11.tar.gz) = 616554 bytes |
6 | SHA1 (patch-aa) = 8e9aa1bf76fabf80af76dec0686892d20f2becba | | 6 | SHA1 (patch-aa) = 639ccc667a415fc427996be1972f7b0b67efca2c |
7 | SHA1 (patch-ab) = ea2802d8752411e964ba150d3a54f64a40fc2e70 | | 7 | SHA1 (patch-ab) = ea2802d8752411e964ba150d3a54f64a40fc2e70 |
8 | SHA1 (patch-ac) = 454ac972ad54f19f139033abe8ccabdbb0c3f88b | | 8 | SHA1 (patch-ac) = 454ac972ad54f19f139033abe8ccabdbb0c3f88b |
9 | SHA1 (patch-ad) = 51fa93cb9fbc8382de1da52748dffa4ec2bcbf9c | | 9 | SHA1 (patch-ad) = 51fa93cb9fbc8382de1da52748dffa4ec2bcbf9c |
10 | SHA1 (patch-ae) = 14aafa5462a858e44c00ea6d43efd0f1cfef190e | | 10 | SHA1 (patch-ae) = 14aafa5462a858e44c00ea6d43efd0f1cfef190e |
11 | SHA1 (patch-af) = 759ad1ee2737ed8021b5a5fd956851677e99879a | | 11 | SHA1 (patch-af) = 759ad1ee2737ed8021b5a5fd956851677e99879a |
12 | SHA1 (patch-ag) = 6dcec345641bdde0c617da10f57b6f2dd6b702ac | | 12 | SHA1 (patch-ag) = 6dcec345641bdde0c617da10f57b6f2dd6b702ac |
13 | SHA1 (patch-ah) = 06e03dc32c91ab5d3125a3b5489d15ef5c1e144c | | 13 | SHA1 (patch-ah) = 06e03dc32c91ab5d3125a3b5489d15ef5c1e144c |
14 | SHA1 (patch-aj) = b4beda52ced42d6d58f02b24c0eaf56109eab092 | | 14 | SHA1 (patch-aj) = 8584ff1c318e72a52ae597457368114998a89cb6 |
15 | SHA1 (patch-ak) = 5b594849074ac410f2b8c93f2df0dca874b4533a | | 15 | SHA1 (patch-ak) = 5b594849074ac410f2b8c93f2df0dca874b4533a |
16 | SHA1 (patch-al) = 60d90ed9c1476b8fcf0a905a8316f3aec9108169 | | 16 | SHA1 (patch-al) = 60d90ed9c1476b8fcf0a905a8316f3aec9108169 |
17 | SHA1 (patch-am) = 4626f39156ac2beccd9911f795aff6f9fe7b997b | | 17 | SHA1 (patch-am) = 4626f39156ac2beccd9911f795aff6f9fe7b997b |
18 | SHA1 (patch-an) = 3c36e9745316ef84caf60ba66b541b7cc3007377 | | 18 | SHA1 (patch-an) = 207bff27722867a7a934863451152df2ba8aa2c6 |
19 | SHA1 (patch-ao) = 4d389c21d36ab44565f8e90f90dad8acff24e747 | | 19 | SHA1 (patch-ao) = 4d389c21d36ab44565f8e90f90dad8acff24e747 |
| | | 20 | SHA1 (patch-ap) = 7edbd0f8ec738cf1ed6be0d14f7f6882ba0d225b |
| | | 21 | SHA1 (patch-aq) = 7b54514b1833da0875f98794e06dcd2e43f0ad4a |
| | | 22 | SHA1 (patch-ar) = 37892292e02ba5be83e76bb2d4134bea875ca73a |
| | | 23 | SHA1 (patch-as) = 281d81485186f4aa44938e4152050796d564629a |
| | | 24 | SHA1 (patch-at) = 75cbca5dcf21df9af227ac49825986217f4491f8 |
| | | 25 | SHA1 (patch-au) = d1761b4845fdee6633e728d4cf86b8f00ce9b5d4 |
| | | 26 | SHA1 (patch-av) = ec670511d4aeef9bba08cd6edf16f64a624d10b9 |
| | | 27 | SHA1 (patch-aw) = cb0f64d81d4c20d237a108cc3baac12f3d4923b1 |
--- pkgsrc/emulators/hercules/patches/Attic/patch-aa 2005/12/09 10:46:43 1.7
+++ pkgsrc/emulators/hercules/patches/Attic/patch-aa 2010/01/21 11:59:30 1.7.38.1
| @@ -1,23 +1,23 @@ | | | @@ -1,23 +1,23 @@ |
1 | $NetBSD: patch-aa,v 1.7 2005/12/09 10:46:43 joerg Exp $ | | 1 | $NetBSD: patch-aa,v 1.7.38.1 2010/01/21 11:59:30 tron Exp $ |
2 | | | 2 | |
3 | --- makefile.orig 2001-02-11 03:21:58.000000000 +0000 | | 3 | --- makefile.orig 2001-02-11 03:21:58.000000000 +0000 |
4 | +++ makefile | | 4 | +++ makefile |
5 | @@ -8,11 +8,11 @@ VERSION = 2.11 | | 5 | @@ -8,11 +8,11 @@ VERSION = 2.11 |
6 | # besides /usr/bin. The $PREFIX (which defaults to nothing) can be | | 6 | # besides /usr/bin. The $PREFIX (which defaults to nothing) can be |
7 | # overridden in the make command line, as in "PREFIX=/foo make install" | | 7 | # overridden in the make command line, as in "PREFIX=/foo make install" |
8 | # (the directory is only used when installing). | | 8 | # (the directory is only used when installing). |
9 | -DESTDIR = $(PREFIX)/usr/bin | | 9 | -DESTDIR = $(PREFIX)/usr/bin |
10 | +DESTDIR = $(PREFIX)/bin | | 10 | +INSTALLDIR = $(DESTDIR)$(PREFIX)/bin |
11 | | | 11 | |
12 | # Standard flags for all architectures | | 12 | # Standard flags for all architectures |
13 | CFLAGS = -Wall -fomit-frame-pointer -DVERSION=$(VERSION) -DNO_BYTESWAP_H | | 13 | CFLAGS = -Wall -fomit-frame-pointer -DVERSION=$(VERSION) -DNO_BYTESWAP_H |
14 | -LFLAGS = -lpthread | | 14 | -LFLAGS = -lpthread |
15 | +LFLAGS = ${PTHREAD_LDFLAGS} ${PTHREAD_LIBS} | | 15 | +LFLAGS = ${PTHREAD_LDFLAGS} ${PTHREAD_LIBS} |
16 | | | 16 | |
17 | # Add default flags for Pentium compilations | | 17 | # Add default flags for Pentium compilations |
18 | ifndef HOST_ARCH | | 18 | ifndef HOST_ARCH |
19 | @@ -21,26 +21,28 @@ endif | | 19 | @@ -21,26 +21,28 @@ endif |
20 | | | 20 | |
21 | # Handle host architecture if specified | | 21 | # Handle host architecture if specified |
22 | ifeq ($(HOST_ARCH),i386) | | 22 | ifeq ($(HOST_ARCH),i386) |
23 | -CFLAGS += -O3 -malign-double -DNO_ASM_BYTESWAP | | 23 | -CFLAGS += -O3 -malign-double -DNO_ASM_BYTESWAP |
| @@ -47,13 +47,28 @@ $NetBSD: patch-aa,v 1.7 2005/12/09 10:46 | | | @@ -47,13 +47,28 @@ $NetBSD: patch-aa,v 1.7 2005/12/09 10:46 |
47 | +endif # i386 | | 47 | +endif # i386 |
48 | | | 48 | |
49 | # Uncomment these lines for NetBSD, with either the unproven-pthreads | | 49 | # Uncomment these lines for NetBSD, with either the unproven-pthreads |
50 | # or pth packages | | 50 | # or pth packages |
51 | -#CFLAGS += -I/usr/pkg/pthreads/include -I/usr/pkg/include | | 51 | -#CFLAGS += -I/usr/pkg/pthreads/include -I/usr/pkg/include |
52 | -#LFLAGS += -L/usr/pkg/pthreads/lib -R/usr/pkg/pthreads | | 52 | -#LFLAGS += -L/usr/pkg/pthreads/lib -R/usr/pkg/pthreads |
53 | -#LFLAGS += -L/usr/pkg/lib -R/usr/pkg/pthreads/lib | | 53 | -#LFLAGS += -L/usr/pkg/lib -R/usr/pkg/pthreads/lib |
54 | +CFLAGS += -I${PREFIX}/include | | 54 | +CFLAGS += -I${PREFIX}/include |
55 | +LFLAGS += -L${PREFIX}/lib -R${PREFIX}/lib | | 55 | +LFLAGS += -L${PREFIX}/lib -R${PREFIX}/lib |
56 | +LFLAGS += -L${PREFIX}/lib | | 56 | +LFLAGS += -L${PREFIX}/lib |
57 | | | 57 | |
58 | # Reverse the comments below to disable Compressed CKD Dasd support | | 58 | # Reverse the comments below to disable Compressed CKD Dasd support |
59 | #CFLAGS += -DNO_CCKD | | 59 | #CFLAGS += -DNO_CCKD |
| | | 60 | @@ -224,9 +226,9 @@ tar: clean |
| | | 61 | (cd ..; tar cvzf hercules-$(VERSION).tar.gz hercules-$(VERSION)) |
| | | 62 | |
| | | 63 | install: $(EXEFILES) |
| | | 64 | - cp $(EXEFILES) $(DESTDIR) |
| | | 65 | - cp dasdlist $(DESTDIR) |
| | | 66 | - chown root $(DESTDIR)/hercifc |
| | | 67 | - chmod 0751 $(DESTDIR)/hercifc |
| | | 68 | - chmod +s $(DESTDIR)/hercifc |
| | | 69 | + cp $(EXEFILES) $(INSTALLDIR) |
| | | 70 | + cp dasdlist $(INSTALLDIR) |
| | | 71 | + #chown root $(INSTALLDIR)/hercifc |
| | | 72 | + #chmod 0751 $(INSTALLDIR)/hercifc |
| | | 73 | + #chmod +s $(INSTALLDIR)/hercifc |
| | | 74 | rm hercifc |
--- pkgsrc/emulators/hercules/patches/Attic/patch-aj 2001/03/23 16:20:56 1.1
+++ pkgsrc/emulators/hercules/patches/Attic/patch-aj 2010/01/21 11:59:30 1.1.62.1
| @@ -1,29 +1,49 @@ | | | @@ -1,29 +1,49 @@ |
1 | $NetBSD: patch-aj,v 1.1 2001/03/23 16:20:56 agc Exp $ | | 1 | $NetBSD: patch-aj,v 1.1.62.1 2010/01/21 11:59:30 tron Exp $ |
2 | | | 2 | |
3 | Patch from Wofgang Solfrank: | | 3 | Patch from Wofgang Solfrank: |
4 | | | 4 | |
5 | "Change the timeout value from 1 usec to 10 msec in the timer thread. | | 5 | "Change the timeout value from 1 usec to 10 msec in the timer thread. |
6 | At least with unproven-pthreads, the comment above that is wrong | | 6 | At least with unproven-pthreads, the comment above that is wrong |
7 | when stating that a 1 usec timeout would be stretched to the next | | 7 | when stating that a 1 usec timeout would be stretched to the next |
8 | system clock tick." | | 8 | system clock tick." |
9 | | | 9 | |
10 | --- timer.c.orig Thu Feb 8 20:02:41 2001 | | 10 | Also, patch out no-longer-supported gcc language extensions. |
11 | +++ timer.c Fri Mar 23 16:01:53 2001 | | 11 | |
12 | @@ -319,7 +319,7 @@ | | 12 | --- timer.c.orig 2001-02-08 20:02:41.000000000 +0000 |
| | | 13 | +++ timer.c |
| | | 14 | @@ -190,7 +190,7 @@ struct timeval tv; |
| | | 15 | |
| | | 16 | /* Decrement the CPU timer if the CPU is running */ |
| | | 17 | if(regs->cpustate == CPUSTATE_STARTED && (S64)diff > 0) |
| | | 18 | - (S64)regs->ptimer -= (S64)diff; |
| | | 19 | + regs->ptimer = (S64)regs->ptimer - (S64)diff; |
| | | 20 | |
| | | 21 | /* Set interrupt flag if the CPU timer is negative */ |
| | | 22 | if ((S64)regs->ptimer < 0) |
| | | 23 | @@ -207,7 +207,7 @@ struct timeval tv; |
| | | 24 | { |
| | | 25 | /* Decrement the CPU timer if the CPU is running */ |
| | | 26 | if( (S64)diff > 0) |
| | | 27 | - (S64)regs->guestregs->ptimer -= (S64)diff; |
| | | 28 | + regs->guestregs->ptimer = (S64)regs->guestregs->ptimer - (S64)diff; |
| | | 29 | |
| | | 30 | /* Set interrupt flag if the CPU timer is negative */ |
| | | 31 | if ((S64)regs->guestregs->ptimer < 0) |
| | | 32 | @@ -319,7 +319,7 @@ struct timeval tv; |
13 | /* Calculate instructions/millisecond for this CPU */ | | 33 | /* Calculate instructions/millisecond for this CPU */ |
14 | regs->mipsrate = | | 34 | regs->mipsrate = |
15 | (regs->instcount - regs->prevcount) / msecctr; | | 35 | (regs->instcount - regs->prevcount) / msecctr; |
16 | - regs->siosrate = regs->siocount; | | 36 | - regs->siosrate = regs->siocount; |
17 | + regs->siosrate = regs->siocount * 1000 / msecctr; | | 37 | + regs->siosrate = regs->siocount * 1000 / msecctr; |
18 | | | 38 | |
19 | /* Save the instruction counter */ | | 39 | /* Save the instruction counter */ |
20 | regs->prevcount = regs->instcount; | | 40 | regs->prevcount = regs->instcount; |
21 | @@ -336,7 +336,7 @@ | | 41 | @@ -336,7 +336,7 @@ struct timeval tv; |
22 | /* Sleep for one system clock tick by specifying a one-microsecond | | 42 | /* Sleep for one system clock tick by specifying a one-microsecond |
23 | delay, which will get stretched out to the next clock tick */ | | 43 | delay, which will get stretched out to the next clock tick */ |
24 | tv.tv_sec = 0; | | 44 | tv.tv_sec = 0; |
25 | - tv.tv_usec = 1; | | 45 | - tv.tv_usec = 1; |
26 | + tv.tv_usec = 10000; | | 46 | + tv.tv_usec = 10000; |
27 | select (0, NULL, NULL, NULL, &tv); | | 47 | select (0, NULL, NULL, NULL, &tv); |
28 | | | 48 | |
29 | } /* end while */ | | 49 | } /* end while */ |
--- pkgsrc/emulators/hercules/patches/Attic/patch-an 2001/05/11 11:17:39 1.1
+++ pkgsrc/emulators/hercules/patches/Attic/patch-an 2010/01/21 11:59:30 1.1.62.1
| @@ -1,54 +1,103 @@ | | | @@ -1,54 +1,103 @@ |
1 | $NetBSD: patch-an,v 1.1 2001/05/11 11:17:39 dmcmahill Exp $ | | 1 | $NetBSD: patch-an,v 1.1.62.1 2010/01/21 11:59:30 tron Exp $ |
2 | | | 2 | |
3 | regparm is only for i386 | | 3 | - regparm is only for i386 |
| | | 4 | - patch out gcc language extensions that are no longer supported |
4 | | | 5 | |
5 | --- features.h.orig Thu Feb 1 17:56:32 2001 | | 6 | --- features.h.orig 2001-02-01 22:56:32.000000000 +0000 |
6 | +++ features.h Tue May 8 18:47:14 2001 | | 7 | +++ features.h |
7 | @@ -71,6 +71,11 @@ | | 8 | @@ -48,6 +48,7 @@ |
| | | 9 | #undef ET |
| | | 10 | #undef RADR |
| | | 11 | #undef GR_A |
| | | 12 | +#undef GR_Ax |
| | | 13 | #undef VADR |
| | | 14 | #undef GREG |
| | | 15 | #undef CREG |
| | | 16 | @@ -70,8 +71,13 @@ |
| | | 17 | |
8 | #define ARCH_MODE ARCH_370 | | 18 | #define ARCH_MODE ARCH_370 |
9 | | | 19 | |
10 | +#ifdef __i386__ | | 20 | +#ifdef __i386__ |
11 | #define DEF_INST(_name) \ | | 21 | #define DEF_INST(_name) \ |
12 | __attribute__ ((regparm(3))) void s370_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 22 | __attribute__ ((regparm(3))) void s370_ ## _name (BYTE inst[], int execflag, REGS *regs) |
13 | +#else | | 23 | +#else |
14 | +#define DEF_INST(_name) \ | | 24 | +#define DEF_INST(_name) \ |
15 | +void s370_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 25 | +void s370_ ## _name (BYTE inst[], int execflag, REGS *regs) |
16 | +#endif | | 26 | +#endif |
17 | | | 27 | |
18 | #define ARCH_DEP(_name) \ | | 28 | #define ARCH_DEP(_name) \ |
19 | @@ -130,6 +135,11 @@ | | 29 | s370_ ## _name |
| | | 30 | @@ -104,6 +110,7 @@ s370_ ## _name |
| | | 31 | #define CR(_r) CR_L(_r) |
| | | 32 | #define GR(_r) GR_L(_r) |
| | | 33 | #define GR_A(_r, _regs) ((_regs)->GR_L((_r))) |
| | | 34 | +#define GR_Ax(_r, _regs, _val) (((_regs)->GR_L((_r))) = (_val)) |
| | | 35 | #define MONCODE MC_L |
| | | 36 | #define TEA EA_L |
| | | 37 | #define ET ET_L |
| | | 38 | @@ -129,8 +136,13 @@ s370_ ## _name |
| | | 39 | |
20 | #define ARCH_MODE ARCH_390 | | 40 | #define ARCH_MODE ARCH_390 |
21 | | | 41 | |
22 | +#ifdef __i386__ | | 42 | +#ifdef __i386__ |
23 | #define DEF_INST(_name) \ | | 43 | #define DEF_INST(_name) \ |
24 | __attribute__ ((regparm(3))) void s390_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 44 | __attribute__ ((regparm(3))) void s390_ ## _name (BYTE inst[], int execflag, REGS *regs) |
25 | +#else | | 45 | +#else |
26 | +#define DEF_INST(_name) \ | | 46 | +#define DEF_INST(_name) \ |
27 | +void s390_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 47 | +void s390_ ## _name (BYTE inst[], int execflag, REGS *regs) |
28 | +#endif | | 48 | +#endif |
29 | | | 49 | |
30 | #define ARCH_DEP(_name) \ | | 50 | #define ARCH_DEP(_name) \ |
31 | @@ -212,6 +222,11 @@ | | 51 | s390_ ## _name |
| | | 52 | @@ -163,6 +175,7 @@ s390_ ## _name |
| | | 53 | #define CR(_r) CR_L(_r) |
| | | 54 | #define GR(_r) GR_L(_r) |
| | | 55 | #define GR_A(_r, _regs) ((_regs)->GR_L((_r))) |
| | | 56 | +#define GR_Ax(_r, _regs, _val) (((_regs)->GR_L((_r))) = (_val)) |
| | | 57 | #define MONCODE MC_L |
| | | 58 | #define TEA EA_L |
| | | 59 | #define ET ET_L |
| | | 60 | @@ -211,8 +224,13 @@ s390_ ## _name |
| | | 61 | #define SSEVENT_BIT ASCE_X |
32 | #define SSGROUP_BIT ASCE_G | | 62 | #define SSGROUP_BIT ASCE_G |
33 | | | 63 | |
34 | +#ifdef __i386__ | | 64 | +#ifdef __i386__ |
35 | #define DEF_INST(_name) \ | | 65 | #define DEF_INST(_name) \ |
36 | __attribute__ ((regparm(3))) void z900_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 66 | __attribute__ ((regparm(3))) void z900_ ## _name (BYTE inst[], int execflag, REGS *regs) |
37 | +#else | | 67 | +#else |
38 | +#define DEF_INST(_name) \ | | 68 | +#define DEF_INST(_name) \ |
39 | +void z900_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 69 | +void z900_ ## _name (BYTE inst[], int execflag, REGS *regs) |
40 | +#endif | | 70 | +#endif |
41 | | | 71 | |
42 | #define ARCH_DEP(_name) \ | | 72 | #define ARCH_DEP(_name) \ |
43 | @@ -268,6 +283,11 @@ | | 73 | z900_ ## _name |
| | | 74 | @@ -223,6 +241,7 @@ z900_ ## _name |
| | | 75 | #define CR(_r) CR_G(_r) |
| | | 76 | #define GR(_r) GR_G(_r) |
| | | 77 | #define GR_A(_r, _regs) ((_regs)->psw.amode64 ? (_regs)->GR_G((_r)) : (_regs)->GR_L((_r))) |
| | | 78 | +#define GR_Ax(_r, _regs, _val) ((_regs)->psw.amode64 ? ((_regs)->GR_G((_r)) = (_val)) : ((_regs)->GR_L((_r)) = (_val))) |
| | | 79 | #define MONCODE MC_G |
| | | 80 | #define TEA EA_G |
| | | 81 | #define ET ET_G |
| | | 82 | @@ -267,8 +286,13 @@ z900_ ## _name |
| | | 83 | #define SSEVENT_BIT ASCE_X |
44 | #define SSGROUP_BIT ASCE_G | | 84 | #define SSGROUP_BIT ASCE_G |
45 | | | 85 | |
46 | +#ifdef __i386__ | | 86 | +#ifdef __i386__ |
47 | #define DEF_INST(_name) \ | | 87 | #define DEF_INST(_name) \ |
48 | __attribute__ ((regparm(3))) void z964_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 88 | __attribute__ ((regparm(3))) void z964_ ## _name (BYTE inst[], int execflag, REGS *regs) |
49 | +#else | | 89 | +#else |
50 | +#define DEF_INST(_name) \ | | 90 | +#define DEF_INST(_name) \ |
51 | +void z964_ ## _name (BYTE inst[], int execflag, REGS *regs) | | 91 | +void z964_ ## _name (BYTE inst[], int execflag, REGS *regs) |
52 | +#endif | | 92 | +#endif |
53 | | | 93 | |
54 | #define ARCH_DEP(_name) \ | | 94 | #define ARCH_DEP(_name) \ |
| | | 95 | z964_ ## _name |
| | | 96 | @@ -279,6 +303,7 @@ z964_ ## _name |
| | | 97 | #define CR(_r) CR_G(_r) |
| | | 98 | #define GR(_r) GR_G(_r) |
| | | 99 | #define GR_A(_r, _regs) ((_regs)->psw.amode64 ? (_regs)->GR_G((_r)) : (_regs)->GR_L((_r))) |
| | | 100 | +#define GR_Ax(_r, _regs, _val) ((_regs)->psw.amode64 ? ((_regs)->GR_G((_r)) = (_val)) : ((_regs)->GR_L((_r)) = (_val))) |
| | | 101 | #define MONCODE MC_G |
| | | 102 | #define TEA EA_G |
| | | 103 | #define ET ET_G |
$NetBSD: patch-ap,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out gcc language extensions that are no longer supported.
--- general.c.orig 2001-02-08 20:02:40.000000000 +0000
+++ general.c
@@ -96,7 +96,7 @@ U32 n;
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load 2 bytes from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Add signed operands and set condition code */
regs->psw.cc =
@@ -124,7 +124,7 @@ U32 n;
RI(inst, execflag, regs, r1, opcd, n2);
- (S32)n = (S16)n2;
+ n = (S32)(S16)n2;
/* Add signed operands and set condition code */
regs->psw.cc =
@@ -682,7 +682,7 @@ S32 i, j;
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares high */
if ( (S32)regs->GR_L(r1) > j )
@@ -710,7 +710,7 @@ S32 i, j;
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares low or equal */
if ( (S32)regs->GR_L(r1) <= j )
@@ -809,7 +809,7 @@ int i,j;
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares high */
if ( (S32)regs->GR_L(r1) > j )
@@ -839,7 +839,7 @@ int i,j;
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares low or equal */
if ( (S32)regs->GR_L(r1) <= j )
@@ -924,7 +924,7 @@ U64 dreg;
regs->GR_L(r1) = dreg;
/* Update the operand address and length registers */
- GR_A(r2, regs) = addr2;
+ GR_Ax(r2, regs, addr2);
regs->GR_L(r2+1) = len;
/* Set condition code 0 or 3 */
@@ -1127,7 +1127,7 @@ U32 n;
the physical CPU on a spinlock */
if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
usleep(1L);
-#endif MAX_CPU_ENGINES > 1
+#endif /* MAX_CPU_ENGINES > 1 */
#if defined(_FEATURE_SIE)
if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CS1))
@@ -1193,7 +1193,7 @@ U32 n1, n2;
the physical CPU on a spinlock */
if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
usleep(1L);
-#endif MAX_CPU_ENGINES > 1
+#endif /* MAX_CPU_ENGINES > 1 */
#if defined(_FEATURE_SIE)
if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CDS1))
@@ -1216,7 +1216,7 @@ U32 n;
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load rightmost 2 bytes of comparand from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Compare signed operands and set condition code */
regs->psw.cc =
@@ -1552,10 +1552,10 @@ BYTE pad;
} /* end for(i) */
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1+1, regs) = len1;
- GR_A(r3, regs) = addr2;
- GR_A(r3+1, regs) = len2;
+ GR_Ax(r1, regs, addr1);
+ GR_Ax(r1+1, regs, len1);
+ GR_Ax(r3, regs, addr2);
+ GR_Ax(r3+1, regs, len2);
regs->psw.cc = cc;
@@ -1634,8 +1634,8 @@ BYTE termchar;
} /* end for(i) */
/* Set R1 and R2 to point to current character of each operand */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_Ax(r1, regs, addr1);
+ GR_Ax(r2, regs, addr2);
/* Set condition code */
regs->psw.cc = cc;
@@ -1776,8 +1776,8 @@ S32 remlen1, remlen2;
if (cc < 2)
{
/* Update R1 and R2 to point to the equal substring */
- GR_A(r1, regs) = eqaddr1;
- GR_A(r2, regs) = eqaddr2;
+ GR_Ax(r1, regs, eqaddr1);
+ GR_Ax(r2, regs, eqaddr2);
/* Set R1+1 and R2+1 to length remaining in each
operand after the start of the substring */
@@ -1787,8 +1787,8 @@ S32 remlen1, remlen2;
else
{
/* Update R1 and R2 to point to next bytes to compare */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_Ax(r1, regs, addr1);
+ GR_Ax(r2, regs, addr2);
/* Set R1+1 and R2+1 to remaining operand lengths */
regs->GR_L(r1+1) = (GREG)len1;
@@ -1914,9 +1914,9 @@ BYTE utf[4];
len2 = nlen2;
/* Update the registers */
- GR_A(r1, regs) = addr1;
+ GR_Ax(r1, regs, addr1);
regs->GR_L(r1+1) = len1;
- GR_A(r2, regs) = addr2;
+ GR_Ax(r2, regs, addr2);
regs->GR_L(r2+1) = len2;
} /* end for(i) */
@@ -2069,9 +2069,9 @@ BYTE utf[4];
len2 -= n + 1;
/* Update the registers */
- GR_A(r1, regs) = addr1;
+ GR_Ax(r1, regs, addr1);
regs->GR_L(r1+1) = len1;
- GR_A(r2, regs) = addr2;
+ GR_Ax(r2, regs, addr2);
regs->GR_L(r2+1) = len2;
} /* end for(i) */
@@ -2153,7 +2153,7 @@ BYTE sbyte;
/* Result is negative if sign is X'B' or X'D' */
if (d == 0x0B || d == 0x0D)
{
- (S64)dreg = -((S64)dreg);
+ dreg = (U64) -((S64)dreg);
}
/* Store low-order 32 bits of result into R1 register */
@@ -2678,7 +2678,7 @@ VADR effective_addr2;
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load operand address into register */
- GR_A(r1, regs) = effective_addr2;
+ GR_Ax(r1, regs, effective_addr2);
}
@@ -2695,7 +2695,7 @@ VADR effective_addr2;
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load operand address into register */
- GR_A(r1, regs) = effective_addr2;
+ GR_Ax(r1, regs, effective_addr2);
/* Load corresponding value into access register */
if ( PRIMARY_SPACE_MODE(&(regs->psw)) )
@@ -2749,7 +2749,7 @@ int r1, r2;
}
/* Load complement of second operand and set condition code */
- (S32)regs->GR_L(r1) = -((S32)regs->GR_L(r2));
+ regs->GR_L(r1) = (U32) -((S32)regs->GR_L(r2));
regs->psw.cc = (S32)regs->GR_L(r1) < 0 ? 1 :
(S32)regs->GR_L(r1) > 0 ? 2 : 0;
@@ -2768,7 +2768,7 @@ VADR effective_addr2;
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load rightmost 2 bytes of register from operand address */
- (S32)regs->GR_L(r1) = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ regs->GR_L(r1) = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
}
@@ -2785,7 +2785,7 @@ U16 i2;
RI(inst, execflag, regs, r1, opcd, i2);
/* Load operand into register */
- (S32)regs->GR_L(r1) = (S16)i2;
+ regs->GR_L(r1) = (S32)(S16)i2;
}
#endif /*defined(FEATURE_IMMEDIATE_AND_RELATIVE)*/
@@ -2835,7 +2835,7 @@ int r1, r2;
RR(inst, execflag, regs, r1, r2);
/* Load negative value of second operand and set cc */
- (S32)regs->GR_L(r1) = (S32)regs->GR_L(r2) > 0 ?
+ regs->GR_L(r1) = (S32)regs->GR_L(r2) > 0 ?
-((S32)regs->GR_L(r2)) :
(S32)regs->GR_L(r2);
@@ -2863,7 +2863,7 @@ int r1, r2;
}
/* Load positive value of second operand and set cc */
- (S32)regs->GR_L(r1) = (S32)regs->GR_L(r2) < 0 ?
+ regs->GR_L(r1) = (S32)regs->GR_L(r2) < 0 ?
-((S32)regs->GR_L(r2)) :
(S32)regs->GR_L(r2);
@@ -3020,8 +3020,8 @@ BYTE pad;
|| (n <= addr2
&& (addr1 > addr2 || addr1 <= n)))
{
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_Ax(r1, regs, addr1);
+ GR_Ax(r2, regs, addr2);
regs->psw.cc = 3;
logmsg ("MVCL destructive overlap\n");
logmsg ("R%2.2d=%8.8X R%2.2d=%8.8X "
@@ -3056,8 +3056,8 @@ BYTE pad;
len1--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_Ax(r1, regs, addr1);
+ GR_Ax(r2, regs, addr2);
regs->GR_LA24(r1+1) = len1;
regs->GR_LA24(r2+1) = len2;
@@ -3142,10 +3142,10 @@ BYTE pad;
len1--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1+1, regs) = len1;
- GR_A(r3, regs) = addr2;
- GR_A(r3+1, regs) = len2;
+ GR_Ax(r1, regs, addr1);
+ GR_Ax(r1+1, regs, len1);
+ GR_Ax(r3, regs, addr2);
+ GR_Ax(r3+1, regs, len2);
} /* end for(i) */
@@ -3282,8 +3282,8 @@ BYTE termchar;
} /* end for(i) */
/* Set R1 and R2 to point to next character of each operand */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_Ax(r1, regs, addr1);
+ GR_Ax(r2, regs, addr2);
/* Set condition code 3 */
regs->psw.cc = 3;
@@ -3480,7 +3480,7 @@ U32 n;
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load 2 bytes from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Multiply R1 register by n, ignore leftmost 32 bits of
result, and place rightmost 32 bits in R1 register */
@@ -3502,7 +3502,7 @@ U16 i2;
RI(inst, execflag, regs, r1, opcd, i2);
/* Multiply register by operand ignoring overflow */
- (S32)regs->GR_L(r1) *= (S16)i2;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S16)i2;
}
#endif /*defined(FEATURE_IMMEDIATE_AND_RELATIVE)*/
@@ -3518,7 +3518,7 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Multiply signed registers ignoring overflow */
- (S32)regs->GR_L(r1) *= (S32)regs->GR_L(r2);
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S32)regs->GR_L(r2);
}
@@ -3539,7 +3539,7 @@ U32 n;
n = ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
/* Multiply signed operands ignoring overflow */
- (S32)regs->GR_L(r1) *= (S32)n;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S32)n;
}
@@ -4595,7 +4595,7 @@ VADR effective_addr2,
if(regs->psw.cc && sysblk.numcpu > 1
&& sysblk.brdcstncpu == 0)
usleep(1L);
-#endif MAX_CPU_ENGINES > 1
+#endif /* MAX_CPU_ENGINES > 1 */
}
}
@@ -4644,7 +4644,7 @@ BYTE termchar;
code 1 and load the address of the character into R1 */
if (sbyte == termchar)
{
- GR_A(r1, regs) = addr2;
+ GR_Ax(r1, regs, addr2);
regs->psw.cc = 1;
return;
}
@@ -4656,7 +4656,7 @@ BYTE termchar;
} /* end for(i) */
/* Set R2 to point to next character of operand */
- GR_A(r2, regs) = addr2;
+ GR_Ax(r2, regs, addr2);
/* Return condition code 3 */
regs->psw.cc = 3;
@@ -4928,7 +4928,7 @@ U32 n;
n = effective_addr2 & 0x3F;
/* Shift the signed value of the R1 register */
- (S32)regs->GR_L(r1) = n > 30 ?
+ regs->GR_L(r1) = n > 30 ?
((S32)regs->GR_L(r1) < 0 ? -1 : 0) :
(S32)regs->GR_L(r1) >> n;
@@ -5293,7 +5293,7 @@ U32 n;
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load 2 bytes from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Subtract signed operands and set condition code */
regs->psw.cc =
@@ -5723,7 +5723,7 @@ BYTE trtab[256];
len1--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
+ GR_Ax(r1, regs, addr1);
regs->GR_L(r1+1) = len1;
} /* end for(i) */
$NetBSD: patch-aq,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out gcc language extensions that are no longer supported.
--- service.c~ 2001-02-08 20:07:03.000000000 +0000
+++ service.c
@@ -1300,7 +1300,7 @@ BYTE *xstmap;
}
}
mcd_len -= obj_len;
- (BYTE*)obj_hdr += obj_len;
+ obj_hdr = (SCCB_OBJ_HDR *)((BYTE*)obj_hdr + obj_len);
}
#ifndef NO_CYGWIN_STACK_BUG
$NetBSD: patch-ar,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out gcc language extensions that are no longer supported.
--- cmpsc.c~ 2001-02-10 11:31:39.000000000 +0000
+++ cmpsc.c
@@ -142,8 +142,8 @@
/*----------------------------------------------------------------------------*/
#define ADJUSTREGS(r, regs, len) \
{ \
- GR_A ((r), (regs)) = (GR_A ((r), (regs)) + (len)) & ADDRESS_MAXWRAP((regs)); \
- GR_A ((r) + 1, (regs)) -= (len); \
+ GR_Ax ((r), (regs), (GR_A ((r), (regs)) + (len)) & ADDRESS_MAXWRAP((regs))); \
+ GR_Ax ((r) + 1, (regs), GR_A ((r) + 1, (regs)) - (len)); \
}
/*----------------------------------------------------------------------------*/
$NetBSD: patch-as,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out gcc language extensions that are no longer supported.
--- esame.c~ 2001-02-10 14:41:55.000000000 +0000
+++ esame.c
@@ -945,8 +945,8 @@ U32 i2;
RIL(inst, execflag, regs, r1, opcd, i2);
- GR_A(r1, regs) = ((!execflag ? (regs->psw.IA - 6) : regs->ET)
- + 2*(S32)i2) & ADDRESS_MAXWRAP(regs);
+ GR_Ax(r1, regs, ((!execflag ? (regs->psw.IA - 6) : regs->ET)
+ + 2*(S32)i2) & ADDRESS_MAXWRAP(regs));
}
@@ -1440,7 +1440,7 @@ int i,j;
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares high */
if ( (S64)regs->GR_G(r1) > j )
@@ -1468,7 +1468,7 @@ int i,j;
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares low or equal */
if ( (S64)regs->GR_G(r1) <= j )
@@ -1497,7 +1497,7 @@ S64 i, j;
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares high */
if ( (S64)regs->GR_G(r1) > j )
@@ -1525,7 +1525,7 @@ S64 i, j;
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares low or equal */
if ( (S64)regs->GR_G(r1) <= j )
@@ -1586,7 +1586,7 @@ U64 n;
the physical CPU on a spinlock */
if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
usleep(1L);
-#endif MAX_CPU_ENGINES > 1
+#endif /* MAX_CPU_ENGINES > 1 */
#if defined(_FEATURE_ZSIE)
if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CS1))
@@ -1652,7 +1652,7 @@ U64 n1, n2;
the physical CPU on a spinlock */
if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
usleep(1L);
-#endif MAX_CPU_ENGINES > 1
+#endif /* MAX_CPU_ENGINES > 1 */
#if defined(_FEATURE_ZSIE)
if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CDS1))
@@ -2071,7 +2071,7 @@ int r1, r2;
}
/* Load positive value of second operand and set cc */
- (S64)regs->GR_G(r1) = (S64)regs->GR_G(r2) < 0 ?
+ regs->GR_G(r1) = (S64)regs->GR_G(r2) < 0 ?
-((S64)regs->GR_G(r2)) :
(S64)regs->GR_G(r2);
@@ -2089,9 +2089,9 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Load positive value of second operand and set cc */
- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2) < 0 ?
+ regs->GR_G(r1) = (S64)((S32)regs->GR_L(r2) < 0 ?
-((S32)regs->GR_L(r2)) :
- (S32)regs->GR_L(r2);
+ (S32)regs->GR_L(r2));
regs->psw.cc = (S64)regs->GR_G(r1) == 0 ? 0 : 2;
}
@@ -2107,7 +2107,7 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Load negative value of second operand and set cc */
- (S64)regs->GR_G(r1) = (S64)regs->GR_G(r2) > 0 ?
+ regs->GR_G(r1) = (S64)regs->GR_G(r2) > 0 ?
-((S64)regs->GR_G(r2)) :
(S64)regs->GR_G(r2);
@@ -2125,9 +2125,9 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Load negative value of second operand and set cc */
- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2) > 0 ?
+ regs->GR_G(r1) = (S64) ((S32)regs->GR_L(r2) > 0 ?
-((S32)regs->GR_L(r2)) :
- (S32)regs->GR_L(r2);
+ (S32)regs->GR_L(r2));
regs->psw.cc = (S64)regs->GR_G(r1) == 0 ? 0 : 1;
}
@@ -2160,7 +2160,7 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Copy second operand and set condition code */
- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2);
+ regs->GR_G(r1) = (S64)(S32)regs->GR_L(r2);
regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
(S64)regs->GR_G(r1) > 0 ? 2 : 0;
@@ -2187,7 +2187,7 @@ int r1, r2;
}
/* Load complement of second operand and set condition code */
- (S64)regs->GR_G(r1) = -((S64)regs->GR_G(r2));
+ regs->GR_G(r1) = -((S64)regs->GR_G(r2));
regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
(S64)regs->GR_G(r1) > 0 ? 2 : 0;
@@ -2204,7 +2204,7 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Load complement of second operand and set condition code */
- (S64)regs->GR_G(r1) = -((S32)regs->GR_L(r2));
+ regs->GR_G(r1) = (S64) -((S32)regs->GR_L(r2));
regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
(S64)regs->GR_G(r1) > 0 ? 2 : 0;
@@ -2526,9 +2526,9 @@ U64 n;
regs->GR_G(r1) = regs->GR_G(r3);
/* Shift the signed value of the R1 register */
- (S64)regs->GR_G(r1) = n > 62 ?
+ regs->GR_G(r1) = (S64) (n > 62 ?
((S64)regs->GR_G(r1) < 0 ? -1 : 0) :
- (S64)regs->GR_G(r1) >> n;
+ (S64)regs->GR_G(r1) >> n);
/* Set the condition code */
regs->psw.cc = (S64)regs->GR_G(r1) > 0 ? 2 :
@@ -2552,7 +2552,7 @@ U32 n;
n = ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
/* Multiply signed operands ignoring overflow */
- (S64)regs->GR_G(r1) *= (S32)n;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S32)n;
}
@@ -2573,7 +2573,7 @@ U64 n;
n = ARCH_DEP(vfetch8) ( effective_addr2, b2, regs );
/* Multiply signed operands ignoring overflow */
- (S64)regs->GR_G(r1) *= (S64)n;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S64)n;
}
@@ -2588,7 +2588,7 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Multiply signed registers ignoring overflow */
- (S64)regs->GR_G(r1) *= (S32)regs->GR_L(r2);
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S32)regs->GR_L(r2);
}
@@ -2603,7 +2603,7 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Multiply signed registers ignoring overflow */
- (S64)regs->GR_G(r1) *= (S64)regs->GR_G(r2);
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S64)regs->GR_G(r2);
}
@@ -2620,7 +2620,7 @@ U16 i2;
RI(inst, execflag, regs, r1, opcd, i2);
/* Load operand into register */
- (S64)regs->GR_G(r1) = (S16)i2;
+ regs->GR_G(r1) = (S64)(S16)i2;
}
@@ -2662,7 +2662,7 @@ U16 i2;
RI(inst, execflag, regs, r1, opcd, i2);
/* Multiply register by operand ignoring overflow */
- (S64)regs->GR_G(r1) *= (S16)i2;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S16)i2;
}
@@ -2826,7 +2826,7 @@ int r1, r2;
RRE(inst, execflag, regs, r1, r2);
/* Copy second operand to first operand */
- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2);
+ regs->GR_G(r1) = (S64)(S32)regs->GR_L(r2);
}
@@ -3349,7 +3349,7 @@ VADR effective_addr2;
RXE(inst, execflag, regs, r1, b2, effective_addr2);
/* Load R1 register from second operand */
- (S64)regs->GR_G(r1) = (S32)ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
+ regs->GR_G(r1) = (S64) (S32)ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
}
$NetBSD: patch-at,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out mismatched decls gcc no longer accepts.
--- tapemap.c~ 2001-01-28 18:05:41.000000000 +0000
+++ tapemap.c
@@ -35,7 +35,7 @@ static BYTE buf[65500];
/*-------------------------------------------------------------------*/
/* ASCII to EBCDIC translate tables */
/*-------------------------------------------------------------------*/
-static unsigned char
+unsigned char
ebcdic_to_ascii[] = {
"\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
"\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"
$NetBSD: patch-au,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out mismatched decls gcc no longer accepts.
--- tapecopy.c~ 2010-01-17 07:18:17.000000000 +0000
+++ tapecopy.c
@@ -64,7 +64,7 @@ static BYTE buf[65500];
/*-------------------------------------------------------------------*/
/* ASCII to EBCDIC translate tables */
/*-------------------------------------------------------------------*/
-static unsigned char
+unsigned char
ebcdic_to_ascii[] = {
"\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
"\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"
$NetBSD: patch-av,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out mismatched decls gcc no longer accepts.
--- tapelist.c~ 2001-02-11 03:20:05.000000000 +0000
+++ tapelist.c
@@ -39,7 +39,7 @@ static BYTE buf[65500];
/*-------------------------------------------------------------------*/
/* EBCDIC to ASCII translate table */
/*-------------------------------------------------------------------*/
-static unsigned char
+unsigned char
ebcdic_to_ascii[] = {
"\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
"\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"
$NetBSD: patch-aw,v 1.1.2.2 2010/01/21 11:59:30 tron Exp $
Patch out mismatched decls gcc no longer accepts.
--- tapesplit.c~ 2001-01-28 18:05:41.000000000 +0000
+++ tapesplit.c
@@ -36,7 +36,7 @@ static BYTE buf[65500];
/*-------------------------------------------------------------------*/
/* ASCII to EBCDIC translate tables */
/*-------------------------------------------------------------------*/
-static unsigned char
+unsigned char
ebcdic_to_ascii[] = {
"\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
"\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"