| @@ -1,34 +1,32 @@ | | | @@ -1,34 +1,32 @@ |
1 | $NetBSD: patch-ed,v 1.1 2010/04/25 12:55:41 gson Exp $ | | 1 | $NetBSD: patch-ed,v 1.2 2010/08/09 21:19:09 tsutsui Exp $ |
2 | | | 2 | |
3 | --- target-i386/translate.c.orig 2010-02-23 22:54:38.000000000 +0200 | | 3 | --- target-i386/translate.c.orig 2010-05-04 15:27:48.000000000 +0000 |
4 | +++ target-i386/translate.c | | 4 | +++ target-i386/translate.c |
5 | @@ -4876,20 +4876,24 @@ static target_ulong disas_insn(DisasCont | | 5 | @@ -4879,20 +4879,23 @@ static target_ulong disas_insn(DisasCont |
6 | tcg_gen_sub_tl(t2, cpu_regs[R_EAX], t0); | | 6 | tcg_gen_sub_tl(t2, cpu_regs[R_EAX], t0); |
7 | gen_extu(ot, t2); | | 7 | gen_extu(ot, t2); |
8 | tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, label1); | | 8 | tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, label1); |
9 | + label2 = gen_new_label(); | | 9 | + label2 = gen_new_label(); |
10 | if (mod == 3) { | | 10 | if (mod == 3) { |
11 | - label2 = gen_new_label(); | | 11 | - label2 = gen_new_label(); |
12 | gen_op_mov_reg_v(ot, R_EAX, t0); | | 12 | gen_op_mov_reg_v(ot, R_EAX, t0); |
13 | tcg_gen_br(label2); | | 13 | tcg_gen_br(label2); |
14 | gen_set_label(label1); | | 14 | gen_set_label(label1); |
15 | gen_op_mov_reg_v(ot, rm, t1); | | 15 | gen_op_mov_reg_v(ot, rm, t1); |
16 | - gen_set_label(label2); | | 16 | - gen_set_label(label2); |
17 | } else { | | 17 | } else { |
18 | - tcg_gen_mov_tl(t1, t0); | | 18 | - tcg_gen_mov_tl(t1, t0); |
19 | + /* perform no-op store cycle like physical cpu; must be | | 19 | + /* perform no-op store cycle like physical cpu; must be |
20 | + before changing accumulator to ensure idempotency if | | 20 | + before changing accumulator to ensure idempotency if |
21 | + the store faults and the instruction is restarted | | 21 | + the store faults and the instruction is restarted */ |
22 | + */ | | | |
23 | + gen_op_st_v(ot + s->mem_index, t0, a0); | | 22 | + gen_op_st_v(ot + s->mem_index, t0, a0); |
24 | gen_op_mov_reg_v(ot, R_EAX, t0); | | 23 | gen_op_mov_reg_v(ot, R_EAX, t0); |
25 | + tcg_gen_br(label2); | | 24 | + tcg_gen_br(label2); |
26 | gen_set_label(label1); | | 25 | gen_set_label(label1); |
27 | - /* always store */ | | 26 | - /* always store */ |
28 | - gen_op_st_v(ot + s->mem_index, t1, a0); | | 27 | gen_op_st_v(ot + s->mem_index, t1, a0); |
29 | + gen_op_st_v(ot + s->mem_index, t1, a0); | | | |
30 | } | | 28 | } |
31 | + gen_set_label(label2); | | 29 | + gen_set_label(label2); |
32 | tcg_gen_mov_tl(cpu_cc_src, t0); | | 30 | tcg_gen_mov_tl(cpu_cc_src, t0); |
33 | tcg_gen_mov_tl(cpu_cc_dst, t2); | | 31 | tcg_gen_mov_tl(cpu_cc_dst, t2); |
34 | s->cc_op = CC_OP_SUBB + ot; | | 32 | s->cc_op = CC_OP_SUBB + ot; |