Fri Aug 23 13:05:49 2019 UTC ()
Update to 4.016
Changelog:
* Verilator 4.016 2016-06-16
*** Add --quiet-exit, bug1436. [Todd Strader]
**** Error continuation lines no longer have %Error prefix.
**** Support logical equivalence operator <->.
**** Support VerilatedFstC set_time_unit, bug1433. [Pieter Kapsenberg]
**** Support deferred assertions, bug1449. [Charles Eddleston]
**** Mark infrequently called functions with GCC cold attribute.
**** Fix sign-compare warning in verilated.cpp, bug1437. [Sergey Kvachonok]
**** Fix fault on $realtime with %t, bug1443. [Julien Margetts]
**** Fix $display with string without %s, bug1441. [Denis Rystsov]
**** Fix parameter function string returns, bug1441. [Denis Rystsov]
**** Fix invalid XML output due to special chars, bug1444. [Kanad Kanhere]
**** Fix performance when mulithreaded on 1 CPU, bug1455. [Stefan Wallentowitz]
**** Fix type and real parameter issues, bug1427, bug1456, bug1458. [Todd Strader]
**** Fix build error on MinGW, bug1460. [Richard Myers]
**** Fix not reporting some duplicate signals, bug1462. [Peter Gerst]
**** Fix --savable invalid C++ on packed arrays, bug1465. [Alex Chadwick]
**** Fix constant function return of function var, bug1467. [Roman Popov]
* Verilator 4.014 2019-05-08
*** Add --trace-fst-thread.
**** Support '#' comments in $readmem, bug1411. [Frederick Requin]
**** Support "'dx" constants, bug1423. [Udi Finkelstein]
**** For FST tracing use LZ4 compression. [Tony Bybell]
**** Add error when use parameters without value, bug1424. [Peter Gerst]
**** Auto-extend and WIDTH warn on unsized X/Zs, bug1423. [Udi Finkelstein]
**** Fix missing VL_SHIFTL_ errors, bug1412, bug1415. [Larry Lee]
**** Fix MinGW GCC 6 printf formats, bug1413. [Sergey Kvachonok]
**** Fix test problems when missing fst2vcd, bug1417. [Todd Strader]
**** Fix GTKWave register warning, bug1421. [Pieter Kapsenberg]
**** Fix FST enums not displaying, bug1426. [Danilo Ramos]
**** Fix table compile error with multiinterfaces, bug1431. [Bogdan Vukobratovic]
(ryoon)
diff -r1.3 -r1.4 pkgsrc/cad/verilator/Makefile
diff -r1.2 -r1.3 pkgsrc/cad/verilator/distinfo
--- pkgsrc/cad/verilator/Makefile 2019/08/11 13:18:02 1.3
+++ pkgsrc/cad/verilator/Makefile 2019/08/23 13:05:49 1.4
| @@ -1,17 +1,16 @@ | | | @@ -1,17 +1,16 @@ |
1 | # $NetBSD: Makefile,v 1.3 2019/08/11 13:18:02 wiz Exp $ | | 1 | # $NetBSD: Makefile,v 1.4 2019/08/23 13:05:49 ryoon Exp $ |
2 | | | 2 | |
3 | DISTNAME= verilator-4.012 | | 3 | DISTNAME= verilator-4.016 |
4 | PKGREVISION= 1 | | | |
5 | CATEGORIES= cad | | 4 | CATEGORIES= cad |
6 | MASTER_SITES= https://www.veripool.org/ftp/ | | 5 | MASTER_SITES= https://www.veripool.org/ftp/ |
7 | EXTRACT_SUFX= .tgz | | 6 | EXTRACT_SUFX= .tgz |
8 | | | 7 | |
9 | MAINTAINER= ryoon@NetBSD.org | | 8 | MAINTAINER= ryoon@NetBSD.org |
10 | HOMEPAGE= https://www.veripool.org/wiki/verilator | | 9 | HOMEPAGE= https://www.veripool.org/wiki/verilator |
11 | COMMENT= Verilog HDL simulator | | 10 | COMMENT= Verilog HDL simulator |
12 | LICENSE= gnu-lgpl-v3 OR artistic-2.0 | | 11 | LICENSE= gnu-lgpl-v3 OR artistic-2.0 |
13 | | | 12 | |
14 | GNU_CONFIGURE= yes | | 13 | GNU_CONFIGURE= yes |
15 | FLEX_REQD= 2.6.4 | | 14 | FLEX_REQD= 2.6.4 |
16 | USE_TOOLS+= bison flex gmake perl pkg-config | | 15 | USE_TOOLS+= bison flex gmake perl pkg-config |
17 | USE_LANGUAGES= c c++ | | 16 | USE_LANGUAGES= c c++ |
--- pkgsrc/cad/verilator/distinfo 2019/04/01 12:22:53 1.2
+++ pkgsrc/cad/verilator/distinfo 2019/08/23 13:05:49 1.3
| @@ -1,7 +1,7 @@ | | | @@ -1,7 +1,7 @@ |
1 | $NetBSD: distinfo,v 1.2 2019/04/01 12:22:53 ryoon Exp $ | | 1 | $NetBSD: distinfo,v 1.3 2019/08/23 13:05:49 ryoon Exp $ |
2 | | | 2 | |
3 | SHA1 (verilator-4.012.tgz) = 653688c0dc8521d8d3ab9f9e94180f2271ec08ff | | 3 | SHA1 (verilator-4.016.tgz) = dce30a001574e743198179e4f95939d84b69c7f8 |
4 | RMD160 (verilator-4.012.tgz) = d15a54b8243caf5e22c3f9c6f6ff76ee7a37219b | | 4 | RMD160 (verilator-4.016.tgz) = eba0e31b5b4a9769fb65b842c9a4b9d4b34ecfb6 |
5 | SHA512 (verilator-4.012.tgz) = b2ebe685e5801eb25e76cc9820def7586324b4854651756e0df4c4e21b218ebc2bafd3ef8157d22d90cf6f940089d6d4ac9981e26abf602a5b47f58d878c05ea | | 5 | SHA512 (verilator-4.016.tgz) = 14bb1d0493103e702b1cbe0ea7c639c04cafa87f204952f88e629012dde1fcecf8e1e51569ff7a422b4dcb0566d0fae35acc681b2e47ae88fac6937362ff3254 |
6 | Size (verilator-4.012.tgz) = 2513309 bytes | | 6 | Size (verilator-4.016.tgz) = 2536449 bytes |
7 | SHA1 (patch-Makefile.in) = 3c91715cdfaba04120ada7a328b46e0571767e06 | | 7 | SHA1 (patch-Makefile.in) = 3c91715cdfaba04120ada7a328b46e0571767e06 |