Sat Mar 30 12:40:21 2024 UTC (58d)
security/botan: fix build on 32-bit powerpc systems (non-VSX).
Ref. https://github.com/randombit/botan/issues/3958
(he)
diff -r1.5 -r1.6 pkgsrc/security/botan3/distinfo
diff -r0 -r1.1 pkgsrc/security/botan3/patches/patch-src_lib_utils_simd_simd__32.h
--- pkgsrc/security/botan3/distinfo 2024/02/25 14:58:00 1.5
+++ pkgsrc/security/botan3/distinfo 2024/03/30 12:40:21 1.6
| @@ -1,6 +1,7 @@ | | | @@ -1,6 +1,7 @@ |
| 1 | $NetBSD: distinfo,v 1.5 2024/02/25 14:58:00 wiz Exp $ | | 1 | $NetBSD: distinfo,v 1.6 2024/03/30 12:40:21 he Exp $ |
| 2 | | | 2 | |
| 3 | BLAKE2s (Botan-3.3.0.tar.xz) = d590464efbb88c78d7bb9661a9a436b0f6ad878f2eefef1b12f4a2fa4a55d6e3 | | 3 | BLAKE2s (Botan-3.3.0.tar.xz) = d590464efbb88c78d7bb9661a9a436b0f6ad878f2eefef1b12f4a2fa4a55d6e3 |
| 4 | SHA512 (Botan-3.3.0.tar.xz) = 90930add225a2b4376046b3ed0177c71e7d19e983fb2b99c40751de5e6c3959b520eaa1e836782eb02ebc8aff8e9a4fd928f585de5e6b1798a8ad4aa0464f19b | | 4 | SHA512 (Botan-3.3.0.tar.xz) = 90930add225a2b4376046b3ed0177c71e7d19e983fb2b99c40751de5e6c3959b520eaa1e836782eb02ebc8aff8e9a4fd928f585de5e6b1798a8ad4aa0464f19b |
| 5 | Size (Botan-3.3.0.tar.xz) = 7164024 bytes | | 5 | Size (Botan-3.3.0.tar.xz) = 7164024 bytes |
| | | 6 | SHA1 (patch-src_lib_utils_simd_simd__32.h) = 5547adde559696927279414b9ff6e27b10ea0b6b |
| 6 | SHA1 (patch-src_scripts_install.py) = c8ac2a6315e0e53a0292447e8e6b967572de9d24 | | 7 | SHA1 (patch-src_scripts_install.py) = c8ac2a6315e0e53a0292447e8e6b967572de9d24 |
$NetBSD: patch-src_lib_utils_simd_simd__32.h,v 1.1 2024/03/30 12:40:21 he Exp $
Avoid VSX operations on 32-bit ppc, even if we have altivec.
Ref. https://github.com/randombit/botan/issues/3958
--- src/lib/utils/simd/simd_32.h.orig 2024-02-20 17:28:54.000000000 +0000
+++ src/lib/utils/simd/simd_32.h
@@ -21,6 +21,9 @@
#undef vector
#undef bool
#define BOTAN_SIMD_USE_ALTIVEC
+#ifdef __VSX__
+ #define BOTAN_SIMD_USE_VSX
+#endif
#elif defined(BOTAN_TARGET_SUPPORTS_NEON)
#include <botan/internal/cpuid.h>
@@ -480,7 +483,15 @@ class SIMD_4x32 final {
return SIMD_4x32(_mm_or_si128(_mm_srli_epi16(T, 8), _mm_slli_epi16(T, 8)));
#elif defined(BOTAN_SIMD_USE_ALTIVEC)
+#ifdef BOTAN_SIMD_USE_VSX
return SIMD_4x32(vec_revb(m_simd));
+#else
+ const __vector unsigned char rev[1] = {
+ { 3,2,1,0, 7,6,5,4, 11,10,9,8, 15,14,13,12 },
+ };
+
+ return SIMD_4x32(vec_perm(m_simd, m_simd, rev[0]));
+#endif
#elif defined(BOTAN_SIMD_USE_NEON)
return SIMD_4x32(vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(m_simd))));