Sat Jul 29 10:23:07 2023 UTC ()
Pull up the following revisions, via patch, requested by msaitoh
in ticket #1854:

	usr.sbin/cpuctl/arch/i386.c                     1.137-1.139

- CPU model 0x5a is not Atom E3500 but Atom Z3500.
- Add Alder Lake-N.


(martin)
diff -r1.74.6.17 -r1.74.6.18 src/usr.sbin/cpuctl/arch/i386.c
cvs diff -r1.74.6.17 -r1.74.6.18 src/usr.sbin/cpuctl/arch/i386.c (expand / switch to unified diff)

--- src/usr.sbin/cpuctl/arch/i386.c 2023/06/21 19:06:15 1.74.6.17
+++ src/usr.sbin/cpuctl/arch/i386.c 2023/07/29 10:23:07 1.74.6.18
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: i386.c,v 1.74.6.17 2023/06/21 19:06:15 martin Exp $ */ 1/* $NetBSD: i386.c,v 1.74.6.18 2023/07/29 10:23:07 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc. 4 * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Frank van der Linden, and by Jason R. Thorpe. 8 * by Frank van der Linden, and by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -47,27 +47,27 @@ @@ -47,27 +47,27 @@
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
55 * SUCH DAMAGE. 55 * SUCH DAMAGE.
56 */ 56 */
57 57
58#include <sys/cdefs.h> 58#include <sys/cdefs.h>
59#ifndef lint 59#ifndef lint
60__RCSID("$NetBSD: i386.c,v 1.74.6.17 2023/06/21 19:06:15 martin Exp $"); 60__RCSID("$NetBSD: i386.c,v 1.74.6.18 2023/07/29 10:23:07 martin Exp $");
61#endif /* not lint */ 61#endif /* not lint */
62 62
63#include <sys/types.h> 63#include <sys/types.h>
64#include <sys/param.h> 64#include <sys/param.h>
65#include <sys/bitops.h> 65#include <sys/bitops.h>
66#include <sys/sysctl.h> 66#include <sys/sysctl.h>
67#include <sys/ioctl.h> 67#include <sys/ioctl.h>
68#include <sys/cpuio.h> 68#include <sys/cpuio.h>
69 69
70#include <errno.h> 70#include <errno.h>
71#include <string.h> 71#include <string.h>
72#include <stdio.h> 72#include <stdio.h>
73#include <stdlib.h> 73#include <stdlib.h>
@@ -325,54 +325,55 @@ const struct cpu_cpuid_nameclass i386_cp @@ -325,54 +325,55 @@ const struct cpu_cpuid_nameclass i386_cp
325 [0x45] = "4th gen Core, Xeon E3-12xx v3 " 325 [0x45] = "4th gen Core, Xeon E3-12xx v3 "
326 "(Haswell)", 326 "(Haswell)",
327 [0x46] = "4th gen Core, Xeon E3-12xx v3 " 327 [0x46] = "4th gen Core, Xeon E3-12xx v3 "
328 "(Haswell)", 328 "(Haswell)",
329 [0x47] = "5th gen Core, Xeon E3-1200 v4 (Broadwell)", 329 [0x47] = "5th gen Core, Xeon E3-1200 v4 (Broadwell)",
330 [0x4a] = "Atom Z3400", 330 [0x4a] = "Atom Z3400",
331 [0x4c] = "Atom X[57]-Z8000 (Airmont)", 331 [0x4c] = "Atom X[57]-Z8000 (Airmont)",
332 [0x4d] = "Atom C2000", 332 [0x4d] = "Atom C2000",
333 [0x4e] = "6th gen Core, Xeon E3-1[25]00 v5 (Skylake)", 333 [0x4e] = "6th gen Core, Xeon E3-1[25]00 v5 (Skylake)",
334 [0x4f] = "Xeon E[57] v4 (Broadwell), Core i7-69xx Extreme", 334 [0x4f] = "Xeon E[57] v4 (Broadwell), Core i7-69xx Extreme",
335 [0x55] = "Xeon Scalable (Skylake, Cascade Lake, Copper Lake)", 335 [0x55] = "Xeon Scalable (Skylake, Cascade Lake, Copper Lake)",
336 [0x56] = "Xeon D-1500 (Broadwell)", 336 [0x56] = "Xeon D-1500 (Broadwell)",
337 [0x57] = "Xeon Phi [357]200 (Knights Landing)", 337 [0x57] = "Xeon Phi [357]200 (Knights Landing)",
338 [0x5a] = "Atom E3500", 338 [0x5a] = "Atom Z3500",
339 [0x5c] = "Atom (Goldmont)", 339 [0x5c] = "Atom (Goldmont)",
340 [0x5d] = "Atom X3-C3000 (Silvermont)", 340 [0x5d] = "Atom X3-C3000 (Silvermont)",
341 [0x5e] = "6th gen Core, Xeon E3-1[25]00 v5 (Skylake)", 341 [0x5e] = "6th gen Core, Xeon E3-1[25]00 v5 (Skylake)",
342 [0x5f] = "Atom (Goldmont, Denverton)", 342 [0x5f] = "Atom (Goldmont, Denverton)",
343 [0x66] = "8th gen Core i3 (Cannon Lake)", 343 [0x66] = "8th gen Core i3 (Cannon Lake)",
344 [0x6a] = "3rd gen Xeon Scalable (Ice Lake)", 344 [0x6a] = "3rd gen Xeon Scalable (Ice Lake)",
345 [0x6c] = "3rd gen Xeon Scalable (Ice Lake)", 345 [0x6c] = "3rd gen Xeon Scalable (Ice Lake)",
346 [0x7a] = "Atom (Goldmont Plus)", 346 [0x7a] = "Atom (Goldmont Plus)",
347 [0x7d] = "10th gen Core (Ice Lake)", 347 [0x7d] = "10th gen Core (Ice Lake)",
348 [0x7e] = "10th gen Core (Ice Lake)", 348 [0x7e] = "10th gen Core (Ice Lake)",
349 [0x85] = "Xeon Phi 7215, 7285, 7295 (Knights Mill)", 349 [0x85] = "Xeon Phi 7215, 7285, 7295 (Knights Mill)",
350 [0x86] = "Atom (Tremont)", 350 [0x86] = "Atom (Tremont)",
351 [0x8c] = "11th gen Core (Tiger Lake)", 351 [0x8c] = "11th gen Core (Tiger Lake)",
352 [0x8d] = "11th gen Core (Tiger Lake)", 352 [0x8d] = "11th gen Core (Tiger Lake)",
353 [0x8e] = "7th or 8th gen Core (Kaby Lake, Coffee Lake) or Xeon E (Coffee Lake)", 353 [0x8e] = "7th or 8th gen Core (Kaby Lake, Coffee Lake) or Xeon E (Coffee Lake)",
354 [0x8f] = "4th gen Xeon Scalable (Sapphire Rapids)", 354 [0x8f] = "4th gen Xeon Scalable (Sapphire Rapids)",
355 [0x96] = "Atom x6000E (Elkhart Lake)", 355 [0x96] = "Atom x6000E (Elkhart Lake)",
356 [0x97] = "12th gen Core (Alder Lake)", 356 [0x97] = "12th gen Core (Alder Lake)",
357 [0x9a] = "12th gen Core (Alder Lake)", 357 [0x9a] = "12th gen Core (Alder Lake)",
358 [0x9c] = "Pentium Silver N6xxx, Celeron N45xx, Celeron N51xx (Jasper Lake)", 358 [0x9c] = "Pentium Silver N6xxx, Celeron N45xx, Celeron N51xx (Jasper Lake)",
359 [0x9e] = "7th or 8th gen Core (Kaby Lake, Coffee Lake) or Xeon E (Coffee Lake)", 359 [0x9e] = "7th or 8th gen Core (Kaby Lake, Coffee Lake) or Xeon E (Coffee Lake)",
360 [0xa5] = "10th gen Core (Comet Lake)", 360 [0xa5] = "10th gen Core (Comet Lake)",
361 [0xa6] = "10th gen Core (Comet Lake)", 361 [0xa6] = "10th gen Core (Comet Lake)",
362 [0xa7] = "11th gen Core (Rocket Lake)", 362 [0xa7] = "11th gen Core (Rocket Lake)",
363 [0xa8] = "11th gen Core (Rocket Lake)", 363 [0xa8] = "11th gen Core (Rocket Lake)",
364 [0xba] = "13th gen Core (Raptor Lake)", 
365 [0xb7] = "13th gen Core (Raptor Lake)", 364 [0xb7] = "13th gen Core (Raptor Lake)",
 365 [0xba] = "13th gen Core (Raptor Lake)",
 366 [0xbe] = "Core i3-N3xx N[12]xx Nxx Atom x7xxxE (Alder Lake-N)",
366 [0xbf] = "13th gen Core (Raptor Lake)", 367 [0xbf] = "13th gen Core (Raptor Lake)",
367 }, 368 },
368 "Pentium Pro, II or III", /* Default */ 369 "Pentium Pro, II or III", /* Default */
369 NULL, 370 NULL,
370 intel_family_new_probe, 371 intel_family_new_probe,
371 intel_cpu_cacheinfo, 372 intel_cpu_cacheinfo,
372 }, 373 },
373 /* Family > 6 */ 374 /* Family > 6 */
374 { 375 {
375 CPUCLASS_686, 376 CPUCLASS_686,
376 { 377 {
377 0, 0, 0, 0, 0, 0, 0, 0, 378 0, 0, 0, 0, 0, 0, 0, 0,
378 0, 0, 0, 0, 0, 0, 0, 0, 379 0, 0, 0, 0, 0, 0, 0, 0,