| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: irongate_pci.c,v 1.12 2021/06/25 03:45:59 thorpej Exp $ */ | | 1 | /* $NetBSD: irongate_pci.c,v 1.12.10.1 2024/04/16 19:10:07 martin Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2000 The NetBSD Foundation, Inc. | | 4 | * Copyright (c) 2000 The NetBSD Foundation, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation | | 7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Jason R. Thorpe. | | 8 | * by Jason R. Thorpe. |
9 | * | | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | | 10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions | | 11 | * modification, are permitted provided that the following conditions |
12 | * are met: | | 12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright | | 13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. | | 14 | * notice, this list of conditions and the following disclaimer. |
| @@ -26,27 +26,27 @@ | | | @@ -26,27 +26,27 @@ |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
29 | * POSSIBILITY OF SUCH DAMAGE. | | 29 | * POSSIBILITY OF SUCH DAMAGE. |
30 | */ | | 30 | */ |
31 | | | 31 | |
32 | /* | | 32 | /* |
33 | * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic | | 33 | * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic |
34 | * chipset. | | 34 | * chipset. |
35 | */ | | 35 | */ |
36 | | | 36 | |
37 | #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ | | 37 | #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ |
38 | | | 38 | |
39 | __KERNEL_RCSID(0, "$NetBSD: irongate_pci.c,v 1.12 2021/06/25 03:45:59 thorpej Exp $"); | | 39 | __KERNEL_RCSID(0, "$NetBSD: irongate_pci.c,v 1.12.10.1 2024/04/16 19:10:07 martin Exp $"); |
40 | | | 40 | |
41 | #include <sys/param.h> | | 41 | #include <sys/param.h> |
42 | #include <sys/systm.h> | | 42 | #include <sys/systm.h> |
43 | #include <sys/kernel.h> | | 43 | #include <sys/kernel.h> |
44 | #include <sys/device.h> | | 44 | #include <sys/device.h> |
45 | | | 45 | |
46 | #include <dev/pci/pcireg.h> | | 46 | #include <dev/pci/pcireg.h> |
47 | #include <dev/pci/pcivar.h> | | 47 | #include <dev/pci/pcivar.h> |
48 | #include <alpha/pci/irongatereg.h> | | 48 | #include <alpha/pci/irongatereg.h> |
49 | #include <alpha/pci/irongatevar.h> | | 49 | #include <alpha/pci/irongatevar.h> |
50 | | | 50 | |
51 | static pcireg_t irongate_conf_read(void *, pcitag_t, int); | | 51 | static pcireg_t irongate_conf_read(void *, pcitag_t, int); |
52 | static void irongate_conf_write(void *, pcitag_t, int, pcireg_t); | | 52 | static void irongate_conf_write(void *, pcitag_t, int, pcireg_t); |
| @@ -96,26 +96,27 @@ irongate_conf_read(void *ipv, pcitag_t t | | | @@ -96,26 +96,27 @@ irongate_conf_read(void *ipv, pcitag_t t |
96 | pcireg_t | | 96 | pcireg_t |
97 | irongate_conf_read0(void *ipv, pcitag_t tag, int offset) | | 97 | irongate_conf_read0(void *ipv, pcitag_t tag, int offset) |
98 | { | | 98 | { |
99 | pcireg_t data; | | 99 | pcireg_t data; |
100 | int s; | | 100 | int s; |
101 | | | 101 | |
102 | if ((unsigned int)offset >= PCI_CONF_SIZE) | | 102 | if ((unsigned int)offset >= PCI_CONF_SIZE) |
103 | return (pcireg_t) -1; | | 103 | return (pcireg_t) -1; |
104 | | | 104 | |
105 | PCI_CONF_LOCK(s); | | 105 | PCI_CONF_LOCK(s); |
106 | REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff)); | | 106 | REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff)); |
107 | alpha_mb(); | | 107 | alpha_mb(); |
108 | data = REGVAL(PCI_CONF_DATA); | | 108 | data = REGVAL(PCI_CONF_DATA); |
| | | 109 | alpha_mb(); |
109 | REGVAL(PCI_CONF_ADDR) = 0; | | 110 | REGVAL(PCI_CONF_ADDR) = 0; |
110 | alpha_mb(); | | 111 | alpha_mb(); |
111 | PCI_CONF_UNLOCK(s); | | 112 | PCI_CONF_UNLOCK(s); |
112 | | | 113 | |
113 | return (data); | | 114 | return (data); |
114 | } | | 115 | } |
115 | | | 116 | |
116 | static void | | 117 | static void |
117 | irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data) | | 118 | irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data) |
118 | { | | 119 | { |
119 | int s; | | 120 | int s; |
120 | | | 121 | |
121 | if ((unsigned int)offset >= PCI_CONF_SIZE) | | 122 | if ((unsigned int)offset >= PCI_CONF_SIZE) |