viac7temp(4): rewrite temperature sensor to read value from MSR instead of using
documented cpuid instruction and eax register.

This approach is adapted from linux via-cputemp.c, no official documentation is
currently available. However, msr value seems to work on all tested CPUs while
documented cpuid instruction typically reports 0, even for my C7-D CPU.
msr value seems to have temperature in Celsius in lower 24-bits without fraction
(thus "msr & 0xffffff;" is used).

Tested on my personal systems based on CPUs below (i386 and amd64):
C7-D 1.6GHz (i386 only), Nano X2 L4350E, Nano X2 U4300, U2300 Nano, KX-U6580.
Also got one response via email which was based on Nano X2 L4050 (VE-900).
Nano reports independent values for each core.
KX-U6580 seems to show the same value for all cores but more testing is needed.

Since it works on amd64 capable CPUs, adding driver to GENERIC kernel config.
Also moving viac7temp man page to x86 instead of i386 (with updates).
In theory the change should add support for all VIA Nano CPUs and Zhaoxin CPUs
 at least up to KX-6000(G) series.

In the future I may need to introduce amd64 kernel module as well.

Plan to pullup to at least netbsd-10.

Patch mainly reviewed by riastradh.


(andvar)

.\" $NetBSD: viac7temp.4,v 1.1 2024/04/30 19:35:29 andvar Exp $
.\"
.\" Copyright (c) 2011 Jukka Ruohonen <jruohonen@iki.fi>
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.Dd April 30, 2024
.Dt VIAC7TEMP 4
.Os
.Sh NAME
.Nm viac7temp
.Nd VIA C7, VIA Nano and Zhaoxin CPU temperature sensor
.Sh SYNOPSIS
.Cd "viac7temp* at cpu?"
.Sh DESCRIPTION
The
.Nm
driver supports temperature sensors found in
.Tn VIA
.Tn C7,
.Tn VIA
.Tn Nano
and 
.Tn Zhaoxin
processors.
The available information is available through the
.Xr envsys 4
.Tn API
and the
.Xr envstat 8
command.
.Sh SEE ALSO
.Xr coretemp 4
.Sh AUTHORS
.An Jared D. McNeill Aq Mt jmcneill@invisible.ca