Use LFENCE/SFENCE/MFENCE in x86 bus_space_barrier.

These are needed for BUS_SPACE_MAP_PREFETCHABLE mappings.  On x86,
these are WC-type memory regions, which means -- unlike normal
WB-type memory regions -- loads can be reordered with loads,
requiring LFENCE, and stores can be reordered with stores, requiring
SFENCE.

Reference: AMD64 Architecture Programmer's Manual, Volume 2: System
Programming, Sec. 7.4.1 `Memory Barrier Interaction with Memory
Types', Table 7-3 `Memory Access Ordering Rules'.

(riastradh)